it builds! what more do you want?

Signed-off-by: Sean Cross <sean@xobs.io>

include/hw/common.h

@@ -0,0 +1,52 @@
+#ifndef __HW_COMMON_H
+#define __HW_COMMON_H
+
+#include <stdint.h>
+
+/* To overwrite CSR accessors, define extern, non-inlined versions
+ * of csr_read[bwl]() and csr_write[bwl](), and define
+ * CSR_ACCESSORS_DEFINED.
+ */
+
+#ifndef CSR_ACCESSORS_DEFINED
+#define CSR_ACCESSORS_DEFINED
+
+#ifdef __ASSEMBLER__
+#define MMPTR(x) x
+#else /* ! __ASSEMBLER__ */
+#define MMPTR(x) (*((volatile unsigned int *)(x)))
+
+static inline void csr_writeb(uint8_t value, uint32_t addr)
+{
+	*((volatile uint8_t *)addr) = value;
+}
+
+static inline uint8_t csr_readb(uint32_t addr)
+{
+	return *(volatile uint8_t *)addr;
+}
+
+static inline void csr_writew(uint16_t value, uint32_t addr)
+{
+	*((volatile uint16_t *)addr) = value;
+}
+
+static inline uint16_t csr_readw(uint32_t addr)
+{
+	return *(volatile uint16_t *)addr;
+}
+
+static inline void csr_writel(uint32_t value, uint32_t addr)
+{
+	*((volatile uint32_t *)addr) = value;
+}
+
+static inline uint32_t csr_readl(uint32_t addr)
+{
+	return *(volatile uint32_t *)addr;
+}
+#endif /* ! __ASSEMBLER__ */
+
+#endif /* ! CSR_ACCESSORS_DEFINED */
+
+#endif /* __HW_COMMON_H */

include/hw/ethmac_mem.h

@@ -0,0 +1,11 @@
+#ifndef __HW_ETHMAC_MEM_H
+#define __HW_ETHMAC_MEM_H
+
+#include <generated/mem.h>
+
+#define ETHMAC_RX0_BASE	ETHMAC_BASE
+#define ETHMAC_RX1_BASE	(ETHMAC_BASE+0x0800)
+#define ETHMAC_TX0_BASE	(ETHMAC_BASE+0x1000)
+#define ETHMAC_TX1_BASE	(ETHMAC_BASE+0x1800)
+
+#endif

include/hw/flags.h

@@ -0,0 +1,40 @@
+#ifndef __HW_FLAGS_H
+#define __HW_FLAGS_H
+
+#define UART_EV_TX	0x1
+#define UART_EV_RX	0x2
+
+#define DFII_CONTROL_SEL		0x01
+#define DFII_CONTROL_CKE		0x02
+#define DFII_CONTROL_ODT		0x04
+#define DFII_CONTROL_RESET_N	0x08
+
+#define DFII_COMMAND_CS		0x01
+#define DFII_COMMAND_WE		0x02
+#define DFII_COMMAND_CAS	0x04
+#define DFII_COMMAND_RAS	0x08
+#define DFII_COMMAND_WRDATA	0x10
+#define DFII_COMMAND_RDDATA	0x20
+
+#define ETHMAC_EV_SRAM_WRITER	0x1
+#define ETHMAC_EV_SRAM_READER	0x1
+
+#define CLKGEN_STATUS_BUSY		0x1
+#define CLKGEN_STATUS_PROGDONE	0x2
+#define CLKGEN_STATUS_LOCKED	0x4
+
+#define DVISAMPLER_TOO_LATE		0x1
+#define DVISAMPLER_TOO_EARLY	0x2
+
+#define DVISAMPLER_DELAY_MASTER_CAL	0x01
+#define DVISAMPLER_DELAY_MASTER_RST	0x02
+#define DVISAMPLER_DELAY_SLAVE_CAL	0x04
+#define DVISAMPLER_DELAY_SLAVE_RST	0x08
+#define DVISAMPLER_DELAY_INC		0x10
+#define DVISAMPLER_DELAY_DEC		0x20
+
+#define DVISAMPLER_SLOT_EMPTY	0
+#define DVISAMPLER_SLOT_LOADED	1
+#define DVISAMPLER_SLOT_PENDING	2
+
+#endif /* __HW_FLAGS_H */