fa23-si/index.html

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<title>The State of Open Silicon</title>
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<a class="url" href="https://p.xobs.io/fa23/">p.xobs.io/fa23</a>
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<div class="slides">
<section>
<h2>The State of Open Silicon</h2>
<h3>Sean "xobs" Cross, Foosn PTE Ltd</h3>
<img data-src="img/j22-core.jpg">
</section>
<section>
<h2>About Me</h2>
<img data-src="img/xobs-projects.jpg">
</section>
<section>
<h2>Open Silicon</h2>
<img data-src="img/caravel.jpg">
</section>
<section>
<h2>Talk Outline</h2>
<ol>
<li>What does it mean for silicon to be "open"?</li>
<li>What can we do today?</li>
<li>What can't we do today?</li>
<li>Where can we go from here?</li>
</ol>
</section>
<section>
<section>
<h2>What does it mean for silicon to be "open"?</h2>
<div class="r-hstack">
<div>
<div>Availability of:</div>
<ol>
<li data-fragment-index="1" class="fragment highlight-current-blue">Manuals</li>
<li data-fragment-index="2" class="fragment highlight-current-blue">Source</li>
<li data-fragment-index="3" class="fragment highlight-current-blue">Tooling</li>
<li data-fragment-index="4" class="fragment highlight-current-blue">GDSII</li>
</ol>
</div>
<div class="r-stack">
<img data-src="img/documentation-example-2.png" class="fragment fade-in-then-out"
data-fragment-index="1">
<img data-src="img/code-example.png" class="fragment fade-in-then-out"
data-fragment-index="2">
<img data-src="img/openlane-flow-v1.png" height="500" class="fragment fade-in-then-out"
data-fragment-index="3">
<img data-src="img/pmosfet.png" class="fragment fade-in" data-fragment-index="4">
</div>
</div>
</section>
<section>
<h2>Parts of chip design</h2>
<ol>
<li>Nondisclosure Agreements</li>
<li>Process Design Kit (PDK)</li>
<li>EDA Software (tooling)</li>
<li>IP (libraries)</li>
<!-- <li>Fabrication method</li> -->
</ol>
</section>
<section>
<h2>Nondisclosure Agreements</h2>
NDAs are required for using many packages
</section>
<section>
<h2>Process Design Kit</h2>
<div class="r-vstack">
<img data-src="img/metal_stack.svg" height="450" style="background-color: white;">
<p>Example PDK stackup</p>
</div>
<aside class="notes">
<ul>
<li>Process design kits (PDKs) are closed and under NDA</li>
<li>Mostly just a blank canvas</li>
</ul>
</aside>
</section>
<section>
<h2>EDA Software</h2>
<ul>
<li data-fragment-index="2" class="fragment highlight-blue">Synthesis</li>
<li>Power generation</li>
<li>Clock tree synthesis</li>
<li>Place and route</li>
<li>Verification</li>
<li>Simulation</li>
</ul>
<p data-fragment-index="1" class="fragment highlight-red">Industry tools cost $1mm plus per seat</p>
</section>
<section>
<h2>IP Blocks</h2>
<div class="r-vstack">
<ul>
<li>PCIe Controllers</li>
<li>Radios</li>
<li class="fragment highlight-green">Standard cells</li>
</ul>
<img data-src="img/gf180mcu_fd_sc_mcu7t5v0__latq_1.layout.png">
</div>
</section>
<section>
<h2>Boolean Logic</h2>
<table class="wikitable" style="margin:1em auto 1em auto; text-align:center;">
<tbody>
<tr>
<th><i>p</i></th>
<th><i>q</i></th>
<td></td>
<th>NOR</th>
<th>XOR</th>
<th>NAND</th>
<th>AND</th>
<th>XNOR</th>
<th>OR</th>
</tr>
<tr>
<th>T</th>
<th>T</th>
<td></td>
<td>F</td>
<td>F</td>
<td>F</td>
<td>T</td>
<td>T</td>
<td>T</td>
</tr>
<tr>
<th>T</th>
<th>F
</th>
<td></td>
<td>F</td>
<td>T</td>
<td>T</td>
<td>F</td>
<td>F</td>
<td>T</td>
</tr>
<tr>
<th>F</th>
<th>T</th>
<td></td>
<td>F</td>
<td>T</td>
<td>T</td>
<td>F</td>
<td>F</td>
<td>T</td>
</tr>
<tr>
<th>F</th>
<th>F</th>
<td></td>
<td>T</td>
<td>F</td>
<td>T</td>
<td>F</td>
<td>T</td>
<td>F</td>
</tr>
</tbody>
</table>
</section>
<section>
<h2>Digital design (In The Beginning)</h2>
<div class="r-vstack">
<img data-src="img/6502-die-shot.jpg" height="450">
<p>Motorola 6502, image &copy; 2016 Pauli Rautakorpi</p>
</div>
</section>
<section>
<h2>GD32F103CBT6</h2>
<div class="r-stack r-stretch">
<img data-src="img/GD32F103CBT6-zeptobars.jpg">
<img data-src="img/GD32F103CBT6-zeptobars-annotated.jpg" class="fragment fade-in-then-out">
<!-- <img data-src="img/GD32F103CBT6-zeptobars.jpg" class="fragment fade-in-then-out"> -->
<img data-src="img/GD32F103CBT6-SC1-50.jpg" class="fragment fade-in-then-out">
<img data-src="img/GD32F103CBT6-SC1-50-tracks.jpg" class="fragment fade-in-then-out">
<img data-src="img/GD32F103CBT6-SC2-50.jpg" class="fragment fade-in-then-out">
</div>
<p>Image &copy; 2016 Zeptobars</p>
</section>
<section>
<h2>Digital Synthesis (Today)</h2>
<div class="r-vstack">
<div class="r-hstack">
<pre data-id="code-animation"><code class="hljs verilog" data-trim data-line-numbers>
module and_four(input A, input B,
input C, input D,
output X);
assign X = A & B & C & D;
endmodule
</code></pre>&nbsp;&nbsp;
<div>Verilog: X is <code>1</code> if A, B, C, and D are all 1, otherwise X is <code>0</code>
</div>
</div>
<div class="r-hstack fragment">
<img data-src="img/boolean-4.png">&nbsp;&nbsp;
<img class="fragment" data-src="img/boolean-1.png">
</div>
</div>
</section>
<!-- <section>
<h2>Method to tape out</h2>
<ul>
<li>Shuttle runs</li>
<li>Full wafer</li>
<li>Turnaround time is in months</li>
</ul>
</section> -->
</section>
<section>
<section>
<h2>Where are we now (in open source)?</h2>
</section>
<section>
<h2>Things are looking pretty good!</h2>
</section>
<section>
<h2 class="fragment strike highlight-green">Nondisclosure Agreements</h2>
</section>
<section>
<h2>Open PDKs</h2>
<div class="r-hstack">
<ul>
<li>Real PDKs</li>
<ul>
<li>SKY130</li>
<!-- <li>SKY90FD</li> -->
<li>GF180MCU</li>
<li>SG13G2</li>
</ul>
<li>"Fake" PDKs</li>
<ul>
<li>FreePDK45</li>
<li>ASAP5</li>
<li>Many more!</li>
</ul>
</ul>
<img data-src="img/sky130-designrules.png" height="500">
</div>
</section>
<section>
<h2>Hardware Synthesis</h2>
<div class="r-hstack">
<img data-src="img/yosys-startup.jpg">
<ul>
<li>Yosys (Verilog)</li>
<li>Plugins:</li>
<ul>
<li>GHDL (VHDL)</li>
<li>UHDM (SystemVerilog)</li>
</ul>
</ul>
</div>
</section>
<!-- <section>
<h2>High level languages</h2>
<ul>
<li>LiteX <i>Python</i></li>
<li>SpinalHDL <i>Scala</i></li>
<li>XLS</li>
<li>Chisel <i>Scala</i></li>
<li>Clash <i>Haskell</i></li>
</ul>
</section> -->
<section>
<h2>Placement, Routing, PDN, etc...</h2>
<img data-src="img/openroad-gui.jpg">
<aside class="notes">
<ul>
<li>OpenROAD</li>
<li>Integrates other tools natively</li>
<li>Competitive with closed tools</li>
</ul>
</aside>
</section>
<section>
<h2>Direct Cell Design and Inspection</h2>
<img data-src="img/klayout-gui.jpg" class="r-stretch">
<!-- <ul>
<li>Magic</li>
<li>KLayout</li>
</ul> -->
</section>
<section>
<h2>Available IP</h2>
<div class="r-hstack">
<div>
<img data-src="img/Riscduino_Soc.png" height="500">
<div>Dinesh Annayya</div>
</div>
<ul>
<ul>
<li>CPU</li>
<li>FPGA</li>
<li>SPI</li>
<li>USB</li>
<li>AES</li>
</ul>
<ul>
<li>DAC</li>
<li>ADC</li>
<li>PLL</li>
</ul>
</ul>
</div>
</section>
<section>
<h2>Standard cells</h2>
<div>
<ul>
<li>SKY130</li>
<li>GF180MCU</li>
<li>OSU018</li>
<li>LibreSilicon</li>
</ul>
<img data-src="img/sky130_fd_sc_hd__dfrbp_2-zoomed.svg">
</div>
</section>
<!-- <section>
<h2>Simulation</h2>
<div class="r-hstack">
<ul>
<li>GHDL</li>
<li>Icarus Verilog</li>
<li>Verilator</li>
<li>GTKWave</li>
<li>Spice</li>
</ul>
<img data-src="img/gtkwave-gui.png">
</div>
</section> -->
</section>
<section>
<section>
<h2>What can't we do today?</h2>
</section>
<section>
<h2>Memories are still hard</h2>
<div class="r-stack">
<ul data-fragment-index="1" class="fragment fade-in-then-out">
<li>Density is constantly improving</li>
<li>Expect kilobytes of RAM on a chip</li>
<ul>
<li>Compare to megabytes of cache</li>
</ul>
<li>A ~4x increase is possible</li>
<li>Experimental ROM support</li>
</ul>
<div class="fragment" data-fragment-index="2">
<div class="r-stack">
<img data-fragment-index="2" data-src="img/minimax-cpu-vs-memories.jpg"
class="fragment fade-in-then-out">
<img data-fragment-index="3" data-src="img/minimax-cpu-vs-memories-mem.jpg"
class="fragment fade-in-then-out">
<img data-fragment-index="4" data-src="img/minimax-cpu-vs-memories-cpu.jpg"
class="fragment fade-in-then-out">
</div>
<div class="r-stack">
<div data-fragment-index="2" class="fragment fade-in-then-out">RAM, Registers, CPU</div>
<div data-fragment-index="3" class="fragment fade-in-then-out">RAM, Registers, CPU</div>
<div data-fragment-index="4" class="fragment fade-in-then-out">RAM, Registers, CPU</div>
</div>
</div>
<div class="fragment fade-in-then-out" data-fragment-index="5">
<img data-src="img/SCMOS_16kb_sram.jpg" height="400">
<div>16 kB RAM, 3.3V</div>
</div>
</div>
</section>
<section>
<h2>Nonvolatile storage is still hard</h2>
<ul>
<li>No EEPROM or flash</li>
<li>ReRAM is experimental on SKY130</li>
<li>Just use external SPI flash</li>
</ul>
</section>
<section>
<h2>PDKs are large nodes</h2>
<div class="r-stack">
<!-- <li>180nm: Playstation 2 "Emotion Engine"</li>
<li>130nm: Gamecube CPU "Gekko": 43 mm<sup>2</sup> (2001)</li> -->
<img class="fragment fade-in-then-out" data-src="img/180nm-examples.png">
<img class="fragment fade-in-then-out" data-src="img/130nm-examples.png">
<div class="fragment fade-in-then-out">
<img data-src="img/blinker-HD.jpg" height="400">
<p>Flicker LED circuit, 3µm, image &copy; 2015 Zeptobars</p>
</div>
</div>
</section>
<section>
<h2>Analogue IP is still difficult</h2>
<ul>
<li>Some tapeouts exist, but documentation is scarce</li>
<li>Need more integration examples</li>
</ul>
</section>
<section>
<h2>What about taping out chips?</h2>
<ul>
<li>Google OpenMPW</li>
<li>ChipIgnite</li>
<li>EuroPractice</li>
<li>Muse</li>
<li>SIMC</li>
</ul>
<div class="fade-in fragment">
<div class="fragment highlight-red">Expect to pay $10,000 - $50,000</div>
</div>
</section>
</section>
<section>
<section>
<h2>Where are we going from here?</h2>
<h3>And how you help</h3>
</section>
<section>
<h2>More open projects</h2>
<img data-src="img/openmpw-shuttle.jpg">
<p>developers.google.com/silicon</p>
</section>
<section>
<h2>Education</h2>
<img data-src="img/tinytapeout.jpg">
<p>$25 tinytapeout.com</p>
<p>Zero-to-ASIC zerotoasiccourse.com</p>
<!-- <ul>
<li>NDA-free design</li>
<li>Many more hobbyists</li>
<li>Zero-to-ASIC course</li>
</ul> -->
</section>
<section>
<h2>More analogue design</h2>
<div class="r-vstack">
<img data-src="img/siliwiz-gui.png" height="450">
<p>app.siliwiz.com</p>
</div>
<!-- <ul>
<li>Siliwiz</li>
</ul> -->
</section>
<section>
<h2>Smaller process nodes?</h2>
<ul>
<li>OpenROAD has been tested on smaller nodes</li>
<li>No deep-submicron NDA-free PDKs yet</li>
</ul>
</section>
<section>
<h2>More involvement</h2>
<ul>
<li>OpenMPW -- developers.google.com/silicon</li>
<li>Tiny Tapeout -- tinytapeout.com</li>
<li>Siliwiz -- app.siliwiz.com</li>
</ul>
<img class="fragment" data-src="img/j22-core.jpg">
<h2 class="fragment">Thank you</h2>
<h3 class="fragment">Questions?</h3>
</section>
</section>
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