336
index.html
336
index.html
@ -9,7 +9,7 @@
|
||||
|
||||
<link rel="stylesheet" href="dist/reset.css">
|
||||
<link rel="stylesheet" href="dist/reveal.css">
|
||||
<link rel="stylesheet" href="dist/theme/black.css">
|
||||
<link rel="stylesheet" href="dist/theme/moon.css">
|
||||
|
||||
<!-- Theme used for syntax highlighted code -->
|
||||
<link rel="stylesheet" href="plugin/highlight/monokai.css">
|
||||
@ -18,7 +18,10 @@
|
||||
<body>
|
||||
<div class="reveal">
|
||||
<div class="slides">
|
||||
<section>The State of Open Silicon</section>
|
||||
<section>
|
||||
<h1>The State of Open Silicon</h1>
|
||||
<h2>Sean Cross, Foosn PTE Ltd</h2>
|
||||
</section>
|
||||
<section>
|
||||
<h2>About Me</h2>
|
||||
</section>
|
||||
@ -34,22 +37,36 @@
|
||||
<section>
|
||||
<section>
|
||||
<h2>What does it mean to be "open"?</h2>
|
||||
<ol>
|
||||
<li>Manuals available</li>
|
||||
<li>Source available</li>
|
||||
<li>Tooling available</li>
|
||||
<li>GDSII available</li>
|
||||
</ol>
|
||||
<div class="r-hstack">
|
||||
<div>
|
||||
<div>Availability of:</div>
|
||||
<ol>
|
||||
<li data-fragment-index="1" class="fragment highlight-current-blue">Manuals</li>
|
||||
<li data-fragment-index="2" class="fragment highlight-current-blue">Source</li>
|
||||
<li data-fragment-index="3" class="fragment highlight-current-blue">Tooling</li>
|
||||
<li data-fragment-index="4" class="fragment highlight-current-blue">GDSII</li>
|
||||
</ol>
|
||||
</div>
|
||||
<div class="r-stack">
|
||||
<img data-src="img/documentation-example.png" class="fragment fade-in-then-out"
|
||||
data-fragment-index="1">
|
||||
<img data-src="img/code-example.png" class="fragment fade-in-then-out"
|
||||
data-fragment-index="2">
|
||||
<img data-src="img/openlane-flow-v1.png" height="500" class="fragment fade-in-then-out"
|
||||
data-fragment-index="3">
|
||||
<img data-src="img/pmosfet.png" class="fragment fade-in" data-fragment-index="4">
|
||||
</div>
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Parts of chip design</h2>
|
||||
<ul>
|
||||
<ol>
|
||||
<li>Nondisclosure Agreements</li>
|
||||
<li>Process Design Kit (PDK)</li>
|
||||
<li>IP (libraries)</li>
|
||||
<li>Tooling</li>
|
||||
<li>Fabrication method</li>
|
||||
</ul>
|
||||
<li>EDA software (tooling)</li>
|
||||
<!-- <li>Fabrication method</li> -->
|
||||
</ol>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Nondisclosure Agreements</h2>
|
||||
@ -57,66 +74,80 @@
|
||||
</section>
|
||||
<section>
|
||||
<h2>Process Design Kit</h2>
|
||||
<ul>
|
||||
<li>https://skywater-pdk.readthedocs.io/en/main/_images/metal_stack.svg</li>
|
||||
<li>Process design kits (PDKs) are closed and under NDA</li>
|
||||
<li>Mostly just a blank canvas</li>
|
||||
</ul>
|
||||
<div class="r-vstack">
|
||||
<img data-src="img/metal_stack.svg" height="450" style="background-color: white;">
|
||||
<p>Example PDK stackup</p>
|
||||
</div>
|
||||
<aside class="notes">
|
||||
<ul>
|
||||
<li>https://skywater-pdk.readthedocs.io/en/main/_images/metal_stack.svg</li>
|
||||
<li>Process design kits (PDKs) are closed and under NDA</li>
|
||||
<li>Mostly just a blank canvas</li>
|
||||
</ul>
|
||||
</aside>
|
||||
</section>
|
||||
<section>
|
||||
<h2>IP / Libraries</h2>
|
||||
<ul>
|
||||
<li>Memories</li>
|
||||
<li>IO blocks</li>
|
||||
<li>Standard cells</li>
|
||||
</ul>
|
||||
<div class="r-vstack">
|
||||
<ul>
|
||||
<li>Memories</li>
|
||||
<li>IO blocks</li>
|
||||
<li>Standard cells</li>
|
||||
</ul>
|
||||
<img data-src="img/gf180mcu_fd_sc_mcu7t5v0__latq_1.layout.png">
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Digital design (In The Beginning)</h2>
|
||||
<ul>
|
||||
<li>[Picture of Z80 or 6502]</li>
|
||||
<li>Magic</li>
|
||||
<li>[Picture of Siliwiz]</li>
|
||||
</ul>
|
||||
<div class="r-vstack">
|
||||
<img data-src="img/6502-die-shot.jpg" height="450">
|
||||
<p>Motorola 6502, image © 2016 Pauli Rautakorpi</p>
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Digital logic overview (Today)</h2>
|
||||
<ul>
|
||||
<li>Standard cells</li>
|
||||
<li>Basic boolean logic</li>
|
||||
</ul>
|
||||
<pre data-id="code-animation"><code class="hljs verilog" data-trim data-line-numbers>
|
||||
module inverter(input clk, input [15:0] A, output [15:0] X);
|
||||
reg [15:0] R;
|
||||
assign X = R;
|
||||
always @(posedge clk)
|
||||
begin
|
||||
R <= ~A;
|
||||
end
|
||||
endmodule
|
||||
</code></pre>
|
||||
<img data-src="img/gf180mcu_fd_sc_mcu7t5v0__inv_16.layout.png">
|
||||
</section>
|
||||
|
||||
<section>
|
||||
<h2>How can we use standard cells?</h2>
|
||||
<ul>
|
||||
<li>Manual synthesis</li>
|
||||
<li>Automated synthesis</li>
|
||||
</ul>
|
||||
|
||||
Almost all code is automatically synthesized from source code!
|
||||
|
||||
[Example of live generation of cells]
|
||||
<h2>GD32F103CBT6</h2>
|
||||
<div class="r-stack r-stretch">
|
||||
<img data-src="img/GD32F103CBT6-zeptobars.jpg" class="fragment fade-in-then-out">
|
||||
<img data-src="img/GD32F103CBT6-SC1-50.jpg" class="fragment fade-in-then-out">
|
||||
<img data-src="img/GD32F103CBT6-SC2-50.jpg" class="fragment fade-in-then-out">
|
||||
</div>
|
||||
<p>Image © 2016 Zeptobars</p>
|
||||
</section>
|
||||
|
||||
<section>
|
||||
<h2>Tooling</h2>
|
||||
<ul>
|
||||
<li>Synthesis</li>
|
||||
<li>Power generation</li>
|
||||
<li>Clock tree</li>
|
||||
<li>Clock tree synthesis</li>
|
||||
<li>Place and route</li>
|
||||
<li>Verification</li>
|
||||
<li><strong>Industry tools cost $1mm plus per seat</strong></li>
|
||||
</ul>
|
||||
<p class="fragment highlight-red">Industry tools cost $1mm plus per seat</p>
|
||||
</section>
|
||||
<section>
|
||||
<!-- <section>
|
||||
<h2>Method to tape out</h2>
|
||||
<ul>
|
||||
<li>Shuttle runs</li>
|
||||
<li>Full wafer</li>
|
||||
<li>Turnaround time is in months</li>
|
||||
</ul>
|
||||
</section>
|
||||
</section> -->
|
||||
</section>
|
||||
<section>
|
||||
<section>
|
||||
@ -126,127 +157,147 @@
|
||||
<h2>Things are looking pretty good!</h2>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Nondisclosure Agreements</h2>
|
||||
NDAs are required for using many packages
|
||||
<h2 class="fragment strike highlight-green">Nondisclosure Agreements</h2>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Open PDKs</h2>
|
||||
<ul>
|
||||
<li>Real PDKs</li>
|
||||
<div class="r-hstack">
|
||||
<ul>
|
||||
<li>SKY130</li>
|
||||
<li>SKY90FD</li>
|
||||
<li>GF180MCU </li>
|
||||
<li>Real PDKs</li>
|
||||
<ul>
|
||||
<li>SKY130</li>
|
||||
<li>SKY90FD</li>
|
||||
<li>GF180MCU</li>
|
||||
<li>SG13G2</li>
|
||||
</ul>
|
||||
<li>"Fake" PDKs</li>
|
||||
<ul>
|
||||
<li>FreePDK45</li>
|
||||
<li>ASAP5</li>
|
||||
<li>Many more!</li>
|
||||
</ul>
|
||||
</ul>
|
||||
<li>"Fake" PDKs</li>
|
||||
<ul>
|
||||
<li>FreePDK45</li>
|
||||
<li>ASAP5 </li>
|
||||
</ul>
|
||||
</ul>
|
||||
<img data-src="img/sky130-designrules.png" height="500">
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Available IP</h2>
|
||||
<p>Projects that have been taped out</p>
|
||||
<ul>
|
||||
<li>ADC</li>
|
||||
<li>LDO</li>
|
||||
<li>Bandgap</li>
|
||||
<li>DAC</li>
|
||||
<li>...more...</li>
|
||||
</ul>
|
||||
<div class="r-hstack">
|
||||
<img data-src="img/Riscduino_Soc.png" height="500">
|
||||
<ul>
|
||||
<li>CPU</li>
|
||||
<li>DAC</li>
|
||||
<li>ADC</li>
|
||||
<li>SPI</li>
|
||||
<li>USB</li>
|
||||
<li>PLL</li>
|
||||
<li>FPGA</li>
|
||||
<li>AES</li>
|
||||
</ul>
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Standard cells</h2>
|
||||
<ul>
|
||||
<li>SKY130</li>
|
||||
<li>GF180MCU</li>
|
||||
<li>OSU</li>
|
||||
<li>LibreSilicon</li>
|
||||
</ul>
|
||||
<div>
|
||||
<ul>
|
||||
<li>SKY130</li>
|
||||
<li>GF180MCU</li>
|
||||
<li>OSU018</li>
|
||||
<li>LibreSilicon</li>
|
||||
</ul>
|
||||
<img data-src="img/sky130_fd_sc_hd__dfrbp_2-zoomed.svg">
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>What about tooling?</h2>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Hardware Synthesis</h2>
|
||||
<ul>
|
||||
<li>Yosys (Verilog)</li>
|
||||
<li>Plugins:</li>
|
||||
<div class="r-hstack">
|
||||
<img data-src="img/yosys-startup.jpg">
|
||||
<ul>
|
||||
<li>GHDL (VHDL)</li>
|
||||
<li>SystemVerilog</li>
|
||||
<li>Yosys (Verilog)</li>
|
||||
<li>Plugins:</li>
|
||||
<ul>
|
||||
<li>GHDL (VHDL)</li>
|
||||
<li>UHDM (SystemVerilog)</li>
|
||||
</ul>
|
||||
</ul>
|
||||
</ul>
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>High level languages</h2>
|
||||
<ul>
|
||||
<li>LiteX <i>Python</i></li>
|
||||
<li>SpinalHDL <i>Scala</i></li>
|
||||
<li>Clash</li>
|
||||
<li>Chisel <i>Scala</i></li>
|
||||
<li>Clash <i>Haskell</i></li>
|
||||
</ul>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Floorplanning, Placement, Routing, PDN, etc...</h2>
|
||||
<ul>
|
||||
<li>OpenROAD</li>
|
||||
<li>Integrates other tools natively</li>
|
||||
<li>Competitive with closed tools</li>
|
||||
</ul>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Simulation</h2>
|
||||
<ul>
|
||||
<li>GHDL</li>
|
||||
<li>Icarus Verilog</li>
|
||||
<li>Verilator</li>
|
||||
<li>GTKWave</li>
|
||||
</ul>
|
||||
<h2>Placement, Routing, PDN, etc...</h2>
|
||||
<img data-src="img/openroad-gui.jpg">
|
||||
<aside class="notes">
|
||||
<ul>
|
||||
<li>OpenROAD</li>
|
||||
<li>Integrates other tools natively</li>
|
||||
<li>Competitive with closed tools</li>
|
||||
</ul>
|
||||
</aside>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Direct Cell Design and Inspection</h2>
|
||||
<ul>
|
||||
<img data-src="img/klayout-gui.jpg" class="r-stretch">
|
||||
<!-- <ul>
|
||||
<li>Magic</li>
|
||||
<li>KLayout</li>
|
||||
</ul>
|
||||
</ul> -->
|
||||
</section>
|
||||
<section>
|
||||
<h2>What about taping out chips?</h2>
|
||||
|
||||
<ul>
|
||||
<li>Google OpenMPW shuttles</li>
|
||||
<li>MPW shuttle runs</li>
|
||||
</ul>
|
||||
<h2>Simulation</h2>
|
||||
<div class="r-hstack">
|
||||
<ul>
|
||||
<li>GHDL</li>
|
||||
<li>Icarus Verilog</li>
|
||||
<li>Verilator</li>
|
||||
<li>GTKWave</li>
|
||||
<li>Spice</li>
|
||||
</ul>
|
||||
<img data-src="img/gtkwave-gui.png">
|
||||
</div>
|
||||
</section>
|
||||
|
||||
</section>
|
||||
<section>
|
||||
<section>
|
||||
<h1># What can't we do today?</h1>
|
||||
<h2>What can't we do today?</h2>
|
||||
</section>
|
||||
<section>
|
||||
<h2>PDKs are large nodes</h2>
|
||||
|
||||
<ul>
|
||||
<li>Gamecube CPU "Gekko": 43 mm<sup>2</sup> (2001)</li>
|
||||
</ul>
|
||||
<h2>Examples of 180 nm</h2>
|
||||
<ul>
|
||||
<li>Playstation 2 "Emotion Engine"</li>
|
||||
</ul>
|
||||
<div class="r-stack">
|
||||
<ul class="fragment fade-in-then-out">
|
||||
<li>180nm: Playstation 2 "Emotion Engine"</li>
|
||||
<li>130nm: Gamecube CPU "Gekko": 43 mm<sup>2</sup> (2001)</li>
|
||||
</ul>
|
||||
<div class="fragment fade-in-then-out">
|
||||
<img data-src="img/blinker-HD.jpg" height="400">
|
||||
<p>Flicker LED circuit, 3µm, image © 2015 Zeptobars</p>
|
||||
</div>
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Memories are still hard</h2>
|
||||
<ul>
|
||||
<li>Density is constantly improving</li>
|
||||
<li>Expect kilobytes of RAM on a chip</li>
|
||||
<ul>
|
||||
<li>Compare to megabytes of cache</li>
|
||||
<div class="r-stack">
|
||||
<ul class="fragment fade-in-then-out">
|
||||
<li>Density is constantly improving</li>
|
||||
<li>Expect kilobytes of RAM on a chip</li>
|
||||
<ul>
|
||||
<li>Compare to megabytes of cache</li>
|
||||
</ul>
|
||||
<li>A ~4x increase is possible</li>
|
||||
<li>Experimental ROM support</li>
|
||||
</ul>
|
||||
<li>A ~4x increase is possible</li>
|
||||
<li>Experimental ROM support</li>
|
||||
</ul>
|
||||
<img data-src="img/minimax-cpu-vs-memories.jpg" class="fragment fade-in-then-out">
|
||||
</div>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Nonvolatile storage is still hard</h2>
|
||||
@ -262,6 +313,19 @@
|
||||
<li>Need more integration examples</li>
|
||||
</ul>
|
||||
</section>
|
||||
<section>
|
||||
<h2>What about taping out chips?</h2>
|
||||
<ul>
|
||||
<li>Google OpenMPW</li>
|
||||
<li>ChipIgnite</li>
|
||||
<li>EuroPractice</li>
|
||||
<li>Muse</li>
|
||||
<li>SIMC</li>
|
||||
</ul>
|
||||
<div class="fade-in fragment">
|
||||
<div class="fragment highlight-red">Expect to pay $10,000 - $50,000</div>
|
||||
</div>
|
||||
</section>
|
||||
</section>
|
||||
<section>
|
||||
<section>
|
||||
@ -269,34 +333,44 @@
|
||||
<h3>And how you help</h3>
|
||||
</section>
|
||||
<section>
|
||||
<h2>Boon for education</h2>
|
||||
<ul>
|
||||
<h2>More open projects</h2>
|
||||
<img data-src="img/openmpw-shuttle.jpg">
|
||||
</section>
|
||||
<section>
|
||||
<h2>Education</h2>
|
||||
<img data-src="img/tinytapeout.jpg">
|
||||
<p>tinytapeout.com</p>
|
||||
<!-- <ul>
|
||||
<li>NDA-free design</li>
|
||||
<li>Many more hobbyists</li>
|
||||
<li>Zero-to-ASIC course</li>
|
||||
</ul>
|
||||
</ul> -->
|
||||
</section>
|
||||
<section>
|
||||
<h2>Smaller process nodes</h2>
|
||||
<h2>More analogue design</h2>
|
||||
<div class="r-vstack">
|
||||
<img data-src="img/siliwiz-gui.png" height="450">
|
||||
<p>app.siliwiz.com</p>
|
||||
</div>
|
||||
<!-- <ul>
|
||||
<li>Siliwiz</li>
|
||||
</ul> -->
|
||||
</section>
|
||||
<section>
|
||||
<h2>Smaller process nodes?</h2>
|
||||
<ul>
|
||||
<li>OpenROAD has been tested on smaller nodes</li>
|
||||
<li>No NDA-free PDKs yet</li>
|
||||
</ul>
|
||||
</section>
|
||||
<section>
|
||||
<h2>More analogue design</h2>
|
||||
<ul>
|
||||
<li>Siliwiz</li>
|
||||
</ul>
|
||||
</section>
|
||||
<section>
|
||||
<h2>More involvement</h2>
|
||||
<ul>
|
||||
<li>OpenMPW</li>
|
||||
<li>Tiny Tapeout</li>
|
||||
<li>Siliwiz</li>
|
||||
<li>OpenMPW</li>
|
||||
</ul>
|
||||
<h2>Thank you</h2>
|
||||
<h2 class="fragment">Thank you</h2>
|
||||
</section>
|
||||
</section>
|
||||
</div>
|
||||
|
||||
Reference in New Issue
Block a user