71 lines
2.0 KiB
Rust
71 lines
2.0 KiB
Rust
pub struct Timer {
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/// Address of the timer
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base: *mut u8,
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/// Number of clock cycles before the timer fires
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period: u32,
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/// Current count of the timer, in milliseconds
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time_ms: u32,
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}
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impl Timer {
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pub fn new() -> Timer {
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Timer {
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base: 0xE0002800 as *mut u8,
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period: 12_000_000 / 1000, // 12 MHz, 1 ms timer
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time_ms: 0,
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}
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}
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pub fn enable(&self) {
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unsafe {
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// Disable, so we can update it
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self.base.add(0x20).write_volatile(0);
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// Update "reload" register
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self.base.add(0x10).write_volatile((self.period >> 24) as u8);
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self.base.add(0x14).write_volatile((self.period >> 16) as u8);
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self.base.add(0x18).write_volatile((self.period >> 8) as u8);
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self.base.add(0x1c).write_volatile((self.period >> 0) as u8);
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// Update "load" register
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self.base.add(0x00).write_volatile((self.period >> 24) as u8);
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self.base.add(0x04).write_volatile((self.period >> 16) as u8);
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self.base.add(0x08).write_volatile((self.period >> 8) as u8);
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self.base.add(0x0c).write_volatile((self.period >> 0) as u8);
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// Enable ISR
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self.base.add(0x40).write_volatile(1);
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// Set "pending" as well to clear it
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self.base.add(0x38).write_volatile(1);
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// Finally, enable it
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self.base.add(0x20).write_volatile(1);
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}
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}
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pub fn elapsed_ms(&self) -> u32 {
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return self.time_ms;
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}
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}
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// pub fn irq(_irq_number: usize) {
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// let timer_base = 0xE0002800 as *mut u8;
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// unsafe {
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// TIME_MS = TIME_MS + 1;
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// timer_base.add(0x3c).write_volatile(1);
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// };
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// }
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// pub fn get_time() -> u32 {
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// unsafe { TIME_MS }
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// }
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// pub fn time_init() {
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// let timer_base = 0xE0002800 as *mut u8;
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// let period = 12_000_000 / 1000; // 12 MHz, 1 ms timer
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// }
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