4742 lines
200 KiB
XML
4742 lines
200 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
|
|
|
|
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
|
|
<vendor>litex</vendor>
|
|
<name>JTAG</name>
|
|
|
|
<addressUnitBits>8</addressUnitBits>
|
|
<width>32</width>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
|
|
<peripherals>
|
|
<peripheral>
|
|
<name>CTRL</name>
|
|
<baseAddress>0xF0000000</baseAddress>
|
|
<groupName>CTRL</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>RESET</name>
|
|
<description><![CDATA[Write a ``1`` to this register to reset the SoC.]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>reset</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SCRATCH</name>
|
|
<description><![CDATA[Use this register as a scratch space to verify that software read/write accesses
|
|
to the Wishbone/CSR bus are working correctly. The initial reset value of
|
|
0x1234578 can be used to verify endianness.]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x12345678</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>scratch</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BUS_ERRORS</name>
|
|
<description><![CDATA[Total number of Wishbone bus errors (timeouts) since start.]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>bus_errors</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xc</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>IDENTIFIER_MEM</name>
|
|
<baseAddress>0xF0002000</baseAddress>
|
|
<groupName>IDENTIFIER_MEM</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>IDENTIFIER_MEM</name>
|
|
<description><![CDATA[8 x 28-bit memory]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>identifier_mem</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UART_PHY</name>
|
|
<baseAddress>0xF0003000</baseAddress>
|
|
<groupName>UART_PHY</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>TUNING_WORD</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x4b7f5a</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>tuning_word</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UART</name>
|
|
<baseAddress>0xF0004000</baseAddress>
|
|
<groupName>UART</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>RXTX</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>rxtx</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXFULL</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>txfull</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXEMPTY</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>rxempty</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXEMPTY</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>txempty</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXFULL</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>rxfull</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x20</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>uart</name>
|
|
<value>0</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER0</name>
|
|
<baseAddress>0xF0005000</baseAddress>
|
|
<groupName>TIMER0</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>LOAD</name>
|
|
<description><![CDATA[Load value when Timer is (re-)enabled. In One-Shot mode, the value written to
|
|
this register specifies the Timer's duration in clock cycles.]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>load</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RELOAD</name>
|
|
<description><![CDATA[Reload value when Timer reaches ``0``. In Periodic mode, the value written to
|
|
this register specify the Timer's period in clock cycles.]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>reload</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EN</name>
|
|
<description><![CDATA[Enable flag of the Timer. Set this flag to ``1`` to enable/start the Timer. Set
|
|
to ``0`` to disable the Timer.]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UPDATE_VALUE</name>
|
|
<description><![CDATA[Update trigger for the current countdown value. A write to this register latches
|
|
the current countdown value to ``value`` register.]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>update_value</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VALUE</name>
|
|
<description><![CDATA[Latched countdown value. This value is updated by writing to ``update_value``.]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>value</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x20</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>timer0</name>
|
|
<value>1</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>REBOOT</name>
|
|
<baseAddress>0xF0006000</baseAddress>
|
|
<groupName>REBOOT</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>ctrl</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADDR</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>addr</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>CRG</name>
|
|
<baseAddress>0xF0007000</baseAddress>
|
|
<groupName>CRG</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>MMCM_DRP_RESET</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_reset</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_LOCKED</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_locked</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_READ</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_read</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_WRITE</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_write</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_DRDY</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_drdy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_ADR</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_adr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_DAT_W</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_dat_w</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMCM_DRP_DAT_R</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>mmcm_drp_dat_r</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x20</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>INFO</name>
|
|
<baseAddress>0xF0008000</baseAddress>
|
|
<groupName>INFO</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>DNA_ID1</name>
|
|
<description><![CDATA[Bits 32-56 of `INFO_DNA_ID`.]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>dna_id</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DNA_ID0</name>
|
|
<description><![CDATA[Bits 0-31 of `INFO_DNA_ID`.]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>dna_id</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GIT_MAJOR</name>
|
|
<description><![CDATA[Major git tag version. For example, this firmware was built from git tag
|
|
``v0.0.0``, so this value is ``0``.]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>git_major</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GIT_MINOR</name>
|
|
<description><![CDATA[Minor git tag version. For example, this firmware was built from git tag
|
|
``v0.0.0``, so this value is ``0``.]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>git_minor</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GIT_REVISION</name>
|
|
<description><![CDATA[Revision git tag version. For example, this firmware was built from git tag
|
|
``v0.0.0``, so this value is ``0``.]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>git_revision</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GIT_GITREV</name>
|
|
<description><![CDATA[First 32-bits of the git revision. This documentation was built from git rev
|
|
``00000000``, so this value is 0, which should be enough to check out the exact
|
|
git version used to build this firmware.]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>git_gitrev</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GIT_GITEXTRA</name>
|
|
<description><![CDATA[The number of additional commits beyond the git tag. For example, if this value
|
|
is ``1``, then the repository this was built from has one additional commit
|
|
beyond the tag indicated in `MAJOR`, `MINOR`, and `REVISION`.]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>git_gitextra</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GIT_DIRTY</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>dirty</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Set to ``1`` if this device was built from a git repo with uncommitted
|
|
modifications.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PLATFORM_PLATFORM1</name>
|
|
<description><![CDATA[Bits 32-63 of `INFO_PLATFORM_PLATFORM`.]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>platform_platform</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PLATFORM_PLATFORM0</name>
|
|
<description><![CDATA[Bits 0-31 of `INFO_PLATFORM_PLATFORM`.]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>platform_platform</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PLATFORM_TARGET1</name>
|
|
<description><![CDATA[Bits 32-63 of `INFO_PLATFORM_TARGET`.]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>platform_target</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PLATFORM_TARGET0</name>
|
|
<description><![CDATA[Bits 0-31 of `INFO_PLATFORM_TARGET`.]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>platform_target</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_TEMPERATURE</name>
|
|
<description><![CDATA[Raw Temperature value from XADC.
|
|
|
|
Temperature (°C) = ``Value`` x 503.975 / 4096 - 273.15.]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_temperature</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_VCCINT</name>
|
|
<description><![CDATA[Raw VCCINT value from XADC.
|
|
|
|
VCCINT (V) = ``Value`` x 3 / 4096.]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_vccint</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_VCCAUX</name>
|
|
<description><![CDATA[Raw VCCAUX value from XADC.
|
|
|
|
VCCAUX (V) = ``Value`` x 3 / 4096.]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_vccaux</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_VCCBRAM</name>
|
|
<description><![CDATA[Raw VCCBRAM value from XADC.
|
|
|
|
VCCBRAM (V) = ``Value`` x 3 / 4096.]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_vccbram</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_EOC</name>
|
|
<description><![CDATA[End of Convertion Status, ``1``: Convertion Done.]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_eoc</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_EOS</name>
|
|
<description><![CDATA[End of Sequence Status, ``1``: Sequence Done.]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_eos</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_ENABLE</name>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_READ</name>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_read</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_WRITE</name>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_write</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_DRDY</name>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_drdy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_ADR</name>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_adr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_DAT_W</name>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_dat_w</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XADC_DRP_DAT_R</name>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>xadc_drp_dat_r</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x64</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SRAM_EXT</name>
|
|
<baseAddress>0xF0009000</baseAddress>
|
|
<groupName>SRAM_EXT</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>CONFIG_STATUS</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>mode</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[The current configuration mode of the SRAM]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>READ_CONFIG</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>trigger</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Writing to this bit triggers the SRAM mode status read update]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>MEMLCD</name>
|
|
<baseAddress>0xF000A000</baseAddress>
|
|
<groupName>MEMLCD</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>COMMAND</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>UpdateDirty</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Write a ``1`` to flush dirty lines to the LCD]]></description>
|
|
</field>
|
|
<field>
|
|
<name>UpdateAll</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Update full screen regardless of tag state]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BUSY</name>
|
|
<description><![CDATA[A ``1`` indicates that the block is currently updating the LCD]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>busy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PRESCALER</name>
|
|
<description><![CDATA[Prescaler value. LCD clock is module ``(clock / (prescaler+1))``. Reset value:
|
|
``99``, so for a default sysclk of 100MHz this yields an LCD ``SCLK`` of 1MHz]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x63</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>prescaler</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x18</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>COM</name>
|
|
<baseAddress>0xF000B000</baseAddress>
|
|
<groupName>COM</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>TX</name>
|
|
<description><![CDATA[Tx data, for COPI. Note: 32-bit CSRs are required for this block to work!]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>tx</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RX</name>
|
|
<description><![CDATA[Rx data, from CIPO]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>rx</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONTROL</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>intena</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Enable interrupt on transaction finished]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>tip</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Set when transaction is in progress]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>I2C</name>
|
|
<baseAddress>0xF000C000</baseAddress>
|
|
<groupName>I2C</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>PRESCALE</name>
|
|
<description><![CDATA[Prescaler value. Set to (module clock / (5 * I2C freq) - 1). Example: if module
|
|
clock is equal to sysclk; syclk is 100MHz; and I2C freq is 100kHz, then
|
|
prescaler is (100MHz / (5 * 100kHz) - 1) = 199. Reset value: 0xFFFF]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0xffff</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>prescale</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONTROL</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>Resvd</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Reserved (for cross-compatibility with OpenCores drivers)]]></description>
|
|
</field>
|
|
<field>
|
|
<name>IEN</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[When set to `1`, interrupts are enabled.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[When set to `1`, the core is enabled.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXR</name>
|
|
<description><![CDATA[Next byte to transmit to slave devices. LSB indicates R/W during address phases,
|
|
`1` for reading from slaves, `0` for writing to slaves]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>txr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXR</name>
|
|
<description><![CDATA[Data being read from slaved devices]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>rxr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMMAND</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>IACK</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Interrupt acknowledge; when set, clears a pending interrupt]]></description>
|
|
</field>
|
|
<field>
|
|
<name>Resvd</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[reserved for cross-compatibility with OpenCores drivers]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[when a receiver, sent ack (`ACK=0`) or nack (`ACK=1`)]]></description>
|
|
</field>
|
|
<field>
|
|
<name>WR</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[write to slave]]></description>
|
|
</field>
|
|
<field>
|
|
<name>RD</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[read from slave]]></description>
|
|
</field>
|
|
<field>
|
|
<name>STO</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[generate stop condition]]></description>
|
|
</field>
|
|
<field>
|
|
<name>STA</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[generate (repeated) start condition]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>IF</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Interrupt flag, This bit is set when an interrupt is pending, which will cause a
|
|
processor interrupt request if the IEN bit is set. The Interrupt Flag is set
|
|
upon the completion of one byte of data transfer.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>TIP</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[transfer in progress]]></description>
|
|
</field>
|
|
<field>
|
|
<name>Resvd</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[reserved for cross-compatibility with OpenCores drivers]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ArbLost</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[Set when arbitration for the bus is lost]]></description>
|
|
</field>
|
|
<field>
|
|
<name>Busy</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[I2C block is busy processing the latest command]]></description>
|
|
</field>
|
|
<field>
|
|
<name>RxACK</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[Received acknowledge from slave. 1 = no ack received, 0 = ack received]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x24</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>i2c</name>
|
|
<value>2</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BTEVENTS</name>
|
|
<baseAddress>0xF000D000</baseAddress>
|
|
<groupName>BTEVENTS</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xc</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>btevents</name>
|
|
<value>3</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>MESSIBLE</name>
|
|
<baseAddress>0xF000E000</baseAddress>
|
|
<groupName>MESSIBLE</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>IN</name>
|
|
<description><![CDATA[Write half of the FIFO to send data out the Messible. Writing to this register
|
|
advances the write pointer automatically.]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>in</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OUT</name>
|
|
<description><![CDATA[Read half of the FIFO to receive data on the Messible. Reading from this
|
|
register advances the read pointer automatically.]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>out</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>full</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[`0` if more data can fit into the IN FIFO.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>have</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[`1` if data can be read from the OUT FIFO.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xc</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TICKTIMER</name>
|
|
<baseAddress>0xF000F000</baseAddress>
|
|
<groupName>TICKTIMER</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>CONTROL</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>reset</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Write a `1` to this bit to reset the count to 0]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pause</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Write a `1` to this field to pause counting, 0 for free-run]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TIME1</name>
|
|
<description><![CDATA[Bits 32-63 of `TICKTIMER_TIME`. Elapsed time in systicks]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>time</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TIME0</name>
|
|
<description><![CDATA[Bits 0-31 of `TICKTIMER_TIME`.]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>time</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xc</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>POWER</name>
|
|
<baseAddress>0xF0010000</baseAddress>
|
|
<groupName>POWER</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>POWER</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x0a</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>audio</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Write `1` to power on the audio subsystem]]></description>
|
|
</field>
|
|
<field>
|
|
<name>self</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Writing `1` forces self power-on (overrides the EC's ability to power me down)]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ec_snoop</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Writing `1` allows the insecure EC to snoop a couple keyboard pads for wakeup
|
|
key sequence recognition]]></description>
|
|
</field>
|
|
<field>
|
|
<name>state</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[Current SoC power state. 0x=off or not ready, 10=on and safe to shutdown, 11=on
|
|
and not safe to shut down, resets to 01 to allow extSRAM access immediately
|
|
during init]]></description>
|
|
</field>
|
|
<field>
|
|
<name>noisebias</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[Writing `1` enables the primary bias supply for the noise generator]]></description>
|
|
</field>
|
|
<field>
|
|
<name>noise</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[Controls which of two noise channels are active; all combos valid. noisebias
|
|
must be on first.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>reset_ec</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[Writing a `1` forces EC into reset. Requires write of `0` to release reset.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>up5k_on</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[Writing a `1` pulses the UP5K domain to turn on]]></description>
|
|
</field>
|
|
<field>
|
|
<name>boostmode</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:10]</bitRange>
|
|
<lsb>10</lsb>
|
|
<description><![CDATA[Writing a `1` causes the USB port to source 5V. To be active only when playing
|
|
the host role.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>selfdestruct</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[Set this bit to clear BBRAM AES key (if used) and cut power in an annoying-to-
|
|
reset fashion]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VIBE</name>
|
|
<description><![CDATA[Vibration motor configuration register]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>vibe</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Turn on vibration motor]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x14</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SPINOR</name>
|
|
<baseAddress>0xF0011000</baseAddress>
|
|
<groupName>SPINOR</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>CONFIG</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x0a</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>dummy</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Number of dummy cycles]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DELAY_CONFIG</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x1f</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>d</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Delay amount; each increment is 78ps]]></description>
|
|
</field>
|
|
<field>
|
|
<name>load</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[Force delay taps to delay_d]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DELAY_STATUS</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>q</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Readback of current delay amount, useful if inc/ce is used to set]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMMAND</name>
|
|
<description><![CDATA[Write individual bits to issue special commands to SPI; setting multiple bits at
|
|
once leads to undefined behavior.]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>wakeup</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Sequence through init & wakeup routine]]></description>
|
|
</field>
|
|
<field>
|
|
<name>sector_erase</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Erase a sector]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SECTOR</name>
|
|
<description><![CDATA[Sector to erase]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>sector</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Sector to erase]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description><![CDATA[Interface status]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>wip</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Operation in progress (write or erease)]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ECC_ADDRESS</name>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>ecc_address</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Address of the most recent ECC event]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ECC_STATUS</name>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>ecc_error</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Live status of the ECS_N bit (ECC error on current packet when low)]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ecc_overflow</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[More than one ECS_N event has happened since th last time ecc_address was
|
|
checked]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x2c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>KEYBOARD</name>
|
|
<baseAddress>0xF0012000</baseAddress>
|
|
<groupName>KEYBOARD</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>ROW0DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row0dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW1DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row1dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW2DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row2dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW3DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row3dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW4DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row4dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW5DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row5dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW6DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row6dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW7DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row7dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROW8DAT</name>
|
|
<description><![CDATA[Column data for the given row]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>row8dat</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROWCHANGE</name>
|
|
<description><![CDATA[The rows that changed at the point of interrupt generation. Does not update
|
|
again until the interrupt is serviced.]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>rowchange</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x34</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>keyboard</name>
|
|
<value>4</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>GPIO</name>
|
|
<baseAddress>0xF0013000</baseAddress>
|
|
<groupName>GPIO</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>OUTPUT</name>
|
|
<description><![CDATA[Values to appear on GPIO when respective `drive` bit is asserted]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>output</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INPUT</name>
|
|
<description><![CDATA[Value measured on the respective GPIO pin]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>input</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DRIVE</name>
|
|
<description><![CDATA[When a bit is set to `1`, the respective pad drives its value out]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>drive</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTENA</name>
|
|
<description><![CDATA[Enable interrupts when a respective bit is set]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>intena</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTPOL</name>
|
|
<description><![CDATA[When a bit is `1`, falling-edges cause interrupts. Otherwise, rising edges cause
|
|
interrupts.]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>intpol</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x20</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>gpio</name>
|
|
<value>5</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SEED</name>
|
|
<baseAddress>0xF0014000</baseAddress>
|
|
<groupName>SEED</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SEED1</name>
|
|
<description><![CDATA[Bits 32-63 of `SEED_SEED`. Seed used for the build]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x64f83336</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>seed</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEED0</name>
|
|
<description><![CDATA[Bits 0-31 of `SEED_SEED`.]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x60e6ef3</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>seed</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>ROMTEST</name>
|
|
<baseAddress>0xF0015000</baseAddress>
|
|
<groupName>ROMTEST</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>ADDRESS</name>
|
|
<description><![CDATA[address for ROM]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>address</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA</name>
|
|
<description><![CDATA[data from ROM]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>data</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>AUDIO</name>
|
|
<baseAddress>0xF0016000</baseAddress>
|
|
<groupName>AUDIO</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RX_CTL</name>
|
|
<description><![CDATA[Rx data path control]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Enable the receiving data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>reset</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Writing `1` resets the FIFO. Reset happens regardless of enable state.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RX_STAT</name>
|
|
<description><![CDATA[Rx data path status]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x80000000</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Rx overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>underflow</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Rx underflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>dataready</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[256 words of data loaded and ready to read]]></description>
|
|
</field>
|
|
<field>
|
|
<name>empty</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[No data available in FIFO to read]]></description>
|
|
</field>
|
|
<field>
|
|
<name>wrcount</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[Write count]]></description>
|
|
</field>
|
|
<field>
|
|
<name>rdcount</name>
|
|
<msb>21</msb>
|
|
<bitRange>[21:13]</bitRange>
|
|
<lsb>13</lsb>
|
|
<description><![CDATA[Read count]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_depth</name>
|
|
<msb>30</msb>
|
|
<bitRange>[30:22]</bitRange>
|
|
<lsb>22</lsb>
|
|
<description><![CDATA[FIFO depth as synthesized]]></description>
|
|
</field>
|
|
<field>
|
|
<name>concatenate_channels</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:31]</bitRange>
|
|
<lsb>31</lsb>
|
|
<description><![CDATA[Receive and send both channels atomically]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RX_CONF</name>
|
|
<description><![CDATA[Rx configuration]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0xac4442</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>format</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[I2S sample format. I2S_FORMAT.I2S_LEFT_JUSTIFIED is left-justified,
|
|
I2S_FORMAT.I2S_STANDARD is I2S standard]]></description>
|
|
</field>
|
|
<field>
|
|
<name>sample_width</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Single sample width]]></description>
|
|
</field>
|
|
<field>
|
|
<name>lrck_freq</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[Audio sampling rate frequency]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TX_CTL</name>
|
|
<description><![CDATA[Tx data path control]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Enable the transmission data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>reset</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Writing `1` resets the FIFO. Reset happens regardless of enable state.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TX_STAT</name>
|
|
<description><![CDATA[Tx data path status]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x1000000</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Tx overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>underflow</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Tx underflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>free</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[At least 256 words of space free]]></description>
|
|
</field>
|
|
<field>
|
|
<name>almostfull</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[Less than 8 words space available]]></description>
|
|
</field>
|
|
<field>
|
|
<name>full</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[FIFO is full or overfull]]></description>
|
|
</field>
|
|
<field>
|
|
<name>empty</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[FIFO is empty]]></description>
|
|
</field>
|
|
<field>
|
|
<name>wrcount</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[Tx write count]]></description>
|
|
</field>
|
|
<field>
|
|
<name>rdcount</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:15]</bitRange>
|
|
<lsb>15</lsb>
|
|
<description><![CDATA[Tx read count]]></description>
|
|
</field>
|
|
<field>
|
|
<name>concatenate_channels</name>
|
|
<msb>24</msb>
|
|
<bitRange>[24:24]</bitRange>
|
|
<lsb>24</lsb>
|
|
<description><![CDATA[Receive and send both channels atomically]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TX_CONF</name>
|
|
<description><![CDATA[TX configuration]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0xac4442</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>format</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[I2S sample format. I2S_FORMAT.I2S_LEFT_JUSTIFIED is left-justified,
|
|
I2S_FORMAT.I2S_STANDARD is I2S standard]]></description>
|
|
</field>
|
|
<field>
|
|
<name>sample_width</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Single sample width]]></description>
|
|
</field>
|
|
<field>
|
|
<name>lrck_freq</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[Audio sampling rate frequency]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x24</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>audio</name>
|
|
<value>6</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TRNG_OSC</name>
|
|
<baseAddress>0xF0017000</baseAddress>
|
|
<groupName>TRNG_OSC</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x2000192</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>ena</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Enable the TRNG; 0 puts the TRNG into full powerdown]]></description>
|
|
</field>
|
|
<field>
|
|
<name>gang</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Fold in collective gang entropy during dwell time]]></description>
|
|
</field>
|
|
<field>
|
|
<name>dwell</name>
|
|
<msb>21</msb>
|
|
<bitRange>[21:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Prescaler to set dwell-time of entropy collection. Controls the period of how
|
|
long the oscillators are in a metastable state to collect entropy before
|
|
sampling. Value encodes the number of sysclk edges to pass during the dwell
|
|
period.]]></description>
|
|
</field>
|
|
<field>
|
|
<name>delay</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:22]</bitRange>
|
|
<lsb>22</lsb>
|
|
<description><![CDATA[Sampler delay time. Sets the delay between when the small rings are merged
|
|
together, and when the final entropy result is sampled. Value encodes number of
|
|
sysclk edges to pass during the delay period. Delay should be long enough for
|
|
the signal to propagate around the merged ring, but longer times also means more
|
|
coupling of the deterministic sysclk noise into the rings.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RAND</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0xdeadbeef</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>rand</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Random data shifted into a register for easier collection.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>fresh</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[When set, the rand register contains a fresh set of bits to be read; cleaned by
|
|
reading the `rand` register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xc</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>AES</name>
|
|
<baseAddress>0xF0018000</baseAddress>
|
|
<groupName>AES</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>KEY_0_Q</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[least significant key word]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_1_Q</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[key word 1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_2_Q</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[key word 2]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_3_Q</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[key word 3]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_4_Q</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[key word 4]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_5_Q</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[key word 5]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_6_Q</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_6</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[key word 6]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY_7_Q</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key_7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[most significant key word]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAOUT_0</name>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data output from cipher]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAOUT_1</name>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data output from cipher]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAOUT_2</name>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data output from cipher]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAOUT_3</name>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data output from cipher]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAIN_0</name>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data input]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAIN_1</name>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data input]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAIN_2</name>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data input]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAIN_3</name>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>data_3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[data input]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IV_0</name>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>iv_0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[iv]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IV_1</name>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>iv_1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[iv]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IV_2</name>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>iv_2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[iv]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IV_3</name>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>iv_3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[iv]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mode</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[set cipher mode. Illegal values mapped to `AES_ECB`]]></description>
|
|
</field>
|
|
<field>
|
|
<name>key_len</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[length of the aes block. Illegal values mapped to `AES128`]]></description>
|
|
</field>
|
|
<field>
|
|
<name>manual_operation</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[If `1`, operation starts when `trigger` bit `start` is written, otherwise
|
|
automatically on data and IV ready]]></description>
|
|
</field>
|
|
<field>
|
|
<name>operation</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[Sets encrypt/decrypt operation. `0` = encrypt, `1` = decrypt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x09</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>idle</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Core idle]]></description>
|
|
</field>
|
|
<field>
|
|
<name>stall</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Core stall]]></description>
|
|
</field>
|
|
<field>
|
|
<name>output_valid</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Data output valid]]></description>
|
|
</field>
|
|
<field>
|
|
<name>input_ready</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[Input value has been latched and it is OK to update to a new value]]></description>
|
|
</field>
|
|
<field>
|
|
<name>operation_rbk</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[Operation readback]]></description>
|
|
</field>
|
|
<field>
|
|
<name>mode_rbk</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[Actual mode selected by hardware readback]]></description>
|
|
</field>
|
|
<field>
|
|
<name>key_len_rbk</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[Actual key length selected by the hardware readback]]></description>
|
|
</field>
|
|
<field>
|
|
<name>manual_operation_rbk</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[Manual operation readback]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGGER</name>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Triggers an AES computation if manual_start is selected]]></description>
|
|
</field>
|
|
<field>
|
|
<name>key_clear</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Clears the key]]></description>
|
|
</field>
|
|
<field>
|
|
<name>iv_clear</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Clears the IV]]></description>
|
|
</field>
|
|
<field>
|
|
<name>data_in_clear</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[Clears data input]]></description>
|
|
</field>
|
|
<field>
|
|
<name>data_out_clear</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[Clears the data output]]></description>
|
|
</field>
|
|
<field>
|
|
<name>prng_reseed</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[Reseed PRNG]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x5c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SHA2</name>
|
|
<baseAddress>0xF0019000</baseAddress>
|
|
<groupName>SHA2</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>KEY0</name>
|
|
<description><![CDATA[secret key word 0]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY1</name>
|
|
<description><![CDATA[secret key word 1]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY2</name>
|
|
<description><![CDATA[secret key word 2]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY3</name>
|
|
<description><![CDATA[secret key word 3]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY4</name>
|
|
<description><![CDATA[secret key word 4]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY5</name>
|
|
<description><![CDATA[secret key word 5]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY6</name>
|
|
<description><![CDATA[secret key word 6]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key6</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY7</name>
|
|
<description><![CDATA[secret key word 7]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>key7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG</name>
|
|
<description><![CDATA[Configuration register for the HMAC block]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>sha_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Enable the SHA256 core]]></description>
|
|
</field>
|
|
<field>
|
|
<name>endian_swap</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Swap the endianness on the input data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>digest_swap</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Swap the endianness on the output digest]]></description>
|
|
</field>
|
|
<field>
|
|
<name>hmac_en</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[Enable the HMAC core]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMMAND</name>
|
|
<description><![CDATA[Command register for the HMAC block]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>hash_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Writing a 1 indicates the beginning of hash data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>hash_process</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Writing a 1 digests the hash data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WIPE</name>
|
|
<description><![CDATA[wipe the secret key using the written value. Wipe happens upon write.]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>wipe</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST0</name>
|
|
<description><![CDATA[digest word 0]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST1</name>
|
|
<description><![CDATA[digest word 1]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST2</name>
|
|
<description><![CDATA[digest word 2]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST3</name>
|
|
<description><![CDATA[digest word 3]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST4</name>
|
|
<description><![CDATA[digest word 4]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST5</name>
|
|
<description><![CDATA[digest word 5]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST6</name>
|
|
<description><![CDATA[digest word 6]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest6</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST7</name>
|
|
<description><![CDATA[digest word 7]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MSG_LENGTH1</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA2_MSG_LENGTH`. Length of digested message, in bits]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>msg_length</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MSG_LENGTH0</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA2_MSG_LENGTH`.]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>msg_length</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ERROR_CODE</name>
|
|
<description><![CDATA[Error code]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>error_code</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FIFO</name>
|
|
<description><![CDATA[FIFO status]]></description>
|
|
<addressOffset>0x0064</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>read_count</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[read pointer]]></description>
|
|
</field>
|
|
<field>
|
|
<name>write_count</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:10]</bitRange>
|
|
<lsb>10</lsb>
|
|
<description><![CDATA[write pointer]]></description>
|
|
</field>
|
|
<field>
|
|
<name>read_error</name>
|
|
<msb>20</msb>
|
|
<bitRange>[20:20]</bitRange>
|
|
<lsb>20</lsb>
|
|
<description><![CDATA[read error occurred]]></description>
|
|
</field>
|
|
<field>
|
|
<name>write_error</name>
|
|
<msb>21</msb>
|
|
<bitRange>[21:21]</bitRange>
|
|
<lsb>21</lsb>
|
|
<description><![CDATA[write error occurred]]></description>
|
|
</field>
|
|
<field>
|
|
<name>almost_full</name>
|
|
<msb>22</msb>
|
|
<bitRange>[22:22]</bitRange>
|
|
<lsb>22</lsb>
|
|
<description><![CDATA[almost full]]></description>
|
|
</field>
|
|
<field>
|
|
<name>almost_empty</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:23]</bitRange>
|
|
<lsb>23</lsb>
|
|
<description><![CDATA[almost empty]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x68</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>sha2</name>
|
|
<value>7</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SHA512</name>
|
|
<baseAddress>0xF001A000</baseAddress>
|
|
<groupName>SHA512</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>CONFIG</name>
|
|
<description><![CDATA[Configuration register for the HMAC block]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>sha_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Enable the SHA512 core]]></description>
|
|
</field>
|
|
<field>
|
|
<name>endian_swap</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Swap the endianness on the input data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>digest_swap</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[Swap the endianness on the output digest]]></description>
|
|
</field>
|
|
<field>
|
|
<name>select_256</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[Select SHA512/256 IV constants when set to `1`]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMMAND</name>
|
|
<description><![CDATA[Command register for the HMAC block]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>hash_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Writing a 1 indicates the beginning of hash data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>hash_process</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Writing a 1 digests the hash data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST01</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST0`. digest word 0]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST00</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST0`.]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST11</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST1`. digest word 1]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST10</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST1`.]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST21</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST2`. digest word 2]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST20</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST2`.]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST31</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST3`. digest word 3]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST30</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST3`.]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST41</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST4`. digest word 4]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST40</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST4`.]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST51</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST5`. digest word 5]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST50</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST5`.]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST61</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST6`. digest word 6]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest6</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST60</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST6`.]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest6</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST71</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_DIGEST7`. digest word 7]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIGEST70</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_DIGEST7`.]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>digest7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MSG_LENGTH1</name>
|
|
<description><![CDATA[Bits 32-63 of `SHA512_MSG_LENGTH`. Bottom 64 bits of length of digested message,
|
|
in bits]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>msg_length</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MSG_LENGTH0</name>
|
|
<description><![CDATA[Bits 0-31 of `SHA512_MSG_LENGTH`.]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>msg_length</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FIFO</name>
|
|
<description><![CDATA[FIFO status]]></description>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>read_count</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[read pointer]]></description>
|
|
</field>
|
|
<field>
|
|
<name>write_count</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[write pointer]]></description>
|
|
</field>
|
|
<field>
|
|
<name>read_error</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:18]</bitRange>
|
|
<lsb>18</lsb>
|
|
<description><![CDATA[read error occurred]]></description>
|
|
</field>
|
|
<field>
|
|
<name>write_error</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:19]</bitRange>
|
|
<lsb>19</lsb>
|
|
<description><![CDATA[write error occurred]]></description>
|
|
</field>
|
|
<field>
|
|
<name>almost_full</name>
|
|
<msb>20</msb>
|
|
<bitRange>[20:20]</bitRange>
|
|
<lsb>20</lsb>
|
|
<description><![CDATA[almost full]]></description>
|
|
</field>
|
|
<field>
|
|
<name>almost_empty</name>
|
|
<msb>21</msb>
|
|
<bitRange>[21:21]</bitRange>
|
|
<lsb>21</lsb>
|
|
<description><![CDATA[almost empty]]></description>
|
|
</field>
|
|
<field>
|
|
<name>running</name>
|
|
<msb>22</msb>
|
|
<bitRange>[22:22]</bitRange>
|
|
<lsb>22</lsb>
|
|
<description><![CDATA[hash engine is running and controls are locked out]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x60</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>sha512</name>
|
|
<value>8</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>ENGINE</name>
|
|
<baseAddress>0xF001B000</baseAddress>
|
|
<groupName>ENGINE</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>WINDOW</name>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>window</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Selects the current register window to use]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MPSTART</name>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mpstart</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Where to start execution]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MPLEN</name>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>mplen</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Length of the current microcode program. Thus valid code must be in the range of
|
|
[mpstart, mpstart + mplen]]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONTROL</name>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>go</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[Writing to this puts the engine in `run` mode, and it will execute mplen
|
|
microcode instructions starting at mpstart]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>running</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[When set, the microcode engine is running. All wishbone access to RF and
|
|
microcode memory areas will stall until this bit is clear]]></description>
|
|
</field>
|
|
<field>
|
|
<name>mpc</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[Current location of the microcode program counter. Mostly for debug.]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_STATUS</name>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>status</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_PENDING</name>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>pending</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EV_ENABLE</name>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>enable</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INSTRUCTION</name>
|
|
<description><![CDATA[Current instruction being executed by the engine. The format of this register
|
|
exactly reflects the binary layout of an Engine instruction.]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>opcode</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[opcode to be executed]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ra</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[operand A read register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ca</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[set to substitute constant table value for A]]></description>
|
|
</field>
|
|
<field>
|
|
<name>rb</name>
|
|
<msb>16</msb>
|
|
<bitRange>[16:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[operand B read register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cb</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:17]</bitRange>
|
|
<lsb>17</lsb>
|
|
<description><![CDATA[set to substitute constant table value for B]]></description>
|
|
</field>
|
|
<field>
|
|
<name>wd</name>
|
|
<msb>22</msb>
|
|
<bitRange>[22:18]</bitRange>
|
|
<lsb>18</lsb>
|
|
<description><![CDATA[write register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>immediate</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:23]</bitRange>
|
|
<lsb>23</lsb>
|
|
<description><![CDATA[Used by jumps to load the next PC value]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x24</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>engine</name>
|
|
<value>9</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>JTAG</name>
|
|
<baseAddress>0xF001C000</baseAddress>
|
|
<groupName>JTAG</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>NEXT</name>
|
|
<description><![CDATA[Next state for TDI/TMS; writing automatically clocks TCK]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<fields>
|
|
<field>
|
|
<name>tdi</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[TDI pin value]]></description>
|
|
</field>
|
|
<field>
|
|
<name>tms</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[TMS pin value]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TDO</name>
|
|
<description><![CDATA[TDO resulting from previous cycle]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<fields>
|
|
<field>
|
|
<name>tdo</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[TDO pin value]]></description>
|
|
</field>
|
|
<field>
|
|
<name>ready</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[JTAG machine is ready for a new cycle; also indicates TDO is valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
</peripherals>
|
|
<vendorExtensions>
|
|
<memoryRegions>
|
|
<memoryRegion>
|
|
<name>ROM</name>
|
|
<baseAddress>0x00000000</baseAddress>
|
|
<size>0x00008000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SRAM</name>
|
|
<baseAddress>0x10000000</baseAddress>
|
|
<size>0x00020000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>VEXRISCV_DEBUG</name>
|
|
<baseAddress>0xEFFF0000</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SRAM_EXT</name>
|
|
<baseAddress>0x40000000</baseAddress>
|
|
<size>0x01000000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>MEMLCD</name>
|
|
<baseAddress>0xB0000000</baseAddress>
|
|
<size>0x00005C20</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SPIFLASH</name>
|
|
<baseAddress>0x20000000</baseAddress>
|
|
<size>0x08000000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>AUDIO</name>
|
|
<baseAddress>0xE0000000</baseAddress>
|
|
<size>0x00000004</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SHA2</name>
|
|
<baseAddress>0xE0001000</baseAddress>
|
|
<size>0x00000004</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SHA512</name>
|
|
<baseAddress>0xE0002000</baseAddress>
|
|
<size>0x00000008</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>ENGINE</name>
|
|
<baseAddress>0xE0020000</baseAddress>
|
|
<size>0x00020000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>CSR</name>
|
|
<baseAddress>0xF0000000</baseAddress>
|
|
<size>0x00040000</size>
|
|
</memoryRegion>
|
|
</memoryRegions>
|
|
</vendorExtensions>
|
|
</device> |