From cd4d928adb3dd68b22ab5da60e4a4d01ee201caf Mon Sep 17 00:00:00 2001 From: Sean Cross Date: Thu, 29 Nov 2018 08:52:07 -0500 Subject: [PATCH] hardware: sch: fix up DNP columns Mark parts as DNP with an "X" in the "DNP" column. Signed-off-by: Sean Cross --- hardware/pcb/tomu-fpga-cache.lib | 114 +++++------ hardware/pcb/tomu-fpga.kicad_pcb | 328 ++++++++++++++++--------------- hardware/pcb/tomu-fpga.sch | 19 +- 3 files changed, 239 insertions(+), 222 deletions(-) diff --git a/hardware/pcb/tomu-fpga-cache.lib b/hardware/pcb/tomu-fpga-cache.lib index b007fdf..df40a6c 100644 --- a/hardware/pcb/tomu-fpga-cache.lib +++ b/hardware/pcb/tomu-fpga-cache.lib @@ -1,11 +1,11 @@ EESchema-LIBRARY Version 2.4 #encoding utf-8 # -# Device:C_Small +# Device_C_Small # -DEF Device:C_Small C 0 10 N N 1 F N +DEF Device_C_Small C 0 10 N N 1 F N F0 "C" 10 70 50 H V L CNN -F1 "Device:C_Small" 10 -80 50 H V L CNN +F1 "Device_C_Small" 10 -80 50 H V L CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST @@ -19,11 +19,11 @@ X ~ 2 0 -100 80 U 50 50 1 1 P ENDDRAW ENDDEF # -# Device:D_Small +# Device_D_Small # -DEF Device:D_Small D 0 10 N N 1 F N +DEF Device_D_Small D 0 10 N N 1 F N F0 "D" -50 80 50 H V L CNN -F1 "Device:D_Small" -150 -80 50 H V L CNN +F1 "Device_D_Small" -150 -80 50 H V L CNN F2 "" 0 0 50 V I C CNN F3 "" 0 0 50 V I C CNN $FPLIST @@ -41,11 +41,11 @@ X A 2 100 0 70 L 50 50 1 1 P ENDDRAW ENDDEF # -# Device:LED +# Device_LED # -DEF Device:LED D 0 40 N N 1 F N +DEF Device_LED D 0 40 N N 1 F N F0 "D" 0 100 50 H V C CNN -F1 "Device:LED" 0 -100 50 H V C CNN +F1 "Device_LED" 0 -100 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST @@ -64,11 +64,11 @@ X A 2 150 0 100 L 50 50 1 1 P ENDDRAW ENDDEF # -# Device:R_Small +# Device_R_Small # -DEF Device:R_Small R 0 10 N N 1 F N +DEF Device_R_Small R 0 10 N N 1 F N F0 "R" 30 20 50 H V L CNN -F1 "Device:R_Small" 30 -40 50 H V L CNN +F1 "Device_R_Small" 30 -40 50 H V L CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST @@ -81,11 +81,11 @@ X ~ 2 0 -100 30 U 50 50 1 1 P ENDDRAW ENDDEF # -# power:+1V2 +# power_+1V2 # -DEF power:+1V2 #PWR 0 0 Y Y 1 F P +DEF power_+1V2 #PWR 0 0 Y Y 1 F P F0 "#PWR" 0 -150 50 H I C CNN -F1 "power:+1V2" 0 140 50 H V C CNN +F1 "power_+1V2" 0 140 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN DRAW @@ -96,11 +96,11 @@ X +1V2 1 0 0 0 U 50 50 1 1 W N ENDDRAW ENDDEF # -# power:+2V5 +# power_+2V5 # -DEF power:+2V5 #PWR 0 0 Y Y 1 F P +DEF power_+2V5 #PWR 0 0 Y Y 1 F P F0 "#PWR" 0 -150 50 H I C CNN -F1 "power:+2V5" 0 140 50 H V C CNN +F1 "power_+2V5" 0 140 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN DRAW @@ -111,11 +111,11 @@ X +2V5 1 0 0 0 U 50 50 1 1 W N ENDDRAW ENDDEF # -# power:+3V3 +# power_+3V3 # -DEF power:+3V3 #PWR 0 0 Y Y 1 F P +DEF power_+3V3 #PWR 0 0 Y Y 1 F P F0 "#PWR" 0 -150 50 H I C CNN -F1 "power:+3V3" 0 140 50 H V C CNN +F1 "power_+3V3" 0 140 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN ALIAS +3.3V @@ -127,11 +127,11 @@ X +3V3 1 0 0 0 U 50 50 1 1 W N ENDDRAW ENDDEF # -# power:+5V +# power_+5V # -DEF power:+5V #PWR 0 0 Y Y 1 F P +DEF power_+5V #PWR 0 0 Y Y 1 F P F0 "#PWR" 0 -150 50 H I C CNN -F1 "power:+5V" 0 140 50 H V C CNN +F1 "power_+5V" 0 140 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN DRAW @@ -142,11 +142,11 @@ X +5V 1 0 0 0 U 50 50 1 1 W N ENDDRAW ENDDEF # -# power:GND +# power_GND # -DEF power:GND #PWR 0 0 Y Y 1 F P +DEF power_GND #PWR 0 0 Y Y 1 F P F0 "#PWR" 0 -250 50 H I C CNN -F1 "power:GND" 0 -150 50 H V C CNN +F1 "power_GND" 0 -150 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN DRAW @@ -155,11 +155,11 @@ X GND 1 0 0 0 D 50 50 1 1 W N ENDDRAW ENDDEF # -# tomu-fpga:Conn_01x06_Female +# tomu-fpga_Conn_01x06_Female # -DEF tomu-fpga:Conn_01x06_Female J 0 40 Y N 1 F N +DEF tomu-fpga_Conn_01x06_Female J 0 40 Y N 1 F N F0 "J" 0 300 50 H V C CNN -F1 "tomu-fpga:Conn_01x06_Female" 0 -400 50 H V C CNN +F1 "tomu-fpga_Conn_01x06_Female" 0 -400 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST @@ -188,11 +188,11 @@ X Pin_6 6 -200 -300 150 R 50 50 1 1 P ENDDRAW ENDDEF # -# tomu-fpga:ICE40UP5K-SG48ITR +# tomu-fpga_ICE40UP5K-SG48ITR # -DEF tomu-fpga:ICE40UP5K-SG48ITR U 0 20 Y Y 4 L N +DEF tomu-fpga_ICE40UP5K-SG48ITR U 0 20 Y Y 4 L N F0 "U" -350 -1150 50 H V C CNN -F1 "tomu-fpga:ICE40UP5K-SG48ITR" 0 -1250 50 H V C CNN +F1 "tomu-fpga_ICE40UP5K-SG48ITR" 0 -1250 50 H V C CNN F2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" 0 -1350 50 H I C CNN F3 "" -400 1000 50 H I C CNN $FPLIST @@ -255,11 +255,11 @@ X VCC 5 100 400 100 D 50 50 4 1 W ENDDRAW ENDDEF # -# tomu-fpga:LDO-SOT23 +# tomu-fpga_LDO-SOT23 # -DEF tomu-fpga:LDO-SOT23 U 0 40 Y Y 1 F N +DEF tomu-fpga_LDO-SOT23 U 0 40 Y Y 1 F N F0 "U" 0 -50 50 H V C CNN -F1 "tomu-fpga:LDO-SOT23" 0 -150 50 H V C CNN +F1 "tomu-fpga_LDO-SOT23" 0 -150 50 H V C CNN F2 "" 50 0 50 H I C CNN F3 "" 50 0 50 H I C CNN DRAW @@ -272,11 +272,11 @@ X OUT 5 300 250 100 L 50 50 1 1 w ENDDRAW ENDDEF # -# tomu-fpga:Oscillator +# tomu-fpga_Oscillator # -DEF tomu-fpga:Oscillator U 0 40 Y Y 1 F N +DEF tomu-fpga_Oscillator U 0 40 Y Y 1 F N F0 "U" 0 -50 50 H V C CNN -F1 "tomu-fpga:Oscillator" 0 -150 50 H V C CNN +F1 "tomu-fpga_Oscillator" 0 -150 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST @@ -291,11 +291,11 @@ X VDD 4 350 250 100 L 50 50 1 1 W ENDDRAW ENDDEF # -# tomu-fpga:PADS +# tomu-fpga_PADS # -DEF tomu-fpga:PADS P 0 40 Y Y 1 F N +DEF tomu-fpga_PADS P 0 40 Y Y 1 F N F0 "P" 0 -50 50 H V C CNN -F1 "tomu-fpga:PADS" 0 -150 50 H V C CNN +F1 "tomu-fpga_PADS" 0 -150 50 H V C CNN F2 "" 50 0 50 H I C CNN F3 "" 50 0 50 H I C CNN DRAW @@ -307,11 +307,11 @@ X ~ 4 -200 50 100 R 50 50 1 1 P ENDDRAW ENDDEF # -# tomu-fpga:RGB-LED +# tomu-fpga_RGB-LED # -DEF tomu-fpga:RGB-LED U 0 40 Y Y 1 F N +DEF tomu-fpga_RGB-LED U 0 40 Y Y 1 F N F0 "U" 0 -50 50 H V C CNN -F1 "tomu-fpga:RGB-LED" 0 -150 50 H V C CNN +F1 "tomu-fpga_RGB-LED" 0 -150 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN DRAW @@ -323,11 +323,11 @@ X VCC 4 -350 250 100 R 50 50 1 1 W ENDDRAW ENDDEF # -# tomu-fpga:Raspberry_Pi_2_3 +# tomu-fpga_Raspberry_Pi_2_3 # -DEF tomu-fpga:Raspberry_Pi_2_3 J 0 40 Y Y 1 F N +DEF tomu-fpga_Raspberry_Pi_2_3 J 0 40 Y Y 1 F N F0 "J" -700 1250 50 H V L BNN -F1 "tomu-fpga:Raspberry_Pi_2_3" 400 -1250 50 H V L TNN +F1 "tomu-fpga_Raspberry_Pi_2_3" 400 -1250 50 H V L TNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST @@ -419,11 +419,11 @@ X GND 9 -300 -1300 100 U 50 50 1 1 W ENDDRAW ENDDEF # -# tomu-fpga:SPI-Flash +# tomu-fpga_SPI-Flash # -DEF tomu-fpga:SPI-Flash U 0 40 Y Y 1 F N +DEF tomu-fpga_SPI-Flash U 0 40 Y Y 1 F N F0 "U" 0 -50 50 H V C CNN -F1 "tomu-fpga:SPI-Flash" 0 -150 50 H V C CNN +F1 "tomu-fpga_SPI-Flash" 0 -150 50 H V C CNN F2 "" -200 0 50 H I C CNN F3 "" -200 0 50 H I C CNN DRAW @@ -439,11 +439,11 @@ X VCC 8 -600 550 100 R 50 50 1 1 W ENDDRAW ENDDEF # -# tomu-fpga:SW_Push +# tomu-fpga_SW_Push # -DEF tomu-fpga:SW_Push SW? 0 40 Y Y 1 F N +DEF tomu-fpga_SW_Push SW? 0 40 Y Y 1 F N F0 "SW?" -300 -200 50 H V C CNN -F1 "tomu-fpga:SW_Push" 50 -200 50 H V C CNN +F1 "tomu-fpga_SW_Push" 50 -200 50 H V C CNN F2 "" 0 -100 50 H I C CNN F3 "" 0 -100 50 H I C CNN DRAW @@ -460,11 +460,11 @@ X ~ 4 200 -100 100 L 50 50 1 1 P ENDDRAW ENDDEF # -# tomu-fpga:USB-B +# tomu-fpga_USB-B # -DEF tomu-fpga:USB-B U 0 40 Y Y 1 F N +DEF tomu-fpga_USB-B U 0 40 Y Y 1 F N F0 "U" 0 0 50 H V C CNN -F1 "tomu-fpga:USB-B" 0 -100 50 H V C CNN +F1 "tomu-fpga_USB-B" 0 -100 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN DRAW diff --git a/hardware/pcb/tomu-fpga.kicad_pcb b/hardware/pcb/tomu-fpga.kicad_pcb index 172d254..6604542 100644 --- a/hardware/pcb/tomu-fpga.kicad_pcb +++ b/hardware/pcb/tomu-fpga.kicad_pcb @@ -736,81 +736,83 @@ ) ) - (module tomu-fpga:Pin_Header_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 5BEA3925) (tstamp 5C05D444) + (module tomu-fpga:Pin_Header_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 5BF9C85F) (tstamp 5C05D444) (at 95.56 77.7 90) (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row") (tags "Through hole pin header THT 1x06 2.54mm single row") (path /5EC9746F) + (attr virtual) (fp_text reference J3 (at 0 -2.33 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value PMOD (at 0 15.03 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 6.35 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) - (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) - (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) - (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1)) - (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) - (pad 6 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 3 +3V3)) - (pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 55 /PMOD_4)) - (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 57 /PMOD_3)) - (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 56 /PMOD_2)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 58 /PMOD_1)) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 56 /PMOD_2)) + (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 57 /PMOD_3)) + (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 55 /PMOD_4)) + (pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 6 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 3 +3V3)) ) - (module tomu-fpga:USB-B (layer F.Cu) (tedit 5BDC3E7B) (tstamp 5BED8C50) + (module tomu-fpga:USB-B (layer F.Cu) (tedit 5BF9C83E) (tstamp 5BED8C50) (at 105.605887 39.294365 135) (path /5BD8B24F) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) + (attr virtual) (fp_text reference U9 (at 3 2 135) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value USB-B (at -2 2 135) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -5.8 8) (end 5.8 8) (layer F.CrtYd) (width 0.3)) - (fp_line (start 5.8 8) (end 5.8 -3.8) (layer F.CrtYd) (width 0.3)) - (fp_line (start 5.8 -3.8) (end -5.8 -3.8) (layer F.CrtYd) (width 0.3)) (fp_line (start -5.8 -3.8) (end -5.8 8) (layer F.CrtYd) (width 0.3)) - (pad 1 smd trapezoid (at 3.5 6.7 315) (size 1.375 1.3) (rect_delta 0 1.374 ) (layers F.Cu F.Mask) - (net 1 +5V) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) - (pad 1 smd rect (at 2.8 6.699999 315) (size 1.375 1.3) (layers F.Cu F.Mask) - (net 1 +5V) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) - (pad 4 smd rect (at -2.81 6.699999 315) (size 1.375 1.3) (layers F.Cu F.Mask) - (net 2 GND) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) - (pad 4 smd trapezoid (at -3.5 6.7 315) (size 1.375 1.3) (rect_delta 0 1.374 ) (layers F.Cu F.Mask) - (net 2 GND) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) - (pad 3 smd rect (at -1 3 315) (size 1.75 6.41) (layers F.Cu F.Mask) - (net 60 "Net-(D8-Pad1)") (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001)) - (pad 2 smd rect (at 1 3 315) (size 1.75 6.41) (layers F.Cu F.Mask) - (net 61 "Net-(D7-Pad1)") (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001)) - (pad 1 smd rect (at 3.5 1.3 315) (size 2.75 9.5) (layers F.Cu F.Mask) - (net 1 +5V) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001)) + (fp_line (start 5.8 -3.8) (end -5.8 -3.8) (layer F.CrtYd) (width 0.3)) + (fp_line (start 5.8 8) (end 5.8 -3.8) (layer F.CrtYd) (width 0.3)) + (fp_line (start -5.8 8) (end 5.8 8) (layer F.CrtYd) (width 0.3)) (pad 4 smd rect (at -3.5 1.3 315) (size 2.75 9.5) (layers F.Cu F.Mask) (net 2 GND) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) + (pad 1 smd rect (at 3.5 1.3 315) (size 2.75 9.5) (layers F.Cu F.Mask) + (net 1 +5V) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001)) + (pad 2 smd rect (at 1 3 315) (size 1.75 6.41) (layers F.Cu F.Mask) + (net 61 "Net-(D7-Pad1)") (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001)) + (pad 3 smd rect (at -1 3 315) (size 1.75 6.41) (layers F.Cu F.Mask) + (net 60 "Net-(D8-Pad1)") (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001)) + (pad 4 smd trapezoid (at -3.5 6.7 315) (size 1.375 1.3) (rect_delta 0 1.374 ) (layers F.Cu F.Mask) + (net 2 GND) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) + (pad 4 smd rect (at -2.81 6.699999 315) (size 1.375 1.3) (layers F.Cu F.Mask) + (net 2 GND) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) + (pad 1 smd rect (at 2.8 6.699999 315) (size 1.375 1.3) (layers F.Cu F.Mask) + (net 1 +5V) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) + (pad 1 smd trapezoid (at 3.5 6.7 315) (size 1.375 1.3) (rect_delta 0 1.374 ) (layers F.Cu F.Mask) + (net 1 +5V) (solder_mask_margin 0.000001) (solder_paste_margin 0.000001) (clearance 0.000001) (zone_connect 2) (thermal_width 0.000001) (thermal_gap 0.000001)) ) (module tomu-fpga:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer F.Cu) (tedit 5BD951B1) (tstamp 5BED9067) @@ -1785,117 +1787,118 @@ ) ) - (module tomu-fpga:PinHeader_2x20_P2.54mm_Vertical (layer F.Cu) (tedit 5BEA3907) (tstamp 5BED8E6C) + (module tomu-fpga:PinHeader_2x20_P2.54mm_Vertical (layer F.Cu) (tedit 5BF9C854) (tstamp 5BED8E6C) (at 75 75 270) (descr "Through hole straight pin header, 2x20, 2.54mm pitch, double rows") (tags "Through hole pin header THT 2x20 2.54mm double row") (path /5C14D2BF) + (attr virtual) (fp_text reference J1 (at 1.27 -2.33 270) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value Raspberry_Pi_2_3 (at 1.27 50.59 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.81 -1.27) (end 3.81 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start 3.81 49.53) (end -1.27 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 49.53) (end -1.27 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.33 49.59) (end 3.87 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end -1.33 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.87 -1.33) (end 3.87 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.8 -1.8) (end -1.8 50.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 50.05) (end 4.35 50.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.35 50.05) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 1.27 24.13) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 4.35 50.05) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.8 50.05) (end 4.35 50.05) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.8 -1.8) (end -1.8 50.05) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.87 -1.33) (end 3.87 49.59) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 1.27) (end -1.33 49.59) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 49.59) (end 3.87 49.59) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1)) - (fp_line (start -1.27 49.53) (end -1.27 0) (layer F.Fab) (width 0.1)) - (fp_line (start 3.81 49.53) (end -1.27 49.53) (layer F.Fab) (width 0.1)) - (fp_line (start 3.81 -1.27) (end 3.81 49.53) (layer F.Fab) (width 0.1)) - (fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1)) - (pad 40 thru_hole oval (at 2.54 48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 46 "Net-(J1-Pad40)")) - (pad 39 thru_hole oval (at 0 48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 38 thru_hole oval (at 2.54 45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 37 "Net-(J1-Pad38)")) - (pad 37 thru_hole oval (at 0 45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 47 "Net-(J1-Pad37)")) - (pad 36 thru_hole oval (at 2.54 43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 28 "Net-(J1-Pad36)")) - (pad 35 thru_hole oval (at 0 43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 38 "Net-(J1-Pad35)")) - (pad 34 thru_hole oval (at 2.54 40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 33 thru_hole oval (at 0 40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 39 "Net-(J1-Pad33)")) - (pad 32 thru_hole oval (at 2.54 38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 40 "Net-(J1-Pad32)")) - (pad 31 thru_hole oval (at 0 38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 41 "Net-(J1-Pad31)")) - (pad 30 thru_hole oval (at 2.54 35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 29 thru_hole oval (at 0 35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 42 "Net-(J1-Pad29)")) - (pad 28 thru_hole oval (at 2.54 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 43 "Net-(J1-Pad28)")) - (pad 27 thru_hole oval (at 0 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 44 "Net-(J1-Pad27)")) - (pad 26 thru_hole oval (at 2.54 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 69 /DBG_6)) - (pad 25 thru_hole oval (at 0 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 24 thru_hole oval (at 2.54 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 17 /SPI_CS)) - (pad 23 thru_hole oval (at 0 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 22 /SPI_CLK)) - (pad 22 thru_hole oval (at 2.54 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 23 /SPI_IO3)) - (pad 21 thru_hole oval (at 0 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 21 /SPI_MISO)) - (pad 20 thru_hole oval (at 2.54 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 19 thru_hole oval (at 0 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 7 /SPI_MOSI)) - (pad 18 thru_hole oval (at 2.54 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 8 /SPI_IO2)) - (pad 17 thru_hole oval (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 9 "Net-(J1-Pad17)")) - (pad 16 thru_hole oval (at 2.54 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 54 "Net-(J1-Pad16)")) - (pad 15 thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 68 /DBG_5)) - (pad 14 thru_hole oval (at 2.54 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 13 thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 11 /CRESET)) - (pad 12 thru_hole oval (at 2.54 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 12 /DBG_4)) - (pad 11 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 13 /CDONE)) - (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 14 /UART_RX)) - (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 15 /UART_TX)) - (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 67 /DBG_3)) - (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 66 /DBG_2)) - (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 16 "Net-(J1-Pad1)")) + (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 1 +5V)) (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 10 /DBG_1)) - (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 1 +5V)) - (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 16 "Net-(J1-Pad1)")) + (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 66 /DBG_2)) + (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 67 /DBG_3)) + (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 15 /UART_TX)) + (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 14 /UART_RX)) + (pad 11 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 13 /CDONE)) + (pad 12 thru_hole oval (at 2.54 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 12 /DBG_4)) + (pad 13 thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 11 /CRESET)) + (pad 14 thru_hole oval (at 2.54 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 15 thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 68 /DBG_5)) + (pad 16 thru_hole oval (at 2.54 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 54 "Net-(J1-Pad16)")) + (pad 17 thru_hole oval (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 9 "Net-(J1-Pad17)")) + (pad 18 thru_hole oval (at 2.54 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 8 /SPI_IO2)) + (pad 19 thru_hole oval (at 0 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 7 /SPI_MOSI)) + (pad 20 thru_hole oval (at 2.54 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 21 thru_hole oval (at 0 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 21 /SPI_MISO)) + (pad 22 thru_hole oval (at 2.54 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 23 /SPI_IO3)) + (pad 23 thru_hole oval (at 0 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 22 /SPI_CLK)) + (pad 24 thru_hole oval (at 2.54 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 17 /SPI_CS)) + (pad 25 thru_hole oval (at 0 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 26 thru_hole oval (at 2.54 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 69 /DBG_6)) + (pad 27 thru_hole oval (at 0 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 44 "Net-(J1-Pad27)")) + (pad 28 thru_hole oval (at 2.54 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 43 "Net-(J1-Pad28)")) + (pad 29 thru_hole oval (at 0 35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 42 "Net-(J1-Pad29)")) + (pad 30 thru_hole oval (at 2.54 35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 31 thru_hole oval (at 0 38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 41 "Net-(J1-Pad31)")) + (pad 32 thru_hole oval (at 2.54 38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 40 "Net-(J1-Pad32)")) + (pad 33 thru_hole oval (at 0 40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 39 "Net-(J1-Pad33)")) + (pad 34 thru_hole oval (at 2.54 40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 35 thru_hole oval (at 0 43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 38 "Net-(J1-Pad35)")) + (pad 36 thru_hole oval (at 2.54 43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 28 "Net-(J1-Pad36)")) + (pad 37 thru_hole oval (at 0 45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 47 "Net-(J1-Pad37)")) + (pad 38 thru_hole oval (at 2.54 45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 37 "Net-(J1-Pad38)")) + (pad 39 thru_hole oval (at 0 48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 40 thru_hole oval (at 2.54 48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 46 "Net-(J1-Pad40)")) ) (module tomu-fpga:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm (layer F.Cu) (tedit 5BF9B0F3) (tstamp 5BED8E2E) @@ -2548,35 +2551,36 @@ ) ) - (module tomu-fpga:Touchpads (layer F.Cu) (tedit 5BD9311D) (tstamp 5BED8C5C) + (module tomu-fpga:Touchpads (layer F.Cu) (tedit 5BF9C86C) (tstamp 5BED8C5C) (at 49 36) (path /5BE44C19) + (attr virtual) (fp_text reference SW2 (at -24 3 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value "Captouch Pads" (at -0.1 9) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user 4 (at 18 7) (layer F.SilkS) - (effects (font (size 2 2) (thickness 0.25))) - ) - (fp_text user 3 (at 6 7) (layer F.SilkS) + (fp_text user 1 (at -18 7) (layer F.SilkS) (effects (font (size 2 2) (thickness 0.25))) ) (fp_text user 2 (at -6 7) (layer F.SilkS) (effects (font (size 2 2) (thickness 0.25))) ) - (fp_text user 1 (at -18 7) (layer F.SilkS) + (fp_text user 3 (at 6 7) (layer F.SilkS) + (effects (font (size 2 2) (thickness 0.25))) + ) + (fp_text user 4 (at 18 7) (layer F.SilkS) (effects (font (size 2 2) (thickness 0.25))) ) - (pad 4 smd rect (at 18 0 180) (size 10 10) (layers F.Cu F.Mask) - (net 62 "Net-(D5-Pad1)")) - (pad 3 smd rect (at 6 0 180) (size 10 10) (layers F.Cu F.Mask) - (net 63 "Net-(D4-Pad1)")) - (pad 2 smd rect (at -6 0 180) (size 10 10) (layers F.Cu F.Mask) - (net 64 "Net-(D3-Pad1)")) (pad 1 smd rect (at -18 0 180) (size 10 10) (layers F.Cu F.Mask) (net 65 "Net-(D2-Pad1)")) + (pad 2 smd rect (at -6 0 180) (size 10 10) (layers F.Cu F.Mask) + (net 64 "Net-(D3-Pad1)")) + (pad 3 smd rect (at 6 0 180) (size 10 10) (layers F.Cu F.Mask) + (net 63 "Net-(D4-Pad1)")) + (pad 4 smd rect (at 18 0 180) (size 10 10) (layers F.Cu F.Mask) + (net 62 "Net-(D5-Pad1)")) ) (gr_text G (at 44.5 73) (layer F.SilkS) (tstamp 5BF8A6C3) @@ -3719,7 +3723,7 @@ (segment (start 47.9 73.5) (end 52.3 69.1) (width 0.1524) (layer B.Cu) (net 69)) (segment (start 52.3 69.1) (end 65.6 69.1) (width 0.1524) (layer B.Cu) (net 69)) - (zone (net 4) (net_name +1V2) (layer B.Cu) (tstamp 5BF9D062) (hatch edge 0.508) + (zone (net 4) (net_name +1V2) (layer B.Cu) (tstamp 5BF9E462) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -3735,7 +3739,7 @@ ) ) ) - (zone (net 1) (net_name +5V) (layer F.Cu) (tstamp 5BF9D05F) (hatch edge 0.508) + (zone (net 1) (net_name +5V) (layer F.Cu) (tstamp 5BF9E45F) (hatch edge 0.508) (priority 3) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -3999,7 +4003,7 @@ ) ) ) - (zone (net 5) (net_name +2V5) (layer F.Cu) (tstamp 5BF9D05C) (hatch edge 0.508) + (zone (net 5) (net_name +2V5) (layer F.Cu) (tstamp 5BF9E45C) (hatch edge 0.508) (priority 2) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -4062,7 +4066,7 @@ ) ) ) - (zone (net 2) (net_name GND) (layer B.Cu) (tstamp 5BF9D059) (hatch edge 0.508) + (zone (net 2) (net_name GND) (layer B.Cu) (tstamp 5BF9E459) (hatch edge 0.508) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) (fill yes (arc_segments 32) (thermal_gap 0.154) (thermal_bridge_width 0.154) (smoothing chamfer)) @@ -4651,7 +4655,7 @@ ) ) ) - (zone (net 29) (net_name /VCCPLL) (layer F.Cu) (tstamp 5BF9D056) (hatch edge 0.508) + (zone (net 29) (net_name /VCCPLL) (layer F.Cu) (tstamp 5BF9E456) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -4676,7 +4680,7 @@ ) ) ) - (zone (net 4) (net_name +1V2) (layer F.Cu) (tstamp 5BF9D053) (hatch edge 0.508) + (zone (net 4) (net_name +1V2) (layer F.Cu) (tstamp 5BF9E453) (hatch edge 0.508) (priority 2) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -4697,7 +4701,7 @@ ) ) ) - (zone (net 4) (net_name +1V2) (layer F.Cu) (tstamp 5BF9D050) (hatch edge 0.508) + (zone (net 4) (net_name +1V2) (layer F.Cu) (tstamp 5BF9E450) (hatch edge 0.508) (priority 2) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -4719,7 +4723,7 @@ ) ) ) - (zone (net 3) (net_name +3V3) (layer F.Cu) (tstamp 5BF9D04D) (hatch edge 0.508) + (zone (net 3) (net_name +3V3) (layer F.Cu) (tstamp 5BF9E44D) (hatch edge 0.508) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.154) (thermal_bridge_width 0.154)) @@ -5331,7 +5335,7 @@ ) ) ) - (zone (net 1) (net_name +5V) (layer B.Cu) (tstamp 5BF9D04A) (hatch edge 0.508) + (zone (net 1) (net_name +5V) (layer B.Cu) (tstamp 5BF9E44A) (hatch edge 0.508) (priority 2) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -5354,7 +5358,7 @@ ) ) ) - (zone (net 3) (net_name +3V3) (layer B.Cu) (tstamp 5BF9D047) (hatch edge 0.508) + (zone (net 3) (net_name +3V3) (layer B.Cu) (tstamp 5BF9E447) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -5374,7 +5378,7 @@ ) ) ) - (zone (net 1) (net_name +5V) (layer F.Cu) (tstamp 5BF9D044) (hatch edge 0.508) + (zone (net 1) (net_name +5V) (layer F.Cu) (tstamp 5BF9E444) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.154)) (min_thickness 0.254) @@ -5422,7 +5426,7 @@ ) ) ) - (zone (net 2) (net_name GND) (layer F.Cu) (tstamp 5BF9D041) (hatch edge 0.508) + (zone (net 2) (net_name GND) (layer F.Cu) (tstamp 5BF9E441) (hatch edge 0.508) (priority 2) (connect_pads (clearance 0.154)) (min_thickness 0.254) diff --git a/hardware/pcb/tomu-fpga.sch b/hardware/pcb/tomu-fpga.sch index 7787660..2537787 100644 --- a/hardware/pcb/tomu-fpga.sch +++ b/hardware/pcb/tomu-fpga.sch @@ -374,6 +374,8 @@ F 4 "DNP" H 8300 1600 50 0001 C CNN "MPN" F 5 "DNP" H 8300 1600 50 0001 C CNN "Manufacturer" F 6 "DNP" H 8300 1600 50 0001 C CNN "MYPN" F 7 "PCB-etched USB pads" H 0 0 50 0001 C CNN "Description" +F 8 "X" H 0 0 50 0001 C CNN "DNP" +F 9 "DNP" H 0 0 50 0001 C CNN "DPN" 1 8300 1600 -1 0 0 1 $EndComp @@ -494,6 +496,7 @@ F 4 "DSC6001HI2A-048.0000T" H 4750 1600 50 0001 C CNN "MPN" F 5 "Microchip" H 4750 1600 50 0001 C CNN "Manufacturer" F 6 "DSC6001HI2A-048.0000T-ND" H 4750 1600 50 0001 C CNN "DPN" F 7 "MEMS OSC XO 48.0000MHZ CMOS SMD" H 50 -50 50 0001 C CNN "Description" +F 8 "X" H 4750 1600 50 0001 C CNN "DNP" 1 4750 1600 -1 0 0 1 $EndComp @@ -572,8 +575,9 @@ F 3 "" H 5850 1200 50 0001 C CNN F 4 "DNP" H 5800 1200 50 0001 C CNN "MPN" F 5 "DNP" H 5800 1200 50 0001 C CNN "Manufacturer" F 6 "DNP" H 5800 1200 50 0001 C CNN "MYPN" -F 7 "" H 5800 1200 50 0001 C CNN "DPN" +F 7 "DNP" H 5800 1200 50 0001 C CNN "DPN" F 8 "PCB-etched captouch pads" H 300 -1000 50 0001 C CNN "Description" +F 9 "X" H 0 0 50 0001 C CNN "DNP" 1 5800 1200 0 -1 -1 0 $EndComp @@ -921,6 +925,8 @@ F 3 "" H 3800 5000 50 0001 C CNN F 4 "DNP" H 3800 5000 50 0001 C CNN "MPN" F 5 "DNP" H 3800 5000 50 0001 C CNN "Manufacturer" F 6 "DNP" H -1350 -50 50 0001 C CNN "MYPN" +F 7 "X" H 0 0 50 0001 C CNN "DNP" +F 8 "DNP" H 0 0 50 0001 C CNN "DPN" 1 3800 5000 1 0 0 -1 $EndComp @@ -1934,6 +1940,10 @@ F 1 "Raspberry_Pi_2_3" H 6150 6650 50 0000 C CNN F 2 "tomu-fpga:PinHeader_2x20_P2.54mm_Vertical" H 5600 5400 50 0001 C CNN F 3 "https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf" H 5600 5400 50 0001 C CNN F 4 "Connector for development" H 0 0 50 0001 C CNN "Description" +F 5 "X" H 0 0 50 0001 C CNN "DNP" +F 6 "DNP" H 0 0 50 0001 C CNN "DPN" +F 7 "DNP" H 0 0 50 0001 C CNN "MPN" +F 8 "DNP" H 0 0 50 0001 C CNN "Manufacturer" 1 5600 5400 1 0 0 -1 $EndComp @@ -2143,6 +2153,7 @@ F 3 "~" H 7950 1150 50 0001 C CNN F 4 "DNP" H 7950 1150 50 0001 C CNN "MPN" F 5 "DNP" H 7950 1150 50 0001 C CNN "Manufacturer" F 6 "DNP" H 7950 1150 50 0001 C CNN "DPN" +F 7 "X" H 0 0 50 0001 C CNN "DNP" 1 7950 1150 -1 0 0 1 $EndComp @@ -2258,9 +2269,11 @@ F 0 "R13" V 4050 7050 50 0000 C CNN F 1 "0805, 10k, 1/16W (DNP)" V 3950 6850 50 0000 C CNN F 2 "tomu-fpga:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" H 4050 7050 50 0001 C CNN F 3 "" H 4050 7050 50 0001 C CNN -F 4 "ANY" H -950 200 50 0001 C CNN "MPN" +F 4 "DNP" H -950 200 50 0001 C CNN "MPN" F 5 "ANY" H -950 200 50 0001 C CNN "MYPN" -F 6 "ANY" H -950 200 50 0001 C CNN "Manufacturer" +F 6 "DNP" H -950 200 50 0001 C CNN "Manufacturer" +F 7 "X" H 0 0 50 0001 C CNN "DNP" +F 8 "DNP" H 0 0 50 0001 C CNN "DPN" 1 4050 7050 -1 0 0 1 $EndComp