From 76f7bf25480c229ceaf534c271755a10ded63a1f Mon Sep 17 00:00:00 2001
From: Sean Cross <sean@xobs.io>
Date: Tue, 30 Oct 2018 19:13:32 +0800
Subject: [PATCH] pcb: sch: make ICE40 VCCPLL a power input

For some reason, this pin was listed as a `power output`, which does not
appear to be the case.  Due to this error, the DRC would fail when using
a regulator directly connected to the pin.

Mark this pin as a `power input` to fix this, since it's really where
power goes into the chip.

Signed-off-by: Sean Cross <sean@xobs.io>
---
 hardware/pcb/tomu-fpga-cache.lib | 42 ++++++++++++++++----------------
 hardware/pcb/tomu-fpga.lib       |  2 +-
 2 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/hardware/pcb/tomu-fpga-cache.lib b/hardware/pcb/tomu-fpga-cache.lib
index 7b8f71a..3e5e078 100644
--- a/hardware/pcb/tomu-fpga-cache.lib
+++ b/hardware/pcb/tomu-fpga-cache.lib
@@ -63,11 +63,28 @@ X ~ 2 0 -100 30 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# FPGA_Lattice:ICE40UP5K-SG48ITR
+# Switch:SW_Push
 #
-DEF FPGA_Lattice:ICE40UP5K-SG48ITR U 0 20 Y Y 4 L N
+DEF Switch:SW_Push SW 0 40 N N 1 F N
+F0 "SW" 50 100 50 H V L CNN
+F1 "Switch:SW_Push" 0 -60 50 H V C CNN
+F2 "" 0 200 50 H I C CNN
+F3 "" 0 200 50 H I C CNN
+DRAW
+C -80 0 20 0 1 0 N
+C 80 0 20 0 1 0 N
+P 2 0 1 0 0 50 0 120 N
+P 2 0 1 0 100 50 -100 50 N
+X 1 1 -200 0 100 R 50 50 0 1 P
+X 2 2 200 0 100 L 50 50 0 1 P
+ENDDRAW
+ENDDEF
+#
+# Tomu_FPGA:ICE40UP5K-SG48ITR
+#
+DEF Tomu_FPGA:ICE40UP5K-SG48ITR U 0 20 Y Y 4 L N
 F0 "U" -350 -1150 50 H V C CNN
-F1 "FPGA_Lattice:ICE40UP5K-SG48ITR" 0 -1250 50 H V C CNN
+F1 "Tomu_FPGA:ICE40UP5K-SG48ITR" 0 -1250 50 H V C CNN
 F2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" 0 -1350 50 H I C CNN
 F3 "" -400 1000 50 H I C CNN
 $FPLIST
@@ -123,30 +140,13 @@ X IOB_0a 46 -400 200 100 R 50 50 3 1 B
 X IOB_2a 47 -400 100 100 R 50 50 3 1 B
 X IOB_4a 48 -400 -100 100 R 50 50 3 1 B
 X VPP_2V5 24 -100 400 100 D 50 50 4 1 W
-X VCCPLL 29 100 400 100 D 50 50 4 1 w
+X VCCPLL 29 100 400 100 D 50 50 4 1 W
 X VCC 30 0 400 100 D 50 50 4 1 P N
 X GND 49 0 -400 100 U 50 50 4 1 W
 X VCC 5 0 400 100 D 50 50 4 1 W
 ENDDRAW
 ENDDEF
 #
-# Switch:SW_Push
-#
-DEF Switch:SW_Push SW 0 40 N N 1 F N
-F0 "SW" 50 100 50 H V L CNN
-F1 "Switch:SW_Push" 0 -60 50 H V C CNN
-F2 "" 0 200 50 H I C CNN
-F3 "" 0 200 50 H I C CNN
-DRAW
-C -80 0 20 0 1 0 N
-C 80 0 20 0 1 0 N
-P 2 0 1 0 0 50 0 120 N
-P 2 0 1 0 100 50 -100 50 N
-X 1 1 -200 0 100 R 50 50 0 1 P
-X 2 2 200 0 100 L 50 50 0 1 P
-ENDDRAW
-ENDDEF
-#
 # power:+1V2
 #
 DEF power:+1V2 #PWR 0 0 Y Y 1 F P
diff --git a/hardware/pcb/tomu-fpga.lib b/hardware/pcb/tomu-fpga.lib
index b6b59e4..952b90a 100644
--- a/hardware/pcb/tomu-fpga.lib
+++ b/hardware/pcb/tomu-fpga.lib
@@ -61,7 +61,7 @@ X IOB_0a 46 -400 200 100 R 50 50 3 1 B
 X IOB_2a 47 -400 100 100 R 50 50 3 1 B
 X IOB_4a 48 -400 -100 100 R 50 50 3 1 B
 X VPP_2V5 24 -100 400 100 D 50 50 4 1 W
-X VCCPLL 29 100 400 100 D 50 50 4 1 w
+X VCCPLL 29 100 400 100 D 50 50 4 1 W
 X VCC 30 0 400 100 D 50 50 4 1 P N
 X GND 49 0 -400 100 U 50 50 4 1 W
 X VCC 5 0 400 100 D 50 50 4 1 W