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hardware: replace VCCPLL regulator with RC network

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Having a full regulator on VCCPLL causes the ESD network in the ICE40 to
freak out, dumping VCCPLL into GND and trying very hard to burn out the
regulator.

Replace it with a simple RC filter network, which is less clean but
results in a happier ESD network.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2018-11-25 04:08:23 +08:00
parent f3543e6e03
commit 0a7b84d1c3
3 changed files with 660 additions and 775 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
hardware/pcb/tomu-fpga-cache.lib
View File

@ -28,7 +28,6 @@ F2 "" 0 0 50 V I C CNN
F3 "" 0 0 50 V I C CNN F3 "" 0 0 50 V I C CNN
$FPLIST $FPLIST
TO-???* TO-???*
*SingleDiode
*_Diode_* *_Diode_*
*SingleDiode* *SingleDiode*
D_* D_*
@ -133,6 +132,19 @@ X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# power:PWR_FLAG
#
DEF power:PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 75 50 H I C CNN
F1 "power:PWR_FLAG" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
X pwr 1 0 0 0 U 50 50 0 0 w
ENDDRAW
ENDDEF
#
# tomu-fpga:Case # tomu-fpga:Case
# #
DEF tomu-fpga:Case XX 0 40 Y Y 1 F N DEF tomu-fpga:Case XX 0 40 Y Y 1 F N

991
hardware/pcb/tomu-fpga.kicad_pcb
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File diff suppressed because it is too large Load Diff

430
hardware/pcb/tomu-fpga.sch
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Wire Wire Line
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VCCPLL VCCPLL
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To program SPI flash, put FPGA in RESET\nTo program FPGA, keep SPI_IO3 LOW To program SPI flash, put FPGA in RESET\nTo program FPGA, keep SPI_IO3 LOW
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Text Notes 9700 4450 0 50 ~ 0
VCCPLL Filter Network
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