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tomu-fpga/hardware/releases/evt1/tomu-fpga.d356

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releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
P CODE 00
P UNITS CUST 0
P DIM N
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317+5V VIA MD0130PA00X+029409Y+011654X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317+5V VIA MD0130PA00X+030020Y+011122X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317+5V VIA MD0130PA00X+029587Y+011102X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317+5V VIA MD0130PA00X+030118Y+011614X0270Y0000R000S3
317+5V VIA MD0130PA00X+014764Y+012106X0270Y0000R000S3
317+5V VIA MD0130PA00X+029724Y+011496X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317+5V VIA MD0130PA00X+013622Y+011969X0270Y0000R000S3
317+5V VIA MD0130PA00X+013386Y+012323X0270Y0000R000S3
317+5V VIA MD0130PA00X+013780Y+012323X0270Y0000R000S3
317+5V VIA MD0130PA00X+014252Y+012362X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317GND VIA MD0130PA00X+025394Y+001181X0270Y0000R000S3
317GND VIA MD0130PA00X+024409Y+006102X0270Y0000R000S3
317GND VIA MD0130PA00X+025394Y+005906X0270Y0000R000S3
317GND VIA MD0130PA00X+027165Y+005118X0270Y0000R000S3
317GND VIA MD0130PA00X+010827Y+009055X0270Y0000R000S3
317GND VIA MD0130PA00X+014764Y+011024X0270Y0000R000S3
317GND VIA MD0130PA00X+013780Y+008071X0270Y0000R000S3
317GND VIA MD0130PA00X+012402Y+008465X0270Y0000R000S3
317GND VIA MD0130PA00X+020276Y+017717X0270Y0000R000S3
317GND VIA MD0130PA00X+021457Y+017717X0270Y0000R000S3
317GND VIA MD0130PA00X+024213Y+017717X0270Y0000R000S3
317GND VIA MD0130PA00X+025394Y+017717X0270Y0000R000S3
317GND VIA MD0130PA00X+024213Y+012205X0270Y0000R000S3
317GND VIA MD0130PA00X+018701Y+012992X0270Y0000R000S3
317GND VIA MD0130PA00X+020276Y+011220X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317+5V VIA MD0130PA00X+030118Y+015945X0270Y0000R000S3
317+5V VIA MD0130PA00X+029823Y+015551X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317GND VIA MD0130PA00X+007480Y+007185X0270Y0000R000S3
317GND VIA MD0130PA00X+005315Y+004331X0270Y0000R000S3
317GND VIA MD0130PA00X+001476Y+006594X0270Y0000R000S3
317GND VIA MD0130PA00X+005413Y+007972X0270Y0000R000S3
317GND VIA MD0130PA00X+018602Y+007087X0270Y0000R000S3
317GND VIA MD0130PA00X+018898Y+007087X0270Y0000R000S3
317GND VIA MD0130PA00X+019193Y+007087X0270Y0000R000S3
317GND VIA MD0130PA00X+019488Y+007087X0270Y0000R000S3
317GND VIA MD0130PA00X+019783Y+007087X0270Y0000R000S3
317GND VIA MD0130PA00X+020079Y+007087X0270Y0000R000S3
317GND VIA MD0130PA00X+020079Y+008701X0270Y0000R000S3
317GND VIA MD0130PA00X+019783Y+008701X0270Y0000R000S3
317GND VIA MD0130PA00X+019488Y+008701X0270Y0000R000S3
317GND VIA MD0130PA00X+019193Y+008701X0270Y0000R000S3
317GND VIA MD0130PA00X+018898Y+008701X0270Y0000R000S3
317GND VIA MD0130PA00X+018602Y+008701X0270Y0000R000S3
317GND VIA MD0130PA00X+017953Y+011024X0270Y0000R000S3
317GND VIA MD0130PA00X+023661Y+002402X0270Y0000R000S3
317GND VIA MD0130PA00X+015866Y+007913X0270Y0000R000S3
317GND VIA MD0130PA00X+012441Y+007717X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317+5V VIA MD0130PA00X+029764Y+015984X0270Y0000R000S3
317+5V VIA MD0130PA00X+030472Y+016181X0270Y0000R000S3
317+5V VIA MD0130PA00X+029528Y+015748X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317GND VIA MD0130PA00X+025551Y+003150X0270Y0000R000S3
317GND VIA MD0130PA00X+019154Y+005276X0270Y0000R000S3
317GND VIA MD0130PA00X+018583Y+003169X0270Y0000R000S3
317GND VIA MD0130PA00X+022087Y+003465X0270Y0000R000S3
317GND VIA MD0130PA00X+022165Y+005118X0270Y0000R000S3
317GND VIA MD0130PA00X+022165Y+004331X0270Y0000R000S3
317GND VIA MD0130PA00X+024961Y+006102X0270Y0000R000S3
317GND VIA MD0130PA00X+024075Y+010276X0270Y0000R000S3
317GND VIA MD0130PA00X+016535Y+010787X0270Y0000R000S3
317GND VIA MD0130PA00X+014961Y+010748X0270Y0000R000S3
317GND VIA MD0130PA00X+015748Y+010866X0270Y0000R000S3
317GND VIA MD0130PA00X+012913Y+011655X0270Y0000R000S3
317GND VIA MD0130PA00X+010591Y+007874X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317GND VIA MD0130PA00X+032520Y+015118X0270Y0000R000S3
317GND VIA MD0130PA00X+031850Y+014409X0270Y0000R000S3
317GND VIA MD0130PA00X+032047Y+014685X0270Y0000R000S3
317GND VIA MD0130PA00X+032323Y+014409X0270Y0000R000S3
317GND VIA MD0130PA00X+032087Y+014134X0270Y0000R000S3
317GND VIA MD0130PA00X+032756Y+014882X0270Y0000R000S3
317GND VIA MD0130PA00X+032283Y+014882X0270Y0000R000S3
317GND VIA MD0130PA00X+032520Y+014646X0270Y0000R000S3
317GND VIA MD0130PA00X+024213Y+014567X0270Y0000R000S3
317GND VIA MD0130PA00X+024213Y+012992X0270Y0000R000S3
317GND VIA MD0130PA00X+024803Y+012992X0270Y0000R000S3
317GND VIA MD0130PA00X+024803Y+014567X0270Y0000R000S3
317GND VIA MD0130PA00X+025098Y+014567X0270Y0000R000S3
317GND VIA MD0130PA00X+024508Y+014567X0270Y0000R000S3
317GND VIA MD0130PA00X+024508Y+012992X0270Y0000R000S3
317GND VIA MD0130PA00X+025098Y+012992X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317+3V3 VIA MD0130PA00X+028661Y+006102X0270Y0000R000S3
317+3V3 VIA MD0130PA00X+022677Y+008740X0270Y0000R000S3
317+3V3 VIA MD0130PA00X+022362Y+008622X0270Y0000R000S3
317+3V3 VIA MD0130PA00X+022598Y+008465X0270Y0000R000S3
317+3V3 VIA MD0130PA00X+019764Y+005394X0270Y0000R000S3
317+3V3 VIA MD0130PA00X+019764Y+005827X0270Y0000R000S3
317+3V3 VIA MD0130PA00X+019941Y+005610X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317+1V2 VIA MD0130PA00X+021063Y+007874X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317+1V2 VIA MD0130PA00X+017126Y+008071X0270Y0000R000S3
317+1V2 VIA MD0130PA00X+017441Y+008071X0270Y0000R000S3
317+1V2 VIA MD0130PA00X+021417Y+007835X0270Y0000R000S3
317+1V2 VIA MD0130PA00X+021457Y+008110X0270Y0000R000S3
317+1V2 VIA MD0130PA00X+017126Y+007756X0270Y0000R000S3
317/SPI_MOSI VIA MD0130PA00X+017008Y+004961X0270Y0000R000S3
317/SPI_MOSI VIA MD0130PA00X+010118Y+003307X0270Y0000R000S3
317/SPI_IO2 VIA MD0130PA00X+016614Y+003465X0270Y0000R000S3
317/SPI_IO2 VIA MD0130PA00X+006890Y+004331X0270Y0000R000S3
317/SPI_IO2 VIA MD0130PA00X+007520Y+004724X0270Y0000R000S3
317/DBG_1 VIA MD0130PA00X+015945Y+003228X0270Y0000R000S3
317/CRESET VIA MD0130PA00X+015827Y+005551X0270Y0000R000S3
317/CRESET VIA MD0130PA00X+005827Y+010394X0270Y0000R000S3
317/CRESET VIA MD0130PA00X+010276Y+004173X0270Y0000R000S3
317/CRESET VIA MD0130PA00X+009460Y+008896X0270Y0000R000S3
317/CDONE VIA MD0130PA00X+015748Y+006063X0270Y0000R000S3
317/CDONE VIA MD0130PA00X+005354Y+011220X0270Y0000R000S3
317/CDONE VIA MD0130PA00X+009724Y+009094X0270Y0000R000S3
317/UART_RX VIA MD0130PA00X+016319Y+003240X0270Y0000R000S3
317/UART_TX VIA MD0130PA00X+018504Y+004429X0270Y0000R000S3
317/SPI_CS VIA MD0130PA00X+016929Y+004409X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317/ICE_USBP VIA MD0130PA00X+026258Y+011143X0270Y0000R000S3
317/ICE_USBP VIA MD0130PA00X+021969Y+009134X0270Y0000R000S3
317/ICE_USBN VIA MD0130PA00X+021850Y+009488X0270Y0000R000S3
317/ICE_USBN VIA MD0130PA00X+025906Y+011339X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317NET-(SW2-PAD1) VIA MD0130PA00X+011339Y+010472X0270Y0000R000S3
317NET-(SW2-PAD1) VIA MD0130PA00X+009055Y+012520X0270Y0000R000S3
317NET-(SW2-PAD1) VIA MD0130PA00X+002362Y+017323X0270Y0000R000S3
317NET-(SW2-PAD1) VIA MD0130PA00X+017776Y+009660X0270Y0000R000S3
317NET-(SW2-PAD2) VIA MD0130PA00X+011522Y+010747X0270Y0000R000S3
317NET-(SW2-PAD2) VIA MD0130PA00X+007087Y+017323X0270Y0000R000S3
317NET-(SW2-PAD2) VIA MD0130PA00X+008622Y+013740X0270Y0000R000S3
317NET-(SW2-PAD2) VIA MD0130PA00X+017835Y+010000X0270Y0000R000S3
317NET-(SW2-PAD3) VIA MD0130PA00X+018189Y+009921X0270Y0000R000S3
317NET-(SW2-PAD3) VIA MD0130PA00X+011575Y+011102X0270Y0000R000S3
317NET-(SW2-PAD3) VIA MD0130PA00X+011811Y+017323X0270Y0000R000S3
317NET-(SW2-PAD3) VIA MD0130PA00X+010562Y+013830X0270Y0000R000S3
317NET-(SW2-PAD4) VIA MD0130PA00X+018661Y+009843X0270Y0000R000S3
317NET-(SW2-PAD4) VIA MD0130PA00X+016535Y+017323X0270Y0000R000S3
317NET-(SW2-PAD4) VIA MD0130PA00X+011653Y+011496X0270Y0000R000S3
317NET-(SW2-PAD4) VIA MD0130PA00X+010787Y+013543X0270Y0000R000S3
317/SPI_MISO VIA MD0130PA00X+016831Y+004035X0270Y0000R000S3
317/SPI_CLK VIA MD0130PA00X+016693Y+004646X0270Y0000R000S3
317/SPI_IO3 VIA MD0130PA00X+017224Y+003740X0270Y0000R000S3
317/DBG_10 VIA MD0130PA00X+016339Y+005197X0270Y0000R000S3
317/DBG_9 VIA MD0130PA00X+017677Y+005906X0270Y0000R000S3
317/DBG_8 VIA MD0130PA00X+017913Y+006142X0270Y0000R000S3
317/DBG_7 VIA MD0130PA00X+018504Y+003937X0270Y0000R000S3
317NET-(SW3-PAD1) VIA MD0130PA00X+021575Y+014567X0270Y0000R000S3
317NET-(SW3-PAD1) VIA MD0130PA00X+020906Y+011929X0270Y0000R000S3
317NET-(SW3-PAD1) VIA MD0130PA00X+020945Y+010787X0270Y0000R000S3
317NET-(SW3-PAD1) VIA MD0130PA00X+023189Y+015787X0270Y0000R000S3
317NET-(SW4-PAD1) VIA MD0130PA00X+019356Y+009845X0270Y0000R000S3
317NET-(SW4-PAD1) VIA MD0130PA00X+011811Y+011811X0270Y0000R000S3
317NET-(SW4-PAD1) VIA MD0130PA00X+019606Y+016614X0270Y0000R000S3
317NET-(SW4-PAD1) VIA MD0130PA00X+011024Y+013268X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317/PU_CTRL_USBN VIA MD0130PA00X+026378Y+011575X0270Y0000R000S3
317/PU_CTRL_USBN VIA MD0130PA00X+021575Y+009213X0270Y0000R000S3
317/PU_CTRL_USBP VIA MD0130PA00X+021732Y+008898X0270Y0000R000S3
317/PU_CTRL_USBP VIA MD0130PA00X+026614Y+011181X0270Y0000R000S3
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
317/PMOD_4 VIA MD0130PA00X+028346Y+003543X0270Y0000R000S3
317/PMOD_4 VIA MD0130PA00X+023819Y+006220X0270Y0000R000S3
317/PMOD_2 VIA MD0130PA00X+027402Y+003504X0270Y0000R000S3
317/PMOD_2 VIA MD0130PA00X+023307Y+005748X0270Y0000R000S3
317/PMOD_3 VIA MD0130PA00X+027835Y+003425X0270Y0000R000S3
317/PMOD_3 VIA MD0130PA00X+023543Y+005984X0270Y0000R000S3
317/PMOD_1 VIA MD0130PA00X+027008Y+003583X0270Y0000R000S3
317/PMOD_1 VIA MD0130PA00X+022953Y+005748X0270Y0000R000S3
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
317/PMOD_1 J3 -1 D0394PA00X+027780Y+000906X0669Y0669R270S0
317/PMOD_2 J3 -2 D0394PA00X+028780Y+000906X0669Y0669R270S0
317/PMOD_3 J3 -3 D0394PA00X+029780Y+000906X0669Y0669R270S0
317/PMOD_4 J3 -4 D0394PA00X+030780Y+000906X0669Y0669R270S0
317GND J3 -5 D0394PA00X+031780Y+000906X0669Y0669R270S0
317+3V3 J3 -6 D0394PA00X+032780Y+000906X0669Y0669R270S0
327GND U9 -4 A01X+033071Y+015413X1083Y3740R045S2
327+5V U9 -1 A01X+031122Y+017362X1083Y3740R045S2
327NET-(R11-PAD2) U9 -2 A01X+032291Y+017139X0689Y2524R045S2
327NET-(R12-PAD2) U9 -3 A01X+032848Y+016583X0689Y2524R045S2
327GND U9 -4 A01X+034574Y+016917X0541Y0512R045S2
327GND U9 -4 A01X+034382Y+017109X0541Y0512R045S2
327+5V U9 -1 A01X+032820Y+018671X0541Y0512R045S2
327+5V U9 -1 A01X+032625Y+018865X0541Y0512R045S2
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
327NET-(SW3-PAD1) SW3 -1 A01X+026063Y+016181X0630Y0394R180S2
327GND SW3 -3 A01X+026063Y+017677X0630Y0394R180S2
327NET-(SW3-PAD1) SW3 -2 A01X+023543Y+016181X0630Y0394R180S2
327GND SW3 -4 A01X+023543Y+017677X0630Y0394R180S2
327NET-(R7-PAD1) U7 -3 A01X+019656Y+010581X0354Y0315R180S2
327GND U7 -2 A01X+019656Y+011152X0354Y0315R180S2
327+3V3 U7 -1 A01X+018927Y+011152X0354Y0315R180S2
327+3V3 U7 -4 A01X+018927Y+010581X0354Y0315R180S2
327+2V5 C27 -1 A01X+020856Y+005118X0453Y0551R000S2
327GND C27 -2 A01X+021663Y+005118X0453Y0551R000S2
327GND C26 -2 A01X+023632Y+011417X0453Y0551R000S2
327+3V3 C26 -1 A01X+022825Y+011417X0453Y0551R000S2
327+2V5 C25 -1 A01X+020856Y+004331X0453Y0551R000S2
327GND C25 -2 A01X+021663Y+004331X0453Y0551R000S2
327GND C24 -2 A01X+023632Y+012205X0453Y0551R000S2
327+3V3 C24 -1 A01X+022825Y+012205X0453Y0551R000S2
327/VCCPLL C23 -1 A01X+024409Y+007490X0453Y0551R090S2
327GND C23 -2 A01X+024409Y+006683X0453Y0551R090S2
327/VCCPLL C22 -2 A01X+025197Y+007480X0453Y0551R270S2
327GND C22 -1 A01X+025197Y+006673X0453Y0551R270S2
327+2V5 C21 -1 A01X+020856Y+003543X0453Y0551R000S2
327GND C21 -2 A01X+021663Y+003543X0453Y0551R000S2
327GND C20 -2 A01X+015354Y+007648X0453Y0551R270S2
327+1V2 C20 -1 A01X+015354Y+006841X0453Y0551R270S2
327/VCCPLL C19 -1 A01X+025984Y+007480X0453Y0551R090S2
327GND C19 -2 A01X+025984Y+006673X0453Y0551R090S2
327GND C18 -2 A01X+014567Y+007648X0453Y0551R270S2
327+1V2 C18 -1 A01X+014567Y+006841X0453Y0551R270S2
327+1V2 C17 -1 A01X+013780Y+006841X0453Y0551R270S2
327GND C17 -2 A01X+013780Y+007648X0453Y0551R270S2
327GND C16 -2 A01X+025984Y+005915X0453Y0551R270S2
327+5V C16 -1 A01X+025984Y+005108X0453Y0551R270S2
327+3V3 C14 -1 A01X+015748Y+009439X0453Y0551R270S2
327GND C14 -2 A01X+015748Y+010246X0453Y0551R270S2
327GND C15 -2 A01X+016535Y+010246X0453Y0551R270S2
327+3V3 C15 -1 A01X+016535Y+009439X0453Y0551R270S2
327+3V3 C13 -1 A01X+014961Y+009439X0453Y0551R270S2
327GND C13 -2 A01X+014961Y+010246X0453Y0551R270S2
327+3V3 C11 -2 A01X+018661Y+011722X0453Y0551R090S2
327GND C11 -1 A01X+018661Y+012530X0453Y0551R090S2
327+2V5 C10 -1 A01X+023199Y+001969X0453Y0551R000S2
327GND C10 -2 A01X+024006Y+001969X0453Y0551R000S2
327GND C9 -2 A01X+014173Y+010246X0453Y0551R270S2
327+3V3 C9 -1 A01X+014173Y+009439X0453Y0551R270S2
327+1V2 C8 -1 A01X+011969Y+006831X0453Y0551R270S2
327GND C8 -2 A01X+011969Y+007638X0453Y0551R270S2
327GND C7 -2 A01X+018986Y+003248X0453Y0551R180S2
327+3V3 C7 -1 A01X+019793Y+003248X0453Y0551R180S2
327+3V3 C6 -1 A01X+019793Y+004035X0453Y0551R180S2
327GND C6 -2 A01X+018986Y+004035X0453Y0551R180S2
327GND C5 -2 A01X+018986Y+004823X0453Y0551R180S2
327+3V3 C5 -1 A01X+019793Y+004823X0453Y0551R180S2
327+3V3 C4 -1 A01X+008278Y+006693X0453Y0551R180S2
327GND C4 -2 A01X+007470Y+006693X0453Y0551R180S2
327GND C3 -2 A01X+024783Y+001969X0453Y0551R180S2
327+5V C3 -1 A01X+025591Y+001969X0453Y0551R180S2
327+5V C2 -1 A01X+014173Y+011821X0453Y0551R090S2
327GND C2 -2 A01X+014173Y+011014X0453Y0551R090S2
327GND C1 -2 A01X+011969Y+008425X0453Y0551R090S2
327+5V C1 -1 A01X+011969Y+009232X0453Y0551R090S2
327+3V3 C28 -1 A01X+022825Y+010630X0453Y0551R000S2
327GND C28 -2 A01X+023632Y+010630X0453Y0551R000S2
327/LED_B U10 -1 A01X+020354Y+010512X0157Y0157R270S2
327/LED_G U10 -2 A01X+020354Y+010748X0157Y0157R270S2
327/LED_R U10 -3 A01X+020591Y+010512X0157Y0157R270S2
327+3V3 U10 -4 A01X+020591Y+010748X0157Y0157R270S2
327NET-(D1-PAD1) D1 -1 A01X+023238Y+001181X0453Y0551R180S2
327+2V5 D1 -2 A01X+022431Y+001181X0453Y0551R180S2
327+3V3 U6 -1 A01X+018199Y+011217X0118Y0197R090S2
327GND U6 -2 A01X+018199Y+010787X0138Y0197R090S2
327NET-(R6-PAD1) U6 -3 A01X+018494Y+010787X0138Y0197R090S2
327+3V3 U6 -4 A01X+018494Y+011260X0138Y0197R090S2
327+3V3 U6 -1 A01X+018126Y+011276X0051Y0051R270S2
327+3V3 U6 -1 A01X+018224Y+011301X0051Y0146R090S2
317NET-(J1-PAD1) J1 -1 D0394PA00X+019685Y+001969X0669Y0669R090S0
317+5V J1 -2 D0394PA00X+019685Y+000969X0669Y0669R090S0
317/DBG_7 J1 -3 D0394PA00X+018685Y+001969X0669Y0669R090S0
317+5V J1 -4 D0394PA00X+018685Y+000969X0669Y0669R090S0
317/DBG_8 J1 -5 D0394PA00X+017685Y+001969X0669Y0669R090S0
317GND J1 -6 D0394PA00X+017685Y+000969X0669Y0669R090S0
317/DBG_9 J1 -7 D0394PA00X+016685Y+001969X0669Y0669R090S0
317/UART_TX J1 -8 D0394PA00X+016685Y+000969X0669Y0669R090S0
317GND J1 -9 D0394PA00X+015685Y+001969X0669Y0669R090S0
317/UART_RX J1 -10 D0394PA00X+015685Y+000969X0669Y0669R090S0
317/CDONE J1 -11 D0394PA00X+014685Y+001969X0669Y0669R090S0
317/DBG_4 J1 -12 D0394PA00X+014685Y+000969X0669Y0669R090S0
317/CRESET J1 -13 D0394PA00X+013685Y+001969X0669Y0669R090S0
317GND J1 -14 D0394PA00X+013685Y+000969X0669Y0669R090S0
317/DBG_1 J1 -15 D0394PA00X+012685Y+001969X0669Y0669R090S0
317NET-(J1-PAD16) J1 -16 D0394PA00X+012685Y+000969X0669Y0669R090S0
317NET-(J1-PAD17) J1 -17 D0394PA00X+011685Y+001969X0669Y0669R090S0
317/SPI_IO2 J1 -18 D0394PA00X+011685Y+000969X0669Y0669R090S0
317/SPI_MOSI J1 -19 D0394PA00X+010685Y+001969X0669Y0669R090S0
317GND J1 -20 D0394PA00X+010685Y+000969X0669Y0669R090S0
317/SPI_MISO J1 -21 D0394PA00X+009685Y+001969X0669Y0669R090S0
317/SPI_IO3 J1 -22 D0394PA00X+009685Y+000969X0669Y0669R090S0
317/SPI_CLK J1 -23 D0394PA00X+008685Y+001969X0669Y0669R090S0
317/SPI_CS J1 -24 D0394PA00X+008685Y+000969X0669Y0669R090S0
317GND J1 -25 D0394PA00X+007685Y+001969X0669Y0669R090S0
317/DBG_10 J1 -26 D0394PA00X+007685Y+000969X0669Y0669R090S0
317NET-(J1-PAD27) J1 -27 D0394PA00X+006685Y+001969X0669Y0669R090S0
317NET-(J1-PAD28) J1 -28 D0394PA00X+006685Y+000969X0669Y0669R090S0
317NET-(J1-PAD29) J1 -29 D0394PA00X+005685Y+001969X0669Y0669R090S0
317GND J1 -30 D0394PA00X+005685Y+000969X0669Y0669R090S0
317NET-(J1-PAD31) J1 -31 D0394PA00X+004685Y+001969X0669Y0669R090S0
317NET-(J1-PAD32) J1 -32 D0394PA00X+004685Y+000969X0669Y0669R090S0
317NET-(J1-PAD33) J1 -33 D0394PA00X+003685Y+001969X0669Y0669R090S0
317GND J1 -34 D0394PA00X+003685Y+000969X0669Y0669R090S0
317NET-(J1-PAD35) J1 -35 D0394PA00X+002685Y+001969X0669Y0669R090S0
317NET-(J1-PAD36) J1 -36 D0394PA00X+002685Y+000969X0669Y0669R090S0
317NET-(J1-PAD37) J1 -37 D0394PA00X+001685Y+001969X0669Y0669R090S0
317NET-(J1-PAD38) J1 -38 D0394PA00X+001685Y+000969X0669Y0669R090S0
317GND J1 -39 D0394PA00X+000685Y+001969X0669Y0669R090S0
317NET-(J1-PAD40) J1 -40 D0394PA00X+000685Y+000969X0669Y0669R090S0
327GND U5 -49 A01X+019291Y+007874X2205Y2205R000S2
327+3V3 U5 -1 A01X+017938Y+008957X0344Y0098R000S2
327NET-(U5-PAD2) U5 -2 A01X+017938Y+008760X0344Y0098R000S2
327NET-(U5-PAD3) U5 -3 A01X+017938Y+008563X0344Y0098R000S2
327NET-(U5-PAD4) U5 -4 A01X+017938Y+008366X0344Y0098R000S2
327+1V2 U5 -5 A01X+017938Y+008169X0344Y0098R000S2
327NET-(U5-PAD6) U5 -6 A01X+017938Y+007972X0344Y0098R000S2
327/CDONE U5 -7 A01X+017938Y+007776X0344Y0098R000S2
327/CRESET U5 -8 A01X+017938Y+007579X0344Y0098R000S2
327/DBG_10 U5 -9 A01X+017938Y+007382X0344Y0098R000S2
327/DBG_1 U5 -10 A01X+017938Y+007185X0344Y0098R000S2
327/DBG_9 U5 -11 A01X+017938Y+006988X0344Y0098R000S2
327/DBG_8 U5 -12 A01X+017938Y+006791X0344Y0098R000S2
327/UART_RX U5 -13 A01X+018209Y+006521X0098Y0344R000S2
327/SPI_MOSI U5 -14 A01X+018406Y+006521X0098Y0344R000S2
327/SPI_CLK U5 -15 A01X+018602Y+006521X0098Y0344R000S2
327/SPI_CS U5 -16 A01X+018799Y+006521X0098Y0344R000S2
327/SPI_MISO U5 -17 A01X+018996Y+006521X0098Y0344R000S2
327/SPI_IO2 U5 -18 A01X+019193Y+006521X0098Y0344R000S2
327/SPI_IO3 U5 -19 A01X+019390Y+006521X0098Y0344R000S2
327/DBG_7 U5 -20 A01X+019587Y+006521X0098Y0344R000S2
327/UART_TX U5 -21 A01X+019783Y+006521X0098Y0344R000S2
327+3V3 U5 -22 A01X+019980Y+006521X0098Y0344R000S2
327/DBG_4 U5 -23 A01X+020177Y+006521X0098Y0344R000S2
327+2V5 U5 -24 A01X+020374Y+006521X0098Y0344R000S2
327/PMOD_1 U5 -25 A01X+020645Y+006791X0344Y0098R000S2
327/PMOD_2 U5 -26 A01X+020645Y+006988X0344Y0098R000S2
327/PMOD_3 U5 -27 A01X+020645Y+007185X0344Y0098R000S2
327/PMOD_4 U5 -28 A01X+020645Y+007382X0344Y0098R000S2
327/VCCPLL U5 -29 A01X+020645Y+007579X0344Y0098R000S2
327+1V2 U5 -30 A01X+020645Y+007776X0344Y0098R000S2
327NET-(U5-PAD31) U5 -31 A01X+020645Y+007972X0344Y0098R000S2
327NET-(U5-PAD32) U5 -32 A01X+020645Y+008169X0344Y0098R000S2
327+3V3 U5 -33 A01X+020645Y+008366X0344Y0098R000S2
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
327/ICE_USBP U5 -34 A01X+020645Y+008563X0344Y0098R000S2
327/PU_CTRL_USBP U5 -35 A01X+020645Y+008760X0344Y0098R000S2
327/PU_CTRL_USBN U5 -36 A01X+020645Y+008957X0344Y0098R000S2
327/ICE_USBN U5 -37 A01X+020374Y+009227X0098Y0344R000S2
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
327NET-(SW3-PAD1) U5 -38 A01X+020177Y+009227X0098Y0344R000S2
327/LED_R U5 -39 A01X+019980Y+009227X0098Y0344R000S2
327/LED_B U5 -40 A01X+019783Y+009227X0098Y0344R000S2
327/LED_G U5 -41 A01X+019587Y+009227X0098Y0344R000S2
327NET-(SW4-PAD1) U5 -42 A01X+019390Y+009227X0098Y0344R000S2
327NET-(U5-PAD43) U5 -43 A01X+019193Y+009227X0098Y0344R000S2
327/OSC_IN U5 -44 A01X+018996Y+009227X0098Y0344R000S2
327NET-(SW2-PAD4) U5 -45 A01X+018799Y+009227X0098Y0344R000S2
327NET-(SW2-PAD3) U5 -46 A01X+018602Y+009227X0098Y0344R000S2
327NET-(SW2-PAD2) U5 -47 A01X+018406Y+009227X0098Y0344R000S2
327NET-(SW2-PAD1) U5 -48 A01X+018209Y+009227X0098Y0344R000S2
327/OSC_IN R7 -2 A01X+019402Y+010157X0181Y0157R180S2
327NET-(R7-PAD1) R7 -1 A01X+019654Y+010157X0181Y0157R180S2
327NET-(R6-PAD1) R6 -1 A01X+018504Y+010463X0181Y0157R090S2
327/OSC_IN R6 -2 A01X+018504Y+010211X0181Y0157R090S2
327NET-(R13-PAD1) R3 -2 A01X+006594Y+007453X0181Y0157R090S2
327+3V3 R3 -1 A01X+006594Y+007705X0181Y0157R090S2
327NET-(R13-PAD1) R13 -1 A01X+005413Y+007425X0181Y0157R270S2
327GND R13 -2 A01X+005413Y+007677X0181Y0157R270S2
327/VCCPLL R10 -1 A01X+023622Y+007470X0453Y0551R270S2
327+1V2 R10 -2 A01X+023622Y+008278X0453Y0551R270S2
327NET-(R13-PAD1) R5 -2 A01X+006004Y+007490X0453Y0551R270S2
327/SPI_CS R5 -1 A01X+006004Y+006683X0453Y0551R270S2
327+3V3 R4 -1 A01X+003622Y+011614X0453Y0551R000S2
327/CDONE R4 -2 A01X+004429Y+011614X0453Y0551R000S2
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
327NET-(R11-PAD2) R8 -2 A01X+029134Y+014173X0453Y0551R315S2
327/PU_CTRL_USBN R8 -1 A01X+028563Y+013603X0453Y0551R315S2
327/ICE_USBN R11 -1 A01X+027992Y+014173X0453Y0551R315S2
327NET-(R11-PAD2) R11 -2 A01X+028563Y+014744X0453Y0551R315S2
327NET-(R12-PAD2) R12 -2 A01X+030285Y+013041X0453Y0551R315S2
327/ICE_USBP R12 -1 A01X+029715Y+012471X0453Y0551R315S2
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
327/CRESET R1 -1 A01X+003632Y+010827X0453Y0551R000S2
327+3V3 R1 -2 A01X+004439Y+010827X0453Y0551R000S2
327NET-(D1-PAD1) R2 -2 A01X+024016Y+001181X0453Y0551R180S2
327GND R2 -1 A01X+024823Y+001181X0453Y0551R180S2
releases: remove evt1 and evt2, and rename evt3 -> evt1 evt1 and evt2 were never produced. They also would never have worked, because the USB connector was drawn mirrored. Remove these and replace them with a single `evt1` that was actually produced. This reflects the fact that the `evt1` boards actually say "EVT1" on them. Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 13:00:16 +00:00
327/PU_CTRL_USBP R9 -1 A01X+029163Y+013022X0453Y0551R315S2
327NET-(R12-PAD2) R9 -2 A01X+029734Y+013592X0453Y0551R315S2
releases: add evt1 release files Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 05:49:59 +00:00
327+3V3 U4 -8 A01X+008130Y+005868X0236Y0591R090S2
327/SPI_CS U4 -1 A01X+006043Y+005868X0236Y0591R090S2
327/SPI_IO3 U4 -7 A01X+008130Y+005368X0236Y0591R090S2
327/SPI_MISO U4 -2 A01X+006043Y+005368X0236Y0591R090S2
327/SPI_CLK U4 -6 A01X+008130Y+004868X0236Y0591R090S2
327/SPI_IO2 U4 -3 A01X+006043Y+004868X0236Y0591R090S2
327/SPI_MOSI U4 -5 A01X+008130Y+004368X0236Y0591R090S2
327GND U4 -4 A01X+006043Y+004368X0236Y0591R090S2
327/VCCPLL U8 -5 A01X+026791Y+006831X0614Y0256R270S2
327NET-(U8-PAD4) U8 -4 A01X+027539Y+006831X0614Y0256R270S2
327+5V U8 -3 A01X+027539Y+005768X0614Y0256R270S2
327GND U8 -2 A01X+027165Y+005768X0614Y0256R270S2
327+5V U8 -1 A01X+026791Y+005768X0614Y0256R270S2
327+5V U1 -1 A01X+011142Y+008425X0614Y0256R090S2
327GND U1 -2 A01X+010768Y+008425X0614Y0256R090S2
327+5V U1 -3 A01X+010394Y+008425X0614Y0256R090S2
327NET-(U1-PAD4) U1 -4 A01X+010394Y+007362X0614Y0256R090S2
327+1V2 U1 -5 A01X+011142Y+007362X0614Y0256R090S2
327+3V3 U2 -5 A01X+013366Y+010098X0614Y0256R090S2
327NET-(U2-PAD4) U2 -4 A01X+012618Y+010098X0614Y0256R090S2
327+1V2 U2 -3 A01X+012618Y+011161X0614Y0256R090S2
327GND U2 -2 A01X+012992Y+011161X0614Y0256R090S2
327+5V U2 -1 A01X+013366Y+011161X0614Y0256R090S2
327+5V U3 -1 A01X+024941Y+002776X0614Y0256R180S2
327GND U3 -2 A01X+024941Y+003150X0614Y0256R180S2
327+3V3 U3 -3 A01X+024941Y+003524X0614Y0256R180S2
327NET-(U3-PAD4) U3 -4 A01X+023878Y+003524X0614Y0256R180S2
327+2V5 U3 -5 A01X+023878Y+002776X0614Y0256R180S2
327NET-(SW4-PAD1) SW4 -1 A01X+022126Y+016181X0630Y0394R180S2
327GND SW4 -3 A01X+022126Y+017677X0630Y0394R180S2
327NET-(SW4-PAD1) SW4 -2 A01X+019606Y+016181X0630Y0394R180S2
327GND SW4 -4 A01X+019606Y+017677X0630Y0394R180S2
327GND SW1 -4 A01X+002008Y+006614X0630Y0394R090S2
327/CRESET SW1 -2 A01X+003504Y+006614X0630Y0394R090S2
327GND SW1 -3 A01X+002008Y+009134X0630Y0394R090S2
327/CRESET SW1 -1 A01X+003504Y+009134X0630Y0394R090S2
327NET-(SW2-PAD1) SW2 -1 A01X+002362Y+017323X3937Y3937R180S2
327NET-(SW2-PAD2) SW2 -2 A01X+007087Y+017323X3937Y3937R180S2
327NET-(SW2-PAD3) SW2 -3 A01X+011811Y+017323X3937Y3937R180S2
327NET-(SW2-PAD4) SW2 -4 A01X+016535Y+017323X3937Y3937R180S2
999
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