p.xobs.io/td19 Teardown 2019 | #teardown2019

Fomu: an FPGA in your USB Port

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Fomu: An FPGA in your USB Port

A whirlwind introduction to Fomu; a workshop in three levels

Sean Cross - https://xobs.io/ - @xobs

Levels of Fomu

Fomu aims to be accessable on three levels:

  1. Python / Interpreted
  2. RISC-V
  3. Verilog / FPGA

Workshop Outline

  1. What do I need to get started?
  2. What is an FPGA, and what is Fomu?
  3. What makes Fomu special?
  4. What can I do with Fomu?

What do I need to get started?

  1. DFU utilities
  2. Serial console
  3. RISC-V toolchain
  4. Synthesis
  5. Place-and-Route
  6. Packer
  7. Python 3

What is an FPGA?

SB_LUT4

What is an FPGA?


						module example (output reg [0:5] Q, input C);
							reg [0:8] counter;
							always @(posedge C)
							begin
								counter <= counter + 1'b1;
								Q = counter[7] ^ counter[5] | counter<<2;
							end
						endmodule
Verilog Synthesis

About the ICE40UP5K

  1. 5280 4-input LUTs (LC)
  2. 16 kilobytes BRAM
  3. 128 kilobytes "SPRAM"
  4. Current-limited 3-channel LED driver
  5. 2x I2C and 2x SPI
  6. 8 16-bit DSP units
  7. Warmboot capability

What is Fomu?

  • ICE40UP5K
  • 2MB flash memory
  • Four edge-plated pads
  • ESD protection
  • USB implemented in HDL
  • Fits in your USB port

What is this PCB?

Fomu EVT1

Fomu EVT1

What modifications does it have?

  • Shorting out two zero-ohm resistors (R7, PU)
  • Programming SPI flash
  • Bending SPI flash pins inward (U4)
  • Mounting crystal on its side (U7)
  • Attaching power to crystal

Fomu Block Design Diagram

Fomu block diagram

Fomu SPI Flash Layout

Fomu memory layout

Working with Fomu

"fail safe" bootloader

Using dfu

Updating Fomu

$ dfu-util -l
Found DFU: [1209:5bf0] name="Fomu DFU Bootloader v1.7.2"
$ dfu-util -D evt-installable.dfu
Download        [=========                ]  36%   38912 bytes
Download done.
$ dfu-util -l
Found DFU: [1209:5bf0] name="Fomu DFU Bootloader v1.8.1"
$

Python / Interpreted

  1. Goal: Multiple interpreters, auto-reload, USB disk interface
  2. Now: MicroPython binary

Loading Programs onto Fomu


$ dfu-util -l
Found DFU: [1209:5bf0] name="Fomu DFU Bootloader v1.8.1"
$ dfu-util -e                  # Boot current program
$ dfu-util -D new-image.dfu    # Load new program

u5b f0mu

Loading MicroPython

$ dfu-util -D micropython-fomu.dfu

Connecting via serial

screen /dev/cu.usbserial*
screen /dev/ttyACM*
Teraterm
MicroPython v1.10-296-g0a5a77a on 2019-06-18; fomu with vexriscv
>>>

Interacting with Fomu


							>>> import fomu
							>>> rgb = fomu.rgb()
							>>> rgb.mode("error")
							>>>

RGB LEDD reference

ICE40 LEDD registers 
>>> rgb.write_raw(0b0001, 255)
>>> rgb.write_raw(0b1010, 14)
>>> rgb.write_raw(0b1011, 1)
>>>

Future Work

CircuitPython, etc.

RISC-V code

LiteX Model

LiteX Design

Wishbone Bridge

Wishbone bridge

CSR Access

#define CSR_VERSION_MAJOR_ADDR 0xe0007000L
#define CSR_VERSION_MAJOR_SIZE 1
#define CSR_VERSION_MINOR_ADDR 0xe0007004L
#define CSR_VERSION_MINOR_SIZE 1
#define CSR_VERSION_REVISION_ADDR 0xe0007008L
#define CSR_VERSION_REVISION_SIZE 1
#define CSR_VERSION_GITREV_ADDR 0xe000700cL
#define CSR_VERSION_GITREV_SIZE 4
#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL
#define CSR_VERSION_GITEXTRA_SIZE 2
Excerpt from csr.h

Reading CPU Version

$ wishbone-tool --pid 0x5bf0 0xe0007000
Value at e0007000: 00000001
$ wishbone-tool --pid 0x5bf0 0xe0007004
Value at e0007004: 00000008
$ wishbone-tool --pid 0x5bf0 0xe0007008
Value at e0007008: 00000001

Interacting with LEDD directly

ICE40 LEDD registers 
#define CSR_RGB_DAT_ADDR 0xe0006800L
#define CSR_RGB_ADDR_ADDR 0xe0006804L
$ wishbone-tool --pid 0x5bf0 0xe0006804 1
$ wishbone-tool --pid 0x5bf0 0xe0006800 0xff

Writing RISC-V Code

Hardware Description Language

Yosys and NextPNR

Blinking an LED

LiteX and MiGen

VexRiscv