234 lines
13 KiB
C
234 lines
13 KiB
C
/**
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* Copyright (c) 2017 - 2017, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "dfu_ble_svc.h"
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#include <string.h>
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#include "nrf_error.h"
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#include "crc16.h"
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// #if defined ( __CC_ARM )
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// static dfu_ble_peer_data_t m_peer_data __attribute__((section("NoInit"), zero_init)); /**< This variable should be placed in a non initialized RAM section in order to be valid upon soft reset from application into bootloader. */
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// static uint16_t m_peer_data_crc __attribute__((section("NoInit"), zero_init)); /**< CRC variable to ensure the integrity of the peer data provided. */
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// #elif defined ( __GNUC__ )
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// __attribute__((section(".noinit"))) static dfu_ble_peer_data_t m_peer_data; /**< This variable should be placed in a non initialized RAM section in order to be valid upon soft reset from application into bootloader. */
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// __attribute__((section(".noinit"))) static uint16_t m_peer_data_crc; /**< CRC variable to ensure the integrity of the peer data provided. */
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// #elif defined ( __ICCARM__ )
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// __no_init static dfu_ble_peer_data_t m_peer_data @ 0x20003F80; /**< This variable should be placed in a non initialized RAM section in order to be valid upon soft reset from application into bootloader. */
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// __no_init static uint16_t m_peer_data_crc @ 0x20003F80 + sizeof(dfu_ble_peer_data_t); /**< CRC variable to ensure the integrity of the peer data provided. */
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// #endif
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// /**@brief Function for setting the peer data from application in bootloader before reset.
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// *
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// * @param[in] p_peer_data Pointer to the peer data containing keys for the connection.
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// *
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// * @retval NRF_SUCCES The data was set succesfully.
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// * @retval NRF_ERROR_NULL If a null pointer was passed as argument.
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// */
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// static uint32_t dfu_ble_peer_data_set(dfu_ble_peer_data_t * p_peer_data)
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// {
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// if (p_peer_data == NULL)
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// {
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// return NRF_ERROR_NULL;
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// }
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// uint32_t src = (uint32_t)p_peer_data;
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// uint32_t dst = (uint32_t)&m_peer_data;
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// // Calculating length in order to check if destination is residing inside source.
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// // Source inside the the destination (calculation underflow) is safe a source is read before
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// // written to destination so that when destination grows into source, the source data is no
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// // longer needed.
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// uint32_t len = dst - src;
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// if (src == dst)
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// {
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// // Do nothing as source and destination are identical, just calculate crc below.
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// }
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// else if (len < sizeof(dfu_ble_peer_data_t))
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// {
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// uint32_t i = 0;
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// dst += sizeof(dfu_ble_peer_data_t);
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// src += sizeof(dfu_ble_peer_data_t);
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// // Copy byte wise backwards when facing overlapping structures.
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// while (i++ <= sizeof(dfu_ble_peer_data_t))
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// {
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// *((uint8_t *)dst--) = *((uint8_t *)src--);
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// }
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// }
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// else
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// {
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// memcpy((void *)dst, (void *)src, sizeof(dfu_ble_peer_data_t));
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// }
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// m_peer_data_crc = crc16_compute((uint8_t *)&m_peer_data, sizeof(m_peer_data), NULL);
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// return NRF_SUCCESS;
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// }
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/**@brief Function for handling second stage of SuperVisor Calls (SVC).
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*
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* @details The function will use svc_num to call the corresponding SVC function.
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*
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* @param[in] svc_num SVC number for function to be executed
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* @param[in] p_svc_args Argument list for the SVC.
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*
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* @return This function returns the error value of the SVC return. For further details, please
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* refer to the details of the SVC implementation itself.
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* @ref NRF_ERROR_SVC_HANDLER_MISSING is returned if no SVC handler is implemented for the
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* provided svc_num.
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*/
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void C_SVC_Handler(uint8_t svc_num, uint32_t * p_svc_args)
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{
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// switch (svc_num)
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// {
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// case DFU_BLE_SVC_PEER_DATA_SET:
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// p_svc_args[0] = dfu_ble_peer_data_set((dfu_ble_peer_data_t *)p_svc_args[0]);
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// break;
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// default:
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p_svc_args[0] = NRF_ERROR_SVC_HANDLER_MISSING;
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// break;
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// }
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}
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/**@brief Function for handling the first stage of SuperVisor Calls (SVC) in assembly.
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*
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* @details The function will use the link register (LR) to determine the stack (PSP or MSP) to be
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* used and then decode the SVC number afterwards. After decoding the SVC number then
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* @ref C_SVC_Handler is called for further processing of the SVC.
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*/
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#if defined ( __CC_ARM )
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__asm void SVC_Handler(void)
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{
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EXC_RETURN_CMD_PSP EQU 0xFFFFFFFD ; EXC_RETURN using PSP for ARM Cortex. If Link register contains this value it indicates the PSP was used before the SVC, otherwise the MSP was used.
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IMPORT C_SVC_Handler
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LDR R0, =EXC_RETURN_CMD_PSP ; Load the EXC_RETURN into R0 to be able to compare against LR to determine stack pointer used.
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CMP R0, LR ; Compare the link register with R0. If equal then PSP was used, otherwise MSP was used before SVC.
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BNE UseMSP ; Branch to code fetching SVC arguments using MSP.
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MRS R1, PSP ; Move PSP into R1.
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B Call_C_SVC_Handler ; Branch to Call_C_SVC_Handler below.
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UseMSP
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MRS R1, MSP ; MSP was used, therefore Move MSP into R1.
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Call_C_SVC_Handler
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LDR R0, [R1, #24] ; The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
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; R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
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SUBS R0, #2 ; The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
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LDRB R0, [R0] ; SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
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LDR R2, =C_SVC_Handler ; Load address of C implementation of SVC handler.
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BX R2 ; Branch to C implementation of SVC handler. R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
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ALIGN
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}
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#elif defined ( __GNUC__ )
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void __attribute__ (( naked )) SVC_Handler(void)
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{
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const uint32_t exc_return = 0xFFFFFFFD; // EXC_RETURN using PSP for ARM Cortex. If Link register contains this value it indicates the PSP was used before the SVC, otherwise the MSP was used.
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__asm volatile(
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"cmp lr, %0\t\n" // Compare the link register with argument 0 (%0), which is exc_return. If equal then PSP was used, otherwise MSP was used before SVC.
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"bne UseMSP\t\n" // Branch to code fetching SVC arguments using MSP.
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"mrs r1, psp\t\n" // Move PSP into R1.
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"b Call_C_SVC_Handler\t\n" // Branch to Call_C_SVC_Handler below.
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"UseMSP: \t\n" //
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"mrs r1, msp\t\n" // MSP was used, therefore Move MSP into R1.
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"Call_C_SVC_Handler: \t\n" //
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"ldr r0, [r1, #24]\t\n" // The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
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// R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
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"sub r0, r0, #2\t\n" // The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
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"ldrb r0, [r0]\t\n" // SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
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"bx %1\t\n" // Branch to C implementation of SVC handler, argument 1 (%1). R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
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".align\t\n"
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:: "r" (exc_return), "r" (C_SVC_Handler) // Argument list for the gcc assembly. exc_return is %0, C_SVC_Handler is %1.
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: "r0", "r1" // List of register maintained manually.
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);
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}
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#elif defined ( __ICCARM__ )
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void SVC_Handler(void)
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{
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asm("movs r0, #0x02\n" // Load 0x02 into R6 to prepare for exec return test.
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"mvns r0, r0\n" // Invert R0 to obtain exec return code using PSP for ARM Cortex.
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"cmp lr, r0\n" // Compare the link register with argument 0 (%0), which is exc_return. If equal then PSP was used, otherwise MSP was used before SVC.
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"bne.n UseMSP\n" // Branch to code fetching SVC arguments using MSP.
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"mrs r1, psp\n" // Move PSP into R1.
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"b.n Call_C_SVC_Handler\t\n" // Branch to Call_C_SVC_Handler below.
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"UseMSP: \n" //
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"mrs r1, msp\n" // MSP was used, therefore Move MSP into R1.
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"Call_C_SVC_Handler: \n" //
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"ldr r0, [r1, #24]\n" // The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
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// R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
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"subs r0, #0x02\n" // The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
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"ldrb r0, [r0]\n" // SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
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"bx %0\n" // Branch to C implementation of SVC handler, argument 1 (%1). R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
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:: "r" (C_SVC_Handler) // Argument list for the gcc assembly. C_SVC_Handler is %0.
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: "r0", "r1" // List of register maintained manually.
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);
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}
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#else
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#error Compiler not supported.
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#endif
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// uint32_t dfu_ble_peer_data_get(dfu_ble_peer_data_t * p_peer_data)
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// {
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// uint16_t crc;
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// if (p_peer_data == NULL)
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// {
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// return NRF_ERROR_NULL;
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// }
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// crc = crc16_compute((uint8_t *)&m_peer_data, sizeof(m_peer_data), NULL);
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// if (crc != m_peer_data_crc)
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// {
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// return NRF_ERROR_INVALID_DATA;
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// }
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// *p_peer_data = m_peer_data;
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// // corrupt CRC to invalidate shared information.
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// m_peer_data_crc++;
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// return NRF_SUCCESS;
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// }
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