diff --git a/Makefile b/Makefile index ae542e5..87a46fb 100644 --- a/Makefile +++ b/Makefile @@ -119,6 +119,7 @@ C_SOURCE_FILES += $(SRC_PATH)/dfu_ble_svc.c # nrfx C_SOURCE_FILES += $(NRFX_PATH)/drivers/src/nrfx_power.c +C_SOURCE_FILES += $(NRFX_PATH)/hal/nrf_nvmc.c # SDK 11 files C_SOURCE_FILES += $(SDK11_PATH)/libraries/bootloader_dfu/bootloader.c @@ -145,7 +146,6 @@ C_SOURCE_FILES += $(SDK_PATH)/libraries/hci/hci_slip.c C_SOURCE_FILES += $(SDK_PATH)/libraries/hci/hci_transport.c C_SOURCE_FILES += $(SDK_PATH)/libraries/util/nrf_assert.c -C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/hal/nrf_nvmc.c ifneq ($(IS_NRF52840),) @@ -224,12 +224,7 @@ IPATH += $(SDK_PATH)/libraries/util IPATH += $(SDK_PATH)/libraries/hci/config IPATH += $(SDK_PATH)/libraries/uart IPATH += $(SDK_PATH)/libraries/hci - - -#IPATH += $(SDK_PATH)/drivers_nrf/hal -#IPATH += $(SDK_PATH)/drivers_nrf/config IPATH += $(SDK_PATH)/drivers_nrf/delay -#IPATH += $(SDK_PATH)/drivers_nrf/power # Softdevice IPATH += $(SD_PATH)/headers diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_clock.h b/lib/sdk/components/drivers_nrf/hal/nrf_clock.h deleted file mode 100644 index 0379f9f..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_clock.h +++ /dev/null @@ -1,401 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_CLOCK_H__ -#define NRF_CLOCK_H__ - -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_clock_hal Clock HAL - * @{ - * @ingroup nrf_clock - * @brief Hardware access layer for managing the low-frequency clock (LFCLK) and the high-frequency clock (HFCLK). - */ - -#define NRF_CLOCK_TASK_TRIGGER (1UL) -#define NRF_CLOCK_EVENT_CLEAR (0UL) - -/** - * @brief Low-frequency clock sources. - * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers. - */ -typedef enum -{ - NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */ - NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */ - NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth /**< Internal 32 kHz synthesizer from HFCLK system clock. */ -} nrf_clock_lfclk_t; - -/** - * @brief High-frequency clock sources. - */ -typedef enum -{ - NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */ - NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */ -} nrf_clock_hfclk_t; - -/** - * @brief Trigger status of task LFCLKSTART/HFCLKSTART. - * @details Used by LFCLKRUN and HFCLKRUN registers. - */ -typedef enum -{ - NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */ - NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */ -} nrf_clock_start_task_status_t; - -/** - * @brief Interrupts. - */ -typedef enum -{ - NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */ - NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */ - NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */ - NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */ -} nrf_clock_int_mask_t; - -/** - * @brief Tasks. - * - * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running. - * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/ - NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/ - NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/ - NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/ - NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/ - NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/ - NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/ -} nrf_clock_task_t; /*lint -restore */ - -/** - * @brief Events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/ - NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/ - NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/ - NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/ -} nrf_clock_event_t; /*lint -restore */ - -/** - * @brief Function for enabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask); - -/** - * @brief Function for disabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a specific interrupt. - * - * @param[in] int_mask Interrupt. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask); - -/** - * @brief Function for retrieving the address of a specific task. - * @details This function can be used by the PPI module. - * - * @param[in] task Task. - * - * @return Address of the requested task register. - */ -__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task); - -/** - * @brief Function for setting a specific task. - * - * @param[in] task Task. - */ -__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task); - -/** - * @brief Function for retrieving the address of a specific event. - * @details This function can be used by the PPI module. - * - * @param[in] event Event. - * - * @return Address of the requested event register. - */ -__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event); - -/** - * @brief Function for clearing a specific event. - * - * @param[in] event Event. - */ -__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event); - -/** - * @brief Function for retrieving the state of a specific event. - * - * @param[in] event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event); - -/** - * @brief Function for changing the low-frequency clock source. - * @details This function cannot be called when the low-frequency clock is running. - * - * @param[in] source New low-frequency clock source. - * - */ -__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source); - -/** - * @brief Function for retrieving the selected source for the low-frequency clock. - * - * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the selected source for the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the selected source for the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the selected source for the low-frequency clock. - */ -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void); - -/** - * @brief Function for retrieving the active source of the low-frequency clock. - * - * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the active source of the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the active source of the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the active source of the low-frequency clock. - */ -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void); - -/** - * @brief Function for retrieving the clock source for the LFCLK clock when the task LKCLKSTART is triggered. - * - * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is running and generating the LFCLK clock. - * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is running and generating the LFCLK clock. - * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is running and generating the LFCLK clock. - */ -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void); - -/** - * @brief Function for retrieving the state of the LFCLK clock. - * - * @retval false If the LFCLK clock is not running. - * @retval true If the LFCLK clock is running. - */ -__STATIC_INLINE bool nrf_clock_lf_is_running(void); - -/** - * @brief Function for retrieving the trigger status of the task LFCLKSTART. - * - * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered. - * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered. - */ -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void); - -/** - * @brief Function for retrieving the active source of the high-frequency clock. - * - * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal 16 MHz RC oscillator is the active source of the high-frequency clock. - * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external 16 MHz/32 MHz crystal oscillator is the active source of the high-frequency clock. - */ -__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void); - -/** - * @brief Function for retrieving the state of the HFCLK clock. - * - * @param[in] clk_src Clock source to be checked. - * - * @retval false If the HFCLK clock is not running. - * @retval true If the HFCLK clock is running. - */ -__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src); - -/** - * @brief Function for retrieving the trigger status of the task HFCLKSTART. - * - * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered. - * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered. - */ -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void); - -/** - * @brief Function for changing the calibration timer interval. - * - * @param[in] interval New calibration timer interval in 0.25 s resolution (range: 0.25 seconds to 31.75 seconds). - */ -__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask) -{ - NRF_CLOCK->INTENSET = int_mask; -} - -__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask) -{ - NRF_CLOCK->INTENCLR = int_mask; -} - -__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask) -{ - return (bool)(NRF_CLOCK->INTENCLR & int_mask); -} - -__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task) -{ - return ((uint32_t )NRF_CLOCK + task); -} - -__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER; -} - -__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event) -{ - return ((uint32_t)NRF_CLOCK + event); -} - -__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event) -{ - return (bool)*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)); -} - -__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source) -{ - NRF_CLOCK->LFCLKSRC = - (uint32_t)((source << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); -} - -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void) -{ - return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRC & - CLOCK_LFCLKSRC_SRC_Msk) >> CLOCK_LFCLKSRC_SRC_Pos); -} - -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void) -{ - return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT & - CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos); -} - -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void) -{ - return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY & - CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos); -} - -__STATIC_INLINE bool nrf_clock_lf_is_running(void) -{ - return ((NRF_CLOCK->LFCLKSTAT & - CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos); -} - -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void) -{ - return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN & - CLOCK_LFCLKRUN_STATUS_Msk) >> - CLOCK_LFCLKRUN_STATUS_Pos); -} - -__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void) -{ - return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT & - CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos); -} - -__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src) -{ - return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) == - (CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos)); -} - -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void) -{ - return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN & - CLOCK_HFCLKRUN_STATUS_Msk) >> - CLOCK_HFCLKRUN_STATUS_Pos); -} - -__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval) -{ - NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** - *@} - **/ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_CLOCK_H__ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_comp.h b/lib/sdk/components/drivers_nrf/hal/nrf_comp.h deleted file mode 100644 index 5d54e75..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_comp.h +++ /dev/null @@ -1,518 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief COMP HAL API. - */ - -#ifndef NRF_COMP_H_ -#define NRF_COMP_H_ - -/** - * @defgroup nrf_comp_hal COMP HAL - * @{ - * @ingroup nrf_comp - * @brief @tagAPI52 Hardware access layer for managing the Comparator (COMP). - */ - -#include "nrf.h" - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @enum nrf_comp_input_t - * @brief COMP analog pin selection. - */ -typedef enum -{ - NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */ - NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */ - NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */ - NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */ - NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */ - NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */ - NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */ -#if defined (COMP_PSEL_PSEL_AnalogInput7) || defined (__SDK_DOXYGEN__) - NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */ -#endif -#if defined (COMP_PSEL_PSEL_VddDiv2) || defined (__SDK_DOXYGEN__) - NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */ -#endif -}nrf_comp_input_t; - -/** - * @enum nrf_comp_ref_t - * @brief COMP reference selection. - */ -typedef enum -{ - NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */ - NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */ - NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */ - NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */ - NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */ -}nrf_comp_ref_t; - -/** - * @enum nrf_comp_ext_ref_t - * @brief COMP external analog reference selection. - */ -typedef enum -{ - NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */ - NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */ -}nrf_comp_ext_ref_t; - -/** - * @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP. - */ -typedef struct -{ - uint8_t th_down; /*!< THDOWN value. */ - uint8_t th_up; /*!< THUP value. */ -}nrf_comp_th_t; - -/** - * @enum nrf_comp_main_mode_t - * @brief COMP main operation mode. - */ -typedef enum -{ - NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single ended mode. */ - NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */ -}nrf_comp_main_mode_t; - -/** - * @enum nrf_comp_sp_mode_t - * @brief COMP speed and power mode. - */ -typedef enum -{ - NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */ - NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */ - NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High speed mode. */ -}nrf_comp_sp_mode_t; - -/** - * @enum nrf_comp_hyst_t - * @brief COMP comparator hysteresis. - */ -typedef enum -{ - NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */ - NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */ -}nrf_comp_hyst_t; - -#if defined (COMP_ISOURCE_ISOURCE_Msk) -/** - * @brief COMP current source selection on analog input. - */ -typedef enum -{ - NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */ - NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */ - NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */ - NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */ -}nrf_isource_t; -#endif - -/** - * @enum nrf_comp_task_t - * @brief COMP tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_COMP_TASK_START = offsetof(NRF_COMP_Type, TASKS_START), /*!< COMP start sampling task. */ - NRF_COMP_TASK_STOP = offsetof(NRF_COMP_Type, TASKS_STOP), /*!< COMP stop sampling task. */ - NRF_COMP_TASK_SAMPLE = offsetof(NRF_COMP_Type, TASKS_SAMPLE) /*!< Sample comparator value. */ - /*lint -restore*/ -}nrf_comp_task_t; - -/** - * @enum nrf_comp_event_t - * @brief COMP events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_COMP_EVENT_READY = offsetof(NRF_COMP_Type, EVENTS_READY), /*!< COMP is ready and output is valid. */ - NRF_COMP_EVENT_DOWN = offsetof(NRF_COMP_Type, EVENTS_DOWN), /*!< Input voltage crossed the threshold going down. */ - NRF_COMP_EVENT_UP = offsetof(NRF_COMP_Type, EVENTS_UP), /*!< Input voltage crossed the threshold going up. */ - NRF_COMP_EVENT_CROSS = offsetof(NRF_COMP_Type, EVENTS_CROSS) /*!< Input voltage crossed the threshold in any direction. */ - /*lint -restore*/ -}nrf_comp_event_t; - -/** - * @brief COMP reference configuration. - */ -typedef struct -{ - nrf_comp_ref_t reference; /*!< COMP reference selection. */ - nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */ -}nrf_comp_ref_conf_t; - - -/** - * @brief Function for enabling the COMP peripheral. - */ -__STATIC_INLINE void nrf_comp_enable(void); - - -/** - * @brief Function for disabling the COMP peripheral. - */ - -__STATIC_INLINE void nrf_comp_disable(void); - -/** - * @brief Function for checking if the COMP peripheral is enabled. - * - * @retval true If the COMP peripheral is enabled. - * @retval false If the COMP peripheral is not enabled. - */ -__STATIC_INLINE bool nrf_comp_enable_check(void); - -/** - * @brief Function for setting the reference source. - * - * @param[in] reference COMP reference selection. - */ -__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference); - - -/** - * @brief Function for setting the external analog reference source. - * - * @param[in] ext_ref COMP external analog reference selection. - */ -__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref); - - -/** - * @brief Function for setting threshold voltages. - * - * @param[in] threshold COMP VDOWN and VUP thresholds. - */ -__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold); - - -/** - * @brief Function for setting the main mode. - * - * @param[in] main_mode COMP main operation mode. - */ -__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode); - - -/** - * @brief Function for setting the speed mode. - * - * @param[in] speed_mode COMP speed and power mode. - */ -__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode); - - -/** - * @brief Function for setting the hysteresis. - * - * @param[in] hyst COMP comparator hysteresis. - */ -__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst); - -#if defined (COMP_ISOURCE_ISOURCE_Msk) -/** - * @brief Function for setting the current source on the analog input. - * - * @param[in] isource COMP current source selection on analog input. - */ -__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource); -#endif - -/** - * @brief Function for selecting the active input of the COMP. - * - * @param[in] input Input to be selected. - */ -__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input); - - -/** - * @brief Function for getting the last COMP compare result. - * - * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-. - * - * @note If VIN+ == VIN-, the return value depends on the previous result. - */ -__STATIC_INLINE uint32_t nrf_comp_result_get(void); - - -/** - * @brief Function for enabling interrupts from COMP. - * - * @param[in] comp_int_mask Mask of interrupts to be enabled. - * - * @sa nrf_comp_int_enable_check() - */ -__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask); - -/** - * @brief Function for disabling interrupts from COMP. - * - * @param[in] comp_int_mask Mask of interrupts to be disabled. - * - * @sa nrf_comp_int_enable_check() - */ -__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask); - - -/** - * @brief Function for getting the enabled interrupts of COMP. - * - * @param[in] comp_int_mask Mask of interrupts to be checked. - * - * @retval true If any interrupts of the specified mask are enabled. - */ -__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask); - - - -/** - * @brief Function for getting the address of a specific COMP task register. - * - * @param[in] comp_task COMP task. - * - * @return Address of the specified COMP task. - */ -__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task); - - -/** - * @brief Function for getting the address of a specific COMP event register. - * - * @param[in] comp_event COMP event. - * - * @return Address of the specified COMP event. - */ -__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event); - - -/** - * @brief Function for setting COMP shorts. - * - * @param[in] comp_short_mask COMP shorts by mask. - * - */ -__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask); - - -/** - * @brief Function for clearing COMP shorts by mask. - * - * @param[in] comp_short_mask COMP shorts to be cleared. - * - */ -__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask); - - -/** - * @brief Function for setting a specific COMP task. - * - * @param[in] comp_task COMP task to be set. - * - */ -__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task); - - -/** - * @brief Function for clearing a specific COMP event. - * - * @param[in] comp_event COMP event to be cleared. - * - */ -__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event); - - -/** - * @brief Function for getting the state of a specific COMP event. - * - * @retval true If the specified COMP event is active. - * - */ -__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_comp_enable(void) -{ - NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Enabled << COMP_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_comp_disable(void) -{ - NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Disabled << COMP_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE bool nrf_comp_enable_check(void) -{ - return ((NRF_COMP->ENABLE) & COMP_ENABLE_ENABLE_Enabled); -} - -__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference) -{ - NRF_COMP->REFSEL = (reference << COMP_REFSEL_REFSEL_Pos); -} - -__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref) -{ - NRF_COMP->EXTREFSEL = (ext_ref << COMP_EXTREFSEL_EXTREFSEL_Pos); -} - -__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold) -{ - NRF_COMP->TH = - ((threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) | - ((threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk); -} - -__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode) -{ - NRF_COMP->MODE |= (main_mode << COMP_MODE_MAIN_Pos); -} - -__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode) -{ - NRF_COMP->MODE |= (speed_mode << COMP_MODE_SP_Pos); -} - -__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst) -{ - NRF_COMP->HYST = (hyst << COMP_HYST_HYST_Pos) & COMP_HYST_HYST_Msk; -} - -#if defined (COMP_ISOURCE_ISOURCE_Msk) -__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource) -{ - NRF_COMP->ISOURCE = (isource << COMP_ISOURCE_ISOURCE_Pos) & COMP_ISOURCE_ISOURCE_Msk; -} -#endif - -__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input) -{ - NRF_COMP->PSEL = ((uint32_t)input << COMP_PSEL_PSEL_Pos); -} - -__STATIC_INLINE uint32_t nrf_comp_result_get(void) -{ - return (uint32_t)NRF_COMP->RESULT; -} - -__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask) -{ - NRF_COMP->INTENSET = comp_int_mask; -} - -__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask) -{ - NRF_COMP->INTENCLR = comp_int_mask; -} - -__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask) -{ - return (NRF_COMP->INTENSET & comp_int_mask); // when read this register will return the value of INTEN. -} - -__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task) -{ - return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_task); -} - -__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event) -{ - return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event); -} - -__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask) -{ - NRF_COMP->SHORTS |= comp_short_mask; -} - -__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask) -{ - NRF_COMP->SHORTS &= ~comp_short_mask; -} - -__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_task) ) = 1; -} - -__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event) -{ - return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_event)); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_COMP_H_ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_ecb.c b/lib/sdk/components/drivers_nrf/hal/nrf_ecb.c deleted file mode 100644 index c340427..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_ecb.c +++ /dev/null @@ -1,100 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief Implementation of AES ECB driver - */ - - -//lint -e438 - -#include -#include -#include -#include "nrf.h" -#include "nrf_ecb.h" - -static uint8_t ecb_data[48]; ///< ECB data structure for RNG peripheral to access. -static uint8_t* ecb_key; ///< Key: Starts at ecb_data -static uint8_t* ecb_cleartext; ///< Cleartext: Starts at ecb_data + 16 bytes. -static uint8_t* ecb_ciphertext; ///< Ciphertext: Starts at ecb_data + 32 bytes. - -bool nrf_ecb_init(void) -{ - ecb_key = ecb_data; - ecb_cleartext = ecb_data + 16; - ecb_ciphertext = ecb_data + 32; - - NRF_ECB->ECBDATAPTR = (uint32_t)ecb_data; - return true; -} - - -bool nrf_ecb_crypt(uint8_t * dest_buf, const uint8_t * src_buf) -{ - uint32_t counter = 0x1000000; - if (src_buf != ecb_cleartext) - { - memcpy(ecb_cleartext,src_buf,16); - } - NRF_ECB->EVENTS_ENDECB = 0; - NRF_ECB->TASKS_STARTECB = 1; - while (NRF_ECB->EVENTS_ENDECB == 0) - { - counter--; - if (counter == 0) - { - return false; - } - } - NRF_ECB->EVENTS_ENDECB = 0; - if (dest_buf != ecb_ciphertext) - { - memcpy(dest_buf,ecb_ciphertext,16); - } - return true; -} - -void nrf_ecb_set_key(const uint8_t * key) -{ - memcpy(ecb_key,key,16); -} - - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_ecb.h b/lib/sdk/components/drivers_nrf/hal/nrf_ecb.h deleted file mode 100644 index 54dc025..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_ecb.h +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief ECB driver API. - */ - -#ifndef NRF_ECB_H__ -#define NRF_ECB_H__ - -/** - * @defgroup nrf_ecb AES ECB encryption - * @{ - * @ingroup nrf_drivers - * @brief Driver for the AES Electronic Code Book (ECB) peripheral. - * - * To encrypt data, the peripheral must first be powered on - * using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key. - */ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Function for initializing and powering on the ECB peripheral. - * - * This function allocates memory for the ECBDATAPTR. - * @retval true If initialization was successful. - * @retval false If powering on failed. - */ -bool nrf_ecb_init(void); - -/** - * @brief Function for encrypting 16-byte data using current key. - * - * This function avoids unnecessary copying of data if the parameters point to the - * correct locations in the ECB data structure. - * - * @param dst Result of encryption, 16 bytes will be written. - * @param src Source with 16-byte data to be encrypted. - * - * @retval true If the encryption operation completed. - * @retval false If the encryption operation did not complete. - */ -bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src); - -/** - * @brief Function for setting the key to be used for encryption. - * - * @param key Pointer to the key. 16 bytes will be read. - */ -void nrf_ecb_set_key(const uint8_t * key); - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_ECB_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_egu.h b/lib/sdk/components/drivers_nrf/hal/nrf_egu.h deleted file mode 100644 index ec30679..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_egu.h +++ /dev/null @@ -1,367 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_EGU_H__ -#define NRF_EGU_H__ - -/** -* @defgroup nrf_egu EGU (Event Generator Unit) abstraction -* @{ -* @ingroup nrf_drivers -* @brief @tagAPI52 EGU (Event Generator Unit) module functions. -* -*/ - -#include -#include -#include -#include "nrf_assert.h" -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @enum nrf_egu_task_t - * @brief EGU tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */ - NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */ - NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */ - NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */ - NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */ - NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */ - NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */ - NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */ - NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */ - NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */ - NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */ - NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */ - NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */ - NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */ - NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */ - NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */ - /*lint -restore*/ -} nrf_egu_task_t; - - -/** - * @enum nrf_egu_event_t - * @brief EGU events. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */ - NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */ - NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */ - NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */ - NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */ - NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */ - NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */ - NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */ - NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */ - NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */ - NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */ - NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */ - NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */ - NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */ - NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */ - NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */ - /*lint -restore*/ -} nrf_egu_event_t; - - -/** - * @enum nrf_egu_int_mask_t - * @brief EGU interrupts. - */ -typedef enum -{ - NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */ - NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */ - NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */ - NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */ - NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */ - NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */ - NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */ - NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */ - NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */ - NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */ - NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */ - NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */ - NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */ - NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */ - NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */ - NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */ - NRF_EGU_INT_ALL = 0xFFFFuL -} nrf_egu_int_mask_t; - -/**@brief Function for getting max channel number of given EGU. - * - * @param NRF_EGUx EGU instance. - * - * @returns number of available channels. - */ -__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx) -{ - if (NRF_EGUx == NRF_EGU0){ - return EGU0_CH_NUM; - } - if (NRF_EGUx == NRF_EGU1){ - return EGU1_CH_NUM; - } -#if EGU_COUNT > 2 - if (NRF_EGUx == NRF_EGU2){ - return EGU2_CH_NUM; - } - if (NRF_EGUx == NRF_EGU3){ - return EGU3_CH_NUM; - } - if (NRF_EGUx == NRF_EGU4){ - return EGU4_CH_NUM; - } - if (NRF_EGUx == NRF_EGU5){ - return EGU5_CH_NUM; - } -#endif - return 0; -} - -/** - * @brief Function for triggering a specific EGU task. - * - * @param NRF_EGUx EGU instance. - * @param egu_task EGU task. - */ -__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task) -{ - ASSERT(NRF_EGUx); - *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL; -} - - -/** - * @brief Function for returning the address of a specific EGU task register. - * - * @param NRF_EGUx EGU instance. - * @param egu_task EGU task. - */ -__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx, - nrf_egu_task_t egu_task) -{ - ASSERT(NRF_EGUx); - return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task); -} - - -/** - * @brief Function for returning the address of a specific EGU TRIGGER task register. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx, - uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel]; -} - - -/** - * @brief Function for returning the specific EGU TRIGGER task. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t))); -} - - -/** - * @brief Function for returning the state of a specific EGU event. - * - * @param NRF_EGUx EGU instance. - * @param egu_event EGU event to check. - */ -__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx, - nrf_egu_event_t egu_event) -{ - ASSERT(NRF_EGUx); - return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event); -} - - -/** - * @brief Function for clearing a specific EGU event. - * - * @param NRF_EGUx EGU instance. - * @param egu_event EGU event to clear. - */ -__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx, - nrf_egu_event_t egu_event) -{ - ASSERT(NRF_EGUx); - *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for returning the address of a specific EGU event register. - * - * @param NRF_EGUx EGU instance. - * @param egu_event EGU event. - */ -__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx, - nrf_egu_event_t egu_event) -{ - ASSERT(NRF_EGUx); - return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event); -} - - -/** - * @brief Function for returning the address of a specific EGU TRIGGERED event register. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx, - uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel]; -} - - -/** - * @brief Function for returning the specific EGU TRIGGERED event. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx, - uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t))); -} - - -/** - * @brief Function for enabling one or more specific EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param egu_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) -{ - ASSERT(NRF_EGUx); - NRF_EGUx->INTENSET = egu_int_mask; -} - - -/** - * @brief Function for retrieving the state of one or more EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param egu_int_mask Interrupts to check. - * - * @retval true If all of the specified interrupts are enabled. - * @retval false If at least one of the specified interrupts is disabled. - */ -__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) -{ - ASSERT(NRF_EGUx); - return (bool)(NRF_EGUx->INTENSET & egu_int_mask); -} - - -/** - * @brief Function for disabling one or more specific EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param egu_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) -{ - ASSERT(NRF_EGUx); - NRF_EGUx->INTENCLR = egu_int_mask; -} - -/** - * @brief Function for retrieving one or more specific EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - * - * @returns EGU interrupt mask. - */ -__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel)); -} - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_gpio.h b/lib/sdk/components/drivers_nrf/hal/nrf_gpio.h deleted file mode 100644 index 56e12df..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_gpio.h +++ /dev/null @@ -1,795 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_GPIO_H__ -#define NRF_GPIO_H__ - -#include "nrf.h" -#include "nrf_peripherals.h" -#include "nrf_assert.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_gpio GPIO abstraction - * @{ - * @ingroup nrf_drivers - * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports. - */ - -#if (GPIO_COUNT == 1) -#define NUMBER_OF_PINS (P0_PIN_NUM) -#define GPIO_REG_LIST {NRF_GPIO} -#elif (GPIO_COUNT == 2) -#define NUMBER_OF_PINS (P0_PIN_NUM + P1_PIN_NUM) -#define GPIO_REG_LIST {NRF_P0, NRF_P1} -#else -#error "Not supported." -#endif - - -/** - * @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions. - */ -#define NRF_GPIO_PIN_MAP(port, pin) ((port << 5) | (pin & 0x1F)) - -/** - * @brief Pin direction definitions. - */ -typedef enum -{ - NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input. - NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output. -} nrf_gpio_pin_dir_t; - -/** - * @brief Connection of input buffer. - */ -typedef enum -{ - NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer. - NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer. -} nrf_gpio_pin_input_t; - -/** - * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration. - */ -typedef enum -{ - NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pull-up resistor disabled. - NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pull-down resistor enabled. - NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled. -} nrf_gpio_pin_pull_t; - -/** - * @brief Enumerator used for selecting output drive mode. - */ -typedef enum -{ - NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'. - NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High-drive '0', standard '1'. - NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high-drive '1'. - NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high-drive '1'. - NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'. - NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high-drive '1'. - NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0', disconnect '1'. - NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'. -} nrf_gpio_pin_drive_t; - -/** - * @brief Enumerator used for selecting the pin to sense high or low level on the pin input. - */ -typedef enum -{ - NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled. - NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level. - NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level. -} nrf_gpio_pin_sense_t; - - -#if (__LINT__ != 1) - -/** - * @brief Function for configuring the GPIO pin range as output pins with normal drive strength. - * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). - * - * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output. - * Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. - */ -__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end); - -/** - * @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details. - * This function can be used to configure pin range as simple input. - * - * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). - * - * @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input. - * Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. - */ -__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, - uint32_t pin_range_end, - nrf_gpio_pin_pull_t pull_config); - -/** - * @brief Pin configuration function. - * - * The main pin configuration function. - * This function allows to set any aspect in PIN_CNF register. - * @param pin_number Specifies the pin number. - * @param dir Pin direction. - * @param input Connect or disconnect the input buffer. - * @param pull Pull configuration. - * @param drive Drive configuration. - * @param sense Pin sensing mechanism. - */ -__STATIC_INLINE void nrf_gpio_cfg( - uint32_t pin_number, - nrf_gpio_pin_dir_t dir, - nrf_gpio_pin_input_t input, - nrf_gpio_pin_pull_t pull, - nrf_gpio_pin_drive_t drive, - nrf_gpio_pin_sense_t sense); - -/** - * @brief Function for configuring the given GPIO pin number as output, hiding inner details. - * This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). - * - * @param pin_number Specifies the pin number. - * - * @note Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. - */ -__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number); - -/** - * @brief Function for configuring the given GPIO pin number as input, hiding inner details. - * This function can be used to configure a pin as simple input. - * - * @param pin_number Specifies the pin number. - * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). - * - * @note Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. - */ -__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config); - -/** - * @brief Function for resetting pin configuration to its default state. - * - * @param pin_number Specifies the pin number. - */ -__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number); - -/** - * @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected. - * - * @param pin_number Specifies the pin number. - * - */ -__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number); - -/** - * @brief Function for disconnecting input for the given GPIO. - * - * @param pin_number Specifies the pin number. - * - */ -__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number); - -/** - * @brief Function for configuring the given GPIO pin number as input, hiding inner details. - * This function can be used to configure pin range as simple input. - * Sense capability on the pin is configurable and input is connected to buffer so that the GPIO->IN register is readable. - * - * @param pin_number Specifies the pin number. - * @param pull_config State of the pin pull resistor (no pull, pulled down, or pulled high). - * @param sense_config Sense level of the pin (no sense, sense low, or sense high). - */ -__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, - nrf_gpio_pin_pull_t pull_config, - nrf_gpio_pin_sense_t sense_config); - -/** - * @brief Function for configuring sense level for the given GPIO. - * - * @param pin_number Specifies the pin number. - * @param sense_config Sense configuration. - * - */ -__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config); - -/** - * @brief Function for setting the direction for a GPIO pin. - * - * @param pin_number Specifies the pin number for which to set the direction. - * - * @param direction Specifies the direction. - */ -__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction); - -/** - * @brief Function for setting a GPIO pin. - * - * Note that the pin must be configured as an output for this function to have any effect. - * - * @param pin_number Specifies the pin number to set. - */ -__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number); - -/** - * @brief Function for clearing a GPIO pin. - * - * Note that the pin must be configured as an output for this - * function to have any effect. - * - * @param pin_number Specifies the pin number to clear. - */ -__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number); - -/** - * @brief Function for toggling a GPIO pin. - * - * Note that the pin must be configured as an output for this - * function to have any effect. - * - * @param pin_number Specifies the pin number to toggle. - */ -__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number); - -/** - * @brief Function for writing a value to a GPIO pin. - * - * Note that the pin must be configured as an output for this - * function to have any effect. - * - * @param pin_number Specifies the pin number to write. - * - * @param value Specifies the value to be written to the pin. - * @arg 0 Clears the pin. - * @arg >=1 Sets the pin. - */ -__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value); - -/** - * @brief Function for reading the input level of a GPIO pin. - * - * Note that the pin must have input connected for the value - * returned from this function to be valid. - * - * @param pin_number Specifies the pin number to read. - * - * @return 0 if the pin input level is low. Positive value if the pin is high. - */ -__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number); - -/** - * @brief Function for reading the output level of a GPIO pin. - * - * @param pin_number Specifies the pin number to read. - * - * @return 0 if the pin output level is low. Positive value if pin output is high. - */ -__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number); - -/** - * @brief Function for reading the sense configuration of a GPIO pin. - * - * @param pin_number Specifies the pin number to read. - * - * @retval Sense configuration. - */ -__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number); - -/** - * @brief Function for setting output direction on selected pins on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param out_mask Mask specifying the pins to set as output. - * - */ -__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask); - -/** - * @brief Function for setting input direction on selected pins on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param in_mask Mask specifying the pins to set as input. - * - */ -__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask); - -/** - * @brief Function for writing the direction configuration of GPIO pins in a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output. - * - */ -__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask); - -/** - * @brief Function for reading the direction configuration of a GPIO port. - * - * @param p_reg Pointer to the peripheral registers structure. - * - * @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output. - */ -__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg); - -/** - * @brief Function for reading the input signals of GPIO pins on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * - * @retval Port input values. - */ -__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg); - -/** - * @brief Function for reading the output signals of GPIO pins of a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * - * @retval Port output values. - */ -__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg); - -/** - * @brief Function for writing the GPIO pins output on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param value Output port mask. - * - */ -__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value); - -/** - * @brief Function for setting high level on selected GPIO pins of a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param set_mask Mask with pins to set as logical high level. - * - */ -__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask); - -/** - * @brief Function for setting low level on selected GPIO pins of a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param clr_mask Mask with pins to set as logical low level. - * - */ -__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask); - -/** - * @brief Function for reading pins state of multiple consecutive ports. - * - * @param start_port Index of the first port to read. - * @param length Number of ports to read. - * @param p_masks Pointer to output array where port states will be stored. - */ -__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks); - -#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT -/** - * @brief Function for reading latch state of multiple consecutive ports. - * - * @param start_port Index of the first port to read. - * @param length Number of ports to read. - * @param p_masks Pointer to output array where latch states will be stored. - */ -__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, - uint32_t * p_masks); - -/** - * @brief Function for reading latch state of single pin. - * - * @param pin_number Pin number. - * @return 0 if latch is not set. Positive value otherwise. - * - */ -__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number); - -/** - * @brief Function for clearing latch state of a single pin. - * - * @param pin_number Pin number. - * - */ -__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number); -#endif - - -#endif // #ifndef (__LINT__ != 1) - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/** - * @brief Function for extracting port and relative pin number from absolute pin number. - * - * @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number. - * - * @return Pointer to port register set. - * - */ -__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin) -{ - ASSERT(*p_pin < NUMBER_OF_PINS); -#if (GPIO_COUNT == 1) - // The oldest definition case - return NRF_GPIO; -#else - if (*p_pin < P0_PIN_NUM) - { - return NRF_P0; - } - else - { - *p_pin = *p_pin & (P0_PIN_NUM - 1); - return NRF_P1; - } -#endif -} - - -__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end) -{ - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - for (; pin_range_start <= pin_range_end; pin_range_start++) - { - nrf_gpio_cfg_output(pin_range_start); - } -} - - -__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, - uint32_t pin_range_end, - nrf_gpio_pin_pull_t pull_config) -{ - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - for (; pin_range_start <= pin_range_end; pin_range_start++) - { - nrf_gpio_cfg_input(pin_range_start, pull_config); - } -} - - -__STATIC_INLINE void nrf_gpio_cfg( - uint32_t pin_number, - nrf_gpio_pin_dir_t dir, - nrf_gpio_pin_input_t input, - nrf_gpio_pin_pull_t pull, - nrf_gpio_pin_drive_t drive, - nrf_gpio_pin_sense_t sense) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos) - | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos) - | ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos) - | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos) - | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos); -} - - -__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_OUTPUT, - NRF_GPIO_PIN_INPUT_DISCONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); -} - - -__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - pull_config, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); -} - - -__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_DISCONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); -} - - -__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk; - - reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos); -} - - -__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk; - - reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos); -} - - -__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, - nrf_gpio_pin_pull_t pull_config, - nrf_gpio_pin_sense_t sense_config) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - pull_config, - NRF_GPIO_PIN_S0S1, - sense_config); -} - - -__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk; - reg->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos); -} - - -__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction) -{ - if (direction == NRF_GPIO_PIN_DIR_INPUT) - { - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); - } - else - { - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - reg->DIRSET = (1UL << pin_number); - } -} - - -__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - nrf_gpio_port_out_set(reg, 1UL << pin_number); -} - - -__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - nrf_gpio_port_out_clear(reg, 1UL << pin_number); -} - - -__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - uint32_t pins_state = reg->OUT; - - reg->OUTSET = (~pins_state & (1UL << pin_number)); - reg->OUTCLR = (pins_state & (1UL << pin_number)); -} - - -__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value) -{ - if (value == 0) - { - nrf_gpio_pin_clear(pin_number); - } - else - { - nrf_gpio_pin_set(pin_number); - } -} - - -__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL); -} - - -__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL); -} - - -__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] & - GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos); -} - - -__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask) -{ - p_reg->DIRSET = out_mask; -} - - -__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask) -{ - p_reg->DIRCLR = in_mask; -} - - -__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t value) -{ - p_reg->DIR = value; -} - - -__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg) -{ - return p_reg->DIR; -} - - -__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg) -{ - return p_reg->IN; -} - - -__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg) -{ - return p_reg->OUT; -} - - -__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value) -{ - p_reg->OUT = value; -} - - -__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask) -{ - p_reg->OUTSET = set_mask; -} - - -__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask) -{ - p_reg->OUTCLR = clr_mask; -} - - -__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks) -{ - NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST; - - ASSERT(start_port + length <= GPIO_COUNT); - uint32_t i; - - for (i = start_port; i < (start_port + length); i++) - { - *p_masks = nrf_gpio_port_in_read(gpio_regs[i]); - p_masks++; - } -} - - -#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT -__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, uint32_t * p_masks) -{ - NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST; - uint32_t i; - - for (i = start_port; i < (start_port + length); i++) - { - *p_masks = gpio_regs[i]->LATCH; - p_masks++; - } -} - - -__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return (reg->LATCH & (1 << pin_number)) ? 1 : 0; -} - - -__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - reg->LATCH = (1 << pin_number); -} - - -#endif -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_gpiote.h b/lib/sdk/components/drivers_nrf/hal/nrf_gpiote.h deleted file mode 100644 index a86d733..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_gpiote.h +++ /dev/null @@ -1,430 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_GPIOTE_H__ -#define NRF_GPIOTE_H__ - -#include "nrf_peripherals.h" -#include "nrf.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef GPIOTE_CONFIG_PORT_Msk -#define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk) -#else -#define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk -#endif -/** -* @defgroup nrf_gpiote_abs GPIOTE abstraction -* @{ -* @ingroup nrf_gpiote -* @brief GPIOTE abstraction for configuration of channels. -*/ - - /** - * @enum nrf_gpiote_polarity_t - * @brief Polarity for the GPIOTE channel. - */ -typedef enum -{ - NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high. - NRF_GPIOTE_POLARITY_HITOLO = GPIOTE_CONFIG_POLARITY_HiToLo, ///< High to low. - NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle. -} nrf_gpiote_polarity_t; - - - /** - * @enum nrf_gpiote_outinit_t - * @brief Initial output value for the GPIOTE channel. - */ -typedef enum -{ - NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high. - NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low. -} nrf_gpiote_outinit_t; - -/** - * @brief Tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/ - NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/ - NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/ - NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/ -#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/ - NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/ - NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/ - NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/ -#endif -#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/ - NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/ - NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/ - NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/ - NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/ - NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/ - NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/ - NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/ -#endif -#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/ - NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/ - NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/ - NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/ - NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/ - NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/ - NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/ - NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/ -#endif - /*lint -restore*/ -} nrf_gpiote_tasks_t; - -/** - * @brief Events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/ - NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/ - NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/ - NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/ -#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/ - NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/ - NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/ - NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/ -#endif - NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/ - /*lint -restore*/ -} nrf_gpiote_events_t; - -/** - * @enum nrf_gpiote_int_t - * @brief GPIOTE interrupts. - */ -typedef enum -{ - NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */ - NRF_GPIOTE_INT_IN1_MASK = GPIOTE_INTENSET_IN1_Msk, /**< GPIOTE interrupt from IN1. */ - NRF_GPIOTE_INT_IN2_MASK = GPIOTE_INTENSET_IN2_Msk, /**< GPIOTE interrupt from IN2. */ - NRF_GPIOTE_INT_IN3_MASK = GPIOTE_INTENSET_IN3_Msk, /**< GPIOTE interrupt from IN3. */ -#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_INT_IN4_MASK = GPIOTE_INTENSET_IN4_Msk, /**< GPIOTE interrupt from IN4. */ - NRF_GPIOTE_INT_IN5_MASK = GPIOTE_INTENSET_IN5_Msk, /**< GPIOTE interrupt from IN5. */ - NRF_GPIOTE_INT_IN6_MASK = GPIOTE_INTENSET_IN6_Msk, /**< GPIOTE interrupt from IN6. */ - NRF_GPIOTE_INT_IN7_MASK = GPIOTE_INTENSET_IN7_Msk, /**< GPIOTE interrupt from IN7. */ -#endif - NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */ -} nrf_gpiote_int_t; - -#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\ - NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK) -#if (GPIOTE_CH_NUM > 4) -#undef NRF_GPIOTE_INT_IN_MASK -#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\ - NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\ - NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\ - NRF_GPIOTE_INT_IN6_MASK | NRF_GPIOTE_INT_IN7_MASK) -#endif - -/** - * @brief Function for activating a specific GPIOTE task. - * - * @param[in] task Task. - */ -__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task); - -/** - * @brief Function for getting the address of a specific GPIOTE task. - * - * @param[in] task Task. - * - * @returns Address. - */ -__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task); - -/** - * @brief Function for getting the state of a specific GPIOTE event. - * - * @param[in] event Event. - */ -__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event); - -/** - * @brief Function for clearing a specific GPIOTE event. - * - * @param[in] event Event. - */ -__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event); - -/** - * @brief Function for getting the address of a specific GPIOTE event. - * - * @param[in] event Event. - * - * @return Address - */ -__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event); - -/**@brief Function for enabling interrupts. - * - * @param[in] mask Interrupt mask to be enabled. - */ -__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask); - -/**@brief Function for disabling interrupts. - * - * @param[in] mask Interrupt mask to be disabled. - */ -__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask); - -/**@brief Function for checking if interrupts are enabled. - * - * @param[in] mask Mask of interrupt flags to check. - * - * @return Mask with enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask); - -/**@brief Function for enabling a GPIOTE event. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx); - -/**@brief Function for disabling a GPIOTE event. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx); - -/**@brief Function for configuring a GPIOTE event. - * - * @param[in] idx Task-Event index. - * @param[in] pin Pin associated with event. - * @param[in] polarity Transition that should generate an event. - */ -__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, - nrf_gpiote_polarity_t polarity); - -/**@brief Function for getting the pin associated with a GPIOTE event. - * - * @param[in] idx Task-Event index. - * - * @return Pin number. - */ -__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx); - -/**@brief Function for getting the polarity associated with a GPIOTE event. - * - * @param[in] idx Task-Event index. - * - * @return Polarity. - */ -__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx); - -/**@brief Function for enabling a GPIOTE task. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx); - -/**@brief Function for disabling a GPIOTE task. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx); - -/**@brief Function for configuring a GPIOTE task. - * @note Function is not configuring mode field so task is disabled after this function is called. - * - * @param[in] idx Task-Event index. - * @param[in] pin Pin associated with event. - * @param[in] polarity Transition that should generate an event. - * @param[in] init_val Initial value of the pin. - */ -__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin, - nrf_gpiote_polarity_t polarity, - nrf_gpiote_outinit_t init_val); - -/**@brief Function for forcing a specific state on the pin connected to GPIOTE. - * - * @param[in] idx Task-Event index. - * @param[in] init_val Pin state. - */ -__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val); - -/**@brief Function for resetting a GPIOTE task event configuration to the default state. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task) -{ - *(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task) -{ - return ((uint32_t)NRF_GPIOTE + task); -} - -__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event) -{ - return (*(uint32_t *)nrf_gpiote_event_addr_get(event) == 0x1UL) ? true : false; -} - -__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event) -{ - *(uint32_t *)nrf_gpiote_event_addr_get(event) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_addr_get(event)); - (void)dummy; -#endif -} - -__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event) -{ - return ((uint32_t)NRF_GPIOTE + event); -} - -__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask) -{ - NRF_GPIOTE->INTENSET = mask; -} - -__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask) -{ - NRF_GPIOTE->INTENCLR = mask; -} - -__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask) -{ - return (NRF_GPIOTE->INTENSET & mask); -} - -__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event; -} - -__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Event; -} - -__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t polarity) -{ - NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk); - NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | - ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk); -} - -__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx) -{ - return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos); -} - -__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx) -{ - return (nrf_gpiote_polarity_t)((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >> GPIOTE_CONFIG_POLARITY_Pos); -} - -__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx) -{ - uint32_t final_config = NRF_GPIOTE->CONFIG[idx] | GPIOTE_CONFIG_MODE_Task; -#ifdef NRF51 - /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens - on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the - correct state in GPIOTE but not in the OUT register. */ - /* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */ - NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk); - __NOP(); - __NOP(); - __NOP(); -#endif - NRF_GPIOTE->CONFIG[idx] = final_config; -} - -__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Task; -} - -__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin, - nrf_gpiote_polarity_t polarity, - nrf_gpiote_outinit_t init_val) -{ - NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | - GPIOTE_CONFIG_POLARITY_Msk | - GPIOTE_CONFIG_OUTINIT_Msk); - - NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | - ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) | - ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk); -} - -__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val) -{ - NRF_GPIOTE->CONFIG[idx] = (NRF_GPIOTE->CONFIG[idx] & ~GPIOTE_CONFIG_OUTINIT_Msk) - | ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk); -} - -__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] = 0; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_i2s.h b/lib/sdk/components/drivers_nrf/hal/nrf_i2s.h deleted file mode 100644 index 4079919..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_i2s.h +++ /dev/null @@ -1,563 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_i2s_hal I2S HAL - * @{ - * @ingroup nrf_i2s - * - * @brief @tagAPI52 Hardware access layer for managing the Inter-IC Sound (I2S) peripheral. - */ - -#ifndef NRF_I2S_H__ -#define NRF_I2S_H__ - -#include -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be provided as a parameter for the @ref nrf_i2s_pins_set - * function call to specify that a given I2S signal (SDOUT, SDIN, or MCK) - * shall not be connected to a physical pin. - */ -#define NRF_I2S_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief I2S tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_I2S_TASK_START = offsetof(NRF_I2S_Type, TASKS_START), ///< Starts continuous I2S transfer. Also starts the MCK generator if this is enabled. - NRF_I2S_TASK_STOP = offsetof(NRF_I2S_Type, TASKS_STOP) ///< Stops I2S transfer. Also stops the MCK generator. - /*lint -restore*/ -} nrf_i2s_task_t; - -/** - * @brief I2S events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double-buffers. - NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double-buffers. - NRF_I2S_EVENT_STOPPED = offsetof(NRF_I2S_Type, EVENTS_STOPPED) ///< I2S transfer stopped. - /*lint -restore*/ -} nrf_i2s_event_t; - -/** - * @brief I2S interrupts. - */ -typedef enum -{ - NRF_I2S_INT_RXPTRUPD_MASK = I2S_INTENSET_RXPTRUPD_Msk, ///< Interrupt on RXPTRUPD event. - NRF_I2S_INT_TXPTRUPD_MASK = I2S_INTENSET_TXPTRUPD_Msk, ///< Interrupt on TXPTRUPD event. - NRF_I2S_INT_STOPPED_MASK = I2S_INTENSET_STOPPED_Msk ///< Interrupt on STOPPED event. -} nrf_i2s_int_mask_t; - -/** - * @brief I2S modes of operation. - */ -typedef enum -{ - NRF_I2S_MODE_MASTER = I2S_CONFIG_MODE_MODE_Master, ///< Master mode. - NRF_I2S_MODE_SLAVE = I2S_CONFIG_MODE_MODE_Slave ///< Slave mode. -} nrf_i2s_mode_t; - -/** - * @brief I2S master clock generator settings. - */ -typedef enum -{ - NRF_I2S_MCK_DISABLED = 0, ///< MCK disabled. - // [conversion to 'int' needed to prevent compilers from complaining - // that the provided value (0x80000000UL) is out of range of "int"] - NRF_I2S_MCK_32MDIV2 = (int)I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2, ///< 32 MHz / 2 = 16.0 MHz. - NRF_I2S_MCK_32MDIV3 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3, ///< 32 MHz / 3 = 10.6666667 MHz. - NRF_I2S_MCK_32MDIV4 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4, ///< 32 MHz / 4 = 8.0 MHz. - NRF_I2S_MCK_32MDIV5 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5, ///< 32 MHz / 5 = 6.4 MHz. - NRF_I2S_MCK_32MDIV6 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6, ///< 32 MHz / 6 = 5.3333333 MHz. - NRF_I2S_MCK_32MDIV8 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8, ///< 32 MHz / 8 = 4.0 MHz. - NRF_I2S_MCK_32MDIV10 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10, ///< 32 MHz / 10 = 3.2 MHz. - NRF_I2S_MCK_32MDIV11 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11, ///< 32 MHz / 11 = 2.9090909 MHz. - NRF_I2S_MCK_32MDIV15 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15, ///< 32 MHz / 15 = 2.1333333 MHz. - NRF_I2S_MCK_32MDIV16 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16, ///< 32 MHz / 16 = 2.0 MHz. - NRF_I2S_MCK_32MDIV21 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21, ///< 32 MHz / 21 = 1.5238095 MHz. - NRF_I2S_MCK_32MDIV23 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23, ///< 32 MHz / 23 = 1.3913043 MHz. - NRF_I2S_MCK_32MDIV31 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31, ///< 32 MHz / 31 = 1.0322581 MHz. - NRF_I2S_MCK_32MDIV42 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42, ///< 32 MHz / 42 = 0.7619048 MHz. - NRF_I2S_MCK_32MDIV63 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63, ///< 32 MHz / 63 = 0.5079365 MHz. - NRF_I2S_MCK_32MDIV125 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 ///< 32 MHz / 125 = 0.256 MHz. -} nrf_i2s_mck_t; - -/** - * @brief I2S MCK/LRCK ratios. - */ -typedef enum -{ - NRF_I2S_RATIO_32X = I2S_CONFIG_RATIO_RATIO_32X, ///< LRCK = MCK / 32. - NRF_I2S_RATIO_48X = I2S_CONFIG_RATIO_RATIO_48X, ///< LRCK = MCK / 48. - NRF_I2S_RATIO_64X = I2S_CONFIG_RATIO_RATIO_64X, ///< LRCK = MCK / 64. - NRF_I2S_RATIO_96X = I2S_CONFIG_RATIO_RATIO_96X, ///< LRCK = MCK / 96. - NRF_I2S_RATIO_128X = I2S_CONFIG_RATIO_RATIO_128X, ///< LRCK = MCK / 128. - NRF_I2S_RATIO_192X = I2S_CONFIG_RATIO_RATIO_192X, ///< LRCK = MCK / 192. - NRF_I2S_RATIO_256X = I2S_CONFIG_RATIO_RATIO_256X, ///< LRCK = MCK / 256. - NRF_I2S_RATIO_384X = I2S_CONFIG_RATIO_RATIO_384X, ///< LRCK = MCK / 384. - NRF_I2S_RATIO_512X = I2S_CONFIG_RATIO_RATIO_512X ///< LRCK = MCK / 512. -} nrf_i2s_ratio_t; - -/** - * @brief I2S sample widths. - */ -typedef enum -{ - NRF_I2S_SWIDTH_8BIT = I2S_CONFIG_SWIDTH_SWIDTH_8Bit, ///< 8 bit. - NRF_I2S_SWIDTH_16BIT = I2S_CONFIG_SWIDTH_SWIDTH_16Bit, ///< 16 bit. - NRF_I2S_SWIDTH_24BIT = I2S_CONFIG_SWIDTH_SWIDTH_24Bit ///< 24 bit. -} nrf_i2s_swidth_t; - -/** - * @brief I2S alignments of sample within a frame. - */ -typedef enum -{ - NRF_I2S_ALIGN_LEFT = I2S_CONFIG_ALIGN_ALIGN_Left, ///< Left-aligned. - NRF_I2S_ALIGN_RIGHT = I2S_CONFIG_ALIGN_ALIGN_Right ///< Right-aligned. -} nrf_i2s_align_t; - -/** - * @brief I2S frame formats. - */ -typedef enum -{ - NRF_I2S_FORMAT_I2S = I2S_CONFIG_FORMAT_FORMAT_I2S, ///< Original I2S format. - NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left- or right-aligned) format. -} nrf_i2s_format_t; - -/** - * @brief I2S enabled channels. - */ -typedef enum -{ - NRF_I2S_CHANNELS_STEREO = I2S_CONFIG_CHANNELS_CHANNELS_Stereo, ///< Stereo. - NRF_I2S_CHANNELS_LEFT = I2S_CONFIG_CHANNELS_CHANNELS_Left, ///< Left only. - NRF_I2S_CHANNELS_RIGHT = I2S_CONFIG_CHANNELS_CHANNELS_Right ///< Right only. -} nrf_i2s_channels_t; - - -/** - * @brief Function for activating a specific I2S task. - * - * @param[in] p_i2s I2S instance. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_i2s, - nrf_i2s_task_t task); - -/** - * @brief Function for getting the address of a specific I2S task register. - * - * @param[in] p_i2s I2S instance. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_task_t task); - -/** - * @brief Function for clearing a specific I2S event. - * - * @param[in] p_i2s I2S instance. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s, - nrf_i2s_event_t event); - -/** - * @brief Function for checking the state of a specific I2S event. - * - * @param[in] p_i2s I2S instance. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event); - -/** - * @brief Function for getting the address of a specific I2S event register. - * - * @param[in] p_i2s I2S instance. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_i2s I2S instance. - * @param[in] mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_i2s, uint32_t mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_i2s I2S instance. - * @param[in] mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_i2s, uint32_t mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_i2s I2S instance. - * @param[in] i2s_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_int_mask_t i2s_int); - -/** - * @brief Function for enabling the I2S peripheral. - * - * @param[in] p_i2s I2S instance. - */ -__STATIC_INLINE void nrf_i2s_enable(NRF_I2S_Type * p_i2s); - -/** - * @brief Function for disabling the I2S peripheral. - * - * @param[in] p_i2s I2S instance. - */ -__STATIC_INLINE void nrf_i2s_disable(NRF_I2S_Type * p_i2s); - -/** - * @brief Function for configuring I2S pins. - * - * Usage of the SDOUT, SDIN, and MCK signals is optional. - * If a given signal is not needed, pass the @ref NRF_I2S_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_i2s I2S instance. - * @param[in] sck_pin SCK pin number. - * @param[in] lrck_pin LRCK pin number. - * @param[in] mck_pin MCK pin number. - * @param[in] sdout_pin SDOUT pin number. - * @param[in] sdin_pin SDIN pin number. - */ -__STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_i2s, - uint32_t sck_pin, - uint32_t lrck_pin, - uint32_t mck_pin, - uint32_t sdout_pin, - uint32_t sdin_pin); - -/** - * @brief Function for setting the I2S peripheral configuration. - * - * @param[in] p_i2s I2S instance. - * @param[in] mode Mode of operation (master or slave). - * @param[in] format I2S frame format. - * @param[in] alignment Alignment of sample within a frame. - * @param[in] sample_width Sample width. - * @param[in] channels Enabled channels. - * @param[in] mck_setup Master clock generator setup. - * @param[in] ratio MCK/LRCK ratio. - * - * @retval true If the configuration has been set successfully. - * @retval false If the requested configuration is not allowed. - */ -__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_i2s, - nrf_i2s_mode_t mode, - nrf_i2s_format_t format, - nrf_i2s_align_t alignment, - nrf_i2s_swidth_t sample_width, - nrf_i2s_channels_t channels, - nrf_i2s_mck_t mck_setup, - nrf_i2s_ratio_t ratio); - -/** - * @brief Function for setting up the I2S transfer. - * - * This function sets up the RX and TX buffers and enables reception and/or - * transmission accordingly. If the transfer in a given direction is not - * required, pass NULL instead of the pointer to the corresponding buffer. - * - * @param[in] p_i2s I2S instance. - * @param[in] size Size of the buffers (in 32-bit words). - * @param[in] p_rx_buffer Pointer to the receive buffer. - * Pass NULL to disable reception. - * @param[in] p_tx_buffer Pointer to the transmit buffer. - * Pass NULL to disable transmission. - */ -__STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_i2s, - uint16_t size, - uint32_t * p_rx_buffer, - uint32_t const * p_tx_buffer); - -/** - * @brief Function for setting the pointer to the receive buffer. - * - * @note The size of the buffer can be set only by calling - * @ref nrf_i2s_transfer_set. - * - * @param[in] p_i2s I2S instance. - * @param[in] p_buffer Pointer to the receive buffer. - */ -__STATIC_INLINE void nrf_i2s_rx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t * p_buffer); - -/** - * @brief Function for getting the pointer to the receive buffer. - * - * @param[in] p_i2s I2S instance. - * - * @return Pointer to the receive buffer. - */ -__STATIC_INLINE uint32_t * nrf_i2s_rx_buffer_get(NRF_I2S_Type const * p_i2s); - -/** - * @brief Function for setting the pointer to the transmit buffer. - * - * @note The size of the buffer can be set only by calling - * @ref nrf_i2s_transfer_set. - * - * @param[in] p_i2s I2S instance. - * @param[in] p_buffer Pointer to the transmit buffer. - */ -__STATIC_INLINE void nrf_i2s_tx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t const * p_buffer); - -/** - * @brief Function for getting the pointer to the transmit buffer. - * - * @param[in] p_i2s I2S instance. - * - * @return Pointer to the transmit buffer. - */ -__STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_i2s, - nrf_i2s_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_task_t task) -{ - return ((uint32_t)p_i2s + (uint32_t)task); -} - -__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s, - nrf_i2s_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event) -{ - return ((uint32_t)p_i2s + (uint32_t)event); -} - -__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_i2s, uint32_t mask) -{ - p_i2s->INTENSET = mask; -} - -__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_i2s, uint32_t mask) -{ - p_i2s->INTENCLR = mask; -} - -__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_int_mask_t i2s_int) -{ - return (bool)(p_i2s->INTENSET & i2s_int); -} - -__STATIC_INLINE void nrf_i2s_enable(NRF_I2S_Type * p_i2s) -{ - p_i2s->ENABLE = (I2S_ENABLE_ENABLE_Enabled << I2S_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_i2s_disable(NRF_I2S_Type * p_i2s) -{ - p_i2s->ENABLE = (I2S_ENABLE_ENABLE_Disabled << I2S_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_i2s, - uint32_t sck_pin, - uint32_t lrck_pin, - uint32_t mck_pin, - uint32_t sdout_pin, - uint32_t sdin_pin) -{ - p_i2s->PSEL.SCK = sck_pin; - p_i2s->PSEL.LRCK = lrck_pin; - p_i2s->PSEL.MCK = mck_pin; - p_i2s->PSEL.SDOUT = sdout_pin; - p_i2s->PSEL.SDIN = sdin_pin; -} - -__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_i2s, - nrf_i2s_mode_t mode, - nrf_i2s_format_t format, - nrf_i2s_align_t alignment, - nrf_i2s_swidth_t sample_width, - nrf_i2s_channels_t channels, - nrf_i2s_mck_t mck_setup, - nrf_i2s_ratio_t ratio) -{ - if (mode == NRF_I2S_MODE_MASTER) - { - // The MCK/LRCK ratio shall be a multiple of 2 * sample width. - if (((sample_width == NRF_I2S_SWIDTH_16BIT) && - (ratio == NRF_I2S_RATIO_48X)) - || - ((sample_width == NRF_I2S_SWIDTH_24BIT) && - ((ratio == NRF_I2S_RATIO_32X) || - (ratio == NRF_I2S_RATIO_64X) || - (ratio == NRF_I2S_RATIO_128X) || - (ratio == NRF_I2S_RATIO_256X) || - (ratio == NRF_I2S_RATIO_512X)))) - { - return false; - } - } - - p_i2s->CONFIG.MODE = mode; - p_i2s->CONFIG.FORMAT = format; - p_i2s->CONFIG.ALIGN = alignment; - p_i2s->CONFIG.SWIDTH = sample_width; - p_i2s->CONFIG.CHANNELS = channels; - p_i2s->CONFIG.RATIO = ratio; - - if (mck_setup == NRF_I2S_MCK_DISABLED) - { - p_i2s->CONFIG.MCKEN = - (I2S_CONFIG_MCKEN_MCKEN_Disabled << I2S_CONFIG_MCKEN_MCKEN_Pos); - } - else - { - p_i2s->CONFIG.MCKFREQ = mck_setup; - p_i2s->CONFIG.MCKEN = - (I2S_CONFIG_MCKEN_MCKEN_Enabled << I2S_CONFIG_MCKEN_MCKEN_Pos); - } - - return true; -} - -__STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_i2s, - uint16_t size, - uint32_t * p_buffer_rx, - uint32_t const * p_buffer_tx) -{ - p_i2s->RXTXD.MAXCNT = size; - - nrf_i2s_rx_buffer_set(p_i2s, p_buffer_rx); - p_i2s->CONFIG.RXEN = (p_buffer_rx != NULL) ? 1 : 0; - - nrf_i2s_tx_buffer_set(p_i2s, p_buffer_tx); - p_i2s->CONFIG.TXEN = (p_buffer_tx != NULL) ? 1 : 0; -} - -__STATIC_INLINE void nrf_i2s_rx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t * p_buffer) -{ - p_i2s->RXD.PTR = (uint32_t)p_buffer; -} - -__STATIC_INLINE uint32_t * nrf_i2s_rx_buffer_get(NRF_I2S_Type const * p_i2s) -{ - return (uint32_t *)(p_i2s->RXD.PTR); -} - -__STATIC_INLINE void nrf_i2s_tx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t const * p_buffer) -{ - p_i2s->TXD.PTR = (uint32_t)p_buffer; -} - -__STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s) -{ - return (uint32_t *)(p_i2s->TXD.PTR); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_I2S_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_lpcomp.h b/lib/sdk/components/drivers_nrf/hal/nrf_lpcomp.h deleted file mode 100644 index 5e311f6..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_lpcomp.h +++ /dev/null @@ -1,425 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief LPCOMP HAL API. - */ - -#ifndef NRF_LPCOMP_H_ -#define NRF_LPCOMP_H_ - -/** - * @defgroup nrf_lpcomp_hal LPCOMP HAL - * @{ - * @ingroup nrf_lpcomp - * @brief Hardware access layer for managing the Low Power Comparator (LPCOMP). - */ - -#include "nrf.h" -#include "nrf_peripherals.h" - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @enum nrf_lpcomp_ref_t - * @brief LPCOMP reference selection. - */ -typedef enum -{ -#if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__SDK_DOXYGEN__) - NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling, /**< Use supply with a 1/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling, /**< Use supply with a 2/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling, /**< Use supply with a 3/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling, /**< Use supply with a 4/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling, /**< Use supply with a 5/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, /**< Use supply with a 6/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */ -#elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__SDK_DOXYGEN__) - NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */ -#endif - NRF_LPCOMP_REF_EXT_REF0 = LPCOMP_REFSEL_REFSEL_ARef | - (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */ - NRF_LPCOMP_CONFIG_REF_EXT_REF1 = LPCOMP_REFSEL_REFSEL_ARef | - (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), /**< External reference 1. */ -} nrf_lpcomp_ref_t; - -/** - * @enum nrf_lpcomp_input_t - * @brief LPCOMP input selection. - */ -typedef enum -{ - NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, /**< Input 0. */ - NRF_LPCOMP_INPUT_1 = LPCOMP_PSEL_PSEL_AnalogInput1, /**< Input 1. */ - NRF_LPCOMP_INPUT_2 = LPCOMP_PSEL_PSEL_AnalogInput2, /**< Input 2. */ - NRF_LPCOMP_INPUT_3 = LPCOMP_PSEL_PSEL_AnalogInput3, /**< Input 3. */ - NRF_LPCOMP_INPUT_4 = LPCOMP_PSEL_PSEL_AnalogInput4, /**< Input 4. */ - NRF_LPCOMP_INPUT_5 = LPCOMP_PSEL_PSEL_AnalogInput5, /**< Input 5. */ - NRF_LPCOMP_INPUT_6 = LPCOMP_PSEL_PSEL_AnalogInput6, /**< Input 6. */ - NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 /**< Input 7. */ -} nrf_lpcomp_input_t; - -/** - * @enum nrf_lpcomp_detect_t - * @brief LPCOMP detection type selection. - */ -typedef enum -{ - NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, /**< Generate ANADETEC on crossing, both upwards and downwards crossing. */ - NRF_LPCOMP_DETECT_UP = LPCOMP_ANADETECT_ANADETECT_Up, /**< Generate ANADETEC on upwards crossing only. */ - NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down /**< Generate ANADETEC on downwards crossing only. */ -} nrf_lpcomp_detect_t; - -/** - * @enum nrf_lpcomp_task_t - * @brief LPCOMP tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), /**< LPCOMP start sampling task. */ - NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), /**< LPCOMP stop sampling task. */ - NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) /**< Sample comparator value. */ -} nrf_lpcomp_task_t; /*lint -restore*/ - - -/** - * @enum nrf_lpcomp_event_t - * @brief LPCOMP events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), /**< LPCOMP is ready and output is valid. */ - NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), /**< Input voltage crossed the threshold going down. */ - NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), /**< Input voltage crossed the threshold going up. */ - NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) /**< Input voltage crossed the threshold in any direction. */ -} nrf_lpcomp_event_t; /*lint -restore*/ - -/** - * @enum nrf_lpcomp_short_mask_t - * @brief LPCOMP shorts masks. - */ -typedef enum -{ - NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Short between CROSS event and STOP task. */ - NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Short between UP event and STOP task. */ - NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Short between DOWN event and STOP task. */ - NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Short between READY event and STOP task. */ - NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Short between READY event and SAMPLE task. */ -} nrf_lpcomp_short_mask_t; - -#ifdef LPCOMP_FEATURE_HYST_PRESENT -/** - * @enum nrf_lpcomp_hysteresis_t - * @brief LPCOMP hysteresis. - */ -typedef enum -{ - NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, /**< Comparator hysteresis disabled. */ - NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typ. 50 mV). */ -}nrf_lpcomp_hysteresis_t; -#endif // LPCOMP_FEATURE_HYST_PRESENT - -/** @brief LPCOMP configuration. */ -typedef struct -{ - nrf_lpcomp_ref_t reference; /**< LPCOMP reference. */ - nrf_lpcomp_detect_t detection; /**< LPCOMP detection type. */ -#ifdef LPCOMP_FEATURE_HYST_PRESENT - nrf_lpcomp_hysteresis_t hyst; /**< LPCOMP hysteresis. */ -#endif // LPCOMP_FEATURE_HYST_PRESENT -} nrf_lpcomp_config_t; - -/** Default LPCOMP configuration. */ -#define NRF_LPCOMP_CONFIG_DEFAULT { NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT, NRF_LPCOMP_DETECT_DOWN } - -/** - * @brief Function for configuring LPCOMP. - * - * This function powers on LPCOMP and configures it. LPCOMP is in DISABLE state after configuration, - * so it must be enabled before using it. All shorts are inactive, events are cleared, and LPCOMP is stopped. - * - * @param[in] p_config Configuration. - */ -__STATIC_INLINE void nrf_lpcomp_configure(const nrf_lpcomp_config_t * p_config) -{ - NRF_LPCOMP->TASKS_STOP = 1; - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; - NRF_LPCOMP->REFSEL = - (p_config->reference << LPCOMP_REFSEL_REFSEL_Pos) & LPCOMP_REFSEL_REFSEL_Msk; - - //If external source is choosen extract analog reference index. - if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef) - { - uint32_t extref = p_config->reference >> 16; - NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & LPCOMP_EXTREFSEL_EXTREFSEL_Msk; - } - - NRF_LPCOMP->ANADETECT = - (p_config->detection << LPCOMP_ANADETECT_ANADETECT_Pos) & LPCOMP_ANADETECT_ANADETECT_Msk; -#ifdef LPCOMP_FEATURE_HYST_PRESENT - NRF_LPCOMP->HYST = ((p_config->hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk; -#endif //LPCOMP_FEATURE_HYST_PRESENT - NRF_LPCOMP->SHORTS = 0; - NRF_LPCOMP->INTENCLR = LPCOMP_INTENCLR_CROSS_Msk | LPCOMP_INTENCLR_UP_Msk | - LPCOMP_INTENCLR_DOWN_Msk | LPCOMP_INTENCLR_READY_Msk; -} - - -/** - * @brief Function for selecting the LPCOMP input. - * - * This function selects the active input of LPCOMP. - * - * @param[in] input Input to be selected. - */ -__STATIC_INLINE void nrf_lpcomp_input_select(nrf_lpcomp_input_t input) -{ - uint32_t lpcomp_enable_state = NRF_LPCOMP->ENABLE; - - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; - NRF_LPCOMP->PSEL = - ((uint32_t)input << LPCOMP_PSEL_PSEL_Pos) | (NRF_LPCOMP->PSEL & ~LPCOMP_PSEL_PSEL_Msk); - NRF_LPCOMP->ENABLE = lpcomp_enable_state; -} - - -/** - * @brief Function for enabling the Low Power Comparator. - * - * This function enables LPCOMP. - * - */ -__STATIC_INLINE void nrf_lpcomp_enable(void) -{ - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Enabled << LPCOMP_ENABLE_ENABLE_Pos; - NRF_LPCOMP->EVENTS_READY = 0; - NRF_LPCOMP->EVENTS_DOWN = 0; - NRF_LPCOMP->EVENTS_UP = 0; - NRF_LPCOMP->EVENTS_CROSS = 0; -} - - -/** - * @brief Function for disabling the Low Power Comparator. - * - * This function disables LPCOMP. - * - */ -__STATIC_INLINE void nrf_lpcomp_disable(void) -{ - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; -} - - -/** - * @brief Function for getting the last LPCOMP compare result. - * - * @return The last compare result. If 0 then VIN+ < VIN-, if 1 then the opposite. - */ -__STATIC_INLINE uint32_t nrf_lpcomp_result_get(void) -{ - return (uint32_t)NRF_LPCOMP->RESULT; -} - - -/** - * @brief Function for enabling interrupts from LPCOMP. - * - * @param[in] lpcomp_int_mask Mask of interrupts to be enabled. - * - * @sa nrf_lpcomp_int_disable() - * @sa nrf_lpcomp_int_enable_check() - */ -__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask) -{ - NRF_LPCOMP->INTENSET = lpcomp_int_mask; -} - - -/** - * @brief Function for disabling interrupts from LPCOMP. - * - * @param[in] lpcomp_int_mask Mask of interrupts to be disabled. - * - * @sa nrf_lpcomp_int_enable() - * @sa nrf_lpcomp_int_enable_check() - */ -__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask) -{ - NRF_LPCOMP->INTENCLR = lpcomp_int_mask; -} - - -/** - * @brief Function for getting the enabled interrupts of LPCOMP. - * - * @param[in] lpcomp_int_mask Mask of interrupts to be checked. - * - * @retval true If any of interrupts of the specified mask are enabled. - * - * @sa nrf_lpcomp_int_enable() - * @sa nrf_lpcomp_int_disable() - */ -__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask) -{ - return (NRF_LPCOMP->INTENSET & lpcomp_int_mask); // when read this register will return the value of INTEN. -} - - -/** - * @brief Function for getting the address of a specific LPCOMP task register. - * - * @param[in] lpcomp_task LPCOMP task. - * - * @return The address of the specified LPCOMP task. - */ -__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task) -{ - return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_task); -} - - -/** - * @brief Function for getting the address of a specific LPCOMP event register. - * - * @param[in] lpcomp_event LPCOMP event. - * - * @return The address of the specified LPCOMP event. - */ -__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event) -{ - return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event); -} - - -/** - * @brief Function for setting LPCOMP shorts. - * - * @param[in] lpcomp_short_mask LPCOMP shorts by mask. - * - */ -__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask) -{ - NRF_LPCOMP->SHORTS |= lpcomp_short_mask; -} - - -/** - * @brief Function for clearing LPCOMP shorts by mask. - * - * @param[in] lpcomp_short_mask LPCOMP shorts to be cleared. - * - */ -__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask) -{ - NRF_LPCOMP->SHORTS &= ~lpcomp_short_mask; -} - - -/** - * @brief Function for setting a specific LPCOMP task. - * - * @param[in] lpcomp_task LPCOMP task to be set. - * - */ -__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_task) ) = 1; -} - - -/** - * @brief Function for clearing a specific LPCOMP event. - * - * @param[in] lpcomp_event LPCOMP event to be cleared. - * - */ -__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event) ) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for getting the state of a specific LPCOMP event. - * - * @retval true If the specified LPCOMP event is active. - * - */ -__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event) -{ - return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event)); -} - - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_LPCOMP_H_ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_nvmc.c b/lib/sdk/components/drivers_nrf/hal/nrf_nvmc.c deleted file mode 100644 index e535ed6..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_nvmc.c +++ /dev/null @@ -1,136 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - *@file - *@brief NMVC driver implementation - */ - -#include -#include "nrf.h" -#include "nrf_nvmc.h" - - -static inline void wait_for_flash_ready(void) -{ - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {;} -} - - -void nrf_nvmc_page_erase(uint32_t address) -{ - // Enable erase. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een; - __ISB(); - __DSB(); - - // Erase the page - NRF_NVMC->ERASEPAGE = address; - wait_for_flash_ready(); - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - - -void nrf_nvmc_write_byte(uint32_t address, uint8_t value) -{ - uint32_t byte_shift = address & (uint32_t)0x03; - uint32_t address32 = address & ~byte_shift; // Address to the word this byte is in. - uint32_t value32 = (*(uint32_t*)address32 & ~((uint32_t)0xFF << (byte_shift << (uint32_t)3))); - value32 = value32 + ((uint32_t)value << (byte_shift << 3)); - - // Enable write. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; - __ISB(); - __DSB(); - - *(uint32_t*)address32 = value32; - wait_for_flash_ready(); - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - - -void nrf_nvmc_write_word(uint32_t address, uint32_t value) -{ - // Enable write. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; - __ISB(); - __DSB(); - - *(uint32_t*)address = value; - wait_for_flash_ready(); - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - - -void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes) -{ - for (uint32_t i = 0; i < num_bytes; i++) - { - nrf_nvmc_write_byte(address + i, src[i]); - } -} - - -void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words) -{ - // Enable write. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; - __ISB(); - __DSB(); - - for (uint32_t i = 0; i < num_words; i++) - { - ((uint32_t*)address)[i] = src[i]; - wait_for_flash_ready(); - } - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_nvmc.h b/lib/sdk/components/drivers_nrf/hal/nrf_nvmc.h deleted file mode 100644 index c2ec89e..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_nvmc.h +++ /dev/null @@ -1,125 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief NMVC driver API. - */ - -#ifndef NRF_NVMC_H__ -#define NRF_NVMC_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @defgroup nrf_nvmc Non-volatile memory controller - * @{ - * @ingroup nrf_drivers - * @brief Driver for the NVMC peripheral. - * - * This driver allows writing to the non-volatile memory (NVM) regions - * of the chip. In order to write to NVM the controller must be powered - * on and the relevant page must be erased. - * - */ - - -/** - * @brief Erase a page in flash. This is required before writing to any - * address in the page. - * - * @param address Start address of the page. - */ -void nrf_nvmc_page_erase(uint32_t address); - - -/** - * @brief Write a single byte to flash. - * - * The function reads the word containing the byte, and then - * rewrites the entire word. - * - * @param address Address to write to. - * @param value Value to write. - */ -void nrf_nvmc_write_byte(uint32_t address , uint8_t value); - - -/** - * @brief Write a 32-bit word to flash. - * @param address Address to write to. - * @param value Value to write. - */ -void nrf_nvmc_write_word(uint32_t address, uint32_t value); - - -/** - * @brief Write consecutive bytes to flash. - * - * @param address Address to write to. - * @param src Pointer to data to copy from. - * @param num_bytes Number of bytes in src to write. - */ -void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes); - - -/** - * @brief Write consecutive words to flash. - * - * @param address Address to write to. - * @param src Pointer to data to copy from. - * @param num_words Number of words in src to write. - */ -void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words); - - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVMC_H__ -/** @} */ - - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_pdm.h b/lib/sdk/components/drivers_nrf/hal/nrf_pdm.h deleted file mode 100644 index 0e8eeb2..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_pdm.h +++ /dev/null @@ -1,396 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_PDM_H_ -#define NRF_PDM_H_ - -/** - * @defgroup nrf_pdm_hal PDM HAL - * @{ - * @ingroup nrf_pdm - * - * @brief @tagAPI52 Hardware abstraction layer for accessing the pulse density modulation (PDM) peripheral. - */ - -#include -#include -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -#define NRF_PDM_GAIN_MINIMUM 0x00 -#define NRF_PDM_GAIN_DEFAULT 0x28 -#define NRF_PDM_GAIN_MAXIMUM 0x50 - -typedef uint8_t nrf_pdm_gain_t; - - -/** - * @brief PDM tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer. - NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer. -} nrf_pdm_task_t; - - -/** - * @brief PDM events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer has started. - NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer has finished. - NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM. -} nrf_pdm_event_t; - - -/** - * @brief PDM interrupt masks. - */ -typedef enum -{ - NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event. - NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event. - NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event. -} nrf_pdm_int_mask_t; - -/** - * @brief PDM clock frequency. - */ -typedef enum -{ - NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz. - NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz. - NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz. -} nrf_pdm_freq_t; - - -/** - * @brief PDM operation mode. - */ -typedef enum -{ - NRF_PDM_MODE_STEREO = PDM_MODE_OPERATION_Stereo, ///< Sample and store one pair (Left + Right) of 16-bit samples per RAM word. - NRF_PDM_MODE_MONO = PDM_MODE_OPERATION_Mono ///< Sample and store two successive Left samples (16 bit each) per RAM word. -} nrf_pdm_mode_t; - - -/** - * @brief PDM sampling mode. - */ -typedef enum -{ - NRF_PDM_EDGE_LEFTFALLING = PDM_MODE_EDGE_LeftFalling, ///< Left (or mono) is sampled on falling edge of PDM_CLK. - NRF_PDM_EDGE_LEFTRISING = PDM_MODE_EDGE_LeftRising ///< Left (or mono) is sampled on rising edge of PDM_CLK. -} nrf_pdm_edge_t; - - -/** - * @brief Function for triggering a PDM task. - * - * @param[in] pdm_task PDM task. - */ -__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_task)) = 0x1UL; -} - - -/** - * @brief Function for getting the address of a PDM task register. - * - * @param[in] pdm_task PDM task. - * - * @return Address of the specified PDM task. - */ -__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task) -{ - return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)pdm_task); -} - - -/** - * @brief Function for getting the state of a PDM event. - * - * @param[in] pdm_event PDM event. - * - * @return State of the specified PDM event. - */ -__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event); -} - - -/** - * @brief Function for clearing a PDM event. - * - * @param[in] pdm_event PDM event. - */ -__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for getting the address of a PDM event register. - * - * @param[in] pdm_event PDM event. - * - * @return Address of the specified PDM event. - */ -__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event) -{ - return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event); -} - - -/** - * @brief Function for enabling PDM interrupts. - * - * @param[in] pdm_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask) -{ - NRF_PDM->INTENSET = pdm_int_mask; -} - - -/** - * @brief Function for retrieving the state of PDM interrupts. - * - * @param[in] pdm_int_mask Interrupts to check. - * - * @retval true If all specified interrupts are enabled. - * @retval false If at least one of the given interrupts is not enabled. - */ -__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask) -{ - return (bool)(NRF_PDM->INTENSET & pdm_int_mask); -} - - -/** - * @brief Function for disabling interrupts. - * - * @param pdm_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask) -{ - NRF_PDM->INTENCLR = pdm_int_mask; -} - - -/** - * @brief Function for enabling the PDM peripheral. - * - * The PDM peripheral must be enabled before use. - */ -__STATIC_INLINE void nrf_pdm_enable(void) -{ - NRF_PDM->ENABLE = (PDM_ENABLE_ENABLE_Enabled << PDM_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for disabling the PDM peripheral. - */ -__STATIC_INLINE void nrf_pdm_disable(void) -{ - NRF_PDM->ENABLE = (PDM_ENABLE_ENABLE_Disabled << PDM_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for checking if the PDM peripheral is enabled. - * - * @retval true If the PDM peripheral is enabled. - * @retval false If the PDM peripheral is not enabled. - */ -__STATIC_INLINE bool nrf_pdm_enable_check(void) -{ - return (NRF_PDM->ENABLE == (PDM_ENABLE_ENABLE_Enabled << PDM_ENABLE_ENABLE_Pos)); -} - - -/** - * @brief Function for setting the PDM operation mode. - * - * @param[in] pdm_mode PDM operation mode. - * @param[in] pdm_edge PDM sampling mode. - */ -__STATIC_INLINE void nrf_pdm_mode_set(nrf_pdm_mode_t pdm_mode, nrf_pdm_edge_t pdm_edge) -{ - NRF_PDM->MODE = ((pdm_mode << PDM_MODE_OPERATION_Pos) & PDM_MODE_OPERATION_Msk) - | ((pdm_edge << PDM_MODE_EDGE_Pos) & PDM_MODE_EDGE_Msk); -} - - -/** - * @brief Function for getting the PDM operation mode. - * - * @param[out] p_pdm_mode PDM operation mode. - * @param[out] p_pdm_edge PDM sampling mode. - */ -__STATIC_INLINE void nrf_pdm_mode_get(nrf_pdm_mode_t * p_pdm_mode, nrf_pdm_edge_t * p_pdm_edge) -{ - uint32_t mode = NRF_PDM->MODE; - *p_pdm_mode = (nrf_pdm_mode_t)((mode & PDM_MODE_OPERATION_Msk ) >> PDM_MODE_OPERATION_Pos); - *p_pdm_edge = (nrf_pdm_edge_t)((mode & PDM_MODE_EDGE_Msk ) >> PDM_MODE_EDGE_Pos); -} - - -/** - * @brief Function for setting the PDM clock frequency. - * - * @param[in] pdm_freq PDM clock frequency. - */ -__STATIC_INLINE void nrf_pdm_clock_set(nrf_pdm_freq_t pdm_freq) -{ - NRF_PDM->PDMCLKCTRL = ((pdm_freq << PDM_PDMCLKCTRL_FREQ_Pos) & PDM_PDMCLKCTRL_FREQ_Msk); -} - - -/** - * @brief Function for getting the PDM clock frequency. - */ -__STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void) -{ - return (nrf_pdm_freq_t) ((NRF_PDM->PDMCLKCTRL << PDM_PDMCLKCTRL_FREQ_Pos) & PDM_PDMCLKCTRL_FREQ_Msk); -} - - -/** - * @brief Function for setting up the PDM pins. - * - * @param[in] psel_clk CLK pin number. - * @param[in] psel_din DIN pin number. - */ -__STATIC_INLINE void nrf_pdm_psel_connect(uint32_t psel_clk, uint32_t psel_din) -{ - NRF_PDM->PSEL.CLK = psel_clk; - NRF_PDM->PSEL.DIN = psel_din; -} - -/** - * @brief Function for disconnecting the PDM pins. - */ -__STATIC_INLINE void nrf_pdm_psel_disconnect() -{ - NRF_PDM->PSEL.CLK = ((PDM_PSEL_CLK_CONNECT_Disconnected << PDM_PSEL_CLK_CONNECT_Pos) - & PDM_PSEL_CLK_CONNECT_Msk); - NRF_PDM->PSEL.DIN = ((PDM_PSEL_DIN_CONNECT_Disconnected << PDM_PSEL_DIN_CONNECT_Pos) - & PDM_PSEL_DIN_CONNECT_Msk); -} - - -/** - * @brief Function for setting the PDM gain. - * - * @param[in] gain_l Left channel gain. - * @param[in] gain_r Right channel gain. - */ -__STATIC_INLINE void nrf_pdm_gain_set(nrf_pdm_gain_t gain_l, nrf_pdm_gain_t gain_r) -{ - NRF_PDM->GAINL = gain_l; - NRF_PDM->GAINR = gain_r; -} - - -/** - * @brief Function for getting the PDM gain. - * - * @param[out] p_gain_l Left channel gain. - * @param[out] p_gain_r Right channel gain. - */ -__STATIC_INLINE void nrf_pdm_gain_get(nrf_pdm_gain_t * p_gain_l, nrf_pdm_gain_t * p_gain_r) -{ - *p_gain_l = NRF_PDM->GAINL; - *p_gain_r = NRF_PDM->GAINR; -} - - -/** - * @brief Function for setting the PDM sample buffer. - * - * @param[in] p_buffer Pointer to the RAM address where samples should be written with EasyDMA. - * @param[in] num Number of samples to allocate memory for in EasyDMA mode. - * - * The amount of allocated RAM depends on the operation mode. - * - For stereo mode: N 32-bit words. - * - For mono mode: Ceil(N/2) 32-bit words. - */ -__STATIC_INLINE void nrf_pdm_buffer_set(uint32_t * p_buffer, uint32_t num) -{ - NRF_PDM->SAMPLE.PTR = (uint32_t)p_buffer; - NRF_PDM->SAMPLE.MAXCNT = num; -} - -/** - * @brief Function for getting the current PDM sample buffer address. - * - * @return Pointer to the current sample buffer. - */ -__STATIC_INLINE uint32_t * nrf_pdm_buffer_get() -{ - return (uint32_t *)NRF_PDM->SAMPLE.PTR; -} - - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_PDM_H_ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_peripherals.h b/lib/sdk/components/drivers_nrf/hal/nrf_peripherals.h deleted file mode 100644 index 3e45850..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_peripherals.h +++ /dev/null @@ -1,73 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_PERIPHERALS_H -#define NRF_PERIPHERALS_H - -/*lint ++flb "Enter library region */ - -#ifdef NRF51422 -#include "nrf51422_peripherals.h" -#endif - -#ifdef NRF51802 -#include "nrf51802_peripherals.h" -#endif - -#ifdef NRF51822 -#include "nrf51822_peripherals.h" -#endif - -#ifdef NRF52810_XXAA -#include "nrf52810_peripherals.h" -#endif - -#ifdef NRF52832_XXAA -#include "nrf52832_peripherals.h" -#endif - -#ifdef NRF52840_XXAA -#include "nrf52840_peripherals.h" -#endif - - -/*lint --flb "Leave library region" */ - -#endif /* NRF_PERIPHERALS_H */ - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_power.h b/lib/sdk/components/drivers_nrf/hal/nrf_power.h deleted file mode 100644 index dc16978..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_power.h +++ /dev/null @@ -1,1065 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_POWER_H__ -#define NRF_POWER_H__ - -/** - * @ingroup nrf_power - * @defgroup nrf_power_hal POWER HAL - * @{ - * - * Hardware access layer for (POWER) peripheral. - */ -#include "nrf.h" -#include "sdk_config.h" -#include "nordic_common.h" -#include "nrf_assert.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) -#define NRF_POWER_HAS_RAMSTATUS 1 -#else -#define NRF_POWER_HAS_RAMSTATUS 0 -#endif - -/** - * @name The implemented functionality - * @{ - * - * Macros that defines functionality that is implemented into POWER peripheral. - */ -#if defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief The fact that sleep events are present - * - * In some MCUs there is possibility to process sleep entering and exiting - * events. - */ -#define NRF_POWER_HAS_SLEEPEVT 1 -#else -#define NRF_POWER_HAS_SLEEPEVT 0 -#endif - -#if defined(POWER_RAM_POWER_S0POWER_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief The fact that RAMPOWER registers are present - * - * After nRF51, new way to manage RAM power was implemented. - * Special registers, one for every RAM block that makes it possible to - * power ON or OFF RAM segments and turn ON and OFF RAM retention in system OFF - * state. - */ -#define NRF_POWER_HAS_RAMPOWER_REGS 1 -#else -#define NRF_POWER_HAS_RAMPOWER_REGS 0 -#endif - -#if defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief Auxiliary definition to mark the fact that VDDH is present - * - * This definition can be used in a code to decide if the part with VDDH - * related settings should be implemented. - */ -#define NRF_POWER_HAS_VDDH 1 -#else -#define NRF_POWER_HAS_VDDH 0 -#endif - -#if defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief The fact that power module manages USB regulator - * - * In devices that have USB, power peripheral manages also connection - * detection and USB power regulator, that converts 5 V to 3.3 V - * used by USBD peripheral. - */ -#define NRF_POWER_HAS_USBREG 1 -#else -#define NRF_POWER_HAS_USBREG 0 -#endif -/** @} */ - -/* ------------------------------------------------------------------------------------------------ - * Begin of automatically generated part - * ------------------------------------------------------------------------------------------------ - */ - -/** - * @brief POWER tasks - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode */ - NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low power mode (variable latency) */ -}nrf_power_task_t; /*lint -restore */ - -/** - * @brief POWER events - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning */ -#if NRF_POWER_HAS_SLEEPEVT - NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep */ - NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep */ -#endif -#if NRF_POWER_HAS_USBREG - NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS */ - NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS */ - NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3 V supply ready */ -#endif -}nrf_power_event_t; /*lint -restore */ - -/** - * @brief POWER interrupts - */ -typedef enum -{ - NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event */ -#if NRF_POWER_HAS_SLEEPEVT - NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event */ - NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event */ -#endif -#if NRF_POWER_HAS_USBREG - NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event */ - NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event */ - NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event */ -#endif -}nrf_power_int_mask_t; - -/** - * @brief Function for activating a specific POWER task. - * - * @param task Task. - */ -__STATIC_INLINE void nrf_power_task_trigger(nrf_power_task_t task); - -/** - * @brief Function for returning the address of a specific POWER task register. - * - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_power_task_address_get(nrf_power_task_t task); - -/** - * @brief Function for clearing a specific event. - * - * @param event Event. - */ -__STATIC_INLINE void nrf_power_event_clear(nrf_power_event_t event); - -/** - * @brief Function for returning the state of a specific event. - * - * @param event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_power_event_check(nrf_power_event_t event); - -/** - * @brief Function for getting and clearing the state of specific event - * - * This function checks the state of the event and clears it. - * - * @param event Event. - * - * @retval true If the event was set. - * @retval false If the event was not set. - */ -__STATIC_INLINE bool nrf_power_event_get_and_clear(nrf_power_event_t event); - -/** - * @brief Function for returning the address of a specific POWER event register. - * - * @param event Event. - * - * @return Address. - */ -__STATIC_INLINE uint32_t nrf_power_event_address_get(nrf_power_event_t event); - -/** - * @brief Function for enabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_power_int_enable(uint32_t int_mask); - -/** - * @brief Function for retrieving the state of selected interrupts. - * - * @param int_mask Interrupts mask. - * - * @retval true If any of selected interrupts is enabled. - * @retval false If none of selected interrupts is enabled. - */ -__STATIC_INLINE bool nrf_power_int_enable_check(uint32_t int_mask); - -/** - * @brief Function for retrieving the information about enabled interrupts. - * - * @return The flags of enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_power_int_enable_get(void); - -/** - * @brief Function for disabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_power_int_disable(uint32_t int_mask); - - -/** @} */ /* End of nrf_power_hal */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/* ------------------------------------------------------------------------------------------------ - * Internal functions - */ - -/** - * @internal - * @brief Internal function for getting task/event register address - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile uint32_t * nrf_power_regptr_get(uint32_t offset) -{ - return (volatile uint32_t *)(((uint8_t *)NRF_POWER) + (uint32_t)offset); -} - -/** - * @internal - * @brief Internal function for getting task/event register address - constant version - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile const uint32_t * nrf_power_regptr_get_c( - uint32_t offset) -{ - return (volatile const uint32_t *)(((uint8_t *)NRF_POWER) + - (uint32_t)offset); -} - -/* ------------------------------------------------------------------------------------------------ - * Interface functions definitions - */ - -void nrf_power_task_trigger(nrf_power_task_t task) -{ - *(nrf_power_regptr_get((uint32_t)task)) = 1UL; -} - -uint32_t nrf_power_task_address_get(nrf_power_task_t task) -{ - return (uint32_t)nrf_power_regptr_get_c((uint32_t)task); -} - -void nrf_power_event_clear(nrf_power_event_t event) -{ - *(nrf_power_regptr_get((uint32_t)event)) = 0UL; -} - -bool nrf_power_event_check(nrf_power_event_t event) -{ - return (bool)*nrf_power_regptr_get_c((uint32_t)event); -} - -bool nrf_power_event_get_and_clear(nrf_power_event_t event) -{ - bool ret = nrf_power_event_check(event); - if (ret) - { - nrf_power_event_clear(event); - } - return ret; -} - -uint32_t nrf_power_event_address_get(nrf_power_event_t event) -{ - return (uint32_t)nrf_power_regptr_get_c((uint32_t)event); -} - -void nrf_power_int_enable(uint32_t int_mask) -{ - NRF_POWER->INTENSET = int_mask; -} - -bool nrf_power_int_enable_check(uint32_t int_mask) -{ - return !!(NRF_POWER->INTENSET & int_mask); -} - -uint32_t nrf_power_int_enable_get(void) -{ - return NRF_POWER->INTENSET; -} - -void nrf_power_int_disable(uint32_t int_mask) -{ - NRF_POWER->INTENCLR = int_mask; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/* ------------------------------------------------------------------------------------------------ - * End of automatically generated part - * ------------------------------------------------------------------------------------------------ - */ -/** - * @ingroup nrf_power_hal - * @{ - */ - -/** - * @brief Reset reason - */ -typedef enum -{ - NRF_POWER_RESETREAS_RESETPIN_MASK = POWER_RESETREAS_RESETPIN_Msk, /*!< Bit mask of RESETPIN field. *///!< NRF_POWER_RESETREAS_RESETPIN_MASK - NRF_POWER_RESETREAS_DOG_MASK = POWER_RESETREAS_DOG_Msk , /*!< Bit mask of DOG field. */ //!< NRF_POWER_RESETREAS_DOG_MASK - NRF_POWER_RESETREAS_SREQ_MASK = POWER_RESETREAS_SREQ_Msk , /*!< Bit mask of SREQ field. */ //!< NRF_POWER_RESETREAS_SREQ_MASK - NRF_POWER_RESETREAS_LOCKUP_MASK = POWER_RESETREAS_LOCKUP_Msk , /*!< Bit mask of LOCKUP field. */ //!< NRF_POWER_RESETREAS_LOCKUP_MASK - NRF_POWER_RESETREAS_OFF_MASK = POWER_RESETREAS_OFF_Msk , /*!< Bit mask of OFF field. */ //!< NRF_POWER_RESETREAS_OFF_MASK -#if defined(POWER_RESETREAS_LPCOMP_Msk) || defined(__SDK_DOXYGEN__) - NRF_POWER_RESETREAS_LPCOMP_MASK = POWER_RESETREAS_LPCOMP_Msk , /*!< Bit mask of LPCOMP field. */ //!< NRF_POWER_RESETREAS_LPCOMP_MASK -#endif - NRF_POWER_RESETREAS_DIF_MASK = POWER_RESETREAS_DIF_Msk , /*!< Bit mask of DIF field. */ //!< NRF_POWER_RESETREAS_DIF_MASK -#if defined(POWER_RESETREAS_NFC_Msk) || defined(__SDK_DOXYGEN__) - NRF_POWER_RESETREAS_NFC_MASK = POWER_RESETREAS_NFC_Msk , /*!< Bit mask of NFC field. */ -#endif -#if defined(POWER_RESETREAS_VBUS_Msk) || defined(__SDK_DOXYGEN__) - NRF_POWER_RESETREAS_VBUS_MASK = POWER_RESETREAS_VBUS_Msk , /*!< Bit mask of VBUS field. */ -#endif -}nrf_power_resetreas_mask_t; - -#if NRF_POWER_HAS_USBREG -/** - * @brief USBREGSTATUS register bit masks - * - * @sa nrf_power_usbregstatus_get - */ -typedef enum -{ - NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed */ - NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3 V supply ready */ -}nrf_power_usbregstatus_mask_t; -#endif - -#if NRF_POWER_HAS_RAMSTATUS -/** - * @brief RAM blocks numbers - * - * @sa nrf_power_ramblock_mask_t - * @note - * Ram blocks has to been used in nrf51. - * In new CPU ram is divided into segments and this functionality is depreciated. - * For the newer MCU see the PS for mapping between internal RAM and RAM blocks, - * because this mapping is not 1:1, and functions related to old style blocks - * should not be used. - */ -typedef enum -{ - NRF_POWER_RAMBLOCK0 = POWER_RAMSTATUS_RAMBLOCK0_Pos, - NRF_POWER_RAMBLOCK1 = POWER_RAMSTATUS_RAMBLOCK1_Pos, - NRF_POWER_RAMBLOCK2 = POWER_RAMSTATUS_RAMBLOCK2_Pos, - NRF_POWER_RAMBLOCK3 = POWER_RAMSTATUS_RAMBLOCK3_Pos -}nrf_power_ramblock_t; - -/** - * @brief RAM blocks masks - * - * @sa nrf_power_ramblock_t - */ - -typedef enum -{ - NRF_POWER_RAMBLOCK0_MASK = POWER_RAMSTATUS_RAMBLOCK0_Msk, - NRF_POWER_RAMBLOCK1_MASK = POWER_RAMSTATUS_RAMBLOCK1_Msk, - NRF_POWER_RAMBLOCK2_MASK = POWER_RAMSTATUS_RAMBLOCK2_Msk, - NRF_POWER_RAMBLOCK3_MASK = POWER_RAMSTATUS_RAMBLOCK3_Msk -}nrf_power_ramblock_mask_t; -#endif // NRF_POWER_HAS_RAMSTATUS - -/** - * @brief RAM power state position of the bits - * - * @sa nrf_power_onoffram_mask_t - */ -typedef enum -{ - NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */ - NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */ - NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */ - NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */ - NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */ - NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */ - NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */ - NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */ -}nrf_power_onoffram_t; - -/** - * @brief RAM power state bit masks - * - * @sa nrf_power_onoffram_t - */ -typedef enum -{ - NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */ - NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */ - NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */ - NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */ - NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */ - NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */ - NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */ - NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */ -}nrf_power_onoffram_mask_t; - -/** - * @brief Power failure comparator thresholds - */ -typedef enum -{ - NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1 V */ - NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3 V */ - NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5 V */ - NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7 V */ -#if defined(POWER_POFCON_THRESHOLD_V17) || defined(__SDK_DOXYGEN__) - NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7 V */ - NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8 V */ - NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9 V */ - NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0 V */ - NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2 V */ - NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4 V */ - NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6 V */ - NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8 V */ -#endif -}nrf_power_pof_thr_t; - -#if NRF_POWER_HAS_VDDH -/** - * @brief Power failure comparator thresholds for VDDH - */ -typedef enum -{ - NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7 V */ - NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8 V */ - NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9 V */ - NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0 V */ - NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1 V */ - NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2 V */ - NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3 V */ - NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4 V */ - NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5 V */ - NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6 V */ - NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7 V */ - NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8 V */ - NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9 V */ - NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0 V */ - NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1 V */ - NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2 V */ -}nrf_power_pof_thrvddh_t; - -/** - * @brief Main regulator status - */ -typedef enum -{ - NRF_POWER_MAINREGSTATUS_NORMAL = POWER_MAINREGSTATUS_MAINREGSTATUS_Normal, /**< Normal voltage mode. Voltage supplied on VDD. */ - NRF_POWER_MAINREGSTATUS_HIGH = POWER_MAINREGSTATUS_MAINREGSTATUS_High /**< High voltage mode. Voltage supplied on VDDH. */ -}nrf_power_mainregstatus_t; - -#endif /* NRF_POWER_HAS_VDDH */ - -#if NRF_POWER_HAS_RAMPOWER_REGS -/** - * @brief Bit positions for RAMPOWER register - * - * All possible bits described, even if they are not used in selected MCU. - */ -typedef enum -{ - /** Keep RAM section S0 ON in System ON mode */ - NRF_POWER_RAMPOWER_S0POWER = POWER_RAM_POWER_S0POWER_Pos, - NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode */ - NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode */ - NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode */ - NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode */ - NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode */ - NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode */ - NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode */ - NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode */ - NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode */ - NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode */ - NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode */ - NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode */ - NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode */ - NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode */ - NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode */ - - /** Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S0RETENTION = POWER_RAM_POWER_S0RETENTION_Pos, - NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF */ -}nrf_power_rampower_t; - -#if defined ( __CC_ARM ) -#pragma push -#pragma diag_suppress 66 -#endif -/** - * @brief Bit masks for RAMPOWER register - * - * All possible bits described, even if they are not used in selected MCU. - */ -typedef enum -{ - NRF_POWER_RAMPOWER_S0POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S0POWER , - NRF_POWER_RAMPOWER_S1POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S1POWER , - NRF_POWER_RAMPOWER_S2POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S2POWER , - NRF_POWER_RAMPOWER_S3POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S3POWER , - NRF_POWER_RAMPOWER_S4POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S4POWER , - NRF_POWER_RAMPOWER_S5POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S5POWER , - NRF_POWER_RAMPOWER_S7POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S7POWER , - NRF_POWER_RAMPOWER_S8POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S8POWER , - NRF_POWER_RAMPOWER_S9POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S9POWER , - NRF_POWER_RAMPOWER_S10POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S10POWER, - NRF_POWER_RAMPOWER_S11POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S11POWER, - NRF_POWER_RAMPOWER_S12POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S12POWER, - NRF_POWER_RAMPOWER_S13POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S13POWER, - NRF_POWER_RAMPOWER_S14POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S14POWER, - NRF_POWER_RAMPOWER_S15POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S15POWER, - - NRF_POWER_RAMPOWER_S0RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S0RETENTION , - NRF_POWER_RAMPOWER_S1RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S1RETENTION , - NRF_POWER_RAMPOWER_S2RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S2RETENTION , - NRF_POWER_RAMPOWER_S3RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S3RETENTION , - NRF_POWER_RAMPOWER_S4RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S4RETENTION , - NRF_POWER_RAMPOWER_S5RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S5RETENTION , - NRF_POWER_RAMPOWER_S7RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S7RETENTION , - NRF_POWER_RAMPOWER_S8RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S8RETENTION , - NRF_POWER_RAMPOWER_S9RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S9RETENTION , - NRF_POWER_RAMPOWER_S10RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S10RETENTION, - NRF_POWER_RAMPOWER_S11RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S11RETENTION, - NRF_POWER_RAMPOWER_S12RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S12RETENTION, - NRF_POWER_RAMPOWER_S13RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S13RETENTION, - NRF_POWER_RAMPOWER_S14RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S14RETENTION, - NRF_POWER_RAMPOWER_S15RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S15RETENTION, -}nrf_power_rampower_mask_t; -#if defined ( __CC_ARM ) -#pragma pop -#endif -#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ - - -/** - * @brief Get reset reason mask - * - * Function returns the reset reason. - * Unless cleared, the RESETREAS register is cumulative. - * A field is cleared by writing '1' to it (see @ref nrf_power_resetreas_clear). - * If none of the reset sources are flagged, - * this indicates that the chip was reset from the on-chip reset generator, - * which indicates a power-on-reset or a brown out reset. - * - * @return The mask of reset reasons constructed with @ref nrf_power_resetreas_mask_t. - */ -__STATIC_INLINE uint32_t nrf_power_resetreas_get(void); - -/** - * @brief Clear selected reset reason field - * - * Function clears selected reset reason fields. - * - * @param[in] mask The mask constructed from @ref nrf_power_resetreas_mask_t enumerator values. - * @sa nrf_power_resetreas_get - */ -__STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask); - -#if NRF_POWER_HAS_RAMSTATUS -/** - * @brief Get RAMSTATUS register - * - * Returns the masks of RAM blocks that are powered ON. - * - * @return Value with bits sets according to masks in @ref nrf_power_ramblock_mask_t. - */ -__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void); -#endif // NRF_POWER_HAS_RAMSTATUS - -/** - * @brief Go to system OFF - * - * This function puts the CPU into system off mode. - * The only way to wake up the CPU is by reset. - * - * @note This function never returns. - */ -__STATIC_INLINE void nrf_power_system_off(void); - -/** - * @brief Set power failure comparator configuration - * - * Sets power failure comparator threshold and enable/disable flag. - * - * @param enabled Set to true if power failure comparator should be enabled. - * @param thr Set the voltage threshold value. - * - * @note - * If VDDH settings is present in the device, this function would - * clear it settings (set to the lowest voltage). - * Use @ref nrf_power_pofcon_vddh_set function to set new value. - */ -__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr); - -/** - * @brief Get power failure comparator configuration - * - * Get power failure comparator threshold and enable bit. - * - * @param[out] p_enabled Function would set this boolean variable to true - * if power failure comparator is enabled. - * The pointer can be NULL if we do not need this information. - * @return Threshold setting for power failure comparator - */ -__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled); - -#if NRF_POWER_HAS_VDDH -/** - * @brief Set VDDH power failure comparator threshold - * - * @param thr Threshold to be set - */ -__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr); - -/** - * @brief Get VDDH power failure comparator threshold - * - * @return VDDH threshold currently configured - */ -__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void); -#endif - -/** - * @brief Set general purpose retention register - * - * @param val Value to be set in the register - */ -__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val); - -/** - * @brief Get general purpose retention register - * - * @return The value from the register - */ -__STATIC_INLINE uint8_t nrf_power_gpregret_get(void); - -#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief Set general purpose retention register 2 - * - * @param val Value to be set in the register - * @note This register is not available in nrf51 MCU family - */ -__STATIC_INLINE void nrf_power_gpregret2_set(uint8_t val); - -/** - * @brief Get general purpose retention register 2 - * - * @return The value from the register - * @note This register is not available in all MCUs. - */ -__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void); -#endif - -/** - * @brief Enable or disable DCDC converter - * - * @param enable Set true to enable or false to disable DCDC converter. - * - * @note - * If the device consist of high voltage power input (VDDH) this setting - * would relate to the converter on low voltage side (1.3 V output). - */ -__STATIC_INLINE void nrf_power_dcdcen_set(bool enable); - -/** - * @brief Get the state of DCDC converter - * - * @retval true Converter is enabled - * @retval false Converter is disabled - * - * @note - * If the device consist of high voltage power input (VDDH) this setting - * would relate to the converter on low voltage side (1.3 V output). - */ -__STATIC_INLINE bool nrf_power_dcdcen_get(void); - -#if NRF_POWER_HAS_RAMPOWER_REGS -/** - * @brief Turn ON sections in selected RAM block. - * - * This function turns ON sections in block and also block retention. - * - * @sa nrf_power_rampower_mask_t - * @sa nrf_power_rampower_mask_off - * - * @param block RAM block index. - * @param section_mask Mask of the sections created by merging - * @ref nrf_power_rampower_mask_t flags. - */ -__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask); - -/** - * @brief Turn ON sections in selected RAM block. - * - * This function turns OFF sections in block and also block retention. - * - * @sa nrf_power_rampower_mask_t - * @sa nrf_power_rampower_mask_off - * - * @param block RAM block index. - * @param section_mask Mask of the sections created by merging - * @ref nrf_power_rampower_mask_t flags. - */ -__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask); - -/** - * @brief Get the mask of ON and retention sections in selected RAM block. - * - * @param block RAM block index. - * @return Mask of sections state composed from @ref nrf_power_rampower_mask_t flags. - */ -__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block); -#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ - -#if NRF_POWER_HAS_VDDH -/** - * @brief Enable of disable DCDC converter on VDDH - * - * @param enable Set true to enable or false to disable DCDC converter. - */ -__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable); - -/** - * @brief Get the state of DCDC converter on VDDH - * - * @retval true Converter is enabled - * @retval false Converter is disabled - */ -__STATIC_INLINE bool nrf_power_dcdcen_vddh_get(void); - -/** - * @brief Get main supply status - * - * @return Current main supply status - */ -__STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void); -#endif /* NRF_POWER_HAS_VDDH */ - -#if NRF_POWER_HAS_USBREG -/** - * - * @return Get the whole USBREGSTATUS register - * - * @return The USBREGSTATUS register value. - * Use @ref nrf_power_usbregstatus_mask_t values for bit masking. - * - * @sa nrf_power_usbregstatus_vbusdet_get - * @sa nrf_power_usbregstatus_outrdy_get - */ -__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void); - -/** - * @brief VBUS input detection status - * - * USBDETECTED and USBREMOVED events are derived from this information - * - * @retval false VBUS voltage below valid threshold - * @retval true VBUS voltage above valid threshold - * - * @sa nrf_power_usbregstatus_get - */ -__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void); - -/** - * @brief USB supply output settling time elapsed - * - * @retval false USBREG output settling time not elapsed - * @retval true USBREG output settling time elapsed - * (same information as USBPWRRDY event) - * - * @sa nrf_power_usbregstatus_get - */ -__STATIC_INLINE bool nrf_power_usbregstatus_outrdy_get(void); -#endif /* NRF_POWER_HAS_USBREG */ - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t nrf_power_resetreas_get(void) -{ - return NRF_POWER->RESETREAS; -} - -__STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask) -{ - NRF_POWER->RESETREAS = mask; -} - -#if NRF_POWER_HAS_RAMSTATUS -__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void) -{ - return NRF_POWER->RAMSTATUS; -} -#endif // NRF_POWER_HAS_RAMSTATUS - -__STATIC_INLINE void nrf_power_system_off(void) -{ - NRF_POWER->SYSTEMOFF = POWER_SYSTEMOFF_SYSTEMOFF_Enter; - __DSB(); - - /* Solution for simulated System OFF in debug mode */ - while (true) - { - __WFE(); - } -} - -__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr) -{ - ASSERT(thr == (thr & (POWER_POFCON_THRESHOLD_Msk >> POWER_POFCON_THRESHOLD_Pos))); -#if NRF_POWER_HAS_VDDH - uint32_t pofcon = NRF_POWER->POFCON; - pofcon &= ~(POWER_POFCON_THRESHOLD_Msk | POWER_POFCON_POF_Msk); - pofcon |= -#else /* NRF_POWER_HAS_VDDH */ - NRF_POWER->POFCON = -#endif - (((uint32_t)thr) << POWER_POFCON_THRESHOLD_Pos) | - (enabled ? - (POWER_POFCON_POF_Enabled << POWER_POFCON_POF_Pos) - : - (POWER_POFCON_POF_Disabled << POWER_POFCON_POF_Pos)); -#if NRF_POWER_HAS_VDDH - NRF_POWER->POFCON = pofcon; -#endif -} - -__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled) -{ - uint32_t pofcon = NRF_POWER->POFCON; - if (NULL != p_enabled) - { - (*p_enabled) = ((pofcon & POWER_POFCON_POF_Msk) >> POWER_POFCON_POF_Pos) - == POWER_POFCON_POF_Enabled; - } - return (nrf_power_pof_thr_t)((pofcon & POWER_POFCON_THRESHOLD_Msk) >> - POWER_POFCON_THRESHOLD_Pos); -} - -#if NRF_POWER_HAS_VDDH -__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr) -{ - ASSERT(thr == (thr & (POWER_POFCON_THRESHOLDVDDH_Msk >> POWER_POFCON_THRESHOLDVDDH_Pos))); - uint32_t pofcon = NRF_POWER->POFCON; - pofcon &= ~POWER_POFCON_THRESHOLDVDDH_Msk; - pofcon |= (((uint32_t)thr) << POWER_POFCON_THRESHOLDVDDH_Pos); - NRF_POWER->POFCON = pofcon; -} - -__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void) -{ - return (nrf_power_pof_thrvddh_t)((NRF_POWER->POFCON & - POWER_POFCON_THRESHOLDVDDH_Msk) >> POWER_POFCON_THRESHOLDVDDH_Pos); -} -#endif /* NRF_POWER_HAS_VDDH */ - -__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val) -{ - NRF_POWER->GPREGRET = val; -} - -__STATIC_INLINE uint8_t nrf_power_gpregret_get(void) -{ - return NRF_POWER->GPREGRET; -} - -#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__SDK_DOXYGEN__) -void nrf_power_gpregret2_set(uint8_t val) -{ - NRF_POWER->GPREGRET2 = val; -} - -__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void) -{ - return NRF_POWER->GPREGRET2; -} -#endif - -__STATIC_INLINE void nrf_power_dcdcen_set(bool enable) -{ -#if NRF_POWER_HAS_VDDH - NRF_POWER->DCDCEN = (enable ? - POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) << - POWER_DCDCEN_DCDCEN_Pos; -#else - NRF_POWER->DCDCEN = (enable ? - POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) << - POWER_DCDCEN_DCDCEN_Pos; -#endif -} - -__STATIC_INLINE bool nrf_power_dcdcen_get(void) -{ -#if NRF_POWER_HAS_VDDH - return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) - == - (POWER_DCDCEN_DCDCEN_Enabled << POWER_DCDCEN_DCDCEN_Pos); -#else - return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) - == - (POWER_DCDCEN_DCDCEN_Enabled << POWER_DCDCEN_DCDCEN_Pos); -#endif -} - -#if NRF_POWER_HAS_RAMPOWER_REGS -__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask) -{ - ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); - NRF_POWER->RAM[block].POWERSET = section_mask; -} - -__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask) -{ - ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); - NRF_POWER->RAM[block].POWERCLR = section_mask; -} - -__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block) -{ - ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); - return NRF_POWER->RAM[block].POWER; -} -#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ - -#if NRF_POWER_HAS_VDDH -__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable) -{ - NRF_POWER->DCDCEN0 = (enable ? - POWER_DCDCEN0_DCDCEN_Enabled : POWER_DCDCEN0_DCDCEN_Disabled) << - POWER_DCDCEN0_DCDCEN_Pos; -} - -bool nrf_power_dcdcen_vddh_get(void) -{ - return (NRF_POWER->DCDCEN0 & POWER_DCDCEN0_DCDCEN_Msk) - == - (POWER_DCDCEN0_DCDCEN_Enabled << POWER_DCDCEN0_DCDCEN_Pos); -} - -nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void) -{ - return (nrf_power_mainregstatus_t)(((NRF_POWER->MAINREGSTATUS) & - POWER_MAINREGSTATUS_MAINREGSTATUS_Msk) >> - POWER_MAINREGSTATUS_MAINREGSTATUS_Pos); -} -#endif /* NRF_POWER_HAS_VDDH */ - -#if NRF_POWER_HAS_USBREG -__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void) -{ - return NRF_POWER->USBREGSTATUS; -} - -__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void) -{ - return (nrf_power_usbregstatus_get() & - NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK) != 0; -} - -__STATIC_INLINE bool nrf_power_usbregstatus_outrdy_get(void) -{ - return (nrf_power_usbregstatus_get() & - NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK) != 0; -} -#endif /* NRF_POWER_HAS_USBREG */ - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_POWER_H__ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_ppi.h b/lib/sdk/components/drivers_nrf/hal/nrf_ppi.h deleted file mode 100644 index e101254..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_ppi.h +++ /dev/null @@ -1,439 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_PPI_H__ -#define NRF_PPI_H__ - -#include -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_ppi_hal PPI HAL - * @{ - * @ingroup nrf_ppi - * @brief Hardware access layer for setting up Programmable Peripheral Interconnect (PPI) channels. - */ - -#define NRF_PPI_TASK_SET (1UL) - -/** - * @enum nrf_ppi_channel_t - * @brief PPI channels. - */ -typedef enum -{ - NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */ - NRF_PPI_CHANNEL1 = PPI_CHEN_CH1_Pos, /**< Channel 1. */ - NRF_PPI_CHANNEL2 = PPI_CHEN_CH2_Pos, /**< Channel 2. */ - NRF_PPI_CHANNEL3 = PPI_CHEN_CH3_Pos, /**< Channel 3. */ - NRF_PPI_CHANNEL4 = PPI_CHEN_CH4_Pos, /**< Channel 4. */ - NRF_PPI_CHANNEL5 = PPI_CHEN_CH5_Pos, /**< Channel 5. */ - NRF_PPI_CHANNEL6 = PPI_CHEN_CH6_Pos, /**< Channel 6. */ - NRF_PPI_CHANNEL7 = PPI_CHEN_CH7_Pos, /**< Channel 7. */ - NRF_PPI_CHANNEL8 = PPI_CHEN_CH8_Pos, /**< Channel 8. */ - NRF_PPI_CHANNEL9 = PPI_CHEN_CH9_Pos, /**< Channel 9. */ - NRF_PPI_CHANNEL10 = PPI_CHEN_CH10_Pos, /**< Channel 10. */ - NRF_PPI_CHANNEL11 = PPI_CHEN_CH11_Pos, /**< Channel 11. */ - NRF_PPI_CHANNEL12 = PPI_CHEN_CH12_Pos, /**< Channel 12. */ - NRF_PPI_CHANNEL13 = PPI_CHEN_CH13_Pos, /**< Channel 13. */ - NRF_PPI_CHANNEL14 = PPI_CHEN_CH14_Pos, /**< Channel 14. */ - NRF_PPI_CHANNEL15 = PPI_CHEN_CH15_Pos, /**< Channel 15. */ -#if (PPI_CH_NUM > 16) || defined(__SDK_DOXYGEN__) - NRF_PPI_CHANNEL16 = PPI_CHEN_CH16_Pos, /**< Channel 16. */ - NRF_PPI_CHANNEL17 = PPI_CHEN_CH17_Pos, /**< Channel 17. */ - NRF_PPI_CHANNEL18 = PPI_CHEN_CH18_Pos, /**< Channel 18. */ - NRF_PPI_CHANNEL19 = PPI_CHEN_CH19_Pos, /**< Channel 19. */ -#endif - NRF_PPI_CHANNEL20 = PPI_CHEN_CH20_Pos, /**< Channel 20. */ - NRF_PPI_CHANNEL21 = PPI_CHEN_CH21_Pos, /**< Channel 21. */ - NRF_PPI_CHANNEL22 = PPI_CHEN_CH22_Pos, /**< Channel 22. */ - NRF_PPI_CHANNEL23 = PPI_CHEN_CH23_Pos, /**< Channel 23. */ - NRF_PPI_CHANNEL24 = PPI_CHEN_CH24_Pos, /**< Channel 24. */ - NRF_PPI_CHANNEL25 = PPI_CHEN_CH25_Pos, /**< Channel 25. */ - NRF_PPI_CHANNEL26 = PPI_CHEN_CH26_Pos, /**< Channel 26. */ - NRF_PPI_CHANNEL27 = PPI_CHEN_CH27_Pos, /**< Channel 27. */ - NRF_PPI_CHANNEL28 = PPI_CHEN_CH28_Pos, /**< Channel 28. */ - NRF_PPI_CHANNEL29 = PPI_CHEN_CH29_Pos, /**< Channel 29. */ - NRF_PPI_CHANNEL30 = PPI_CHEN_CH30_Pos, /**< Channel 30. */ - NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */ -} nrf_ppi_channel_t; - -/** - * @enum nrf_ppi_channel_group_t - * @brief PPI channel groups. - */ -typedef enum -{ - NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */ - NRF_PPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */ - NRF_PPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */ - NRF_PPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */ -#if (PPI_GROUP_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_PPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */ - NRF_PPI_CHANNEL_GROUP5 = 5 /**< Channel group 5. */ -#endif -} nrf_ppi_channel_group_t; - -/** - * @enum nrf_ppi_channel_include_t - * @brief Definition of which PPI channels belong to a group. - */ -typedef enum -{ - NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */ - NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */ -} nrf_ppi_channel_include_t; - -/** - * @enum nrf_ppi_channel_enable_t - * @brief Definition if a PPI channel is enabled. - */ -typedef enum -{ - NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */ - NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */ -} nrf_ppi_channel_enable_t; - -/** - * @enum nrf_ppi_task_t - * @brief PPI tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0 */ - NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0 */ - NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1 */ - NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1 */ - NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2 */ - NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */ - NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3 */ - NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */ -#if (PPI_GROUP_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4 */ - NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */ - NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5 */ - NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5 */ -#endif - /*lint -restore*/ -} nrf_ppi_task_t; - -/** - * @brief Function for enabling a given PPI channel. - * - * @details This function enables only one channel. - * - * @param[in] channel Channel to enable. - * - * */ -__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel) -{ - NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel); -} - - -/** - * @brief Function for disabling a given PPI channel. - * - * @details This function disables only one channel. - * - * @param[in] channel Channel to disable. - */ -__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel) -{ - NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel); -} - - -/** - * @brief Function for checking if a given PPI channel is enabled. - * - * @details This function checks only one channel. - * - * @param[in] channel Channel to check. - * - * @retval NRF_PPI_CHANNEL_ENABLED If the channel is enabled. - * @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled. - * - */ -__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel) -{ - if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel))) - { - return NRF_PPI_CHANNEL_ENABLED; - } - else - { - return NRF_PPI_CHANNEL_DISABLED; - } -} - - -/** - * @brief Function for disabling all PPI channels. - */ -__STATIC_INLINE void nrf_ppi_channel_disable_all(void) -{ - NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL); -} - -/** - * @brief Function for disabling multiple PPI channels. - * - * @param[in] mask Channel mask. - */ -__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask) -{ - NRF_PPI->CHENCLR = mask; -} - -/** - * @brief Function for setting up event and task endpoints for a given PPI channel. - * - * @param[in] eep Event register address. - * - * @param[in] tep Task register address. - * - * @param[in] channel Channel to which the given endpoints are assigned. - */ -__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel, - uint32_t eep, - uint32_t tep) -{ - NRF_PPI->CH[(uint32_t) channel].EEP = eep; - NRF_PPI->CH[(uint32_t) channel].TEP = tep; -} - -#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(__SDK_DOXYGEN__) -/** - * @brief Function for setting up task endpoint for a given PPI fork. - * - * @param[in] fork_tep Task register address. - * - * @param[in] channel Channel to which the given fork endpoint is assigned. - */ -__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel, - uint32_t fork_tep) -{ - NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep; -} - -/** - * @brief Function for setting up event and task endpoints for a given PPI channel and fork. - * - * @param[in] eep Event register address. - * - * @param[in] tep Task register address. - * - * @param[in] fork_tep Fork task register address (register value). - * - * @param[in] channel Channel to which the given endpoints are assigned. - */ -__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel, - uint32_t eep, - uint32_t tep, - uint32_t fork_tep) -{ - nrf_ppi_channel_endpoint_setup(channel, eep, tep); - nrf_ppi_fork_endpoint_setup(channel, fork_tep); -} -#endif - -/** - * @brief Function for including a PPI channel in a channel group. - * - * @details This function adds only one channel to the group. - * - * @param[in] channel Channel to be included in the group. - * - * @param[in] channel_group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel)); -} - -/** - * @brief Function for including multiple PPI channels in a channel group. - * - * @details This function adds all specified channels to the group. - * - * @param[in] channel_mask Channels to be included in the group. - * - * @param[in] channel_group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask); -} - - -/** - * @brief Function for removing a PPI channel from a channel group. - * - * @details This function removes only one channel from the group. - * - * @param[in] channel Channel to be removed from the group. - * - * @param[in] channel_group Channel group. - */ -__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel)); -} - -/** - * @brief Function for removing multiple PPI channels from a channel group. - * - * @details This function removes all specified channels from the group. - * - * @param[in] channel_mask Channels to be removed from the group. - * - * @param[in] channel_group Channel group. - */ -__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask); -} - - -/** - * @brief Function for removing all PPI channels from a channel group. - * - * @param[in] group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group) -{ - NRF_PPI->CHG[(uint32_t) group] = 0; -} - - -/** - * @brief Function for enabling a channel group. - * - * @param[in] group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group) -{ - NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET; -} - - -/** - * @brief Function for disabling a channel group. - * - * @param[in] group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group) -{ - NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET; -} - - -/** - * @brief Function for setting a PPI task. - * - * @param[in] ppi_task PPI task to set. - */ -__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task) -{ - *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET; -} - - -/** - * @brief Function for returning the address of a specific PPI task register. - * - * @param[in] ppi_task PPI task. - */ -__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task) -{ - return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task); -} - -/** - * @brief Function for returning the PPI enable task address of a specific group. - * - * @param[in] group PPI group. - */ -__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group) -{ - return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN; -} - -/** - * @brief Function for returning the PPI disable task address of a specific group. - * - * @param[in] group PPI group. - */ -__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group) -{ - return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS; -} - - -/** - *@} - **/ - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_PPI_H__ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_pwm.h b/lib/sdk/components/drivers_nrf/hal/nrf_pwm.h deleted file mode 100644 index 3ec8c31..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_pwm.h +++ /dev/null @@ -1,701 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_pwm_hal PWM HAL - * @{ - * @ingroup nrf_pwm - * - * @brief @tagAPI52 Hardware access layer for managing the Pulse Width Modulation (PWM) - * peripheral. - */ - -#ifndef NRF_PWM_H__ -#define NRF_PWM_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set - * function call to specify that a given output channel shall not be - * connected to a physical pin. - */ -#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF - -/** - * @brief Number of channels in each Pointer to the peripheral registers structure. - */ -#define NRF_PWM_CHANNEL_COUNT 4 - - -/** - * @brief PWM tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_PWM_TASK_STOP = offsetof(NRF_PWM_Type, TASKS_STOP), ///< Stops PWM pulse generation on all channels at the end of the current PWM period, and stops the sequence playback. - NRF_PWM_TASK_SEQSTART0 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[0]), ///< Starts playback of sequence 0. - NRF_PWM_TASK_SEQSTART1 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[1]), ///< Starts playback of sequence 1. - NRF_PWM_TASK_NEXTSTEP = offsetof(NRF_PWM_Type, TASKS_NEXTSTEP) ///< Steps by one value in the current sequence if the decoder is set to @ref NRF_PWM_STEP_TRIGGERED mode. - /*lint -restore*/ -} nrf_pwm_task_t; - -/** - * @brief PWM events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_PWM_EVENT_STOPPED = offsetof(NRF_PWM_Type, EVENTS_STOPPED), ///< Response to STOP task, emitted when PWM pulses are no longer generated. - NRF_PWM_EVENT_SEQSTARTED0 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[0]), ///< First PWM period started on sequence 0. - NRF_PWM_EVENT_SEQSTARTED1 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[1]), ///< First PWM period started on sequence 1. - NRF_PWM_EVENT_SEQEND0 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[0]), ///< Emitted at the end of every sequence 0 when its last value has been read from RAM. - NRF_PWM_EVENT_SEQEND1 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[1]), ///< Emitted at the end of every sequence 1 when its last value has been read from RAM. - NRF_PWM_EVENT_PWMPERIODEND = offsetof(NRF_PWM_Type, EVENTS_PWMPERIODEND), ///< Emitted at the end of each PWM period. - NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the requested number of times. - /*lint -restore*/ -} nrf_pwm_event_t; - -/** - * @brief PWM interrupts. - */ -typedef enum -{ - NRF_PWM_INT_STOPPED_MASK = PWM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_PWM_INT_SEQSTARTED0_MASK = PWM_INTENSET_SEQSTARTED0_Msk, ///< Interrupt on SEQSTARTED[0] event. - NRF_PWM_INT_SEQSTARTED1_MASK = PWM_INTENSET_SEQSTARTED1_Msk, ///< Interrupt on SEQSTARTED[1] event. - NRF_PWM_INT_SEQEND0_MASK = PWM_INTENSET_SEQEND0_Msk, ///< Interrupt on SEQEND[0] event. - NRF_PWM_INT_SEQEND1_MASK = PWM_INTENSET_SEQEND1_Msk, ///< Interrupt on SEQEND[1] event. - NRF_PWM_INT_PWMPERIODEND_MASK = PWM_INTENSET_PWMPERIODEND_Msk, ///< Interrupt on PWMPERIODEND event. - NRF_PWM_INT_LOOPSDONE_MASK = PWM_INTENSET_LOOPSDONE_Msk ///< Interrupt on LOOPSDONE event. -} nrf_pwm_int_mask_t; - -/** - * @brief PWM shortcuts. - */ -typedef enum -{ - NRF_PWM_SHORT_SEQEND0_STOP_MASK = PWM_SHORTS_SEQEND0_STOP_Msk, ///< Shortcut between SEQEND[0] event and STOP task. - NRF_PWM_SHORT_SEQEND1_STOP_MASK = PWM_SHORTS_SEQEND1_STOP_Msk, ///< Shortcut between SEQEND[1] event and STOP task. - NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[0] task. - NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[1] task. - NRF_PWM_SHORT_LOOPSDONE_STOP_MASK = PWM_SHORTS_LOOPSDONE_STOP_Msk ///< Shortcut between LOOPSDONE event and STOP task. -} nrf_pwm_short_mask_t; - -/** - * @brief PWM modes of operation. - */ -typedef enum -{ - NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle). - NRF_PWM_MODE_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle). -} nrf_pwm_mode_t; - -/** - * @brief PWM base clock frequencies. - */ -typedef enum -{ - NRF_PWM_CLK_16MHz = PWM_PRESCALER_PRESCALER_DIV_1, ///< 16 MHz / 1 = 16 MHz. - NRF_PWM_CLK_8MHz = PWM_PRESCALER_PRESCALER_DIV_2, ///< 16 MHz / 2 = 8 MHz. - NRF_PWM_CLK_4MHz = PWM_PRESCALER_PRESCALER_DIV_4, ///< 16 MHz / 4 = 4 MHz. - NRF_PWM_CLK_2MHz = PWM_PRESCALER_PRESCALER_DIV_8, ///< 16 MHz / 8 = 2 MHz. - NRF_PWM_CLK_1MHz = PWM_PRESCALER_PRESCALER_DIV_16, ///< 16 MHz / 16 = 1 MHz. - NRF_PWM_CLK_500kHz = PWM_PRESCALER_PRESCALER_DIV_32, ///< 16 MHz / 32 = 500 kHz. - NRF_PWM_CLK_250kHz = PWM_PRESCALER_PRESCALER_DIV_64, ///< 16 MHz / 64 = 250 kHz. - NRF_PWM_CLK_125kHz = PWM_PRESCALER_PRESCALER_DIV_128 ///< 16 MHz / 128 = 125 kHz. -} nrf_pwm_clk_t; - -/** - * @brief PWM decoder load modes. - * - * The selected mode determines how the sequence data is read from RAM and - * spread to the compare registers. - */ -typedef enum -{ - NRF_PWM_LOAD_COMMON = PWM_DECODER_LOAD_Common, ///< 1st half word (16-bit) used in all PWM channels (0-3). - NRF_PWM_LOAD_GROUPED = PWM_DECODER_LOAD_Grouped, ///< 1st half word (16-bit) used in channels 0 and 1; 2nd word in channels 2 and 3. - NRF_PWM_LOAD_INDIVIDUAL = PWM_DECODER_LOAD_Individual, ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; 3rd in channel 2; 4th in channel 3. - NRF_PWM_LOAD_WAVE_FORM = PWM_DECODER_LOAD_WaveForm ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; ... ; 4th as the top value for the pulse generator counter. -} nrf_pwm_dec_load_t; - -/** - * @brief PWM decoder next step modes. - * - * The selected mode determines when the next value from the active sequence - * is loaded. - */ -typedef enum -{ - NRF_PWM_STEP_AUTO = PWM_DECODER_MODE_RefreshCount, ///< Automatically after the current value is played and repeated the requested number of times. - NRF_PWM_STEP_TRIGGERED = PWM_DECODER_MODE_NextStep ///< When the @ref NRF_PWM_TASK_NEXTSTEP task is triggered. -} nrf_pwm_dec_step_t; - - -/** - * @brief Type used for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_COMMON mode. - */ -typedef uint16_t nrf_pwm_values_common_t; - -/** - * @brief Structure for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_GROUPED mode. - */ -typedef struct { - uint16_t group_0; ///< Duty cycle value for group 0 (channels 0 and 1). - uint16_t group_1; ///< Duty cycle value for group 1 (channels 2 and 3). -} nrf_pwm_values_grouped_t; - -/** - * @brief Structure for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_INDIVIDUAL mode. - */ -typedef struct -{ - uint16_t channel_0; ///< Duty cycle value for channel 0. - uint16_t channel_1; ///< Duty cycle value for channel 1. - uint16_t channel_2; ///< Duty cycle value for channel 2. - uint16_t channel_3; ///< Duty cycle value for channel 3. -} nrf_pwm_values_individual_t; - -/** - * @brief Structure for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_WAVE_FORM mode. - */ -typedef struct { - uint16_t channel_0; ///< Duty cycle value for channel 0. - uint16_t channel_1; ///< Duty cycle value for channel 1. - uint16_t channel_2; ///< Duty cycle value for channel 2. - uint16_t counter_top; ///< Top value for the pulse generator counter. -} nrf_pwm_values_wave_form_t; - -/** - * @brief Union grouping pointers to arrays of duty cycle values applicable to - * various loading modes. - */ -typedef union { - nrf_pwm_values_common_t const * p_common; ///< Pointer to be used in @ref NRF_PWM_LOAD_COMMON mode. - nrf_pwm_values_grouped_t const * p_grouped; ///< Pointer to be used in @ref NRF_PWM_LOAD_GROUPED mode. - nrf_pwm_values_individual_t const * p_individual; ///< Pointer to be used in @ref NRF_PWM_LOAD_INDIVIDUAL mode. - nrf_pwm_values_wave_form_t const * p_wave_form; ///< Pointer to be used in @ref NRF_PWM_LOAD_WAVE_FORM mode. - uint16_t const * p_raw; ///< Pointer providing raw access to the values. -} nrf_pwm_values_t; - -/** - * @brief Structure for defining a sequence of PWM duty cycles. - * - * When the sequence is set (by a call to @ref nrf_pwm_sequence_set), the - * provided duty cycle values are not copied. The @p values pointer is stored - * in the peripheral's internal register, and the values are loaded from RAM - * during the sequence playback. Therefore, you must ensure that the values - * do not change before and during the sequence playback (for example, - * the values cannot be placed in a local variable that is allocated on stack). - * If the sequence is played in a loop and the values should be updated - * before the next iteration, it is safe to modify them when the corresponding - * event signaling the end of sequence occurs (@ref NRF_PWM_EVENT_SEQEND0 - * or @ref NRF_PWM_EVENT_SEQEND1, respectively). - * - * @note The @p repeats and @p end_delay values (which are written to the - * SEQ[n].REFRESH and SEQ[n].ENDDELAY registers in the peripheral, - * respectively) are ignored at the end of a complex sequence - * playback, indicated by the LOOPSDONE event. - * See the @linkProductSpecification52 for more information. - */ -typedef struct -{ - nrf_pwm_values_t values; ///< Pointer to an array with duty cycle values. This array must be in Data RAM. - /**< This field is defined as an union of pointers - * to provide a convenient way to define duty - * cycle values in various loading modes - * (see @ref nrf_pwm_dec_load_t). - * In each value, the most significant bit (15) - * determines the polarity of the output and the - * others (14-0) compose the 15-bit value to be - * compared with the pulse generator counter. */ - uint16_t length; ///< Number of 16-bit values in the array pointed by @p values. - uint32_t repeats; ///< Number of times that each duty cycle should be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode. - uint32_t end_delay; ///< Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in @ref NRF_PWM_STEP_TRIGGERED mode. -} nrf_pwm_sequence_t; - -/** - * @brief Helper macro for calculating the number of 16-bit values in specified - * array of duty cycle values. - */ -#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t)) - - -/** - * @brief Function for activating a specific PWM task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg, - nrf_pwm_task_t task); - -/** - * @brief Function for getting the address of a specific PWM task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_task_t task); - -/** - * @brief Function for clearing a specific PWM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg, - nrf_pwm_event_t event); - -/** - * @brief Function for checking the state of a specific PWM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event); - -/** - * @brief Function for getting the address of a specific PWM event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask); - -/** - * @brief Function for setting the configuration of PWM shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_shorts_mask Shortcuts configuration to set. - */ -__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask); - -/** - * @brief Function for setting the configuration of PWM interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int_mask Interrupts configuration to set. - */ -__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, - nrf_pwm_int_mask_t pwm_int); - -/** - * @brief Function for enabling the PWM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg); - -/** - * @brief Function for disabling the PWM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg); - -/** - * @brief Function for assigning pins to PWM output channels. - * - * Usage of all PWM output channels is optional. If a given channel is not - * needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin - * number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] out_pins Array with pin numbers for individual PWM output channels. - */ -__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg, - uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]); - -/** - * @brief Function for configuring the PWM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] base_clock Base clock frequency. - * @param[in] mode Operating mode of the pulse generator counter. - * @param[in] top_value Value up to which the pulse generator counter counts. - */ -__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg, - nrf_pwm_clk_t base_clock, - nrf_pwm_mode_t mode, - uint16_t top_value); - -/** - * @brief Function for defining a sequence of PWM duty cycles. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] p_seq Pointer to the sequence definition. - */ -__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - nrf_pwm_sequence_t const * p_seq); - -/** - * @brief Function for modifying the pointer to the duty cycle values - * in the specified sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] p_values Pointer to an array with duty cycle values. - */ -__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t const * p_values); - -/** - * @brief Function for modifying the total number of duty cycle values - * in the specified sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] length Number of duty cycle values. - */ -__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t length); - -/** - * @brief Function for modifying the additional number of PWM periods spent - * on each duty cycle value in the specified sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] refresh Number of additional PWM periods for each duty cycle value. - */ -__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t refresh); - -/** - * @brief Function for modifying the additional time added after the sequence - * is played. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] end_delay Number of PWM periods added at the end of the sequence. - */ -__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t end_delay); - -/** - * @brief Function for setting the mode of loading sequence data from RAM - * and advancing the sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] dec_load Mode of loading sequence data from RAM. - * @param[in] dec_step Mode of advancing the active sequence. - */ -__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg, - nrf_pwm_dec_load_t dec_load, - nrf_pwm_dec_step_t dec_step); - -/** - * @brief Function for setting the number of times the sequence playback - * should be performed. - * - * This function applies to two-sequence playback (concatenated sequence 0 and 1). - * A single sequence can be played back only once. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] loop_count Number of times to perform the sequence playback. - */ -__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg, - uint16_t loop_count); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg, - nrf_pwm_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_task_t task) -{ - return ((uint32_t)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg, - nrf_pwm_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event) -{ - return ((uint32_t)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask) -{ - p_reg->SHORTS |= pwm_shorts_mask; -} - -__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask) -{ - p_reg->SHORTS &= ~(pwm_shorts_mask); -} - -__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask) -{ - p_reg->SHORTS = pwm_shorts_mask; -} - -__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask) -{ - p_reg->INTENSET = pwm_int_mask; -} - -__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask) -{ - p_reg->INTENCLR = pwm_int_mask; -} - -__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask) -{ - p_reg->INTEN = pwm_int_mask; -} - -__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, - nrf_pwm_int_mask_t pwm_int) -{ - return (bool)(p_reg->INTENSET & pwm_int); -} - -__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg) -{ - p_reg->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg) -{ - p_reg->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg, - uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]) -{ - uint8_t i; - for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) - { - p_reg->PSEL.OUT[i] = out_pins[i]; - } -} - -__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg, - nrf_pwm_clk_t base_clock, - nrf_pwm_mode_t mode, - uint16_t top_value) -{ - ASSERT(top_value <= PWM_COUNTERTOP_COUNTERTOP_Msk); - - p_reg->PRESCALER = base_clock; - p_reg->MODE = mode; - p_reg->COUNTERTOP = top_value; -} - -__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - nrf_pwm_sequence_t const * p_seq) -{ - ASSERT(p_seq != NULL); - - nrf_pwm_seq_ptr_set( p_reg, seq_id, p_seq->values.p_raw); - nrf_pwm_seq_cnt_set( p_reg, seq_id, p_seq->length); - nrf_pwm_seq_refresh_set( p_reg, seq_id, p_seq->repeats); - nrf_pwm_seq_end_delay_set(p_reg, seq_id, p_seq->end_delay); -} - -__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t const * p_values) -{ - ASSERT(seq_id <= 1); - ASSERT(p_values != NULL); - p_reg->SEQ[seq_id].PTR = (uint32_t)p_values; -} - -__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t length) -{ - ASSERT(seq_id <= 1); - ASSERT(length != 0); - ASSERT(length <= PWM_SEQ_CNT_CNT_Msk); - p_reg->SEQ[seq_id].CNT = length; -} - -__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t refresh) -{ - ASSERT(seq_id <= 1); - ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk); - p_reg->SEQ[seq_id].REFRESH = refresh; -} - -__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t end_delay) -{ - ASSERT(seq_id <= 1); - ASSERT(end_delay <= PWM_SEQ_ENDDELAY_CNT_Msk); - p_reg->SEQ[seq_id].ENDDELAY = end_delay; -} - -__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg, - nrf_pwm_dec_load_t dec_load, - nrf_pwm_dec_step_t dec_step) -{ - p_reg->DECODER = ((uint32_t)dec_load << PWM_DECODER_LOAD_Pos) | - ((uint32_t)dec_step << PWM_DECODER_MODE_Pos); -} - -__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg, - uint16_t loop_count) -{ - p_reg->LOOP = loop_count; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_PWM_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_qdec.h b/lib/sdk/components/drivers_nrf/hal/nrf_qdec.h deleted file mode 100644 index ca6b12f..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_qdec.h +++ /dev/null @@ -1,504 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_QDEC_H__ -#define NRF_QDEC_H__ - -#include -#include "nrf_error.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*lint ++flb "Enter library region" */ - -/** - * @defgroup nrf_qdec_hal QDEC HAL - * @{ - * @ingroup nrf_qdec - * @brief Hardware access layer for accessing the quadrature decoder (QDEC) peripheral. - */ - -/** - * @enum nrf_qdec_task_t - * @brief QDEC tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_QDEC_TASK_START = offsetof(NRF_QDEC_Type, TASKS_START), /**< Starting the quadrature decoder. */ - NRF_QDEC_TASK_STOP = offsetof(NRF_QDEC_Type, TASKS_STOP), /**< Stopping the quadrature decoder. */ - NRF_QDEC_TASK_READCLRACC = offsetof(NRF_QDEC_Type, TASKS_READCLRACC) /**< Reading and clearing ACC and ACCDBL registers. */ -} nrf_qdec_task_t; - -/** - * @enum nrf_qdec_event_t - * @brief QDEC events. - */ -typedef enum -{ - NRF_QDEC_EVENT_SAMPLERDY = offsetof(NRF_QDEC_Type, EVENTS_SAMPLERDY), /**< Event generated for every new sample. */ - NRF_QDEC_EVENT_REPORTRDY = offsetof(NRF_QDEC_Type, EVENTS_REPORTRDY), /**< Event generated for every new report. */ - NRF_QDEC_EVENT_ACCOF = offsetof(NRF_QDEC_Type, EVENTS_ACCOF) /**< Event generated for every accumulator overflow. */ -} nrf_qdec_event_t; /*lint -restore */ - -/** - * @enum nrf_qdec_short_mask_t - * @brief QDEC shortcuts. - */ -typedef enum -{ - NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk, /**< Shortcut between REPORTRDY event and READCLRACC task. */ - NRF_QDEC_SHORT_SAMPLERDY_STOP_MASK = QDEC_SHORTS_SAMPLERDY_STOP_Msk /**< Shortcut between SAMPLERDY event and STOP task. */ -} nrf_qdec_short_mask_t; - -/** - * @enum nrf_qdec_int_mask_t - * @brief QDEC interrupts. - */ -typedef enum -{ - NRF_QDEC_INT_SAMPLERDY_MASK = QDEC_INTENSET_SAMPLERDY_Msk, /**< Mask for enabling or disabling an interrupt on SAMPLERDY event. */ - NRF_QDEC_INT_REPORTRDY_MASK = QDEC_INTENSET_REPORTRDY_Msk, /**< Mask for enabling or disabling an interrupt on REPORTRDY event. */ - NRF_QDEC_INT_ACCOF_MASK = QDEC_INTENSET_ACCOF_Msk /**< Mask for enabling or disabling an interrupt on ACCOF event. */ -} nrf_qdec_int_mask_t; - -/** - * @enum nrf_qdec_enable_t - * @brief States of the enable bit. - */ -typedef enum -{ - NRF_QDEC_DISABLE = QDEC_ENABLE_ENABLE_Disabled, /**< Mask for disabling the QDEC periperal. When disabled, the QDEC decoder pins are not active. */ - NRF_QDEC_ENABLE = QDEC_ENABLE_ENABLE_Enabled /**< Mask for enabling the QDEC periperal. When enabled, the QDEC pins are active. */ -} nrf_qdec_enable_t; - - -/** - * @enum nrf_qdec_dbfen_t - * @brief States of the debounce filter enable bit. - */ -typedef enum -{ - NRF_QDEC_DBFEN_DISABLE = QDEC_DBFEN_DBFEN_Disabled, /**< Mask for disabling the debounce filter. */ - NRF_QDEC_DBFEN_ENABLE = QDEC_DBFEN_DBFEN_Enabled /**< Mask for enabling the debounce filter. */ -} nrf_qdec_dbfen_t; - -/** - * @enum nrf_qdec_ledpol_t - * @brief Active LED polarity. - */ -typedef enum -{ - NRF_QDEC_LEPOL_ACTIVE_LOW = QDEC_LEDPOL_LEDPOL_ActiveLow, /**< QDEC LED active on output pin low. */ - NRF_QDEC_LEPOL_ACTIVE_HIGH = QDEC_LEDPOL_LEDPOL_ActiveHigh /**< QDEC LED active on output pin high. */ -} nrf_qdec_ledpol_t; - - -/** - * @enum nrf_qdec_sampleper_t - * @brief Available sampling periods. - */ -typedef enum -{ - NRF_QDEC_SAMPLEPER_128us = QDEC_SAMPLEPER_SAMPLEPER_128us, /**< QDEC sampling period 128 microseconds. */ - NRF_QDEC_SAMPLEPER_256us = QDEC_SAMPLEPER_SAMPLEPER_256us, /**< QDEC sampling period 256 microseconds. */ - NRF_QDEC_SAMPLEPER_512us = QDEC_SAMPLEPER_SAMPLEPER_512us, /**< QDEC sampling period 512 microseconds. */ - NRF_QDEC_SAMPLEPER_1024us = QDEC_SAMPLEPER_SAMPLEPER_1024us, /**< QDEC sampling period 1024 microseconds. */ - NRF_QDEC_SAMPLEPER_2048us = QDEC_SAMPLEPER_SAMPLEPER_2048us, /**< QDEC sampling period 2048 microseconds. */ - NRF_QDEC_SAMPLEPER_4096us = QDEC_SAMPLEPER_SAMPLEPER_4096us, /**< QDEC sampling period 4096 microseconds. */ - NRF_QDEC_SAMPLEPER_8192us = QDEC_SAMPLEPER_SAMPLEPER_8192us, /**< QDEC sampling period 8192 microseconds. */ - NRF_QDEC_SAMPLEPER_16384us = QDEC_SAMPLEPER_SAMPLEPER_16384us /**< QDEC sampling period 16384 microseconds. */ -} nrf_qdec_sampleper_t; - -/** - * @enum nrf_qdec_reportper_t - * @brief Available report periods. - */ -typedef enum -{ - NRF_QDEC_REPORTPER_10 = QDEC_REPORTPER_REPORTPER_10Smpl, /**< QDEC report period 10 samples. */ - NRF_QDEC_REPORTPER_40 = QDEC_REPORTPER_REPORTPER_40Smpl, /**< QDEC report period 40 samples. */ - NRF_QDEC_REPORTPER_80 = QDEC_REPORTPER_REPORTPER_80Smpl, /**< QDEC report period 80 samples. */ - NRF_QDEC_REPORTPER_120 = QDEC_REPORTPER_REPORTPER_120Smpl, /**< QDEC report period 120 samples. */ - NRF_QDEC_REPORTPER_160 = QDEC_REPORTPER_REPORTPER_160Smpl, /**< QDEC report period 160 samples. */ - NRF_QDEC_REPORTPER_200 = QDEC_REPORTPER_REPORTPER_200Smpl, /**< QDEC report period 200 samples. */ - NRF_QDEC_REPORTPER_240 = QDEC_REPORTPER_REPORTPER_240Smpl, /**< QDEC report period 240 samples. */ - NRF_QDEC_REPORTPER_280 = QDEC_REPORTPER_REPORTPER_280Smpl, /**< QDEC report period 280 samples. */ - NRF_QDEC_REPORTPER_DISABLED /**< QDEC reporting disabled. */ -} nrf_qdec_reportper_t; - -/** - * @brief Function for enabling QDEC. - */ -__STATIC_INLINE void nrf_qdec_enable(void) -{ - NRF_QDEC->ENABLE = NRF_QDEC_ENABLE; -} - - -/** - * @brief Function for disabling QDEC. - */ -__STATIC_INLINE void nrf_qdec_disable(void) -{ - NRF_QDEC->ENABLE = NRF_QDEC_DISABLE; -} - - -/** - * @brief Function for returning the enable state of QDEC. - * @return State of the register. - */ -__STATIC_INLINE uint32_t nrf_qdec_enable_get(void) -{ - return NRF_QDEC->ENABLE; -} - - -/** - * @brief Function for enabling QDEC interrupts by mask. - * @param[in] qdec_int_mask Sources of the interrupts to enable. - */ -__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask) -{ - NRF_QDEC->INTENSET = qdec_int_mask; // writing 0 has no effect -} - - -/** - * @brief Function for disabling QDEC interrupts by mask. - * @param[in] qdec_int_mask Sources of the interrupts to disable. - * - */ -__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask) -{ - NRF_QDEC->INTENCLR = qdec_int_mask; // writing 0 has no effect -} - - -/** - * @brief Function for getting the enabled interrupts of the QDEC. - */ -__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask) -{ - return NRF_QDEC->INTENSET & qdec_int_mask; // when read this register will return the value of INTEN. -} - - -/** - * @brief Function for enabling the debouncing filter of the QED. - */ -__STATIC_INLINE void nrf_qdec_dbfen_enable(void) -{ - NRF_QDEC->DBFEN = NRF_QDEC_DBFEN_ENABLE; -} - - -/** - * @brief Function for disabling the debouncing filter of the QED. - */ -__STATIC_INLINE void nrf_qdec_dbfen_disable(void) -{ - NRF_QDEC->DBFEN = NRF_QDEC_DBFEN_DISABLE; -} - - -/** - * @brief Function for getting the state of the QDEC's debouncing filter. - * @retval NRF_QDEC_DBFEN_DISABLE If the debouncing filter is disabled. - * @retval NRF_QDEC_DBFEN_ENABLE If the debouncing filter is enabled. - */ -__STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void) -{ - return NRF_QDEC->DBFEN; -} - - -/** - * @brief Function for assigning QDEC pins. - * @param[in] psela Pin number. - * @param[in] pselb Pin number. - * @param[in] pselled Pin number. - */ -__STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32_t pselled) -{ - NRF_QDEC->PSELA = psela; - NRF_QDEC->PSELB = pselb; - NRF_QDEC->PSELLED = pselled; - -} - -/** - * @brief Function for setting a specific QDEC task. - * @param[in] qdec_task QDEC task to be set. - */ -__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task) ) = 1; -} - - -/** - * @brief Function for retrieving the address of a QDEC task register. - * @param[in] qdec_task QDEC task. - */ -__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task) -{ - return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task); -} - - -/** - * @brief Function for clearing a specific QDEC event. - * @param[in] qdec_event QDEC event to clear. - */ -__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event) ) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + qdec_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for retrieving the state of a specific QDEC event. - * @return State of the QDEC event. - */ -__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event) -{ - return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event); -} - - -/** - * @brief Function for retrieving the address of a specific QDEC event register. - * @param[in] qdec_event QDEC event. - * @return Address of the specified QDEC event. - */ -__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event) -{ - return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event); -} - - -/** - * @brief Function for setting QDEC shortcuts. - * @param[in] qdec_short_mask QDEC shortcut by mask. - */ -__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask) -{ - NRF_QDEC->SHORTS |= qdec_short_mask; -} - - -/** - * @brief Function for clearing shortcuts of the QDEC by mask. - * @param[in] qdec_short_mask QDEC shortcute to be cleared. - */ -__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask) -{ - NRF_QDEC->SHORTS &= ~qdec_short_mask; -} - - -/** - * @brief Function for retrieving the value of QDEC's SAMPLEPER register. - * @return Value of the SAMPLEPER register. - */ -__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void) -{ - return NRF_QDEC->SAMPLEPER; -} - - -/** - * @brief Function for converting the value of QDEC's SAMPLE PERIOD to microseconds. - * @retval sampling period in microseconds. - */ -__STATIC_INLINE uint32_t nrf_qdec_sampleper_to_value(uint32_t sampleper) -{ - return (1 << (7 + sampleper)); -} - -/** - * @brief Function for setting the value of QDEC's SAMPLEPER register. - * @param[in] sample_per Sampling period. - */ -__STATIC_INLINE void nrf_qdec_sampleper_set(nrf_qdec_sampleper_t sample_per) -{ - NRF_QDEC->SAMPLEPER = sample_per; -} - - -/** - * @brief Function for retrieving the value of QDEC's SAMPLE register. - * @return Value of the SAMPLE register. - */ -__STATIC_INLINE int32_t nrf_qdec_sample_get(void) -{ - return NRF_QDEC->SAMPLE; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACC register. - * @return Value of the ACC register. - */ -__STATIC_INLINE int32_t nrf_qdec_acc_get(void) -{ - return NRF_QDEC->ACC; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACCREAD register. - * @return Value of the ACCREAD register. - */ -__STATIC_INLINE int32_t nrf_qdec_accread_get(void) -{ - return NRF_QDEC->ACCREAD; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACCDBL register. - * @return Value of the ACCDBL register. - */ -__STATIC_INLINE uint32_t nrf_qdec_accdbl_get(void) -{ - return NRF_QDEC->ACCDBL; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACCDBLREAD register. - * @return Value of the ACCDBLREAD register. - */ -__STATIC_INLINE uint32_t nrf_qdec_accdblread_get(void) -{ - return NRF_QDEC->ACCDBLREAD; -} - - -/** - * @brief Function for setting how long the LED is switched on before sampling. - * @param[in] time_us Time (in microseconds) how long the LED is switched on before sampling. - */ -__STATIC_INLINE void nrf_qdec_ledpre_set(uint32_t time_us) -{ - NRF_QDEC->LEDPRE = time_us; -} - - -/** - * @brief Function for retrieving how long the LED is switched on before sampling. - * @retval time_us Time (in microseconds) how long the LED is switched on before sampling. - */ -__STATIC_INLINE uint32_t nrf_qdec_ledpre_get(void) -{ - return NRF_QDEC->LEDPRE; -} - - -/** - * @brief Function for setting the report period (in samples). - * @param[in] reportper Number of samples. - */ -__STATIC_INLINE void nrf_qdec_reportper_set(nrf_qdec_reportper_t reportper) -{ - NRF_QDEC->REPORTPER = reportper; -} - - -/** - * @brief Function for retrieving the report period. - * @retval reportper Number of samples as encoded in the register. - */ -__STATIC_INLINE uint32_t nrf_qdec_reportper_reg_get(void) -{ - return NRF_QDEC->REPORTPER; -} - - -/** - * @brief Function for retrieving the value of QDEC's SAMPLEPER register. - * @param [in] reportper Reportper to be converted to amount of samples per report. - - */ -__STATIC_INLINE uint32_t nrf_qdec_reportper_to_value(uint32_t reportper) -{ - return (reportper == NRF_QDEC_REPORTPER_10) ? 10 : reportper * 40; -} - - -/** - * @brief Function for setting the active level for the LED. - * @param[in] pol Active level for the LED. - */ -__STATIC_INLINE void nrf_qdec_ledpol_set(nrf_qdec_ledpol_t pol) -{ - NRF_QDEC->LEDPOL = pol; -} - - -/** - * @brief Function for retrieving the active level for the LED. - * @return Active level for the LED. - */ -__STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void) -{ - return NRF_QDEC->LEDPOL; -} - - -/** - *@} - **/ - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_qspi.h b/lib/sdk/components/drivers_nrf/hal/nrf_qspi.h deleted file mode 100644 index 9be7aa5..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_qspi.h +++ /dev/null @@ -1,765 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_qspi_hal QSPI HAL - * @{ - * @ingroup nrf_qspi - * - * @brief Hardware access layer for accessing the QSPI peripheral. - */ - -#ifndef NRF_QSPI_H__ -#define NRF_QSPI_H__ - -#include -#include -#include "boards.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief This value can be used as a parameter for the @ref nrf_qspi_pins_set - * function to specify that a given QSPI signal (SCK, CSN, IO0, IO1, IO2, or IO3) - * will not be connected to a physical pin. - */ -#define NRF_QSPI_PIN_NOT_CONNECTED 0xFF - -/** - * @brief Macro for setting proper values to pin registers. - */ - -#define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin) - -/** - * @brief QSPI tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_QSPI_TASK_ACTIVATE = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE), /**< Activate the QSPI interface. */ - NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), /**< Start transfer from external flash memory to internal RAM. */ - NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */ - NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */ - /*lint -restore*/ -} nrf_qspi_task_t; - -/** - * @brief QSPI events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) /**< QSPI peripheral is ready after it executes any task. */ - /*lint -restore*/ -} nrf_qspi_event_t; - -/** - * @brief QSPI interrupts. - */ -typedef enum -{ - NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk /**< Interrupt on READY event. */ -} nrf_qspi_int_mask_t; - -/** - * @brief QSPI frequency divider values. - */ -typedef enum -{ - NRF_QSPI_FREQ_32MDIV1, /**< 32.0 MHz. */ - NRF_QSPI_FREQ_32MDIV2, /**< 16.0 MHz. */ - NRF_QSPI_FREQ_32MDIV3, /**< 10.6 MHz. */ - NRF_QSPI_FREQ_32MDIV4, /**< 8.00 MHz. */ - NRF_QSPI_FREQ_32MDIV5, /**< 6.40 MHz. */ - NRF_QSPI_FREQ_32MDIV6, /**< 5.33 MHz. */ - NRF_QSPI_FREQ_32MDIV7, /**< 4.57 MHz. */ - NRF_QSPI_FREQ_32MDIV8, /**< 4.00 MHz. */ - NRF_QSPI_FREQ_32MDIV9, /**< 3.55 MHz. */ - NRF_QSPI_FREQ_32MDIV10, /**< 3.20 MHz. */ - NRF_QSPI_FREQ_32MDIV11, /**< 2.90 MHz. */ - NRF_QSPI_FREQ_32MDIV12, /**< 2.66 MHz. */ - NRF_QSPI_FREQ_32MDIV13, /**< 2.46 MHz. */ - NRF_QSPI_FREQ_32MDIV14, /**< 2.29 MHz. */ - NRF_QSPI_FREQ_32MDIV15, /**< 2.13 MHz. */ - NRF_QSPI_FREQ_32MDIV16, /**< 2.00 MHz. */ -} nrf_qspi_frequency_t; - -/** - * @brief Interface configuration for a read operation. - */ -typedef enum -{ - NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, /**< Single data line SPI. FAST_READ (opcode 0x0B). */ - NRF_QSPI_READOC_READ2O = QSPI_IFCONFIG0_READOC_READ2O, /**< Dual data line SPI. READ2O (opcode 0x3B). */ - NRF_QSPI_READOC_READ2IO = QSPI_IFCONFIG0_READOC_READ2IO, /**< Dual data line SPI. READ2IO (opcode 0xBB). */ - NRF_QSPI_READOC_READ4O = QSPI_IFCONFIG0_READOC_READ4O, /**< Quad data line SPI. READ4O (opcode 0x6B). */ - NRF_QSPI_READOC_READ4IO = QSPI_IFCONFIG0_READOC_READ4IO /**< Quad data line SPI. READ4IO (opcode 0xEB). */ -} nrf_qspi_readoc_t; - -/** - * @brief Interface configuration for a write operation. - */ -typedef enum -{ - NRF_QSPI_WRITEOC_PP = QSPI_IFCONFIG0_WRITEOC_PP, /**< Single data line SPI. PP (opcode 0x02). */ - NRF_QSPI_WRITEOC_PP2O = QSPI_IFCONFIG0_WRITEOC_PP2O, /**< Dual data line SPI. PP2O (opcode 0xA2). */ - NRF_QSPI_WRITEOC_PP4O = QSPI_IFCONFIG0_WRITEOC_PP4O, /**< Quad data line SPI. PP4O (opcode 0x32). */ - NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO, /**< Quad data line SPI. READ4O (opcode 0x38). */ -} nrf_qspi_writeoc_t; - -/** - * @brief Interface configuration for addressing mode. - */ -typedef enum -{ - NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, /**< 24-bit addressing. */ - NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT /**< 32-bit addressing. */ -} nrf_qspi_addrmode_t; - -/** - * @brief QSPI SPI mode. Polarization and phase configuration. - */ -typedef enum -{ - NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, /**< Mode 0 (CPOL=0, CPHA=0). */ - NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3 /**< Mode 1 (CPOL=1, CPHA=1). */ -} nrf_qspi_spi_mode_t; - -/** - * @brief Addressing configuration mode. - */ -typedef enum -{ - NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, /**< Do not send any instruction. */ - NRF_QSPI_ADDRCONF_MODE_OPCODE = QSPI_ADDRCONF_MODE_Opcode, /**< Send opcode. */ - NRF_QSPI_ADDRCONF_MODE_OPBYTE0 = QSPI_ADDRCONF_MODE_OpByte0, /**< Send opcode, byte0. */ - NRF_QSPI_ADDRCONF_MODE_ALL = QSPI_ADDRCONF_MODE_All /**< Send opcode, byte0, byte1. */ -} nrf_qspi_addrconfig_mode_t; - -/** - * @brief Erasing data length. - */ -typedef enum -{ - NRF_QSPI_ERASE_LEN_4KB = QSPI_ERASE_LEN_LEN_4KB, /**< Erase 4 kB block (flash command 0x20). */ - NRF_QSPI_ERASE_LEN_64KB = QSPI_ERASE_LEN_LEN_64KB, /**< Erase 64 kB block (flash command 0xD8). */ - NRF_QSPI_ERASE_LEN_ALL = QSPI_ERASE_LEN_LEN_All /**< Erase all (flash command 0xC7). */ -} nrf_qspi_erase_len_t; - -/** - * @brief Custom instruction length. - */ -typedef enum -{ - NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, /**< Send opcode only. */ - NRF_QSPI_CINSTR_LEN_2B = QSPI_CINSTRCONF_LENGTH_2B, /**< Send opcode, CINSTRDAT0.BYTE0. */ - NRF_QSPI_CINSTR_LEN_3B = QSPI_CINSTRCONF_LENGTH_3B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1. */ - NRF_QSPI_CINSTR_LEN_4B = QSPI_CINSTRCONF_LENGTH_4B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2. */ - NRF_QSPI_CINSTR_LEN_5B = QSPI_CINSTRCONF_LENGTH_5B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3. */ - NRF_QSPI_CINSTR_LEN_6B = QSPI_CINSTRCONF_LENGTH_6B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4. */ - NRF_QSPI_CINSTR_LEN_7B = QSPI_CINSTRCONF_LENGTH_7B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5. */ - NRF_QSPI_CINSTR_LEN_8B = QSPI_CINSTRCONF_LENGTH_8B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6. */ - NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */ -} nrf_qspi_cinstr_len_t; - -/** - * @brief Pins configuration. - */ -typedef struct -{ - uint8_t sck_pin; /**< SCK pin number. */ - uint8_t csn_pin; /**< Chip select pin number. */ - uint8_t io0_pin; /**< IO0/MOSI pin number. */ - uint8_t io1_pin; /**< IO1/MISO pin number. */ - uint8_t io2_pin; /**< IO2 pin number (optional). - * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed. - */ - uint8_t io3_pin; /**< IO3 pin number (optional). - * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed. - */ -} nrf_qspi_pins_t; - -/** - * @brief Custom instruction configuration. - */ -typedef struct -{ - uint8_t opcode; /**< Opcode used in custom instruction transmission. */ - nrf_qspi_cinstr_len_t length; /**< Length of the custom instruction data. */ - bool io2_level; /**< I/O line level during transmission. */ - bool io3_level; /**< I/O line level during transmission. */ - bool wipwait; /**< Wait if a Wait in Progress bit is set in the memory status byte. */ - bool wren; /**< Send write enable before instruction. */ -} nrf_qspi_cinstr_conf_t; - -/** - * @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set - */ -typedef struct -{ - uint8_t opcode; /**< Opcode used to enter proper addressing mode. */ - uint8_t byte0; /**< Byte following the opcode. */ - uint8_t byte1; /**< Byte following byte0. */ - nrf_qspi_addrconfig_mode_t mode; /**< Extended addresing mode. */ - bool wipwait; /**< Enable/disable waiting for complete operation execution. */ - bool wren; /**< Send write enable before instruction. */ -} nrf_qspi_addrconfig_conf_t; - -/** - * @brief Structure with QSPI protocol interface configuration. - */ -typedef struct -{ - nrf_qspi_readoc_t readoc; /**< Read operation code. */ - nrf_qspi_writeoc_t writeoc; /**< Write operation code. */ - nrf_qspi_addrmode_t addrmode; /**< Addresing mode (24-bit or 32-bit). */ - bool dpmconfig; /**< Enable the Deep Power-down Mode (DPM) feature. */ -} nrf_qspi_prot_conf_t; - -/** - * @brief QSPI physical interface configuration. - */ -typedef struct -{ - uint8_t sck_delay; /**< tSHSL, tWHSL, and tSHWL in number of 16 MHz periods (62.5ns). */ - bool dpmen; /**< Enable the DPM feature. */ - nrf_qspi_spi_mode_t spi_mode; /**< SPI phase and polarization. */ - nrf_qspi_frequency_t sck_freq; /**< SCK frequency given as enum @ref nrf_qspi_frequency_t. */ -} nrf_qspi_phy_conf_t; - -/** - * @brief Function for activating a specific QSPI task. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task); - -/** - * @brief Function for getting the address of a specific QSPI task register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_task_t task); - -/** - * @brief Function for clearing a specific QSPI event. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_event Event to clear. - */ -__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event); - -/** - * @brief Function for checking the state of a specific SPI event. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event); - -/** - * @brief Function for getting the address of a specific QSPI event register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_event_t qspi_event); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg, - nrf_qspi_int_mask_t qspi_int); - -/** - * @brief Function for enabling the QSPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral register structure. - */ -__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg); - -/** - * @brief Function for disabling the QSPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral register structure. - */ -__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg); - -/** - * @brief Function for configuring QSPI pins. - * - * If a given signal is not needed, pass the @ref NRF_QSPI_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_pins Pointer to the pins configuration structure. See @ref nrf_qspi_pins_t. - */ -__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_pins_t * p_pins); - -/** - * @brief Function for setting the QSPI IFCONFIG0 register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the QSPI protocol interface configuration structure. See @ref nrf_qspi_prot_conf_t. - */ -__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_prot_conf_t * p_config); - -/** - * @brief Function for setting the QSPI IFCONFIG1 register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the QSPI physical interface configuration structure. See @ref nrf_qspi_phy_conf_t. - */ -__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_phy_conf_t * p_config); - -/** - * @brief Function for setting the QSPI ADDRCONF register. - * - * Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure - * is sent during the start of the peripheral. Remember that the reset instruction can set - * addressing mode to default in the memory device. If memory reset is necessary before configuring - * the addressing mode, use custom instruction feature instead of this function. - * Case with reset: Enable the peripheral without setting ADDRCONF register, send reset instructions - * using a custom instruction feature (reset enable and then reset), set proper addressing mode - * using the custom instruction feature. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the addressing mode configuration structure. See @ref nrf_qspi_addrconfig_conf_t. -*/ -__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_addrconfig_conf_t * p_config); - -/** - * @brief Function for setting write data into the peripheral register (without starting the process). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_buffer Pointer to the writing buffer. - * @param[in] length Lenght of the writing data. - * @param[in] dest_addr Address in memory to write to. - */ -__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg, - void const * p_buffer, - uint32_t length, - uint32_t dest_addr); - -/** - * @brief Function for setting read data into the peripheral register (without starting the process). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[out] p_buffer Pointer to the reading buffer. - * @param[in] length Length of the read data. - * @param[in] src_addr Address in memory to read from. - */ -__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg, - void * p_buffer, - uint32_t length, - uint32_t src_addr); - -/** - * @brief Function for setting erase data into the peripheral register (without starting the process). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] erase_addr Start address to erase. Address must have padding set to 4 bytes. - * @param[in] len Size of erasing area. - */ -__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg, - uint32_t erase_addr, - nrf_qspi_erase_len_t len); - -/** - * @brief Function for getting the peripheral status register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * - * @return Peripheral status register. - */ -__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg); - -/** - * @brief Function for getting the device status register stored in the peripheral status register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * - * @return Device status register (lower byte). - */ -__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg); - -/** - * @brief Function for checking if the peripheral is busy or not. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * - * @retval true If QSPI is busy. - * @retval false If QSPI is ready. - */ -__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg); - -/** - * @brief Function for setting registers sending with custom instruction transmission. - * - * This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument - * (sending only opcode without data). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] length Length of the custom instruction data. - * @param[in] p_tx_data Pointer to the data to send with the custom instruction. - */ -__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg, - nrf_qspi_cinstr_len_t length, - void const * p_tx_data); - -/** - * @brief Function for getting data from register after custom instruction transmission. - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] length Length of the custom instruction data. - * @param[in] p_rx_data Pointer to the reading buffer. - */ -__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_cinstr_len_t length, - void * p_rx_data); - -/** - * @brief Function for sending custom instruction to external memory. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the custom instruction configuration structure. See @ref nrf_qspi_cinstr_conf_t. - */ - -__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg, - const nrf_qspi_cinstr_conf_t * p_config); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_task_t task) -{ - return ((uint32_t)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event)) = 0x0UL; -} - -__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event); -} - -__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_event_t qspi_event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event); -} - -__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask) -{ - p_reg->INTENSET = qspi_int_mask; -} - -__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask) -{ - p_reg->INTENCLR = qspi_int_mask; -} - -__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg, - nrf_qspi_int_mask_t qspi_int) -{ - return (bool)(p_reg->INTENSET & qspi_int); -} - -__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg) -{ - p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Enabled << QSPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg) -{ - p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Disabled << QSPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, const nrf_qspi_pins_t * p_pins) -{ - p_reg->PSEL.SCK = NRF_QSPI_PIN_VAL(p_pins->sck_pin); - p_reg->PSEL.CSN = NRF_QSPI_PIN_VAL(p_pins->csn_pin); - p_reg->PSEL.IO0 = NRF_QSPI_PIN_VAL(p_pins->io0_pin); - p_reg->PSEL.IO1 = NRF_QSPI_PIN_VAL(p_pins->io1_pin); - p_reg->PSEL.IO2 = NRF_QSPI_PIN_VAL(p_pins->io2_pin); - p_reg->PSEL.IO3 = NRF_QSPI_PIN_VAL(p_pins->io3_pin); -} - -__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_prot_conf_t * p_config) -{ - uint32_t config = p_config->readoc; - config |= ((uint32_t)p_config->writeoc) << QSPI_IFCONFIG0_WRITEOC_Pos; - config |= ((uint32_t)p_config->addrmode) << QSPI_IFCONFIG0_ADDRMODE_Pos; - config |= (p_config->dpmconfig ? 1U : 0U ) << QSPI_IFCONFIG0_DPMENABLE_Pos; - - p_reg->IFCONFIG0 = config; -} - -__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_phy_conf_t * p_config) -{ - // IFCONFIG1 mask for reserved fields in the register. - uint32_t config = p_reg->IFCONFIG1 & 0x00FFFF00; - config |= p_config->sck_delay; - config |= (p_config->dpmen ? 1U : 0U) << QSPI_IFCONFIG1_DPMEN_Pos; - config |= ((uint32_t)(p_config->spi_mode)) << QSPI_IFCONFIG1_SPIMODE_Pos; - config |= ((uint32_t)(p_config->sck_freq)) << QSPI_IFCONFIG1_SCKFREQ_Pos; - - p_reg->IFCONFIG1 = config; -} - -__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_addrconfig_conf_t * p_config) -{ - uint32_t config = p_config->opcode; - config |= ((uint32_t)p_config->byte0) << QSPI_ADDRCONF_BYTE0_Pos; - config |= ((uint32_t)p_config->byte1) << QSPI_ADDRCONF_BYTE1_Pos; - config |= ((uint32_t)(p_config->mode)) << QSPI_ADDRCONF_MODE_Pos; - config |= (p_config->wipwait ? 1U : 0U) << QSPI_ADDRCONF_WIPWAIT_Pos; - config |= (p_config->wren ? 1U : 0U) << QSPI_ADDRCONF_WREN_Pos; - - p_reg->ADDRCONF = config; -} - -__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg, - void const * p_buffer, - uint32_t length, - uint32_t dest_addr) -{ - p_reg->WRITE.DST = dest_addr; - p_reg->WRITE.SRC = (uint32_t) p_buffer; - p_reg->WRITE.CNT = length; -} - -__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg, - void * p_buffer, - uint32_t length, - uint32_t src_addr) -{ - p_reg->READ.SRC = src_addr; - p_reg->READ.DST = (uint32_t) p_buffer; - p_reg->READ.CNT = length; -} - -__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg, - uint32_t erase_addr, - nrf_qspi_erase_len_t len) -{ - p_reg->ERASE.PTR = erase_addr; - p_reg->ERASE.LEN = len; -} - -__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg) -{ - return p_reg->STATUS; -} - -__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg) -{ - return (uint8_t)(p_reg->STATUS & QSPI_STATUS_SREG_Msk) >> QSPI_STATUS_SREG_Pos; -} - -__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg) -{ - return ((p_reg->STATUS & QSPI_STATUS_READY_Msk) >> - QSPI_STATUS_READY_Pos) == QSPI_STATUS_READY_BUSY; -} - -__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg, - nrf_qspi_cinstr_len_t length, - void const * p_tx_data) -{ - uint32_t reg = 0; - uint8_t const *p_tx_data_8 = (uint8_t const *) p_tx_data; - - // Load custom instruction. - switch (length) - { - case NRF_QSPI_CINSTR_LEN_9B: - reg |= ((uint32_t)p_tx_data_8[7]) << QSPI_CINSTRDAT1_BYTE7_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_8B: - reg |= ((uint32_t)p_tx_data_8[6]) << QSPI_CINSTRDAT1_BYTE6_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_7B: - reg |= ((uint32_t)p_tx_data_8[5]) << QSPI_CINSTRDAT1_BYTE5_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_6B: - reg |= ((uint32_t)p_tx_data_8[4]); - p_reg->CINSTRDAT1 = reg; - reg = 0; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_5B: - reg |= ((uint32_t)p_tx_data_8[3]) << QSPI_CINSTRDAT0_BYTE3_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_4B: - reg |= ((uint32_t)p_tx_data_8[2]) << QSPI_CINSTRDAT0_BYTE2_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_3B: - reg |= ((uint32_t)p_tx_data_8[1]) << QSPI_CINSTRDAT0_BYTE1_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_2B: - reg |= ((uint32_t)p_tx_data_8[0]); - p_reg->CINSTRDAT0 = reg; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_1B: - /* Send only opcode. Case to avoid compiler warnings. */ - break; - default: - break; - } -} - -__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_cinstr_len_t length, - void * p_rx_data) -{ - uint8_t *p_rx_data_8 = (uint8_t *) p_rx_data; - - uint32_t reg = p_reg->CINSTRDAT1; - switch (length) - { - case NRF_QSPI_CINSTR_LEN_9B: - p_rx_data_8[7] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE7_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_8B: - p_rx_data_8[6] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE6_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_7B: - p_rx_data_8[5] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE5_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_6B: - p_rx_data_8[4] = (uint8_t)(reg); - /* fall-through */ - default: - break; - } - - reg = p_reg->CINSTRDAT0; - switch (length) - { - case NRF_QSPI_CINSTR_LEN_5B: - p_rx_data_8[3] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE3_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_4B: - p_rx_data_8[2] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE2_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_3B: - p_rx_data_8[1] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE1_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_2B: - p_rx_data_8[0] = (uint8_t)(reg); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_1B: - /* Send only opcode. Case to avoid compiler warnings. */ - break; - default: - break; - } -} - -__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg, - const nrf_qspi_cinstr_conf_t * p_config) -{ - p_reg->CINSTRCONF = (((uint32_t)p_config->opcode << QSPI_CINSTRCONF_OPCODE_Pos) | - ((uint32_t)p_config->length << QSPI_CINSTRCONF_LENGTH_Pos) | - ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) | - ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) | - ((uint32_t)p_config->wipwait << QSPI_CINSTRCONF_WIPWAIT_Pos) | - ((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos)); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -#ifdef __cplusplus -} -#endif - -#endif // NRF_QSPI_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_rng.h b/lib/sdk/components/drivers_nrf/hal/nrf_rng.h deleted file mode 100644 index 791670c..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_rng.h +++ /dev/null @@ -1,282 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief RNG HAL API. - */ - -#ifndef NRF_RNG_H__ -#define NRF_RNG_H__ -/** - * @defgroup nrf_rng_hal RNG HAL - * @{ - * @ingroup nrf_rng - * @brief Hardware access layer for managing the random number generator (RNG). - */ - -#include -#include -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_RNG_TASK_SET (1UL) -#define NRF_RNG_EVENT_CLEAR (0UL) -/** - * @enum nrf_rng_task_t - * @brief RNG tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */ - NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */ -} nrf_rng_task_t; /*lint -restore */ - -/** - * @enum nrf_rng_event_t - * @brief RNG events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */ -} nrf_rng_event_t; /*lint -restore */ - -/** - * @enum nrf_rng_int_mask_t - * @brief RNG interrupts. - */ -typedef enum -{ - NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */ -} nrf_rng_int_mask_t; - -/** - * @enum nrf_rng_short_mask_t - * @brief Types of RNG shortcuts. - */ -typedef enum -{ - NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */ -} nrf_rng_short_mask_t; - -/** - * @brief Function for enabling interrupts. - * - * @param[in] rng_int_mask Mask of interrupts. - */ -__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask); - -/** - * @brief Function for disabling interrupts. - * - * @param[in] rng_int_mask Mask of interrupts. - */ -__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask); - -/** - * @brief Function for getting the state of a specific interrupt. - * - * @param[in] rng_int_mask Interrupt. - * - * @retval true If the interrupt is not enabled. - * @retval false If the interrupt is enabled. - */ -__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask); - -/** - * @brief Function for getting the address of a specific task. - * - * This function can be used by the PPI module. - * - * @param[in] rng_task Task. - */ -__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task); - -/** - * @brief Function for setting a specific task. - * - * @param[in] rng_task Task. - */ -__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task); - -/** - * @brief Function for getting address of a specific event. - * - * This function can be used by the PPI module. - * - * @param[in] rng_event Event. - */ -__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event); - -/** - * @brief Function for clearing a specific event. - * - * @param[in] rng_event Event. - */ -__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event); - -/** - * @brief Function for getting the state of a specific event. - * - * @param[in] rng_event Event. - * - * @retval true If the event is not set. - * @retval false If the event is set. - */ -__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event); - -/** - * @brief Function for setting shortcuts. - * - * @param[in] rng_short_mask Mask of shortcuts. - * - */ -__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask); - -/** - * @brief Function for clearing shortcuts. - * - * @param[in] rng_short_mask Mask of shortcuts. - * - */ -__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask); - -/** - * @brief Function for getting the previously generated random value. - * - * @return Previously generated random value. - */ -__STATIC_INLINE uint8_t nrf_rng_random_value_get(void); - -/** - * @brief Function for enabling digital error correction. - */ -__STATIC_INLINE void nrf_rng_error_correction_enable(void); - -/** - * @brief Function for disabling digital error correction. - */ -__STATIC_INLINE void nrf_rng_error_correction_disable(void); - -/** - *@} - **/ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask) -{ - NRF_RNG->INTENSET = rng_int_mask; -} - -__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask) -{ - NRF_RNG->INTENCLR = rng_int_mask; -} - -__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask) -{ - return (bool)(NRF_RNG->INTENCLR & rng_int_mask); -} - -__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task) -{ - return (uint32_t *)((uint8_t *)NRF_RNG + rng_task); -} - -__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET; -} - -__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event) -{ - return (uint32_t *)((uint8_t *)NRF_RNG + rng_event); -} - -__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event) -{ - return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); -} - -__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask) -{ - NRF_RNG->SHORTS |= rng_short_mask; -} - -__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask) -{ - NRF_RNG->SHORTS &= ~rng_short_mask; -} - -__STATIC_INLINE uint8_t nrf_rng_random_value_get(void) -{ - return (uint8_t)(NRF_RNG->VALUE & RNG_VALUE_VALUE_Msk); -} - -__STATIC_INLINE void nrf_rng_error_correction_enable(void) -{ - NRF_RNG->CONFIG |= RNG_CONFIG_DERCEN_Msk; -} - -__STATIC_INLINE void nrf_rng_error_correction_disable(void) -{ - NRF_RNG->CONFIG &= ~RNG_CONFIG_DERCEN_Msk; -} - -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_RNG_H__ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_rtc.h b/lib/sdk/components/drivers_nrf/hal/nrf_rtc.h deleted file mode 100644 index 2ed996d..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_rtc.h +++ /dev/null @@ -1,343 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief RTC HAL API. - */ - -#ifndef NRF_RTC_H -#define NRF_RTC_H - -/** - * @defgroup nrf_rtc_hal RTC HAL - * @{ - * @ingroup nrf_rtc - * @brief Hardware access layer for managing the real time counter (RTC). - */ - -#include -#include -#include -#include "nrf.h" -#include "nrf_assert.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Macro for getting the number of compare channels available - * in a given RTC instance. - */ - -#define NRF_RTC_CC_CHANNEL_COUNT(id) CONCAT_3(RTC, id, _CC_NUM) - -#define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */ - -/** - * @brief Macro for converting expected frequency to prescaler setting. - */ -#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1) - -/**< Macro for wrapping values to RTC capacity. */ -#define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk) - -#define RTC_CHANNEL_INT_MASK(ch) ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch)) -#define RTC_CHANNEL_EVENT_ADDR(ch) (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t)) -/** - * @enum nrf_rtc_task_t - * @brief RTC tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */ - NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */ - NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */ - NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */ - /*lint -restore*/ -} nrf_rtc_task_t; - -/** - * @enum nrf_rtc_event_t - * @brief RTC events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */ - NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */ - NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */ - NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */ - NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */ - NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */ - /*lint -restore*/ -} nrf_rtc_event_t; - -/** - * @enum nrf_rtc_int_t - * @brief RTC interrupts. - */ -typedef enum -{ - NRF_RTC_INT_TICK_MASK = RTC_INTENSET_TICK_Msk, /**< RTC interrupt from tick event. */ - NRF_RTC_INT_OVERFLOW_MASK = RTC_INTENSET_OVRFLW_Msk, /**< RTC interrupt from overflow event. */ - NRF_RTC_INT_COMPARE0_MASK = RTC_INTENSET_COMPARE0_Msk, /**< RTC interrupt from compare event on channel 0. */ - NRF_RTC_INT_COMPARE1_MASK = RTC_INTENSET_COMPARE1_Msk, /**< RTC interrupt from compare event on channel 1. */ - NRF_RTC_INT_COMPARE2_MASK = RTC_INTENSET_COMPARE2_Msk, /**< RTC interrupt from compare event on channel 2. */ - NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */ -} nrf_rtc_int_t; - -/**@brief Function for setting a compare value for a channel. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] ch Channel. - * @param[in] cc_val Compare value to set. - */ -__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val); - -/**@brief Function for returning the compare value for a channel. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] ch Channel. - * - * @return COMPARE[ch] value. - */ -__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch); - -/**@brief Function for enabling interrupts. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Interrupt mask to be enabled. - */ -__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for disabling interrupts. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Interrupt mask to be disabled. - */ -__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for checking if interrupts are enabled. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Mask of interrupt flags to check. - * - * @return Mask with enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for returning the status of currently enabled interrupts. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * - * @return Value in INTEN register. - */ -__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc); - -/**@brief Function for checking if an event is pending. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Address of the event. - * - * @return Mask of pending events. - */ -__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); - -/**@brief Function for clearing an event. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); - -/**@brief Function for returning a counter value. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * - * @return Counter value. - */ -__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc); - -/**@brief Function for setting a prescaler value. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] val Value to set the prescaler to. - */ -__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val); - -/**@brief Function for returning the address of an event. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the requested event register. - */ -__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); - -/**@brief Function for returning the address of a task. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the requested task register. - */ -__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task); - -/**@brief Function for starting a task. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] task Requested task. - */ -__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task); - -/**@brief Function for enabling events. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Mask of event flags to enable. - */ -__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for disabling an event. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Requested event. - */ -__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t event); - -/** - *@} - **/ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val) -{ - p_rtc->CC[ch] = cc_val; -} - -__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch) -{ - return p_rtc->CC[ch]; -} - -__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->INTENSET = mask; -} - -__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->INTENCLR = mask; -} - -__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - return (p_rtc->INTENSET & mask); -} - -__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc) -{ - return p_rtc->INTENSET; -} - -__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) -{ - return *(volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event); -} - -__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc) -{ - return p_rtc->COUNTER; -} - -__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val) -{ - ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos)); - p_rtc->PRESCALER = val; -} -__STATIC_INLINE uint32_t rtc_prescaler_get(NRF_RTC_Type * p_rtc) -{ - return p_rtc->PRESCALER; -} - -__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) -{ - return (uint32_t)p_rtc + event; -} - -__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task) -{ - return (uint32_t)p_rtc + task; -} - -__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task) -{ - *(__IO uint32_t *)((uint32_t)p_rtc + task) = 1; -} - -__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->EVTENSET = mask; -} -__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->EVTENCLR = mask; -} -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_RTC_H */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_saadc.c b/lib/sdk/components/drivers_nrf/hal/nrf_saadc.c deleted file mode 100644 index 03097ea..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_saadc.c +++ /dev/null @@ -1,62 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief SAADC HAL implementation - */ -#include "sdk_config.h" -#if SAADC_ENABLED -#include "nrf_saadc.h" - -void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const * const config) -{ - NRF_SAADC->CH[channel].CONFIG = - ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk) - | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk) - | ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk) - | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk) - | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk) - | ((config->mode << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk) - | ((config->burst << SAADC_CH_CONFIG_BURST_Pos) & SAADC_CH_CONFIG_BURST_Msk); - nrf_saadc_channel_input_set(channel, config->pin_p, config->pin_n); - return; -} -#endif //SAADC_ENABLED - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_saadc.h b/lib/sdk/components/drivers_nrf/hal/nrf_saadc.h deleted file mode 100644 index 4927729..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_saadc.h +++ /dev/null @@ -1,609 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SAADC_H_ -#define NRF_SAADC_H_ - -/** - * @defgroup nrf_saadc_hal SAADC HAL - * @{ - * @ingroup nrf_saadc - * - * @brief @tagAPI52 Hardware access layer for accessing the SAADC peripheral. - */ - -#include -#include -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_SAADC_CHANNEL_COUNT 8 - -/** - * @brief Resolution of the analog-to-digital converter. - */ -typedef enum -{ - NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution. - NRF_SAADC_RESOLUTION_10BIT = SAADC_RESOLUTION_VAL_10bit, ///< 10 bit resolution. - NRF_SAADC_RESOLUTION_12BIT = SAADC_RESOLUTION_VAL_12bit, ///< 12 bit resolution. - NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution. -} nrf_saadc_resolution_t; - - -/** - * @brief Input selection for the analog-to-digital converter. - */ -typedef enum -{ - NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected. - NRF_SAADC_INPUT_AIN0 = SAADC_CH_PSELP_PSELP_AnalogInput0, ///< Analog input 0 (AIN0). - NRF_SAADC_INPUT_AIN1 = SAADC_CH_PSELP_PSELP_AnalogInput1, ///< Analog input 1 (AIN1). - NRF_SAADC_INPUT_AIN2 = SAADC_CH_PSELP_PSELP_AnalogInput2, ///< Analog input 2 (AIN2). - NRF_SAADC_INPUT_AIN3 = SAADC_CH_PSELP_PSELP_AnalogInput3, ///< Analog input 3 (AIN3). - NRF_SAADC_INPUT_AIN4 = SAADC_CH_PSELP_PSELP_AnalogInput4, ///< Analog input 4 (AIN4). - NRF_SAADC_INPUT_AIN5 = SAADC_CH_PSELP_PSELP_AnalogInput5, ///< Analog input 5 (AIN5). - NRF_SAADC_INPUT_AIN6 = SAADC_CH_PSELP_PSELP_AnalogInput6, ///< Analog input 6 (AIN6). - NRF_SAADC_INPUT_AIN7 = SAADC_CH_PSELP_PSELP_AnalogInput7, ///< Analog input 7 (AIN7). - NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD ///< VDD as input. -} nrf_saadc_input_t; - - -/** - * @brief Analog-to-digital converter oversampling mode. - */ -typedef enum -{ - NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling. - NRF_SAADC_OVERSAMPLE_2X = SAADC_OVERSAMPLE_OVERSAMPLE_Over2x, ///< Oversample 2x. - NRF_SAADC_OVERSAMPLE_4X = SAADC_OVERSAMPLE_OVERSAMPLE_Over4x, ///< Oversample 4x. - NRF_SAADC_OVERSAMPLE_8X = SAADC_OVERSAMPLE_OVERSAMPLE_Over8x, ///< Oversample 8x. - NRF_SAADC_OVERSAMPLE_16X = SAADC_OVERSAMPLE_OVERSAMPLE_Over16x, ///< Oversample 16x. - NRF_SAADC_OVERSAMPLE_32X = SAADC_OVERSAMPLE_OVERSAMPLE_Over32x, ///< Oversample 32x. - NRF_SAADC_OVERSAMPLE_64X = SAADC_OVERSAMPLE_OVERSAMPLE_Over64x, ///< Oversample 64x. - NRF_SAADC_OVERSAMPLE_128X = SAADC_OVERSAMPLE_OVERSAMPLE_Over128x, ///< Oversample 128x. - NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x. -} nrf_saadc_oversample_t; - - -/** - * @brief Analog-to-digital converter channel resistor control. - */ -typedef enum -{ - NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder. - NRF_SAADC_RESISTOR_PULLDOWN = SAADC_CH_CONFIG_RESP_Pulldown, ///< Pull-down to GND. - NRF_SAADC_RESISTOR_PULLUP = SAADC_CH_CONFIG_RESP_Pullup, ///< Pull-up to VDD. - NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2 ///< Set input at VDD/2. -} nrf_saadc_resistor_t; - - -/** - * @brief Gain factor of the analog-to-digital converter input. - */ -typedef enum -{ - NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6. - NRF_SAADC_GAIN1_5 = SAADC_CH_CONFIG_GAIN_Gain1_5, ///< Gain factor 1/5. - NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain1_4, ///< Gain factor 1/4. - NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain1_3, ///< Gain factor 1/3. - NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain1_2, ///< Gain factor 1/2. - NRF_SAADC_GAIN1 = SAADC_CH_CONFIG_GAIN_Gain1, ///< Gain factor 1. - NRF_SAADC_GAIN2 = SAADC_CH_CONFIG_GAIN_Gain2, ///< Gain factor 2. - NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4. -} nrf_saadc_gain_t; - - -/** - * @brief Reference selection for the analog-to-digital converter. - */ -typedef enum -{ - NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference (0.6 V). - NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference. -} nrf_saadc_reference_t; - - -/** - * @brief Analog-to-digital converter acquisition time. - */ -typedef enum -{ - NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us. - NRF_SAADC_ACQTIME_5US = SAADC_CH_CONFIG_TACQ_5us, ///< 5 us. - NRF_SAADC_ACQTIME_10US = SAADC_CH_CONFIG_TACQ_10us, ///< 10 us. - NRF_SAADC_ACQTIME_15US = SAADC_CH_CONFIG_TACQ_15us, ///< 15 us. - NRF_SAADC_ACQTIME_20US = SAADC_CH_CONFIG_TACQ_20us, ///< 20 us. - NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us. -} nrf_saadc_acqtime_t; - - -/** - * @brief Analog-to-digital converter channel mode. - */ -typedef enum -{ - NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single ended, PSELN will be ignored, negative input to ADC shorted to GND. - NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode. -} nrf_saadc_mode_t; - - -/** - * @brief Analog-to-digital converter channel burst mode. - */ -typedef enum -{ - NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation). - NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. -} nrf_saadc_burst_t; - - -/** - * @brief Analog-to-digital converter tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM. - NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled. - NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any on-going conversion. - NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration. -} nrf_saadc_task_t; - - -/** - * @brief Analog-to-digital converter events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started. - NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer. - NRF_SAADC_EVENT_DONE = offsetof(NRF_SAADC_Type, EVENTS_DONE), ///< A conversion task has been completed. - NRF_SAADC_EVENT_RESULTDONE = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE), ///< A result is ready to get transferred to RAM. - NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete. - NRF_SAADC_EVENT_STOPPED = offsetof(NRF_SAADC_Type, EVENTS_STOPPED), ///< The ADC has stopped. - NRF_SAADC_EVENT_CH0_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH), ///< Last result is equal or above CH[0].LIMIT.HIGH. - NRF_SAADC_EVENT_CH0_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITL), ///< Last result is equal or below CH[0].LIMIT.LOW. - NRF_SAADC_EVENT_CH1_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITH), ///< Last result is equal or above CH[1].LIMIT.HIGH. - NRF_SAADC_EVENT_CH1_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITL), ///< Last result is equal or below CH[1].LIMIT.LOW. - NRF_SAADC_EVENT_CH2_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITH), ///< Last result is equal or above CH[2].LIMIT.HIGH. - NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW. - NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH. - NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW. - NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH. - NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW. - NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH. - NRF_SAADC_EVENT_CH5_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITL), ///< Last result is equal or below CH[5].LIMIT.LOW. - NRF_SAADC_EVENT_CH6_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITH), ///< Last result is equal or above CH[6].LIMIT.HIGH. - NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW. - NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH. - NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW. -} nrf_saadc_event_t; - - -/** - * @brief Analog-to-digital converter interrupt masks. - */ -typedef enum -{ - NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event. - NRF_SAADC_INT_END = SAADC_INTENSET_END_Msk, ///< Interrupt on EVENTS_END event. - NRF_SAADC_INT_DONE = SAADC_INTENSET_DONE_Msk, ///< Interrupt on EVENTS_DONE event. - NRF_SAADC_INT_RESULTDONE = SAADC_INTENSET_RESULTDONE_Msk, ///< Interrupt on EVENTS_RESULTDONE event. - NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event. - NRF_SAADC_INT_STOPPED = SAADC_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event. - NRF_SAADC_INT_CH0LIMITH = SAADC_INTENSET_CH0LIMITH_Msk, ///< Interrupt on EVENTS_CH[0].LIMITH event. - NRF_SAADC_INT_CH0LIMITL = SAADC_INTENSET_CH0LIMITL_Msk, ///< Interrupt on EVENTS_CH[0].LIMITL event. - NRF_SAADC_INT_CH1LIMITH = SAADC_INTENSET_CH1LIMITH_Msk, ///< Interrupt on EVENTS_CH[1].LIMITH event. - NRF_SAADC_INT_CH1LIMITL = SAADC_INTENSET_CH1LIMITL_Msk, ///< Interrupt on EVENTS_CH[1].LIMITL event. - NRF_SAADC_INT_CH2LIMITH = SAADC_INTENSET_CH2LIMITH_Msk, ///< Interrupt on EVENTS_CH[2].LIMITH event. - NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event. - NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event. - NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event. - NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event. - NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event. - NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event. - NRF_SAADC_INT_CH5LIMITL = SAADC_INTENSET_CH5LIMITL_Msk, ///< Interrupt on EVENTS_CH[5].LIMITL event. - NRF_SAADC_INT_CH6LIMITH = SAADC_INTENSET_CH6LIMITH_Msk, ///< Interrupt on EVENTS_CH[6].LIMITH event. - NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event. - NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event. - NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event. - NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts. -} nrf_saadc_int_mask_t; - - -/** - * @brief Analog-to-digital converter value limit type. - */ -typedef enum -{ - NRF_SAADC_LIMIT_LOW = 0, - NRF_SAADC_LIMIT_HIGH = 1 -} nrf_saadc_limit_t; - - -typedef int16_t nrf_saadc_value_t; ///< Type of a single ADC conversion result. - - -/** - * @brief Analog-to-digital converter configuration structure. - */ -typedef struct -{ - nrf_saadc_resolution_t resolution; - nrf_saadc_oversample_t oversample; - nrf_saadc_value_t * buffer; - uint32_t buffer_size; -} nrf_saadc_config_t; - - -/** - * @brief Analog-to-digital converter channel configuration structure. - */ -typedef struct -{ - nrf_saadc_resistor_t resistor_p; - nrf_saadc_resistor_t resistor_n; - nrf_saadc_gain_t gain; - nrf_saadc_reference_t reference; - nrf_saadc_acqtime_t acq_time; - nrf_saadc_mode_t mode; - nrf_saadc_burst_t burst; - nrf_saadc_input_t pin_p; - nrf_saadc_input_t pin_n; -} nrf_saadc_channel_config_t; - - -/** - * @brief Function for triggering a specific SAADC task. - * - * @param[in] saadc_task SAADC task. - */ -__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task)) = 0x1UL; -} - - -/** - * @brief Function for getting the address of a specific SAADC task register. - * - * @param[in] saadc_task SAADC task. - * - * @return Address of the specified SAADC task. - */ -__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task) -{ - return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task); -} - - -/** - * @brief Function for getting the state of a specific SAADC event. - * - * @param[in] saadc_event SAADC event. - * - * @return State of the specified SAADC event. - */ -__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event); -} - - -/** - * @brief Function for clearing the specific SAADC event. - * - * @param[in] saadc_event SAADC event. - */ -__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for getting the address of a specific SAADC event register. - * - * @param[in] saadc_event SAADC event. - * - * @return Address of the specified SAADC event. - */ -__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event) -{ - return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)saadc_event); -} - - -/** - * @brief Function for getting the address of a specific SAADC limit event register. - * - * @param[in] channel Channel number. - * @param[in] limit_type Low limit or high limit. - * - * @return Address of the specified SAADC limit event. - */ -__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type) -{ - ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); - if (limit_type == NRF_SAADC_LIMIT_HIGH) - { - return &NRF_SAADC->EVENTS_CH[channel].LIMITH; - } - else - { - return &NRF_SAADC->EVENTS_CH[channel].LIMITL; - } -} - - -/** - * @brief Function for getting the SAADC channel monitoring limit events. - * - * @param[in] channel Channel number. - * @param[in] limit_type Low limit or high limit. - */ -__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type) -{ - if (limit_type == NRF_SAADC_LIMIT_HIGH) - { - return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITH + - (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITH - NRF_SAADC_EVENT_CH0_LIMITH) - * (uint32_t) channel ); - } - else - { - return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITL + - (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITL - NRF_SAADC_EVENT_CH0_LIMITL) - * (uint32_t) channel ); - } -} - - -/** - * @brief Function for configuring the input pins for a specific SAADC channel. - * - * @param[in] channel Channel number. - * @param[in] pselp Positive input. - * @param[in] pseln Negative input. Set to NRF_SAADC_INPUT_DISABLED in single ended mode. - */ -__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel, - nrf_saadc_input_t pselp, - nrf_saadc_input_t pseln) -{ - NRF_SAADC->CH[channel].PSELN = pseln; - NRF_SAADC->CH[channel].PSELP = pselp; -} - - -/** - * @brief Function for setting the SAADC channel monitoring limits. - * - * @param[in] channel Channel number. - * @param[in] low Low limit. - * @param[in] high High limit. - */ -__STATIC_INLINE void nrf_saadc_channel_limits_set(uint8_t channel, int16_t low, int16_t high) -{ - NRF_SAADC->CH[channel].LIMIT = ( - (((uint32_t) low << SAADC_CH_LIMIT_LOW_Pos) & SAADC_CH_LIMIT_LOW_Msk) - | (((uint32_t) high << SAADC_CH_LIMIT_HIGH_Pos) & SAADC_CH_LIMIT_HIGH_Msk)); -} - - -/** - * @brief Function for enabling specified SAADC interrupts. - * - * @param[in] saadc_int_mask Interrupt(s) to enable. - */ -__STATIC_INLINE void nrf_saadc_int_enable(uint32_t saadc_int_mask) -{ - NRF_SAADC->INTENSET = saadc_int_mask; -} - - -/** - * @brief Function for retrieving the state of specified SAADC interrupts. - * - * @param[in] saadc_int_mask Interrupt(s) to check. - * - * @retval true If all specified interrupts are enabled. - * @retval false If at least one of the given interrupts is not enabled. - */ -__STATIC_INLINE bool nrf_saadc_int_enable_check(uint32_t saadc_int_mask) -{ - return (bool)(NRF_SAADC->INTENSET & saadc_int_mask); -} - - -/** - * @brief Function for disabling specified interrupts. - * - * @param saadc_int_mask Interrupt(s) to disable. - */ -__STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask) -{ - NRF_SAADC->INTENCLR = saadc_int_mask; -} - - -/** - * @brief Function for generating masks for SAADC channel limit interrupts. - * - * @param[in] channel SAADC channel number. - * @param[in] limit_type Limit type. - * - * @returns Interrupt mask. - */ -__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type) -{ - ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); - uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ? NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH; - return mask << (channel * 2); -} - - -/** - * @brief Function for checking whether the SAADC is busy. - * - * This function checks whether the analog-to-digital converter is busy with a conversion. - * - * @retval true If the SAADC is busy. - * @retval false If the SAADC is not busy. - */ -__STATIC_INLINE bool nrf_saadc_busy_check(void) -{ - //return ((NRF_SAADC->STATUS & SAADC_STATUS_STATUS_Msk) == SAADC_STATUS_STATUS_Msk); - //simplified for performance - return NRF_SAADC->STATUS; -} - - -/** - * @brief Function for enabling the SAADC. - * - * The analog-to-digital converter must be enabled before use. - */ -__STATIC_INLINE void nrf_saadc_enable(void) -{ - NRF_SAADC->ENABLE = (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for disabling the SAADC. - */ -__STATIC_INLINE void nrf_saadc_disable(void) -{ - NRF_SAADC->ENABLE = (SAADC_ENABLE_ENABLE_Disabled << SAADC_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for checking if the SAADC is enabled. - * - * @retval true If the SAADC is enabled. - * @retval false If the SAADC is not enabled. - */ -__STATIC_INLINE bool nrf_saadc_enable_check(void) -{ - //simplified for performance - return NRF_SAADC->ENABLE; -} - - -/** - * @brief Function for initializing the SAADC result buffer. - * - * @param[in] buffer Pointer to the result buffer. - * @param[in] num Size of buffer in words. - */ -__STATIC_INLINE void nrf_saadc_buffer_init(nrf_saadc_value_t * buffer, uint32_t num) -{ - NRF_SAADC->RESULT.PTR = (uint32_t)buffer; - NRF_SAADC->RESULT.MAXCNT = num; -} - -/** - * @brief Function for getting the number of buffer words transferred since last START operation. - * - * @returns Number of words transferred. - */ -__STATIC_INLINE uint16_t nrf_saadc_amount_get(void) -{ - return NRF_SAADC->RESULT.AMOUNT; -} - - -/** - * @brief Function for setting the SAADC sample resolution. - * - * @param[in] resolution Bit resolution. - */ -__STATIC_INLINE void nrf_saadc_resolution_set(nrf_saadc_resolution_t resolution) -{ - NRF_SAADC->RESOLUTION = resolution; -} - - -/** - * @brief Function for configuring the oversampling feature. - * - * @param[in] oversample Oversampling mode. - */ -__STATIC_INLINE void nrf_saadc_oversample_set(nrf_saadc_oversample_t oversample) -{ - NRF_SAADC->OVERSAMPLE = oversample; -} - -/** - * @brief Function for getting the oversampling feature configuration. - * - * @return Oversampling configuration. - */ -__STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(void) -{ - return (nrf_saadc_oversample_t)NRF_SAADC->OVERSAMPLE; -} - -/** - * @brief Function for initializing the SAADC channel. - * - * @param[in] channel Channel number. - * @param[in] config Pointer to the channel configuration structure. - */ -void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const * const config); - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SAADC_H_ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_spi.h b/lib/sdk/components/drivers_nrf/hal/nrf_spi.h deleted file mode 100644 index 22b7580..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_spi.h +++ /dev/null @@ -1,375 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_spi_hal SPI HAL - * @{ - * @ingroup nrf_spi - * - * @brief Hardware access layer for accessing the SPI peripheral. - */ - -#ifndef NRF_SPI_H__ -#define NRF_SPI_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be used as a parameter for the @ref nrf_spi_pins_set - * function to specify that a given SPI signal (SCK, MOSI, or MISO) - * shall not be connected to a physical pin. - */ -#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief SPI events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY) ///< TXD byte sent and RXD byte received. - /*lint -restore*/ -} nrf_spi_event_t; - -/** - * @brief SPI interrupts. - */ -typedef enum -{ - NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk ///< Interrupt on READY event. -} nrf_spi_int_mask_t; - -/** - * @brief SPI data rates. - */ -typedef enum -{ - NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125, ///< 125 kbps. - NRF_SPI_FREQ_250K = SPI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_SPI_FREQ_500K = SPI_FREQUENCY_FREQUENCY_K500, ///< 500 kbps. - NRF_SPI_FREQ_1M = SPI_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps. - NRF_SPI_FREQ_2M = SPI_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps. - NRF_SPI_FREQ_4M = SPI_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps. - // [conversion to 'int' needed to prevent compilers from complaining - // that the provided value (0x80000000UL) is out of range of "int"] - NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps. -} nrf_spi_frequency_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock. -} nrf_spi_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. - NRF_SPI_BIT_ORDER_LSB_FIRST = SPI_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. -} nrf_spi_bit_order_t; - - -/** - * @brief Function for clearing a specific SPI event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_event Event to clear. - */ -__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event); - -/** - * @brief Function for checking the state of a specific SPI event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event); - -/** - * @brief Function for getting the address of a specific SPI event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg, - nrf_spi_int_mask_t spi_int); - -/** - * @brief Function for enabling the SPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg); - -/** - * @brief Function for disabling the SPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg); - -/** - * @brief Function for configuring SPI pins. - * - * If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] sck_pin SCK pin number. - * @param[in] mosi_pin MOSI pin number. - * @param[in] miso_pin MISO pin number. - */ -__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin); - -/** - * @brief Function for writing data to the SPI transmitter register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] data TX data to send. - */ -__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data); - -/** - * @brief Function for reading data from the SPI receiver register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return RX data received. - */ -__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg); - -/** - * @brief Function for setting the SPI master data rate. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency SPI frequency. - */ -__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg, - nrf_spi_frequency_t frequency); - -/** - * @brief Function for setting the SPI configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_mode SPI mode. - * @param[in] spi_bit_order SPI bit order. - */ -__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg, - nrf_spi_mode_t spi_mode, - nrf_spi_bit_order_t spi_bit_order); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event); -} - -__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event); -} - -__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask) -{ - p_reg->INTENSET = spi_int_mask; -} - -__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask) -{ - p_reg->INTENCLR = spi_int_mask; -} - -__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg, - nrf_spi_int_mask_t spi_int) -{ - return (bool)(p_reg->INTENSET & spi_int); -} - -__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg) -{ - p_reg->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg) -{ - p_reg->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin) -{ - p_reg->PSELSCK = sck_pin; - p_reg->PSELMOSI = mosi_pin; - p_reg->PSELMISO = miso_pin; -} - -__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data) -{ - p_reg->TXD = data; -} - -__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg) -{ - return p_reg->RXD; -} - -__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg, - nrf_spi_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg, - nrf_spi_mode_t spi_mode, - nrf_spi_bit_order_t spi_bit_order) -{ - uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ? - SPI_CONFIG_ORDER_MsbFirst : SPI_CONFIG_ORDER_LsbFirst); - switch (spi_mode) - { - default: - case NRF_SPI_MODE_0: - config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); - break; - - case NRF_SPI_MODE_1: - config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); - break; - - case NRF_SPI_MODE_2: - config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); - break; - - case NRF_SPI_MODE_3: - config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); - break; - } - p_reg->CONFIG = config; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SPI_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_spim.h b/lib/sdk/components/drivers_nrf/hal/nrf_spim.h deleted file mode 100644 index 11d79ca..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_spim.h +++ /dev/null @@ -1,571 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_spim_hal SPIM HAL - * @{ - * @ingroup nrf_spi - * - * @brief Hardware access layer for accessing the SPIM peripheral. - */ - -#ifndef NRF_SPIM_H__ -#define NRF_SPIM_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be used as a parameter for the @ref nrf_spim_pins_set - * function to specify that a given SPI signal (SCK, MOSI, or MISO) - * shall not be connected to a physical pin. - */ -#define NRF_SPIM_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief SPIM tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIM_TASK_START = offsetof(NRF_SPIM_Type, TASKS_START), ///< Start SPI transaction. - NRF_SPIM_TASK_STOP = offsetof(NRF_SPIM_Type, TASKS_STOP), ///< Stop SPI transaction. - NRF_SPIM_TASK_SUSPEND = offsetof(NRF_SPIM_Type, TASKS_SUSPEND), ///< Suspend SPI transaction. - NRF_SPIM_TASK_RESUME = offsetof(NRF_SPIM_Type, TASKS_RESUME) ///< Resume SPI transaction. - /*lint -restore*/ -} nrf_spim_task_t; - -/** - * @brief SPIM events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIM_EVENT_STOPPED = offsetof(NRF_SPIM_Type, EVENTS_STOPPED), ///< SPI transaction has stopped. - NRF_SPIM_EVENT_ENDRX = offsetof(NRF_SPIM_Type, EVENTS_ENDRX), ///< End of RXD buffer reached. - NRF_SPIM_EVENT_END = offsetof(NRF_SPIM_Type, EVENTS_END), ///< End of RXD buffer and TXD buffer reached. - NRF_SPIM_EVENT_ENDTX = offsetof(NRF_SPIM_Type, EVENTS_ENDTX), ///< End of TXD buffer reached. - NRF_SPIM_EVENT_STARTED = offsetof(NRF_SPIM_Type, EVENTS_STARTED) ///< Transaction started. - /*lint -restore*/ -} nrf_spim_event_t; - -/** - * @brief SPIM shortcuts. - */ -typedef enum -{ - NRF_SPIM_SHORT_END_START_MASK = SPIM_SHORTS_END_START_Msk ///< Shortcut between END event and START task. -} nrf_spim_short_mask_t; - -/** - * @brief SPIM interrupts. - */ -typedef enum -{ - NRF_SPIM_INT_STOPPED_MASK = SPIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_SPIM_INT_ENDRX_MASK = SPIM_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event. - NRF_SPIM_INT_END_MASK = SPIM_INTENSET_END_Msk, ///< Interrupt on END event. - NRF_SPIM_INT_ENDTX_MASK = SPIM_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event. - NRF_SPIM_INT_STARTED_MASK = SPIM_INTENSET_STARTED_Msk ///< Interrupt on STARTED event. -} nrf_spim_int_mask_t; - -/** - * @brief SPI master data rates. - */ -typedef enum -{ - NRF_SPIM_FREQ_125K = SPIM_FREQUENCY_FREQUENCY_K125, ///< 125 kbps. - NRF_SPIM_FREQ_250K = SPIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_SPIM_FREQ_500K = SPIM_FREQUENCY_FREQUENCY_K500, ///< 500 kbps. - NRF_SPIM_FREQ_1M = SPIM_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps. - NRF_SPIM_FREQ_2M = SPIM_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps. - NRF_SPIM_FREQ_4M = SPIM_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps. - // [conversion to 'int' needed to prevent compilers from complaining - // that the provided value (0x80000000UL) is out of range of "int"] - NRF_SPIM_FREQ_8M = (int)SPIM_FREQUENCY_FREQUENCY_M8,///< 8 Mbps. -#ifndef SPI_PRESENT - NRF_SPI_FREQ_125K = NRF_SPIM_FREQ_125K, - NRF_SPI_FREQ_250K = NRF_SPIM_FREQ_250K, - NRF_SPI_FREQ_500K = NRF_SPIM_FREQ_500K, - NRF_SPI_FREQ_1M = NRF_SPIM_FREQ_1M, - NRF_SPI_FREQ_2M = NRF_SPIM_FREQ_2M, - NRF_SPI_FREQ_4M = NRF_SPIM_FREQ_4M, - NRF_SPI_FREQ_8M = NRF_SPIM_FREQ_8M, -#endif -} nrf_spim_frequency_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_SPIM_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_SPIM_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_SPIM_MODE_3, ///< SCK active low, sample on trailing edge of clock. -#ifndef SPI_PRESENT - NRF_SPI_MODE_0 = NRF_SPIM_MODE_0, - NRF_SPI_MODE_1 = NRF_SPIM_MODE_1, - NRF_SPI_MODE_2 = NRF_SPIM_MODE_2, - NRF_SPI_MODE_3 = NRF_SPIM_MODE_3, -#endif -} nrf_spim_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_SPIM_BIT_ORDER_MSB_FIRST = SPIM_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. - NRF_SPIM_BIT_ORDER_LSB_FIRST = SPIM_CONFIG_ORDER_LsbFirst, ///< Least significant bit shifted out first. -#ifndef SPI_PRESENT - NRF_SPI_BIT_ORDER_MSB_FIRST = NRF_SPIM_BIT_ORDER_MSB_FIRST, - NRF_SPI_BIT_ORDER_LSB_FIRST = NRF_SPIM_BIT_ORDER_LSB_FIRST, -#endif -} nrf_spim_bit_order_t; - - -/** - * @brief Function for activating a specific SPIM task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_task Task to activate. - */ -__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task); - -/** - * @brief Function for getting the address of a specific SPIM task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task); - -/** - * @brief Function for clearing a specific SPIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_event Event to clear. - */ -__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event); - -/** - * @brief Function for checking the state of a specific SPIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event); - -/** - * @brief Function for getting the address of a specific SPIM event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event); -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask); - -/** - * @brief Function for getting shorts setting. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg, - nrf_spim_int_mask_t spim_int); - -/** - * @brief Function for enabling the SPIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for disabling the SPIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for configuring SPIM pins. - * - * If a given signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] sck_pin SCK pin number. - * @param[in] mosi_pin MOSI pin number. - * @param[in] miso_pin MISO pin number. - */ -__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin); - -/** - * @brief Function for setting the SPI master data rate. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency SPI frequency. - */ -__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg, - nrf_spim_frequency_t frequency); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer with data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the SPI configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_mode SPI mode. - * @param[in] spi_bit_order SPI bit order. - */ -__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg, - nrf_spim_mode_t spi_mode, - nrf_spim_bit_order_t spi_bit_order); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] orc Over-read character that is clocked out in case of - * an over-read of the TXD buffer. - */ -__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg, - uint8_t orc); - -/** - * @brief Function for enabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for disabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for enabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for disabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_task); -} - -__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event); -} - -__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_event); -} - -__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask) -{ - p_reg->SHORTS |= spim_shorts_mask; -} - -__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask) -{ - p_reg->SHORTS &= ~(spim_shorts_mask); -} - -__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg) -{ - return p_reg->SHORTS; -} - -__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask) -{ - p_reg->INTENSET = spim_int_mask; -} - -__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask) -{ - p_reg->INTENCLR = spim_int_mask; -} - -__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg, - nrf_spim_int_mask_t spim_int) -{ - return (bool)(p_reg->INTENSET & spim_int); -} - -__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg) -{ - p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg) -{ - p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin) -{ - p_reg->PSEL.SCK = sck_pin; - p_reg->PSEL.MOSI = mosi_pin; - p_reg->PSEL.MISO = miso_pin; -} - -__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg, - nrf_spim_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buffer; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buffer; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg, - nrf_spim_mode_t spi_mode, - nrf_spim_bit_order_t spi_bit_order) -{ - uint32_t config = (spi_bit_order == NRF_SPIM_BIT_ORDER_MSB_FIRST ? - SPIM_CONFIG_ORDER_MsbFirst : SPIM_CONFIG_ORDER_LsbFirst); - switch (spi_mode) - { - default: - case NRF_SPIM_MODE_0: - config |= (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos); - break; - - case NRF_SPIM_MODE_1: - config |= (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos); - break; - - case NRF_SPIM_MODE_2: - config |= (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos); - break; - - case NRF_SPIM_MODE_3: - config |= (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos); - break; - } - p_reg->CONFIG = config; -} - -__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg, - uint8_t orc) -{ - p_reg->ORC = orc; -} - - -__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg) -{ - p_reg->TXD.LIST = 1; -} - -__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg) -{ - p_reg->TXD.LIST = 0; -} - -__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg) -{ - p_reg->RXD.LIST = 1; -} - -__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg) -{ - p_reg->RXD.LIST = 0; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SPIM_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_spis.h b/lib/sdk/components/drivers_nrf/hal/nrf_spis.h deleted file mode 100644 index 0a11472..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_spis.h +++ /dev/null @@ -1,553 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_spis_hal SPIS HAL - * @{ - * @ingroup nrf_spis - * - * @brief Hardware access layer for accessing the SPIS peripheral. - */ - -#ifndef NRF_SPIS_H__ -#define NRF_SPIS_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be used as a parameter for the @ref nrf_spis_pins_set - * function to specify that a given SPI signal (SCK, MOSI, or MISO) - * shall not be connected to a physical pin. - */ -#define NRF_SPIS_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief SPIS tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIS_TASK_ACQUIRE = offsetof(NRF_SPIS_Type, TASKS_ACQUIRE), ///< Acquire SPI semaphore. - NRF_SPIS_TASK_RELEASE = offsetof(NRF_SPIS_Type, TASKS_RELEASE), ///< Release SPI semaphore, enabling the SPI slave to acquire it. - /*lint -restore*/ -} nrf_spis_task_t; - -/** - * @brief SPIS events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIS_EVENT_END = offsetof(NRF_SPIS_Type, EVENTS_END), ///< Granted transaction completed. - NRF_SPIS_EVENT_ACQUIRED = offsetof(NRF_SPIS_Type, EVENTS_ACQUIRED) ///< Semaphore acquired. - /*lint -restore*/ -} nrf_spis_event_t; - -/** - * @brief SPIS shortcuts. - */ -typedef enum -{ - NRF_SPIS_SHORT_END_ACQUIRE = SPIS_SHORTS_END_ACQUIRE_Msk ///< Shortcut between END event and ACQUIRE task. -} nrf_spis_short_mask_t; - -/** - * @brief SPIS interrupts. - */ -typedef enum -{ - NRF_SPIS_INT_END_MASK = SPIS_INTENSET_END_Msk, ///< Interrupt on END event. - NRF_SPIS_INT_ACQUIRED_MASK = SPIS_INTENSET_ACQUIRED_Msk ///< Interrupt on ACQUIRED event. -} nrf_spis_int_mask_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_SPIS_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_SPIS_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_SPIS_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_SPIS_MODE_3 ///< SCK active low, sample on trailing edge of clock. -} nrf_spis_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_SPIS_BIT_ORDER_MSB_FIRST = SPIS_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. - NRF_SPIS_BIT_ORDER_LSB_FIRST = SPIS_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. -} nrf_spis_bit_order_t; - -/** - * @brief SPI semaphore status. - */ -typedef enum -{ - NRF_SPIS_SEMSTAT_FREE = 0, ///< Semaphore is free. - NRF_SPIS_SEMSTAT_CPU = 1, ///< Semaphore is assigned to the CPU. - NRF_SPIS_SEMSTAT_SPIS = 2, ///< Semaphore is assigned to the SPI slave. - NRF_SPIS_SEMSTAT_CPUPENDING = 3 ///< Semaphore is assigned to the SPI, but a handover to the CPU is pending. -} nrf_spis_semstat_t; - -/** - * @brief SPIS status. - */ -typedef enum -{ - NRF_SPIS_STATUS_OVERREAD = SPIS_STATUS_OVERREAD_Msk, ///< TX buffer over-read detected and prevented. - NRF_SPIS_STATUS_OVERFLOW = SPIS_STATUS_OVERFLOW_Msk ///< RX buffer overflow detected and prevented. -} nrf_spis_status_mask_t; - -/** - * @brief Function for activating a specific SPIS task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_task Task to activate. - */ -__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg, - nrf_spis_task_t spis_task); - -/** - * @brief Function for getting the address of a specific SPIS task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_task_t spis_task); - -/** - * @brief Function for clearing a specific SPIS event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_event Event to clear. - */ -__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg, - nrf_spis_event_t spis_event); - -/** - * @brief Function for checking the state of a specific SPIS event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event); - -/** - * @brief Function for getting the address of a specific SPIS event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, - nrf_spis_int_mask_t spis_int); - -/** - * @brief Function for enabling the SPIS peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for disabling the SPIS peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for retrieving the SPIS semaphore status. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Current semaphore status. - */ -__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for retrieving the SPIS status. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Current SPIS status. - */ -__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for configuring SPIS pins. - * - * If a given signal is not needed, pass the @ref NRF_SPIS_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] sck_pin SCK pin number. - * @param[in] mosi_pin MOSI pin number. - * @param[in] miso_pin MISO pin number. - * @param[in] csn_pin CSN pin number. - */ -__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin, - uint32_t csn_pin); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer that contains the data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -/** - * @brief Function for getting the number of bytes transmitted - * in the last granted transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Number of bytes transmitted. - */ -__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg); - -/** - * @brief Function for getting the number of bytes received - * in the last granted transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Number of bytes received. - */ -__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg); - -/** - * @brief Function for setting the SPI configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_mode SPI mode. - * @param[in] spi_bit_order SPI bit order. - */ -__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg, - nrf_spis_mode_t spi_mode, - nrf_spis_bit_order_t spi_bit_order); - -/** - * @brief Function for setting the default character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] def Default character that is clocked out in case of - * an overflow of the RXD buffer. - */ -__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg, - uint8_t def); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] orc Over-read character that is clocked out in case of - * an over-read of the TXD buffer. - */ -__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg, - uint8_t orc); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg, - nrf_spis_task_t spis_task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_task_t spis_task) -{ - return (uint32_t)p_reg + (uint32_t)spis_task; -} - -__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg, - nrf_spis_event_t spis_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event); -} - -__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event) -{ - return (uint32_t)p_reg + (uint32_t)spis_event; -} - -__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask) -{ - p_reg->SHORTS |= spis_shorts_mask; -} - -__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask) -{ - p_reg->SHORTS &= ~(spis_shorts_mask); -} - -__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask) -{ - p_reg->INTENSET = spis_int_mask; -} - -__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask) -{ - p_reg->INTENCLR = spis_int_mask; -} - -__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, - nrf_spis_int_mask_t spis_int) -{ - return (bool)(p_reg->INTENSET & spis_int); -} - -__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg) -{ - p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg) -{ - p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg) -{ - return (nrf_spis_semstat_t) ((p_reg->SEMSTAT & SPIS_SEMSTAT_SEMSTAT_Msk) - >> SPIS_SEMSTAT_SEMSTAT_Pos); -} - -__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg) -{ - return (nrf_spis_status_mask_t) p_reg->STATUS; -} - -__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin, - uint32_t csn_pin) -{ - p_reg->PSELSCK = sck_pin; - p_reg->PSELMOSI = mosi_pin; - p_reg->PSELMISO = miso_pin; - p_reg->PSELCSN = csn_pin; -} - -__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXDPTR = (uint32_t)p_buffer; - p_reg->MAXTX = length; -} - -__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXDPTR = (uint32_t)p_buffer; - p_reg->MAXRX = length; -} - -__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg) -{ - return (uint8_t) p_reg->AMOUNTTX; -} - -__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg) -{ - return (uint8_t) p_reg->AMOUNTRX; -} - -__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg, - nrf_spis_mode_t spi_mode, - nrf_spis_bit_order_t spi_bit_order) -{ - uint32_t config = (spi_bit_order == NRF_SPIS_BIT_ORDER_MSB_FIRST ? - SPIS_CONFIG_ORDER_MsbFirst : SPIS_CONFIG_ORDER_LsbFirst); - - switch (spi_mode) - { - default: - case NRF_SPIS_MODE_0: - config |= (SPIS_CONFIG_CPOL_ActiveHigh << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Leading << SPIS_CONFIG_CPHA_Pos); - break; - - case NRF_SPIS_MODE_1: - config |= (SPIS_CONFIG_CPOL_ActiveHigh << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Trailing << SPIS_CONFIG_CPHA_Pos); - break; - - case NRF_SPIS_MODE_2: - config |= (SPIS_CONFIG_CPOL_ActiveLow << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Leading << SPIS_CONFIG_CPHA_Pos); - break; - - case NRF_SPIS_MODE_3: - config |= (SPIS_CONFIG_CPOL_ActiveLow << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Trailing << SPIS_CONFIG_CPHA_Pos); - break; - } - p_reg->CONFIG = config; -} - -__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg, - uint8_t orc) -{ - p_reg->ORC = orc; -} - -__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg, - uint8_t def) -{ - p_reg->DEF = def; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SPIS_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_systick.h b/lib/sdk/components/drivers_nrf/hal/nrf_systick.h deleted file mode 100644 index 840fda8..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_systick.h +++ /dev/null @@ -1,184 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SYSTICK_H__ -#define NRF_SYSTICK_H__ - -#include "nrf.h" -#include -#include -#include - -/** - * @defgroup nrf_systick_hal SYSTICK HAL - * @{ - * @ingroup nrf_systick - * - * @brief Hardware access layer for accessing the SYSTICK peripheral. - * - * SYSTICK is ARM peripheral, not Nordic design. - * It means that it has no Nordic-typical interface with Tasks and Events. - * - * Its usage is limited here to implement simple delays. - * Also keep in mind that this timer would be stopped when CPU is sleeping - * (WFE/WFI instruction is successfully executed). - */ - -/** - * @brief Mask of usable bits in the SysTick value - */ -#define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk - -/** - * @brief Flags used by SysTick configuration. - * - * @sa nrf_systick_csr_set - * @sa nrf_systick_csr_get - */ -typedef enum { - NRF_SYSTICK_CSR_COUNTFLAG_MASK = SysTick_CTRL_COUNTFLAG_Msk, /**< Status flag: Returns 1 if timer counted to 0 since the last read of this register. */ - - NRF_SYSTICK_CSR_CLKSOURCE_MASK = SysTick_CTRL_CLKSOURCE_Msk, /**< Configuration bit: Select the SysTick clock source. */ - NRF_SYSTICK_CSR_CLKSOURCE_REF = 0U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select reference clock. */ - NRF_SYSTICK_CSR_CLKSOURCE_CPU = 1U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select CPU clock. */ - - NRF_SYSTICK_CSR_TICKINT_MASK = SysTick_CTRL_TICKINT_Msk, /**< Configuration bit: Enables SysTick exception request. */ - NRF_SYSTICK_CSR_TICKINT_ENABLE = 1U << SysTick_CTRL_TICKINT_Pos, /**< Configuration value: Counting down to zero does not assert the SysTick exception request. */ - NRF_SYSTICK_CSR_TICKINT_DISABLE = 0U << SysTick_CTRL_TICKINT_Pos, /**< Configuration value: Counting down to zero to asserts the SysTick exception request. */ - - NRF_SYSTICK_CSR_ENABLE_MASK = SysTick_CTRL_ENABLE_Msk, /**< Configuration bit: Enable the SysTick timer. */ - NRF_SYSTICK_CSR_ENABLE = 1U << SysTick_CTRL_ENABLE_Pos, /**< Configuration value: Counter enabled. */ - NRF_SYSTICK_CSR_DISABLE = 0U << SysTick_CTRL_ENABLE_Pos /**< Configuration value: Counter disabled. */ -} nrf_systick_csr_flags_t; - -/** - * @brief Get Configuration and Status Register - * - * @return Values composed by @ref nrf_systick_csr_flags_t. - * @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read. - */ -__STATIC_INLINE uint32_t nrf_systick_csr_get(void); - -/** - * @brief Set Configuration and Status Register - * - * @param[in] val The value composed from @ref nrf_systick_csr_flags_t. - */ -__STATIC_INLINE void nrf_systick_csr_set(uint32_t val); - -/** - * @brief Get the current reload value. - * - * @return The reload register value. - */ -__STATIC_INLINE uint32_t nrf_systick_load_get(void); - -/** - * @brief Configure the reload value. - * - * @param[in] val The value to set in the reload register. - */ -__STATIC_INLINE void nrf_systick_load_set(uint32_t val); - -/** - * @brief Read the SysTick current value - * - * @return The current SysTick value - * @sa NRF_SYSTICK_VAL_MASK - */ -__STATIC_INLINE uint32_t nrf_systick_val_get(void); - -/** - * @brief Clear the SysTick current value - * - * @note The SysTick does not allow setting current value. - * Any write to VAL register would clear the timer. - */ -__STATIC_INLINE void nrf_systick_val_clear(void); - -/** - * @brief Read the calibration register - * - * @return The calibration register value - */ -__STATIC_INLINE uint32_t nrf_systick_calib_get(void); - - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t nrf_systick_csr_get(void) -{ - return SysTick->CTRL; -} - -__STATIC_INLINE void nrf_systick_csr_set(uint32_t val) -{ - SysTick->CTRL = val; -} - -__STATIC_INLINE uint32_t nrf_systick_load_get(void) -{ - return SysTick->LOAD; -} - -__STATIC_INLINE void nrf_systick_load_set(uint32_t val) -{ - SysTick->LOAD = val; -} - -__STATIC_INLINE uint32_t nrf_systick_val_get(void) -{ - return SysTick->VAL; -} - -__STATIC_INLINE void nrf_systick_val_clear(void) -{ - SysTick->VAL = 0; -} - -__STATIC_INLINE uint32_t nrf_systick_calib_get(void) -{ - return SysTick->CALIB; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/** @} */ -#endif /* NRF_SYSTICK_H__ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_temp.h b/lib/sdk/components/drivers_nrf/hal/nrf_temp.h deleted file mode 100644 index 5950cad..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_temp.h +++ /dev/null @@ -1,91 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_TEMP_H__ -#define NRF_TEMP_H__ - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** -* @defgroup nrf_temperature TEMP (temperature) abstraction -* @{ -* @ingroup nrf_drivers temperature_example -* @brief Temperature module init and read functions. -* -*/ - -/**@cond NO_DOXYGEN */ -#define MASK_SIGN (0x00000200UL) -#define MASK_SIGN_EXTENSION (0xFFFFFC00UL) - -/** - * @brief Function for preparing the temp module for temperature measurement. - * - * This function initializes the TEMP module and writes to the hidden configuration register. - */ -static __INLINE void nrf_temp_init(void) -{ - /**@note Workaround for PAN_028 rev2.0A anomaly 31 - TEMP: Temperature offset value has to be manually loaded to the TEMP module */ - *(uint32_t *) 0x4000C504 = 0; -} - -/** - * @brief Function for reading temperature measurement. - * - * The function reads the 10 bit 2's complement value and transforms it to a 32 bit 2's complement value. - */ -static __INLINE int32_t nrf_temp_read(void) -{ - /**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */ - return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP); -} -/**@endcond */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_timer.h b/lib/sdk/components/drivers_nrf/hal/nrf_timer.h deleted file mode 100644 index 65671ed..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_timer.h +++ /dev/null @@ -1,630 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_timer_hal Timer HAL - * @{ - * @ingroup nrf_timer - * - * @brief Hardware access layer for accessing the timer peripheral. - */ - -#ifndef NRF_TIMER_H__ -#define NRF_TIMER_H__ - -#include -#include -#include - -#include "nrf_peripherals.h" -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief Macro for validating the correctness of the BIT_WIDTH setting. - */ - -#define TIMER_MAX_SIZE(id) CONCAT_3(TIMER, id, _MAX_SIZE) - -#define TIMER_BIT_WIDTH_MAX(id, bit_width) \ - (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \ - (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_16) : \ - (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_16) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_24) : \ - (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_16) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_24) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_32) : \ - false)))) - -#if TIMER_COUNT > 3 -#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \ - ((p_reg == NRF_TIMER0) && (TIMER_BIT_WIDTH_MAX(0, bit_width))) \ - || ((p_reg == NRF_TIMER1) && (TIMER_BIT_WIDTH_MAX(1, bit_width))) \ - || ((p_reg == NRF_TIMER2) && (TIMER_BIT_WIDTH_MAX(2, bit_width))) \ - || ((p_reg == NRF_TIMER3) && (TIMER_BIT_WIDTH_MAX(3, bit_width))) \ - || ((p_reg == NRF_TIMER4) && (TIMER_BIT_WIDTH_MAX(4, bit_width))) ) - -#else -#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \ - ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \ - || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \ - || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) ) - -#endif - -/** - * @brief Macro for getting the number of capture/compare channels available - * in a given timer instance. - */ -#define NRF_TIMER_CC_CHANNEL_COUNT(id) CONCAT_3(TIMER, id, _CC_NUM) - -/** - * @brief Timer tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer. - NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer. - NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode). - NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value. - NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer. - NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0. - NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1. - NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2. - NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4. - NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5. -#endif - /*lint -restore*/ -} nrf_timer_task_t; - -/** - * @brief Timer events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0. - NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1. - NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2. - NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4. - NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5. -#endif - /*lint -restore*/ -} nrf_timer_event_t; - -/** - * @brief Types of timer shortcuts. - */ -typedef enum -{ - NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0. - NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1. - NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2. - NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4. - NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5. -#endif - NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0. - NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1. - NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2. - NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4. - NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5. -#endif -} nrf_timer_short_mask_t; - -/** - * @brief Timer modes. - */ -typedef enum -{ - NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer. - NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter. -#if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__SDK_DOXYGEN__) - NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter. -#endif -} nrf_timer_mode_t; - -/** - * @brief Timer bit width. - */ -typedef enum -{ - NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit. - NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit. - NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit. - NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit. -} nrf_timer_bit_width_t; - -/** - * @brief Timer prescalers. - */ -typedef enum -{ - NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz. - NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz. - NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz. - NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz. - NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz. - NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz. - NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz. - NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz. - NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz. - NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz. -} nrf_timer_frequency_t; - -/** - * @brief Timer capture/compare channels. - */ -typedef enum -{ - NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0. - NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1. - NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2. - NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4. - NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5. -#endif -} nrf_timer_cc_channel_t; - -/** - * @brief Timer interrupts. - */ -typedef enum -{ - NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0. - NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1. - NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2. - NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4. - NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5. -#endif -} nrf_timer_int_mask_t; - - -/** - * @brief Function for activating a specific timer task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task); - -/** - * @brief Function for getting the address of a specific timer task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task); - -/** - * @brief Function for clearing a specific timer event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event); - -/** - * @brief Function for checking the state of a specific timer event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event); - -/** - * @brief Function for getting the address of a specific timer event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg, - uint32_t timer_int); - -/** - * @brief Function for setting the timer mode. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] mode Timer mode. - */ -__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg, - nrf_timer_mode_t mode); - -/** - * @brief Function for retrieving the timer mode. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Timer mode. - */ -__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg); - -/** - * @brief Function for setting the timer bit width. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] bit_width Timer bit width. - */ -__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg, - nrf_timer_bit_width_t bit_width); - -/** - * @brief Function for retrieving the timer bit width. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Timer bit width. - */ -__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg); - -/** - * @brief Function for setting the timer frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency Timer frequency. - */ -__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg, - nrf_timer_frequency_t frequency); - -/** - * @brief Function for retrieving the timer frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Timer frequency. - */ -__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg); - -/** - * @brief Function for writing the capture/compare register for a specified channel. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] cc_channel Requested capture/compare channel. - * @param[in] cc_value Value to write to the capture/compare register. - */ -__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value); - -/** - * @brief Function for retrieving the capture/compare value for a specified channel. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] cc_channel Requested capture/compare channel. - * - * @return Value from the requested capture/compare register. - */ -__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel); - -/** - * @brief Function for getting a specific timer capture task. - * - * @param[in] channel Capture channel. - * - * @return Capture task. - */ -__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel); - -/** - * @brief Function for getting a specific timer compare event. - * - * @param[in] channel Compare channel. - * - * @return Compare event. - */ -__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel); - -/** - * @brief Function for getting a specific timer compare interrupt. - * - * @param[in] channel Compare channel. - * - * @return Compare interrupt. - */ -__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel); - -/** - * @brief Function for calculating the number of timer ticks for a given time - * (in microseconds) and timer frequency. - * - * @param[in] time_us Time in microseconds. - * @param[in] frequency Timer frequency. - * - * @return Number of timer ticks. - */ -__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us, - nrf_timer_frequency_t frequency); - -/** - * @brief Function for calculating the number of timer ticks for a given time - * (in milliseconds) and timer frequency. - * - * @param[in] time_ms Time in milliseconds. - * @param[in] frequency Timer frequency. - * - * @return Number of timer ticks. - */ -__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms, - nrf_timer_frequency_t frequency); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask) -{ - p_reg->SHORTS |= timer_shorts_mask; -} - -__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask) -{ - p_reg->SHORTS &= ~(timer_shorts_mask); -} - -__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask) -{ - p_reg->INTENSET = timer_int_mask; -} - -__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask) -{ - p_reg->INTENCLR = timer_int_mask; -} - -__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg, - uint32_t timer_int) -{ - return (bool)(p_reg->INTENSET & timer_int); -} - -__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg, - nrf_timer_mode_t mode) -{ - p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) | - ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk); -} - -__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg) -{ - return (nrf_timer_mode_t)(p_reg->MODE); -} - -__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg, - nrf_timer_bit_width_t bit_width) -{ - p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) | - ((bit_width << TIMER_BITMODE_BITMODE_Pos) & - TIMER_BITMODE_BITMODE_Msk); -} - -__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg) -{ - return (nrf_timer_bit_width_t)(p_reg->BITMODE); -} - -__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg, - nrf_timer_frequency_t frequency) -{ - p_reg->PRESCALER = (p_reg->PRESCALER & ~TIMER_PRESCALER_PRESCALER_Msk) | - ((frequency << TIMER_PRESCALER_PRESCALER_Pos) & - TIMER_PRESCALER_PRESCALER_Msk); -} - -__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg) -{ - return (nrf_timer_frequency_t)(p_reg->PRESCALER); -} - -__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value) -{ - p_reg->CC[cc_channel] = cc_value; -} - -__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel) -{ - return (uint32_t)p_reg->CC[cc_channel]; -} - -__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel) -{ - return (nrf_timer_task_t) - ((uint32_t)NRF_TIMER_TASK_CAPTURE0 + (channel * sizeof(uint32_t))); -} - -__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel) -{ - return (nrf_timer_event_t) - ((uint32_t)NRF_TIMER_EVENT_COMPARE0 + (channel * sizeof(uint32_t))); -} - -__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel) -{ - return (nrf_timer_int_mask_t) - ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel); -} - -__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us, - nrf_timer_frequency_t frequency) -{ - // The "frequency" parameter here is actually the prescaler value, and the - // timer runs at the following frequency: f = 16 MHz / 2^prescaler. - uint32_t prescaler = (uint32_t)frequency; - ASSERT(time_us <= (UINT32_MAX / 16UL)); - return ((time_us * 16UL) >> prescaler); -} - -__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms, - nrf_timer_frequency_t frequency) -{ - // The "frequency" parameter here is actually the prescaler value, and the - // timer runs at the following frequency: f = 16000 kHz / 2^prescaler. - uint32_t prescaler = (uint32_t)frequency; - ASSERT(time_ms <= (UINT32_MAX / 16000UL)); - return ((time_ms * 16000UL) >> prescaler); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_TIMER_H__ - -/** @} */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_twi.h b/lib/sdk/components/drivers_nrf/hal/nrf_twi.h deleted file mode 100644 index 053251b..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_twi.h +++ /dev/null @@ -1,452 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_TWI_H__ -#define NRF_TWI_H__ - -/** - * @defgroup nrf_twi_hal TWI HAL - * @{ - * @ingroup nrf_twi - * - * @brief Hardware access layer for managing the TWI peripheral. - */ - -#include -#include -#include - -#include "nrf_peripherals.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief TWI tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWI_TASK_STARTRX = offsetof(NRF_TWI_Type, TASKS_STARTRX), ///< Start TWI receive sequence. - NRF_TWI_TASK_STARTTX = offsetof(NRF_TWI_Type, TASKS_STARTTX), ///< Start TWI transmit sequence. - NRF_TWI_TASK_STOP = offsetof(NRF_TWI_Type, TASKS_STOP), ///< Stop TWI transaction. - NRF_TWI_TASK_SUSPEND = offsetof(NRF_TWI_Type, TASKS_SUSPEND), ///< Suspend TWI transaction. - NRF_TWI_TASK_RESUME = offsetof(NRF_TWI_Type, TASKS_RESUME) ///< Resume TWI transaction. - /*lint -restore*/ -} nrf_twi_task_t; - -/** - * @brief TWI events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWI_EVENT_STOPPED = offsetof(NRF_TWI_Type, EVENTS_STOPPED), ///< TWI stopped. - NRF_TWI_EVENT_RXDREADY = offsetof(NRF_TWI_Type, EVENTS_RXDREADY), ///< TWI RXD byte received. - NRF_TWI_EVENT_TXDSENT = offsetof(NRF_TWI_Type, EVENTS_TXDSENT), ///< TWI TXD byte sent. - NRF_TWI_EVENT_ERROR = offsetof(NRF_TWI_Type, EVENTS_ERROR), ///< TWI error. - NRF_TWI_EVENT_BB = offsetof(NRF_TWI_Type, EVENTS_BB), ///< TWI byte boundary, generated before each byte that is sent or received. - NRF_TWI_EVENT_SUSPENDED = offsetof(NRF_TWI_Type, EVENTS_SUSPENDED) ///< TWI entered the suspended state. - /*lint -restore*/ -} nrf_twi_event_t; - -/** - * @brief TWI shortcuts. - */ -typedef enum -{ - NRF_TWI_SHORT_BB_SUSPEND_MASK = TWI_SHORTS_BB_SUSPEND_Msk, ///< Shortcut between BB event and SUSPEND task. - NRF_TWI_SHORT_BB_STOP_MASK = TWI_SHORTS_BB_STOP_Msk, ///< Shortcut between BB event and STOP task. -} nrf_twi_short_mask_t; - -/** - * @brief TWI interrupts. - */ -typedef enum -{ - NRF_TWI_INT_STOPPED_MASK = TWI_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_TWI_INT_RXDREADY_MASK = TWI_INTENSET_RXDREADY_Msk, ///< Interrupt on RXDREADY event. - NRF_TWI_INT_TXDSENT_MASK = TWI_INTENSET_TXDSENT_Msk, ///< Interrupt on TXDSENT event. - NRF_TWI_INT_ERROR_MASK = TWI_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. - NRF_TWI_INT_BB_MASK = TWI_INTENSET_BB_Msk, ///< Interrupt on BB event. - NRF_TWI_INT_SUSPENDED_MASK = TWI_INTENSET_SUSPENDED_Msk ///< Interrupt on SUSPENDED event. -} nrf_twi_int_mask_t; - -/** - * @brief TWI error source. - */ -typedef enum -{ - NRF_TWI_ERROR_ADDRESS_NACK = TWI_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address. - NRF_TWI_ERROR_DATA_NACK = TWI_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte. - NRF_TWI_ERROR_OVERRUN = TWI_ERRORSRC_OVERRUN_Msk ///< Overrun error. - /**< A new byte was received before the previous byte was read - * from the RXD register (previous data is lost). */ -} nrf_twi_error_t; - -/** - * @brief TWI master clock frequency. - */ -typedef enum -{ - NRF_TWI_FREQ_100K = TWI_FREQUENCY_FREQUENCY_K100, ///< 100 kbps. - NRF_TWI_FREQ_250K = TWI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_TWI_FREQ_400K = TWI_FREQUENCY_FREQUENCY_K400 ///< 400 kbps. -} nrf_twi_frequency_t; - - -/** - * @brief Function for activating a specific TWI task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg, - nrf_twi_task_t task); - -/** - * @brief Function for getting the address of a specific TWI task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg, - nrf_twi_task_t task); - -/** - * @brief Function for clearing a specific TWI event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg, - nrf_twi_event_t event); - -/** - * @brief Function for checking the state of a specific event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg, - nrf_twi_event_t event); - -/** - * @brief Function for getting the address of a specific TWI event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg, - nrf_twi_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg, - nrf_twi_int_mask_t int_mask); - -/** - * @brief Function for enabling the TWI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg); - -/** - * @brief Function for disabling the TWI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg); - -/** - * @brief Function for configuring TWI pins. - * - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] scl_pin SCL pin number. - * @param[in] sda_pin SDA pin number. - */ -__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin); - -/** - * @brief Function for setting the TWI master clock frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency TWI frequency. - */ -__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg, - nrf_twi_frequency_t frequency); - -/** - * @brief Function for checking the TWI error source. - * - * The error flags are cleared after reading. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg); - -/** - * @brief Function for setting the address to be used in TWI transfers. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] address Address to be used in transfers. - */ -__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address); - -/** - * @brief Function for reading data received by TWI. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Received data. - */ -__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg); - -/** - * @brief Function for writing data to be transmitted by TWI. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] data Data to be transmitted. - */ -__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data); - -__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg, - uint32_t shorts_mask); - -/** - * @} - */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg, - nrf_twi_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg, - nrf_twi_task_t task) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg, - nrf_twi_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg, - nrf_twi_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg, - nrf_twi_event_t event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS |= shorts_mask; -} - -__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS &= ~(shorts_mask); -} - -__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg, - nrf_twi_int_mask_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg) -{ - p_reg->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg) -{ - p_reg->ENABLE = (TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin) -{ -#if defined(TWI_PSEL_SCL_CONNECT_Pos) - p_reg->PSEL.SCL = scl_pin; -#else - p_reg->PSELSCL = scl_pin; -#endif - -#if defined(TWI_PSEL_SDA_CONNECT_Pos) - p_reg->PSEL.SDA = sda_pin; -#else - p_reg->PSELSDA = sda_pin; -#endif -} - -__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg, - nrf_twi_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg) -{ - uint32_t error_source = p_reg->ERRORSRC; - - // [error flags are cleared by writing '1' on their position] - p_reg->ERRORSRC = error_source; - - return error_source; -} - -__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address) -{ - p_reg->ADDRESS = address; -} - -__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg) -{ - return (uint8_t)p_reg->RXD; -} - -__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data) -{ - p_reg->TXD = data; -} - -__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS = shorts_mask; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_TWI_H__ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_twim.h b/lib/sdk/components/drivers_nrf/hal/nrf_twim.h deleted file mode 100644 index 8ce13e3..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_twim.h +++ /dev/null @@ -1,527 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_TWIM_H__ -#define NRF_TWIM_H__ - -/** - * @defgroup nrf_twim_hal TWIM HAL - * @{ - * @ingroup nrf_twi - * - * @brief Hardware access layer for managing the TWIM peripheral. - */ - -#include -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief TWIM tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence. - NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence. - NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction. - NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction. - NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction. - /*lint -restore*/ -} nrf_twim_task_t; - -/** - * @brief TWIM events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped. - NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error. - NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended. - NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_RXSTARTED), ///< Receive sequence started. - NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started. - NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte. - NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte. - /*lint -restore*/ -} nrf_twim_event_t; - -/** - * @brief TWIM shortcuts. - */ -typedef enum -{ - NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task. - NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK = TWIM_SHORTS_LASTTX_SUSPEND_Msk, ///< Shortcut between LASTTX event and SUSPEND task. - NRF_TWIM_SHORT_LASTTX_STOP_MASK = TWIM_SHORTS_LASTTX_STOP_Msk, ///< Shortcut between LASTTX event and STOP task. - NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_STARTTX_Msk, ///< Shortcut between LASTRX event and STARTTX task. - NRF_TWIM_SHORT_LASTRX_STOP_MASK = TWIM_SHORTS_LASTRX_STOP_Msk ///< Shortcut between LASTRX event and STOP task. -} nrf_twim_short_mask_t; - -/** - * @brief TWIM interrupts. - */ -typedef enum -{ - NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_TWIM_INT_ERROR_MASK = TWIM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. - NRF_TWIM_INT_SUSPENDED_MASK = (1 << 18), ///< Interrupt on SUSPENDED event. - NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event. - NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event. - NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event. - NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event. -} nrf_twim_int_mask_t; - -/** - * @brief TWIM master clock frequency. - */ -typedef enum -{ - NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps. - NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400, ///< 400 kbps. -#ifndef TWI_PRESENT - NRF_TWI_FREQ_100K = NRF_TWIM_FREQ_100K, - NRF_TWI_FREQ_250K = NRF_TWIM_FREQ_250K, - NRF_TWI_FREQ_400K = NRF_TWIM_FREQ_400K, -#endif -} nrf_twim_frequency_t; - -/** - * @brief TWIM error source. - */ -typedef enum -{ - NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address. - NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte. -#ifndef TWI_PRESENT - NRF_TWI_ERROR_ADDRESS_NACK = NRF_TWIM_ERROR_ADDRESS_NACK, - NRF_TWI_ERROR_DATA_NACK = NRF_TWIM_ERROR_DATA_NACK, -#endif -} nrf_twim_error_t; - - -/** - * @brief Function for activating a specific TWIM task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task); - -/** - * @brief Function for getting the address of a specific TWIM task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task); - -/** - * @brief Function for clearing a specific TWIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event); - -/** - * @brief Function for checking the state of a specific TWIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event); - -/** - * @brief Function for getting the address of a specific TWIM event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for checking the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg, - nrf_twim_int_mask_t int_mask); - -/** - * @brief Function for enabling the TWIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for disabling the TWIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for configuring TWI pins. - * - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] scl_pin SCL pin number. - * @param[in] sda_pin SDA pin number. - */ -__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin); - -/** - * @brief Function for setting the TWI master clock frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency TWI frequency. - */ -__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg, - nrf_twim_frequency_t frequency); - -/** - * @brief Function for checking the TWI error source. - * - * The error flags are cleared after reading. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for setting the address to be used in TWI transfers. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] address Address to be used in transfers. - */ -__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg, - uint8_t address); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer with data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask); - -__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg); - -__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for enabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for disabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for enabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for disabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg); - -/** - * @} - */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS |= shorts_mask; -} - -__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS &= ~(shorts_mask); -} - -__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg, - nrf_twim_int_mask_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg) -{ - p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg) -{ - p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin) -{ - p_reg->PSEL.SCL = scl_pin; - p_reg->PSEL.SDA = sda_pin; -} - -__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg, - nrf_twim_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg) -{ - uint32_t error_source = p_reg->ERRORSRC; - - // [error flags are cleared by writing '1' on their position] - p_reg->ERRORSRC = error_source; - - return error_source; -} - -__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg, - uint8_t address) -{ - p_reg->ADDRESS = address; -} - -__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buffer; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buffer; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS = shorts_mask; -} - -__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg) -{ - return p_reg->TXD.AMOUNT; -} - -__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg) -{ - return p_reg->RXD.AMOUNT; -} - -__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg) -{ - p_reg->TXD.LIST = 1; -} - -__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg) -{ - p_reg->TXD.LIST = 0; -} - -__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg) -{ - p_reg->RXD.LIST = 1; -} - -__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg) -{ - p_reg->RXD.LIST = 0; -} -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_TWIM_H__ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_twis.h b/lib/sdk/components/drivers_nrf/hal/nrf_twis.h deleted file mode 100644 index 80cb24c..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_twis.h +++ /dev/null @@ -1,706 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @ingroup nrf_twis - * @defgroup nrf_twis_hal TWIS HAL - * @{ - * - * @brief @tagAPI52 Hardware access layer for Two Wire Interface Slave with EasyDMA - * (TWIS) peripheral. - */ -#ifndef NRF_TWIS_H__ -#define NRF_TWIS_H__ - -#include "nrf.h" -#include "sdk_config.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief TWIS tasks - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */ - NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */ - NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */ - NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */ - NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */ - /*lint -restore*/ -} nrf_twis_task_t; - -/** - * @brief TWIS events - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */ - NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */ - NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */ - NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */ - NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */ - NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */ - /*lint -restore*/ -} nrf_twis_event_t; - -/** - * @brief TWIS shortcuts - */ -typedef enum -{ - NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */ - NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */ -} nrf_twis_short_mask_t; - -/** - * @brief TWIS interrupts - */ -typedef enum -{ - NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */ - NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */ - NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */ - NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */ - NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */ - NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */ -} nrf_twis_int_mask_t; - -/** - * @brief TWIS error source - */ -typedef enum -{ - NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */ - NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */ - NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */ -} nrf_twis_error_t; - -/** - * @brief TWIS address matching configuration - */ -typedef enum -{ - NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */ - NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */ - NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */ -} nrf_twis_config_addr_mask_t; - -/** - * @brief Variable type to hold amount of data for EasyDMA - * - * Variable of the minimum size that can hold the amount of data to transfer. - * - * @note - * Defined to make it simple to change if EasyDMA would be updated to support more data in - * the future devices to. - */ -typedef uint8_t nrf_twis_amount_t; - -/** - * @brief Smallest variable type to hold TWI address - * - * Variable of the minimum size that can hold single TWI address. - * - * @note - * Defined to make it simple to change if new TWI would support for example - * 10 bit addressing mode. - */ -typedef uint8_t nrf_twis_address_t; - - -/** - * @brief Function for activating a specific TWIS task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param task Task. - */ -__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task); - -/** - * @brief Function for returning the address of a specific TWIS task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_twis_task_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_task_t task); - -/** - * @brief Function for clearing a specific event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param event Event. - */ -__STATIC_INLINE void nrf_twis_event_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event); -/** - * @brief Function for returning the state of a specific event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_twis_event_check( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event); - - -/** - * @brief Function for getting and clearing the state of specific event - * - * This function checks the state of the event and clears it. - * @param[in,out] p_reg Pointer to the peripheral registers structure. - * @param event Event. - * - * @retval true If the event was set. - * @retval false If the event was not set. - */ -__STATIC_INLINE bool nrf_twis_event_get_and_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event); - - -/** - * @brief Function for returning the address of a specific TWIS event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param event Event. - * - * @return Address. - */ -__STATIC_INLINE uint32_t nrf_twis_event_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event); - -/** - * @brief Function for setting a shortcut. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); - -/** - * @brief Function for clearing shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); - -/** - * @brief Get the shorts mask - * - * Function returns shorts register. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Flags of currently enabled shortcuts - */ -__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg); - -/** - * @brief Function for enabling selected interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving the state of selected interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts mask. - * - * @retval true If any of selected interrupts is enabled. - * @retval false If none of selected interrupts is enabled. - */ -__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask); - -/** - * @brief Function for disabling selected interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving and clearing the TWIS error source. - * - * @attention Error sources are cleared after read. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Error source mask with values from @ref nrf_twis_error_t. - */ -__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg); - -/** - * @brief Get information which of addresses matched - * - * Function returns index in the address table - * that points to the address that already matched. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Index of matched address - */ -__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg); - -/** - * @brief Function for enabling TWIS. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg); - -/** - * @brief Function for disabling TWIS. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg); - -/** - * @brief Function for configuring TWIS pins. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param scl SCL pin number. - * @param sda SDA pin number. - */ -__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer for received data. - * @param length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_twis_rx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function that prepares TWIS for receiving - * - * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer for received data. - * @param length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_twis_rx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function for getting number of bytes received in the last transaction. - * - * @param[in] p_reg TWIS instance. - * @return Amount of bytes received. - * */ -__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer with data to send. - * @param length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_twis_tx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function that prepares TWIS for transmitting - * - * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer with data to send. - * @param length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_twis_tx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function for getting number of bytes transmitted in the last transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Amount of bytes transmitted. - */ -__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg); - -/** - * @brief Function for setting slave address - * - * Function sets the selected address for this TWI interface. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param n Index of address to set - * @param addr Addres to set - * @sa nrf_twis_config_address_set - * @sa nrf_twis_config_address_get - */ -__STATIC_INLINE void nrf_twis_address_set( - NRF_TWIS_Type * const p_reg, - uint_fast8_t n, - nrf_twis_address_t addr); - -/** - * @brief Function for retrieving configured slave address - * - * Function gets the selected address for this TWI interface. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param n Index of address to get - */ -__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get( - NRF_TWIS_Type const * const p_reg, - uint_fast8_t n); - -/** - * @brief Function for setting the device address configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param addr_mask Mask of address indexes of what device should answer to. - * - * @sa nrf_twis_address_set - */ -__STATIC_INLINE void nrf_twis_config_address_set( - NRF_TWIS_Type * const p_reg, - nrf_twis_config_addr_mask_t addr_mask); - -/** - * @brief Function for retrieving the device address configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Mask of address indexes of what device should answer to. - */ -__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( - NRF_TWIS_Type const * const p_reg); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] orc Over-read character. Character clocked out in case of - * over-read of the TXD buffer. - */ -__STATIC_INLINE void nrf_twis_orc_set( - NRF_TWIS_Type * const p_reg, - uint8_t orc); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Over-read character configured for selected instance. - */ -__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg); - - -/** @} */ /* End of nrf_twis_hal */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/* ------------------------------------------------------------------------------------------------ - * Internal functions - */ - -/** - * @internal - * @brief Internal function for getting task/event register address - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset) -{ - return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); -} - -/** - * @internal - * @brief Internal function for getting task/event register address - constant version - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset) -{ - return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); -} - - -/* ------------------------------------------------------------------------------------------------ - * Interface functions definitions - */ - - -void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task) -{ - *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL; -} - -uint32_t nrf_twis_task_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_task_t task) -{ - return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task); -} - -void nrf_twis_event_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event) -{ - *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -bool nrf_twis_event_check( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event) -{ - return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); -} - -bool nrf_twis_event_get_and_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event) -{ - bool ret = nrf_twis_event_check(p_reg, event); - if (ret) - { - nrf_twis_event_clear(p_reg, event); - } - return ret; -} - -uint32_t nrf_twis_event_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event) -{ - return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); -} - -void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) -{ - p_reg->SHORTS |= short_mask; -} - -void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) -{ - if (~0U == short_mask) - { - /* Optimized version for "disable all" */ - p_reg->SHORTS = 0; - } - else - { - p_reg->SHORTS &= ~short_mask; - } -} - -uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg) -{ - return p_reg->SHORTS; -} - -void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg) -{ - uint32_t ret = p_reg->ERRORSRC; - p_reg->ERRORSRC = ret; - return ret; -} - -uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg) -{ - return (uint_fast8_t)p_reg->MATCH; -} - -void nrf_twis_enable(NRF_TWIS_Type * const p_reg) -{ - p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos); -} - -void nrf_twis_disable(NRF_TWIS_Type * const p_reg) -{ - p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos); -} - -void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda) -{ - p_reg->PSEL.SCL = scl; - p_reg->PSEL.SDA = sda; -} - -void nrf_twis_rx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buf; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twis_rx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length) -{ - nrf_twis_rx_buffer_set(p_reg, p_buf, length); - nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX); -} - -nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg) -{ - return (nrf_twis_amount_t)p_reg->RXD.AMOUNT; -} - -void nrf_twis_tx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buf; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twis_tx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length) -{ - nrf_twis_tx_buffer_set(p_reg, p_buf, length); - nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX); -} - -nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg) -{ - return (nrf_twis_amount_t)p_reg->TXD.AMOUNT; -} - -void nrf_twis_address_set( - NRF_TWIS_Type * const p_reg, - uint_fast8_t n, - nrf_twis_address_t addr) -{ - p_reg->ADDRESS[n] = addr; -} - -nrf_twis_address_t nrf_twis_address_get( - NRF_TWIS_Type const * const p_reg, - uint_fast8_t n) -{ - return (nrf_twis_address_t)p_reg->ADDRESS[n]; -} -void nrf_twis_config_address_set( - NRF_TWIS_Type * const p_reg, - nrf_twis_config_addr_mask_t addr_mask) -{ - /* This is the only configuration in TWIS - just write it without masking */ - p_reg->CONFIG = addr_mask; -} - -nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg) -{ - return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk); -} - -void nrf_twis_orc_set( - NRF_TWIS_Type * const p_reg, - uint8_t orc) -{ - p_reg->ORC = orc; -} - -uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg) -{ - return (uint8_t)p_reg->ORC; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_TWIS_H__ */ - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_uart.h b/lib/sdk/components/drivers_nrf/hal/nrf_uart.h deleted file mode 100644 index e2e2699..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_uart.h +++ /dev/null @@ -1,549 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_UART_H__ -#define NRF_UART_H__ - -#include "nrf.h" -#include "nrf_peripherals.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -//Temporary defining legacy UART for instance 1 -#define NRF_UART1 (NRF_UART_Type *)NRF_UARTE1 - -/** - * @defgroup nrf_uart_hal UART HAL - * @{ - * @ingroup nrf_uart - * - * @brief Hardware access layer for accessing the UART peripheral. - */ - -#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF - -/** - * @enum nrf_uart_task_t - * @brief UART tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */ - NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */ - NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */ - NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */ - NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */ - /*lint -restore*/ -} nrf_uart_task_t; - -/** - * @enum nrf_uart_event_t - * @brief UART events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */ - NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */ - NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */ - NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */ - NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */ - NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */ - /*lint -restore*/ -} nrf_uart_event_t; - -/** - * @enum nrf_uart_int_mask_t - * @brief UART interrupts. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */ - NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */ - NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */ - NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */ - NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */ - NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */ - /*lint -restore*/ -} nrf_uart_int_mask_t; - -/** - * @enum nrf_uart_baudrate_t - * @brief Baudrates supported by UART. - */ -typedef enum -{ -#ifdef UARTE_PRESENT - NRF_UART_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */ - NRF_UART_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */ - NRF_UART_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */ - NRF_UART_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */ - NRF_UART_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */ - NRF_UART_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */ - NRF_UART_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */ - NRF_UART_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */ - NRF_UART_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */ - NRF_UART_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */ - NRF_UART_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */ - NRF_UART_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */ - NRF_UART_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */ - NRF_UART_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */ - NRF_UART_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */ - NRF_UART_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */ -#else - NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */ - NRF_UART_BAUDRATE_2400 = UART_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */ - NRF_UART_BAUDRATE_4800 = UART_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */ - NRF_UART_BAUDRATE_9600 = UART_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */ - NRF_UART_BAUDRATE_14400 = UART_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */ - NRF_UART_BAUDRATE_19200 = UART_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */ - NRF_UART_BAUDRATE_28800 = UART_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */ - NRF_UART_BAUDRATE_38400 = UART_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */ - NRF_UART_BAUDRATE_57600 = UART_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */ - NRF_UART_BAUDRATE_76800 = UART_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */ - NRF_UART_BAUDRATE_115200 = UART_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */ - NRF_UART_BAUDRATE_230400 = UART_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */ - NRF_UART_BAUDRATE_250000 = UART_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */ - NRF_UART_BAUDRATE_460800 = UART_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */ - NRF_UART_BAUDRATE_921600 = UART_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */ - NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */ -#endif -} nrf_uart_baudrate_t; - -/** - * @enum nrf_uart_error_mask_t - * @brief Types of UART error masks. - */ -typedef enum -{ - NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */ - NRF_UART_ERROR_PARITY_MASK = UART_ERRORSRC_PARITY_Msk, /**< Parity error. */ - NRF_UART_ERROR_FRAMING_MASK = UART_ERRORSRC_FRAMING_Msk, /**< Framing error. */ - NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */ -} nrf_uart_error_mask_t; - -/** - * @enum nrf_uart_parity_t - * @brief Types of UART parity modes. - */ -typedef enum -{ - NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */ - NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */ -} nrf_uart_parity_t; - -/** - * @enum nrf_uart_hwfc_t - * @brief Types of UART flow control modes. - */ -typedef enum -{ - NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */ - NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */ -} nrf_uart_hwfc_t; - -/** - * @brief Function for clearing a specific UART event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event); - -/** - * @brief Function for checking the state of a specific UART event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval True if event is set, False otherwise. - */ -__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event); - -/** - * @brief Function for returning the address of a specific UART event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Desired event. - * - * @retval Address of specified event register. - */ -__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg, - nrf_uart_event_t event); - -/** - * @brief Function for enabling a specific interrupt. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Mask of interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for disabling specific interrupts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for getting error source mask. Function is clearing error source flags after reading. - * - * @param p_reg Pointer to the peripheral registers structure. - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg); - -/** - * @brief Function for enabling UART. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg); - -/** - * @brief Function for disabling UART. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg); - -/** - * @brief Function for configuring TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pseltxd TXD pin number. - * @param pselrxd RXD pin number. - */ -__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd); - -/** - * @brief Function for disconnecting TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting TX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting RX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting RTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting CTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg); - - -/** - * @brief Function for configuring flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pselrts RTS pin number. - * @param pselcts CTS pin number. - */ -__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, - uint32_t pselrts, - uint32_t pselcts); - -/** - * @brief Function for disconnecting flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg); - -/** - * @brief Function for reading RX data. - * - * @param p_reg Pointer to the peripheral registers structure. - * @return Received byte. - */ -__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for setting Tx data. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param txd Byte. - */ -__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd); - -/** - * @brief Function for starting an UART task. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - */ -__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task); - -/** - * @brief Function for returning the address of a specific task register. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task); - -/** - * @brief Function for configuring UART. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param hwfc Hardware flow control. Enabled if true. - * @param parity Parity. Included if true. - */ -__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg, - nrf_uart_parity_t parity, - nrf_uart_hwfc_t hwfc); - -/** - * @brief Function for setting UART baudrate. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param baudrate Baudrate. - */ -__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif - -} - -__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg, - nrf_uart_event_t event) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg) -{ - uint32_t errsrc_mask = p_reg->ERRORSRC; - p_reg->ERRORSRC = errsrc_mask; - return errsrc_mask; -} - -__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg) -{ - p_reg->ENABLE = UART_ENABLE_ENABLE_Enabled; -} - -__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg) -{ - p_reg->ENABLE = UART_ENABLE_ENABLE_Disabled; -} - -__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) -{ -#if defined(UART_PSEL_RXD_CONNECT_Pos) - p_reg->PSEL.RXD = pselrxd; -#else - p_reg->PSELRXD = pselrxd; -#endif -#if defined(UART_PSEL_TXD_CONNECT_Pos) - p_reg->PSEL.TXD = pseltxd; -#else - p_reg->PSELTXD = pseltxd; -#endif -} - -__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg) -{ - nrf_uart_txrx_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED); -} - -__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_TXD_CONNECT_Pos) - return p_reg->PSEL.TXD; -#else - return p_reg->PSELTXD; -#endif -} - -__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_RXD_CONNECT_Pos) - return p_reg->PSEL.RXD; -#else - return p_reg->PSELRXD; -#endif -} - -__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_RTS_CONNECT_Pos) - return p_reg->PSEL.RTS; -#else - return p_reg->PSELRTS; -#endif -} - -__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_RTS_CONNECT_Pos) - return p_reg->PSEL.CTS; -#else - return p_reg->PSELCTS; -#endif -} - -__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, uint32_t pselrts, uint32_t pselcts) -{ -#if defined(UART_PSEL_RTS_CONNECT_Pos) - p_reg->PSEL.RTS = pselrts; -#else - p_reg->PSELRTS = pselrts; -#endif - -#if defined(UART_PSEL_RTS_CONNECT_Pos) - p_reg->PSEL.CTS = pselcts; -#else - p_reg->PSELCTS = pselcts; -#endif -} - -__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg) -{ - nrf_uart_hwfc_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED); -} - -__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg) -{ - return p_reg->RXD; -} - -__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd) -{ - p_reg->TXD = txd; -} - -__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task) -{ - return (uint32_t)p_reg + (uint32_t)task; -} - -__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg, - nrf_uart_parity_t parity, - nrf_uart_hwfc_t hwfc) -{ - p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc; -} - -__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate) -{ - p_reg->BAUDRATE = baudrate; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif //NRF_UART_H__ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_uarte.h b/lib/sdk/components/drivers_nrf/hal/nrf_uarte.h deleted file mode 100644 index 7d33c69..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_uarte.h +++ /dev/null @@ -1,609 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_UARTE_H__ -#define NRF_UARTE_H__ - -#include "nrf.h" -#include "nrf_peripherals.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_UARTE_PSEL_DISCONNECTED 0xFFFFFFFF - -/** - * @defgroup nrf_uarte_hal UARTE HAL - * @{ - * @ingroup nrf_uart - * - * @brief Hardware access layer for accessing the UARTE peripheral. - */ - -/** - * @enum nrf_uarte_task_t - * @brief UARTE tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX),///< Start UART receiver. - NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver. - NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX),///< Start UART transmitter. - NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter. - NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer. - /*lint -restore*/ -} nrf_uarte_task_t; - -/** - * @enum nrf_uarte_event_t - * @brief UARTE events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated. - NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated. - NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up. - NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted. - NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected. - NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout. - NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED),///< Receiver has started. - NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED),///< Transmitter has started. - NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped. - /*lint -restore*/ -} nrf_uarte_event_t; - -/** - * @brief Types of UARTE shortcuts. - */ -typedef enum -{ - NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk,///< Shortcut between ENDRX event and STARTRX task. - NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk, ///< Shortcut between ENDRX event and STOPRX task. -} nrf_uarte_short_t; - - -/** - * @enum nrf_uarte_int_mask_t - * @brief UARTE interrupts. - */ -typedef enum -{ - NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event. - NRF_UARTE_INT_NCTSRX_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event. - NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event. - NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event. - NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. - NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event. - NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk,///< Interrupt on RXSTARTED event. - NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk,///< Interrupt on TXSTARTED event. - NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event. -} nrf_uarte_int_mask_t; - -/** - * @enum nrf_uarte_baudrate_t - * @brief Baudrates supported by UARTE. - */ -typedef enum -{ - NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud. - NRF_UARTE_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud. - NRF_UARTE_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud. - NRF_UARTE_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud. - NRF_UARTE_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud. - NRF_UARTE_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud. - NRF_UARTE_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud. - NRF_UARTE_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud. - NRF_UARTE_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud. - NRF_UARTE_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud. - NRF_UARTE_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud. - NRF_UARTE_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud. - NRF_UARTE_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud. - NRF_UARTE_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud. - NRF_UARTE_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud. - NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud. -#ifndef UART_PRESENT - NRF_UART_BAUDRATE_1200 = NRF_UARTE_BAUDRATE_1200, - NRF_UART_BAUDRATE_2400 = NRF_UARTE_BAUDRATE_2400, - NRF_UART_BAUDRATE_4800 = NRF_UARTE_BAUDRATE_4800, - NRF_UART_BAUDRATE_9600 = NRF_UARTE_BAUDRATE_9600, - NRF_UART_BAUDRATE_14400 = NRF_UARTE_BAUDRATE_14400, - NRF_UART_BAUDRATE_19200 = NRF_UARTE_BAUDRATE_19200, - NRF_UART_BAUDRATE_28800 = NRF_UARTE_BAUDRATE_28800, - NRF_UART_BAUDRATE_38400 = NRF_UARTE_BAUDRATE_38400, - NRF_UART_BAUDRATE_57600 = NRF_UARTE_BAUDRATE_57600, - NRF_UART_BAUDRATE_76800 = NRF_UARTE_BAUDRATE_76800, - NRF_UART_BAUDRATE_115200 = NRF_UARTE_BAUDRATE_115200, - NRF_UART_BAUDRATE_230400 = NRF_UARTE_BAUDRATE_230400, - NRF_UART_BAUDRATE_250000 = NRF_UARTE_BAUDRATE_250000, - NRF_UART_BAUDRATE_460800 = NRF_UARTE_BAUDRATE_460800, - NRF_UART_BAUDRATE_921600 = NRF_UARTE_BAUDRATE_921600, - NRF_UART_BAUDRATE_1000000 = NRF_UARTE_BAUDRATE_1000000, -#endif -} nrf_uarte_baudrate_t; - -/** - * @enum nrf_uarte_error_mask_t - * @brief Types of UARTE error masks. - */ -typedef enum -{ - NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error. - NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error. - NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error. - NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk, ///< Break error. -#ifndef UART_PRESENT - NRF_UART_ERROR_OVERRUN_MASK = NRF_UARTE_ERROR_OVERRUN_MASK, - NRF_UART_ERROR_PARITY_MASK = NRF_UARTE_ERROR_PARITY_MASK, - NRF_UART_ERROR_FRAMING_MASK = NRF_UARTE_ERROR_FRAMING_MASK, - NRF_UART_ERROR_BREAK_MASK = NRF_UARTE_ERROR_BREAK_MASK, -#endif -} nrf_uarte_error_mask_t; - -/** - * @enum nrf_uarte_parity_t - * @brief Types of UARTE parity modes. - */ -typedef enum -{ - NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded. - NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos, ///< Parity included. -#ifndef UART_PRESENT - NRF_UART_PARITY_EXCLUDED = NRF_UARTE_PARITY_EXCLUDED, - NRF_UART_PARITY_INCLUDED = NRF_UARTE_PARITY_INCLUDED, -#endif -} nrf_uarte_parity_t; - -/** - * @enum nrf_uarte_hwfc_t - * @brief Types of UARTE flow control modes. - */ -typedef enum -{ - NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled. - NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control enabled. -#ifndef UART_PRESENT - NRF_UART_HWFC_DISABLED = NRF_UARTE_HWFC_DISABLED, - NRF_UART_HWFC_ENABLED = NRF_UARTE_HWFC_ENABLED, -#endif -} nrf_uarte_hwfc_t; - - -/** - * @brief Function for clearing a specific UARTE event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event); - -/** - * @brief Function for checking the state of a specific UARTE event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval True if event is set, False otherwise. - */ -__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event); - -/** - * @brief Function for returning the address of a specific UARTE event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Desired event. - * - * @retval Address of specified event register. - */ -__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg, - nrf_uarte_event_t event); - -/** - * @brief Function for enabling UARTE shortcuts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask); - -/** - * @brief Function for disabling UARTE shortcuts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask); - -/** - * @brief Function for enabling UARTE interrupts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Mask of interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask); - -/** - * @brief Function for disabling specific interrupts. - * - * @param p_reg Instance. - * @param int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for getting error source mask. Function is clearing error source flags after reading. - * - * @param p_reg Pointer to the peripheral registers structure. - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for enabling UARTE. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for disabling UARTE. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for configuring TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pseltxd TXD pin number. - * @param pselrxd RXD pin number. - */ -__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd); - -/** - * @brief Function for disconnecting TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting TX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting RX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting RTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting CTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg); - - -/** - * @brief Function for configuring flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pselrts RTS pin number. - * @param pselcts CTS pin number. - */ -__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, - uint32_t pselrts, - uint32_t pselcts); - -/** - * @brief Function for disconnecting flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for starting an UARTE task. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - */ -__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task); - -/** - * @brief Function for returning the address of a specific task register. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task); - -/** - * @brief Function for configuring UARTE. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param hwfc Hardware flow control. Enabled if true. - * @param parity Parity. Included if true. - */ -__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg, - nrf_uarte_parity_t parity, - nrf_uarte_hwfc_t hwfc); - - -/** - * @brief Function for setting UARTE baudrate. - * - * @param p_reg Instance. - * @param baudrate Baudrate. - */ -__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Instance. - * @param[in] p_buffer Pointer to the buffer with data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for getting number of bytes transmitted in the last transaction. - * - * @param[in] p_reg Instance. - * - * @retval Amount of bytes transmitted. - */ -__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -/** - * @brief Function for getting number of bytes received in the last transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @retval Amount of bytes received. - */ -__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif - -} - -__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg, - nrf_uarte_event_t event) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask) -{ - p_reg->SHORTS |= shorts_mask; -} - -__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask) -{ - p_reg->SHORTS &= ~(shorts_mask); -} - -__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg) -{ - uint32_t errsrc_mask = p_reg->ERRORSRC; - p_reg->ERRORSRC = errsrc_mask; - return errsrc_mask; -} - -__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg) -{ - p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled; -} - -__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg) -{ - p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled; -} - -__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) -{ - p_reg->PSEL.TXD = pseltxd; - p_reg->PSEL.RXD = pselrxd; -} - -__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg) -{ - nrf_uarte_txrx_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED); -} - -__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.TXD; -} - -__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.RXD; -} - -__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.RTS; -} - -__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.CTS; -} - -__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, uint32_t pselrts, uint32_t pselcts) -{ - p_reg->PSEL.RTS = pselrts; - p_reg->PSEL.CTS = pselcts; -} - -__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg) -{ - nrf_uarte_hwfc_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED); -} - -__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task) -{ - return (uint32_t)p_reg + (uint32_t)task; -} - -__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg, - nrf_uarte_parity_t parity, - nrf_uarte_hwfc_t hwfc) -{ - p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc; -} - -__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate) -{ - p_reg->BAUDRATE = baudrate; -} - -__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buffer; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->TXD.AMOUNT; -} - -__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buffer; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->RXD.AMOUNT; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif //NRF_UARTE_H__ - diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_usbd.h b/lib/sdk/components/drivers_nrf/hal/nrf_usbd.h deleted file mode 100644 index ef6f4b4..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_usbd.h +++ /dev/null @@ -1,1435 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_USBD_H__ -#define NRF_USBD_H__ - -/** - * @ingroup nrf_drivers - * @defgroup nrf_usbd_hal USBD HAL - * @{ - * - * @brief @tagAPI52840 Hardware access layer for Universal Serial Bus Device (USBD) peripheral. - */ - -#include "nrf_peripherals.h" -#include "nrf.h" -#include "nrf_assert.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief USBD tasks - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_USBD_TASK_STARTEPIN0 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[0] ), /**< Captures the EPIN[0].PTR, EPIN[0].MAXCNT and EPIN[0].CONFIG registers values, and enables control endpoint IN 0 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN1 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[1] ), /**< Captures the EPIN[1].PTR, EPIN[1].MAXCNT and EPIN[1].CONFIG registers values, and enables data endpoint IN 1 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN2 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[2] ), /**< Captures the EPIN[2].PTR, EPIN[2].MAXCNT and EPIN[2].CONFIG registers values, and enables data endpoint IN 2 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN3 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[3] ), /**< Captures the EPIN[3].PTR, EPIN[3].MAXCNT and EPIN[3].CONFIG registers values, and enables data endpoint IN 3 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN4 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[4] ), /**< Captures the EPIN[4].PTR, EPIN[4].MAXCNT and EPIN[4].CONFIG registers values, and enables data endpoint IN 4 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN5 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[5] ), /**< Captures the EPIN[5].PTR, EPIN[5].MAXCNT and EPIN[5].CONFIG registers values, and enables data endpoint IN 5 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN6 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[6] ), /**< Captures the EPIN[6].PTR, EPIN[6].MAXCNT and EPIN[6].CONFIG registers values, and enables data endpoint IN 6 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN7 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[7] ), /**< Captures the EPIN[7].PTR, EPIN[7].MAXCNT and EPIN[7].CONFIG registers values, and enables data endpoint IN 7 to respond to traffic from host */ - NRF_USBD_TASK_STARTISOIN = offsetof(NRF_USBD_Type, TASKS_STARTISOIN ), /**< Captures the ISOIN.PTR, ISOIN.MAXCNT and ISOIN.CONFIG registers values, and enables sending data on iso endpoint 8 */ - NRF_USBD_TASK_STARTEPOUT0 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[0]), /**< Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT and EPOUT[0].CONFIG registers values, and enables control endpoint 0 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT1 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[1]), /**< Captures the EPOUT[1].PTR, EPOUT[1].MAXCNT and EPOUT[1].CONFIG registers values, and enables data endpoint 1 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT2 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[2]), /**< Captures the EPOUT[2].PTR, EPOUT[2].MAXCNT and EPOUT[2].CONFIG registers values, and enables data endpoint 2 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT3 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[3]), /**< Captures the EPOUT[3].PTR, EPOUT[3].MAXCNT and EPOUT[3].CONFIG registers values, and enables data endpoint 3 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT4 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[4]), /**< Captures the EPOUT[4].PTR, EPOUT[4].MAXCNT and EPOUT[4].CONFIG registers values, and enables data endpoint 4 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT5 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[5]), /**< Captures the EPOUT[5].PTR, EPOUT[5].MAXCNT and EPOUT[5].CONFIG registers values, and enables data endpoint 5 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT6 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[6]), /**< Captures the EPOUT[6].PTR, EPOUT[6].MAXCNT and EPOUT[6].CONFIG registers values, and enables data endpoint 6 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT7 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[7]), /**< Captures the EPOUT[7].PTR, EPOUT[7].MAXCNT and EPOUT[7].CONFIG registers values, and enables data endpoint 7 to respond to traffic from host */ - NRF_USBD_TASK_STARTISOOUT = offsetof(NRF_USBD_Type, TASKS_STARTISOOUT ), /**< Captures the ISOOUT.PTR, ISOOUT.MAXCNT and ISOOUT.CONFIG registers values, and enables receiving of data on iso endpoint 8 */ - NRF_USBD_TASK_EP0RCVOUT = offsetof(NRF_USBD_Type, TASKS_EP0RCVOUT ), /**< Allows OUT data stage on control endpoint 0 */ - NRF_USBD_TASK_EP0STATUS = offsetof(NRF_USBD_Type, TASKS_EP0STATUS ), /**< Allows status stage on control endpoint 0 */ - NRF_USBD_TASK_EP0STALL = offsetof(NRF_USBD_Type, TASKS_EP0STALL ), /**< STALLs data and status stage on control endpoint 0 */ - NRF_USBD_TASK_DRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMDRIVE ), /**< Forces D+ and D-lines to the state defined in the DPDMVALUE register */ - NRF_USBD_TASK_NODRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMNODRIVE ), /**< Stops forcing D+ and D- lines to any state (USB engine takes control) */ - /*lint -restore*/ -}nrf_usbd_task_t; - -/** - * @brief USBD events - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_USBD_EVENT_USBRESET = offsetof(NRF_USBD_Type, EVENTS_USBRESET ), /**< Signals that a USB reset condition has been detected on the USB lines */ - NRF_USBD_EVENT_STARTED = offsetof(NRF_USBD_Type, EVENTS_STARTED ), /**< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG, or EPOUT[n].PTR, EPOUT[n].MAXCNT and EPOUT[n].CONFIG registers have been captured on all endpoints reported in the EPSTATUS register */ - NRF_USBD_EVENT_ENDEPIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[0] ), /**< The whole EPIN[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[1] ), /**< The whole EPIN[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[2] ), /**< The whole EPIN[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN3 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[3] ), /**< The whole EPIN[3] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN4 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[4] ), /**< The whole EPIN[4] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[5] ), /**< The whole EPIN[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[6] ), /**< The whole EPIN[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[7] ), /**< The whole EPIN[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_EP0DATADONE = offsetof(NRF_USBD_Type, EVENTS_EP0DATADONE), /**< An acknowledged data transfer has taken place on the control endpoint */ - NRF_USBD_EVENT_ENDISOIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOIN ), /**< The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[0]), /**< The whole EPOUT[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[1]), /**< The whole EPOUT[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[2]), /**< The whole EPOUT[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT3 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[3]), /**< The whole EPOUT[3] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT4 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[4]), /**< The whole EPOUT[4] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[5]), /**< The whole EPOUT[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[6]), /**< The whole EPOUT[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[7]), /**< The whole EPOUT[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDISOOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOOUT ), /**< The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_SOF = offsetof(NRF_USBD_Type, EVENTS_SOF ), /**< Signals that a SOF (start of frame) condition has been detected on the USB lines */ - NRF_USBD_EVENT_USBEVENT = offsetof(NRF_USBD_Type, EVENTS_USBEVENT ), /**< An event or an error not covered by specific events has occurred, check EVENTCAUSE register to find the cause */ - NRF_USBD_EVENT_EP0SETUP = offsetof(NRF_USBD_Type, EVENTS_EP0SETUP ), /**< A valid SETUP token has been received (and acknowledged) on the control endpoint */ - NRF_USBD_EVENT_DATAEP = offsetof(NRF_USBD_Type, EVENTS_EPDATA ), /**< A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */ - NRF_USBD_EVENT_ACCESSFAULT = offsetof(NRF_USBD_Type, EVENTS_ACCESSFAULT), /**< >Access to an unavailable USB register has been attempted (software or EasyDMA) */ - /*lint -restore*/ -}nrf_usbd_event_t; - -/** - * @brief USBD shorts - */ -typedef enum -{ - NRF_USBD_SHORT_EP0DATADONE_STARTEPIN0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk , /**< Shortcut between EP0DATADONE event and STARTEPIN0 task */ - NRF_USBD_SHORT_EP0DATADONE_STARTEPOUT0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk, /**< Shortcut between EP0DATADONE event and STARTEPOUT0 task */ - NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK = USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk , /**< Shortcut between EP0DATADONE event and EP0STATUS task */ - NRF_USBD_SHORT_ENDEPOUT0_EP0STATUS_MASK = USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0STATUS task */ - NRF_USBD_SHORT_ENDEPOUT0_EP0RCVOUT_MASK = USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0RCVOUT task */ -}nrf_usbd_short_mask_t; - -/** - * @brief USBD interrupts - */ -typedef enum -{ - NRF_USBD_INT_USBRESET_MASK = USBD_INTEN_USBRESET_Msk , /**< Enable or disable interrupt for USBRESET event */ - NRF_USBD_INT_STARTED_MASK = USBD_INTEN_STARTED_Msk , /**< Enable or disable interrupt for STARTED event */ - NRF_USBD_INT_ENDEPIN0_MASK = USBD_INTEN_ENDEPIN0_Msk , /**< Enable or disable interrupt for ENDEPIN[0] event */ - NRF_USBD_INT_ENDEPIN1_MASK = USBD_INTEN_ENDEPIN1_Msk , /**< Enable or disable interrupt for ENDEPIN[1] event */ - NRF_USBD_INT_ENDEPIN2_MASK = USBD_INTEN_ENDEPIN2_Msk , /**< Enable or disable interrupt for ENDEPIN[2] event */ - NRF_USBD_INT_ENDEPIN3_MASK = USBD_INTEN_ENDEPIN3_Msk , /**< Enable or disable interrupt for ENDEPIN[3] event */ - NRF_USBD_INT_ENDEPIN4_MASK = USBD_INTEN_ENDEPIN4_Msk , /**< Enable or disable interrupt for ENDEPIN[4] event */ - NRF_USBD_INT_ENDEPIN5_MASK = USBD_INTEN_ENDEPIN5_Msk , /**< Enable or disable interrupt for ENDEPIN[5] event */ - NRF_USBD_INT_ENDEPIN6_MASK = USBD_INTEN_ENDEPIN6_Msk , /**< Enable or disable interrupt for ENDEPIN[6] event */ - NRF_USBD_INT_ENDEPIN7_MASK = USBD_INTEN_ENDEPIN7_Msk , /**< Enable or disable interrupt for ENDEPIN[7] event */ - NRF_USBD_INT_EP0DATADONE_MASK = USBD_INTEN_EP0DATADONE_Msk, /**< Enable or disable interrupt for EP0DATADONE event */ - NRF_USBD_INT_ENDISOIN0_MASK = USBD_INTEN_ENDISOIN_Msk , /**< Enable or disable interrupt for ENDISOIN[0] event */ - NRF_USBD_INT_ENDEPOUT0_MASK = USBD_INTEN_ENDEPOUT0_Msk , /**< Enable or disable interrupt for ENDEPOUT[0] event */ - NRF_USBD_INT_ENDEPOUT1_MASK = USBD_INTEN_ENDEPOUT1_Msk , /**< Enable or disable interrupt for ENDEPOUT[1] event */ - NRF_USBD_INT_ENDEPOUT2_MASK = USBD_INTEN_ENDEPOUT2_Msk , /**< Enable or disable interrupt for ENDEPOUT[2] event */ - NRF_USBD_INT_ENDEPOUT3_MASK = USBD_INTEN_ENDEPOUT3_Msk , /**< Enable or disable interrupt for ENDEPOUT[3] event */ - NRF_USBD_INT_ENDEPOUT4_MASK = USBD_INTEN_ENDEPOUT4_Msk , /**< Enable or disable interrupt for ENDEPOUT[4] event */ - NRF_USBD_INT_ENDEPOUT5_MASK = USBD_INTEN_ENDEPOUT5_Msk , /**< Enable or disable interrupt for ENDEPOUT[5] event */ - NRF_USBD_INT_ENDEPOUT6_MASK = USBD_INTEN_ENDEPOUT6_Msk , /**< Enable or disable interrupt for ENDEPOUT[6] event */ - NRF_USBD_INT_ENDEPOUT7_MASK = USBD_INTEN_ENDEPOUT7_Msk , /**< Enable or disable interrupt for ENDEPOUT[7] event */ - NRF_USBD_INT_ENDISOOUT0_MASK = USBD_INTEN_ENDISOOUT_Msk , /**< Enable or disable interrupt for ENDISOOUT[0] event */ - NRF_USBD_INT_SOF_MASK = USBD_INTEN_SOF_Msk , /**< Enable or disable interrupt for SOF event */ - NRF_USBD_INT_USBEVENT_MASK = USBD_INTEN_USBEVENT_Msk , /**< Enable or disable interrupt for USBEVENT event */ - NRF_USBD_INT_EP0SETUP_MASK = USBD_INTEN_EP0SETUP_Msk , /**< Enable or disable interrupt for EP0SETUP event */ - NRF_USBD_INT_DATAEP_MASK = USBD_INTEN_EPDATA_Msk , /**< Enable or disable interrupt for EPDATA event */ - NRF_USBD_INT_ACCESSFAULT_MASK = USBD_INTEN_ACCESSFAULT_Msk, /**< Enable or disable interrupt for ACCESSFAULT event */ -}nrf_usbd_int_mask_t; - - -/** - * @brief Function for activating a specific USBD task. - * - * @param task Task. - */ -__STATIC_INLINE void nrf_usbd_task_trigger(nrf_usbd_task_t task); - -/** - * @brief Function for returning the address of a specific USBD task register. - * - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task); - -/** - * @brief Function for clearing a specific event. - * - * @param event Event. - */ -__STATIC_INLINE void nrf_usbd_event_clear(nrf_usbd_event_t event); - -/** - * @brief Function for returning the state of a specific event. - * - * @param event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_usbd_event_check(nrf_usbd_event_t event); - -/** - * @brief Function for getting and clearing the state of specific event - * - * This function checks the state of the event and clears it. - * - * @param event Event. - * - * @retval true If the event was set. - * @retval false If the event was not set. - */ -__STATIC_INLINE bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event); - -/** - * @brief Function for returning the address of a specific USBD event register. - * - * @param event Event. - * - * @return Address. - */ -__STATIC_INLINE uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event); - -/** - * @brief Function for setting a shortcut. - * - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_usbd_shorts_enable(uint32_t short_mask); - -/** - * @brief Function for clearing shortcuts. - * - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_usbd_shorts_disable(uint32_t short_mask); - -/** - * @brief Get the shorts mask - * - * Function returns shorts register. - * - * @return Flags of currently enabled shortcuts - */ -__STATIC_INLINE uint32_t nrf_usbd_shorts_get(void); - -/** - * @brief Function for enabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_usbd_int_enable(uint32_t int_mask); - -/** - * @brief Function for retrieving the state of selected interrupts. - * - * @param int_mask Interrupts mask. - * - * @retval true If any of selected interrupts is enabled. - * @retval false If none of selected interrupts is enabled. - */ -__STATIC_INLINE bool nrf_usbd_int_enable_check(uint32_t int_mask); - -/** - * @brief Function for retrieving the information about enabled interrupts. - * - * @return The flags of enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_usbd_int_enable_get(void); - -/** - * @brief Function for disabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_usbd_int_disable(uint32_t int_mask); - - -/** @} */ /* End of nrf_usbd_hal */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/* ------------------------------------------------------------------------------------------------ - * Internal functions - */ - -/** - * @internal - * @brief Internal function for getting task/event register address - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile uint32_t* nrf_usbd_getRegPtr(uint32_t offset) -{ - return (volatile uint32_t*)(((uint8_t *)NRF_USBD) + (uint32_t)offset); -} - -/** - * @internal - * @brief Internal function for getting task/event register address - constant version - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile const uint32_t* nrf_usbd_getRegPtr_c(uint32_t offset) -{ - return (volatile const uint32_t*)(((uint8_t *)NRF_USBD) + (uint32_t)offset); -} - -/* ------------------------------------------------------------------------------------------------ - * Interface functions definitions - */ - -void nrf_usbd_task_trigger(nrf_usbd_task_t task) -{ - *(nrf_usbd_getRegPtr((uint32_t)task)) = 1UL; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task) -{ - return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)task); -} - -void nrf_usbd_event_clear(nrf_usbd_event_t event) -{ - *(nrf_usbd_getRegPtr((uint32_t)event)) = 0UL; - __ISB(); - __DSB(); -} - -bool nrf_usbd_event_check(nrf_usbd_event_t event) -{ - return (bool)*nrf_usbd_getRegPtr_c((uint32_t)event); -} - -bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event) -{ - bool ret = nrf_usbd_event_check(event); - if (ret) - { - nrf_usbd_event_clear(event); - } - return ret; -} - -uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event) -{ - return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)event); -} - -void nrf_usbd_shorts_enable(uint32_t short_mask) -{ - NRF_USBD->SHORTS |= short_mask; -} - -void nrf_usbd_shorts_disable(uint32_t short_mask) -{ - if (~0U == short_mask) - { - /* Optimized version for "disable all" */ - NRF_USBD->SHORTS = 0; - } - else - { - NRF_USBD->SHORTS &= ~short_mask; - } -} - -uint32_t nrf_usbd_shorts_get(void) -{ - return NRF_USBD->SHORTS; -} - -void nrf_usbd_int_enable(uint32_t int_mask) -{ - NRF_USBD->INTENSET = int_mask; -} - -bool nrf_usbd_int_enable_check(uint32_t int_mask) -{ - return !!(NRF_USBD->INTENSET & int_mask); -} - -uint32_t nrf_usbd_int_enable_get(void) -{ - return NRF_USBD->INTENSET; -} - -void nrf_usbd_int_disable(uint32_t int_mask) -{ - NRF_USBD->INTENCLR = int_mask; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/* ------------------------------------------------------------------------------------------------ - * End of automatically generated part - * ------------------------------------------------------------------------------------------------ - */ -/** - * @addtogroup nrf_usbd_hal - * @{ - */ - -/** - * @brief Frame counter size - * - * The number of counts that can be fitted into frame counter - */ -#define NRF_USBD_FRAMECNTR_SIZE \ - ( (USBD_FRAMECNTR_FRAMECNTR_Msk >> USBD_FRAMECNTR_FRAMECNTR_Pos) + 1UL ) -#ifndef USBD_FRAMECNTR_FRAMECNTR_Msk -#error USBD_FRAMECNTR_FRAMECNTR_Msk should be changed into USBD_FRAMECNTR_FRAMECNTR_Msk -#endif - -/** - * @brief First isochronous endpoint number - * - * The number of the first isochronous endpoint - */ -#define NRF_USBD_EPISO_FIRST 8 - -/** - * @brief Total number of IN endpoints - * - * Total number of IN endpoint (including ISOCHRONOUS). - */ -#define NRF_USBD_EPIN_CNT 9 - -/** - * @brief Total number of OUT endpoints - * - * Total number of OUT endpoint (including ISOCHRONOUS). - */ -#define NRF_USBD_EPOUT_CNT 9 - -/** - * @brief Mask of the direction bit in endpoint number - */ -#define NRF_USBD_EP_DIR_Msk (1U << 7) - -/** - * @brief The value of direction bit for IN endpoint direction - */ -#define NRF_USBD_EP_DIR_IN (1U << 7) - -/** - * @brief The value of direction bit for OUT endpoint direction - */ -#define NRF_USBD_EP_DIR_OUT (0U << 7) - -/** - * @brief Macro for making IN endpoint identifier from endpoint number - * - * Macro that sets direction bit to make IN endpoint - * @param[in] epnr Endpoint number - * @return IN Endpoint identifier - */ -#define NRF_USBD_EPIN(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_IN) - -/** - * @brief Macro for making OUT endpoint identifier from endpoint number - * - * Macro that sets direction bit to make OUT endpoint - * @param[in] epnr Endpoint number - * @return OUT Endpoint identifier - */ -#define NRF_USBD_EPOUT(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_OUT) - -/** - * @brief Macro for extracting the endpoint number from endpoint identifier - * - * Macro that strips out the information about endpoint direction. - * @param[in] ep Endpoint identifier - * @return Endpoint number - */ -#define NRF_USBD_EP_NR_GET(ep) ((uint8_t)(((uint8_t)(ep)) & 0xFU)) - -/** - * @brief Macro for checking endpoint direction - * - * This macro checks if given endpoint has IN direction - * @param ep Endpoint identifier - * @retval true If the endpoint direction is IN - * @retval false If the endpoint direction is OUT - */ -#define NRF_USBD_EPIN_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_IN ) - -/** - * @brief Macro for checking endpoint direction - * - * This macro checks if given endpoint has OUT direction - * @param ep Endpoint identifier - * @retval true If the endpoint direction is OUT - * @retval false If the endpoint direction is IN - */ -#define NRF_USBD_EPOUT_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_OUT ) - -/** - * @brief Macro for checking if endpoint is isochronous - * - * @param ep It can be endpoint identifier or just endpoint number to check - * @retval true The endpoint is isochronous type - * @retval false The endpoint is bulk of interrupt type - */ -#define NRF_USBD_EPISO_CHECK(ep) (NRF_USBD_EP_NR_GET(ep) >= NRF_USBD_EPISO_FIRST) - -/** - * @brief Macro for checking if given number is valid endpoint number - * - * @param ep Endpoint number to check - * @retval true The endpoint is valid - * @retval false The endpoint is not valid - */ -#define NRF_USBD_EP_VALIDATE(ep) ( \ - (NRF_USBD_EPIN_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPIN_CNT)) \ - || \ - (NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPOUT_CNT)) \ - ) - -/** - * @brief Not isochronous data frame received - * - * Special value returned by @ref nrf_usbd_episoout_size_get function that means that - * data frame was not received at all. - * This allows differentiate between situations when zero size data comes or no data comes at all - * on isochronous endpoint. - */ -#define NRF_USBD_EPISOOUT_NO_DATA ((size_t)(-1)) - -/** - * @brief EVENTCAUSE register bit masks - */ -typedef enum -{ - NRF_USBD_EVENTCAUSE_ISOOUTCRC_MASK = USBD_EVENTCAUSE_ISOOUTCRC_Msk, /**< CRC error was detected on isochronous OUT endpoint 8. */ - NRF_USBD_EVENTCAUSE_SUSPEND_MASK = USBD_EVENTCAUSE_SUSPEND_Msk , /**< Signals that the USB lines have been seen idle long enough for the device to enter suspend. */ - NRF_USBD_EVENTCAUSE_RESUME_MASK = USBD_EVENTCAUSE_RESUME_Msk , /**< Signals that a RESUME condition (K state or activity restart) has been detected on the USB lines. */ - NRF_USBD_EVENTCAUSE_READY_MASK = USBD_EVENTCAUSE_READY_Msk, /**< MAC is ready for normal operation, rised few us after USBD enabling */ - NRF_USBD_EVENTCAUSE_WUREQ_MASK = (1U << 10) /**< The USBD peripheral has exited Low Power mode */ -}nrf_usbd_eventcause_mask_t; - -/** - * @brief BUSSTATE register bit masks - */ -typedef enum -{ - NRF_USBD_BUSSTATE_DM_MASK = USBD_BUSSTATE_DM_Msk, /**< Negative line mask */ - NRF_USBD_BUSSTATE_DP_MASK = USBD_BUSSTATE_DP_Msk, /**< Positive line mask */ - /** Both lines are low */ - NRF_USBD_BUSSTATE_DPDM_LL = (USBD_BUSSTATE_DM_Low << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_Low << USBD_BUSSTATE_DP_Pos), - /** Positive line is high, negative line is low */ - NRF_USBD_BUSSTATE_DPDM_HL = (USBD_BUSSTATE_DM_Low << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_High << USBD_BUSSTATE_DP_Pos), - /** Positive line is low, negative line is high */ - NRF_USBD_BUSSTATE_DPDM_LH = (USBD_BUSSTATE_DM_High << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_Low << USBD_BUSSTATE_DP_Pos), - /** Both lines are high */ - NRF_USBD_BUSSTATE_DPDM_HH = (USBD_BUSSTATE_DM_High << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_High << USBD_BUSSTATE_DP_Pos), - /** J state */ - NRF_USBD_BUSSTATE_J = NRF_USBD_BUSSTATE_DPDM_HL, - /** K state */ - NRF_USBD_BUSSTATE_K = NRF_USBD_BUSSTATE_DPDM_LH, - /** Single ended 0 */ - NRF_USBD_BUSSTATE_SE0 = NRF_USBD_BUSSTATE_DPDM_LL, - /** Single ended 1 */ - NRF_USBD_BUSSTATE_SE1 = NRF_USBD_BUSSTATE_DPDM_HH -}nrf_usbd_busstate_t; - -/** - * @brief DPDMVALUE register - */ -typedef enum -{ - /**Generate Resume signal. Signal is generated for 50 us or 5 ms, - * depending on bus state */ - NRF_USBD_DPDMVALUE_RESUME = USBD_DPDMVALUE_STATE_Resume, - /** D+ Forced high, D- forced low (J state) */ - NRF_USBD_DPDMVALUE_J = USBD_DPDMVALUE_STATE_J, - /** D+ Forced low, D- forced high (K state) */ - NRF_USBD_DPMVALUE_K = USBD_DPDMVALUE_STATE_K -}nrf_usbd_dpdmvalue_t; - -/** - * @brief Dtoggle value or operation - */ -typedef enum -{ - NRF_USBD_DTOGGLE_NOP = USBD_DTOGGLE_VALUE_Nop, /**< No operation - do not change current data toggle on selected endpoint */ - NRF_USBD_DTOGGLE_DATA0 = USBD_DTOGGLE_VALUE_Data0,/**< Data toggle is DATA0 on selected endpoint */ - NRF_USBD_DTOGGLE_DATA1 = USBD_DTOGGLE_VALUE_Data1 /**< Data toggle is DATA1 on selected endpoint */ -}nrf_usbd_dtoggle_t; - -/** - * @brief EPSTATUS bit masks - */ -typedef enum -{ - NRF_USBD_EPSTATUS_EPIN0_MASK = USBD_EPSTATUS_EPIN0_Msk, - NRF_USBD_EPSTATUS_EPIN1_MASK = USBD_EPSTATUS_EPIN1_Msk, - NRF_USBD_EPSTATUS_EPIN2_MASK = USBD_EPSTATUS_EPIN2_Msk, - NRF_USBD_EPSTATUS_EPIN3_MASK = USBD_EPSTATUS_EPIN3_Msk, - NRF_USBD_EPSTATUS_EPIN4_MASK = USBD_EPSTATUS_EPIN4_Msk, - NRF_USBD_EPSTATUS_EPIN5_MASK = USBD_EPSTATUS_EPIN5_Msk, - NRF_USBD_EPSTATUS_EPIN6_MASK = USBD_EPSTATUS_EPIN6_Msk, - NRF_USBD_EPSTATUS_EPIN7_MASK = USBD_EPSTATUS_EPIN7_Msk, - - NRF_USBD_EPSTATUS_EPOUT0_MASK = USBD_EPSTATUS_EPOUT0_Msk, - NRF_USBD_EPSTATUS_EPOUT1_MASK = USBD_EPSTATUS_EPOUT1_Msk, - NRF_USBD_EPSTATUS_EPOUT2_MASK = USBD_EPSTATUS_EPOUT2_Msk, - NRF_USBD_EPSTATUS_EPOUT3_MASK = USBD_EPSTATUS_EPOUT3_Msk, - NRF_USBD_EPSTATUS_EPOUT4_MASK = USBD_EPSTATUS_EPOUT4_Msk, - NRF_USBD_EPSTATUS_EPOUT5_MASK = USBD_EPSTATUS_EPOUT5_Msk, - NRF_USBD_EPSTATUS_EPOUT6_MASK = USBD_EPSTATUS_EPOUT6_Msk, - NRF_USBD_EPSTATUS_EPOUT7_MASK = USBD_EPSTATUS_EPOUT7_Msk, -}nrf_usbd_epstatus_mask_t; - -/** - * @brief DATAEPSTATUS bit masks - */ -typedef enum -{ - NRF_USBD_EPDATASTATUS_EPIN1_MASK = USBD_EPDATASTATUS_EPIN1_Msk, - NRF_USBD_EPDATASTATUS_EPIN2_MASK = USBD_EPDATASTATUS_EPIN2_Msk, - NRF_USBD_EPDATASTATUS_EPIN3_MASK = USBD_EPDATASTATUS_EPIN3_Msk, - NRF_USBD_EPDATASTATUS_EPIN4_MASK = USBD_EPDATASTATUS_EPIN4_Msk, - NRF_USBD_EPDATASTATUS_EPIN5_MASK = USBD_EPDATASTATUS_EPIN5_Msk, - NRF_USBD_EPDATASTATUS_EPIN6_MASK = USBD_EPDATASTATUS_EPIN6_Msk, - NRF_USBD_EPDATASTATUS_EPIN7_MASK = USBD_EPDATASTATUS_EPIN7_Msk, - - NRF_USBD_EPDATASTATUS_EPOUT1_MASK = USBD_EPDATASTATUS_EPOUT1_Msk, - NRF_USBD_EPDATASTATUS_EPOUT2_MASK = USBD_EPDATASTATUS_EPOUT2_Msk, - NRF_USBD_EPDATASTATUS_EPOUT3_MASK = USBD_EPDATASTATUS_EPOUT3_Msk, - NRF_USBD_EPDATASTATUS_EPOUT4_MASK = USBD_EPDATASTATUS_EPOUT4_Msk, - NRF_USBD_EPDATASTATUS_EPOUT5_MASK = USBD_EPDATASTATUS_EPOUT5_Msk, - NRF_USBD_EPDATASTATUS_EPOUT6_MASK = USBD_EPDATASTATUS_EPOUT6_Msk, - NRF_USBD_EPDATASTATUS_EPOUT7_MASK = USBD_EPDATASTATUS_EPOUT7_Msk, -}nrf_usbd_dataepstatus_mask_t; - -/** - * @brief ISOSPLIT configurations - */ -typedef enum -{ - NRF_USBD_ISOSPLIT_OneDir = USBD_ISOSPLIT_SPLIT_OneDir, /**< Full buffer dedicated to either iso IN or OUT */ - NRF_USBD_ISOSPLIT_Half = USBD_ISOSPLIT_SPLIT_HalfIN, /**< Buffer divided in half */ -}nrf_usbd_isosplit_t; - -/** - * @brief Function for enabling USBD - */ -__STATIC_INLINE void nrf_usbd_enable(void); - -/** - * @brief Function for disabling USBD - */ -__STATIC_INLINE void nrf_usbd_disable(void); - -/** - * @brief Function for getting EVENTCAUSE register - * - * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_eventcause_get(void); - -/** - * @brief Function for clearing EVENTCAUSE flags - * - * @param flags Flags defined in @ref nrf_usbd_eventcause_mask_t - */ -__STATIC_INLINE void nrf_usbd_eventcause_clear(uint32_t flags); - -/** - * @brief Function for getting EVENTCAUSE register and clear flags that are set - * - * The safest way to return current EVENTCAUSE register. - * All the flags that are returned would be cleared inside EVENTCAUSE register. - * - * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_eventcause_get_and_clear(void); - -/** - * @brief Function for getting BUSSTATE register value - * - * @return The value of BUSSTATE register - */ -__STATIC_INLINE nrf_usbd_busstate_t nrf_usbd_busstate_get(void); - -/** - * @brief Function for getting HALTEDEPIN register value - * - * @param ep Endpoint number with IN/OUT flag - * - * @return The value of HALTEDEPIN or HALTEDOUT register for selected endpoint - * - * @note - * Use this function for the response for GetStatus() request to endpoint. - * To check if endpoint is stalled in the code use @ref nrf_usbd_ep_is_stall. - */ -__STATIC_INLINE uint32_t nrf_usbd_haltedep(uint8_t ep); - -/** - * @brief Function for checking if selected endpoint is stalled - * - * Function to be used as a syntax sweeter for @ref nrf_usbd_haltedep. - * - * Also as the isochronous endpoint cannot be halted - it returns always false - * if isochronous endpoint is checked. - * - * @param ep Endpoint number with IN/OUT flag - * - * @return The information if the enepoint is halted. - */ -__STATIC_INLINE bool nrf_usbd_ep_is_stall(uint8_t ep); - -/** - * @brief Function for getting EPSTATUS register value - * - * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epstatus_get(void); - -/** - * @brief Function for clearing EPSTATUS register value - * - * @param flags Flags defined in @ref nrf_usbd_epstatus_mask_t - */ -__STATIC_INLINE void nrf_usbd_epstatus_clear(uint32_t flags); - -/** - * @brief Function for getting and clearing EPSTATUS register value - * - * Function clears all flags in register set before returning its value. - * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epstatus_get_and_clear(void); - -/** - * @brief Function for getting DATAEPSTATUS register value - * - * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get(void); - -/** - * @brief Function for clearing DATAEPSTATUS register value - * - * @param flags Flags defined in @ref nrf_usbd_dataepstatus_mask_t - */ -__STATIC_INLINE void nrf_usbd_epdatastatus_clear(uint32_t flags); - -/** - * @brief Function for getting and clearing DATAEPSTATUS register value - * - * Function clears all flags in register set before returning its value. - * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get_and_clear(void); - -/** - * @name Setup command frame functions - * - * Functions for setup command frame parts access - * @{ - */ - /** - * @brief Function for reading BMREQUESTTYPE - part of SETUP packet - * - * @return the value of BREQUESTTYPE on last received SETUP frame - */ - __STATIC_INLINE uint8_t nrf_usbd_setup_bmrequesttype_get(void); - - /** - * @brief Function for reading BMREQUEST - part of SETUP packet - * - * @return the value of BREQUEST on last received SETUP frame - */ - __STATIC_INLINE uint8_t nrf_usbd_setup_brequest_get(void); - - /** - * @brief Function for reading WVALUE - part of SETUP packet - * - * @return the value of WVALUE on last received SETUP frame - */ - __STATIC_INLINE uint16_t nrf_usbd_setup_wvalue_get(void); - - /** - * @brief Function for reading WINDEX - part of SETUP packet - * - * @return the value of WINDEX on last received SETUP frame - */ - __STATIC_INLINE uint16_t nrf_usbd_setup_windex_get(void); - - /** - * @brief Function for reading WLENGTH - part of SETUP packet - * - * @return the value of WLENGTH on last received SETUP frame - */ - __STATIC_INLINE uint16_t nrf_usbd_setup_wlength_get(void); -/** @} */ - -/** - * @brief Function for getting number of received bytes on selected endpoint - * - * @param ep Endpoint identifier. - * - * @return Number of received bytes. - * - * @note This function may be used on Bulk/Interrupt and Isochronous endpoints. - * @note For the function that returns different value for ISOOUT zero transfer or no transfer at all, - * see @ref nrf_usbd_episoout_size_get function. This function would return 0 for both cases. - */ -__STATIC_INLINE size_t nrf_usbd_epout_size_get(uint8_t ep); - -/** - * @brief Function for getting number of received bytes on isochronous endpoint. - * - * @param ep Endpoint identifier, has to be isochronous out endpoint. - * - * @return Number of bytes received or @ref NRF_USBD_EPISOOUT_NO_DATA - */ -__STATIC_INLINE size_t nrf_usbd_episoout_size_get(uint8_t ep); - -/** - * @brief Function for clearing out endpoint to accept any new incoming traffic - * - * @param ep ep Endpoint identifier. Only OUT Interrupt/Bulk endpoints are accepted. - */ -__STATIC_INLINE void nrf_usbd_epout_clear(uint8_t ep); - -/** - * @brief Function for enabling USB pullup - */ -__STATIC_INLINE void nrf_usbd_pullup_enable(void); - -/** - * @brief Function for disabling USB pullup - */ -__STATIC_INLINE void nrf_usbd_pullup_disable(void); - -/** - * @brief Function for returning current USB pullup state - * - * @retval true USB pullup is enabled - * @retval false USB pullup is disabled - */ -__STATIC_INLINE bool nrf_usbd_pullup_check(void); - -/** - * @brief Function for configuring the value to be forced on the bus on DRIVEDPDM task - * - * Selected state would be forced on the bus when @ref NRF_USBD_TASK_DRIVEDPDM is set. - * The state would be removed from the bus on @ref NRF_USBD_TASK_NODRIVEDPDM and - * the control would be returned to the USBD peripheral. - * @param val State to be set - */ -__STATIC_INLINE void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val); - -/** - * @brief Function for setting data toggle - * - * Configuration of current state of data toggling - * @param ep Endpoint number with the information about its direction - * @param op Operation to execute - */ -__STATIC_INLINE void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op); - -/** - * @brief Function for getting data toggle - * - * Get the current state of data toggling - * @param ep Endpoint number to return the information about current data toggling - * @retval NRF_USBD_DTOGGLE_DATA0 Data toggle is DATA0 on selected endpoint - * @retval NRF_USBD_DTOGGLE_DATA1 Data toggle is DATA1 on selected endpoint - */ -__STATIC_INLINE nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep); - -/** - * @brief Function for checking if endpoint is enabled - * - * @param ep Endpoint id to check - * - * @retval true Endpoint is enabled - * @retval false Endpoint is disabled - */ -__STATIC_INLINE bool nrf_usbd_ep_enable_check(uint8_t ep); - -/** - * @brief Function for enabling selected endpoint - * - * Enabled endpoint responds for the tokens on the USB bus - * - * @param ep Endpoint id to enable - */ -__STATIC_INLINE void nrf_usbd_ep_enable(uint8_t ep); - -/** - * @brief Function for disabling selected endpoint - * - * Disabled endpoint does not respond for the tokens on the USB bus - * - * @param ep Endpoint id to disable - */ -__STATIC_INLINE void nrf_usbd_ep_disable(uint8_t ep); - -/** - * @brief Function for disabling all endpoints - * - * Auxiliary function to simply disable all aviable endpoints. - * It lefts only EP0 IN and OUT enabled. - */ -__STATIC_INLINE void nrf_usbd_ep_all_disable(void); - -/** - * @brief Function for stalling selected endpoint - * - * @param ep Endpoint identifier - * @note This function cannot be called on isochronous endpoint - */ -__STATIC_INLINE void nrf_usbd_ep_stall(uint8_t ep); - -/** - * @brief Function for unstalling selected endpoint - * - * @param ep Endpoint identifier - * @note This function cannot be called on isochronous endpoint - */ -__STATIC_INLINE void nrf_usbd_ep_unstall(uint8_t ep); - -/** - * @brief Function for configuration of isochronous buffer splitting - * - * Configure isochronous buffer splitting between IN and OUT endpoints. - * - * @param split Required configuration - */ -__STATIC_INLINE void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split); - -/** - * @brief Function for getting the isochronous buffer splitting configuration - * - * Get the current isochronous buffer splitting configuration. - * - * @return Current configuration - */ -__STATIC_INLINE nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void); - -/** - * @brief Function for getting current frame counter - * - * @return Current frame counter - */ -__STATIC_INLINE uint32_t nrf_usbd_framecntr_get(void); - -/** - * @brief Function for entering into low power mode - * - * After this function is called the clock source from the USBD is disconnected internally. - * After this function is called most of the USBD registers cannot be accessed anymore. - * - * @sa nrf_usbd_lowpower_disable - * @sa nrf_usbd_lowpower_check - */ -__STATIC_INLINE void nrf_usbd_lowpower_enable(void); - -/** - * @brief Function for exiting from low power mode - * - * After this function is called the clock source for the USBD is connected internally. - * The @ref NRF_USBD_EVENTCAUSE_WUREQ_MASK event would be generated and - * then the USBD registers may be accessed. - * - * @sa nrf_usbd_lowpower_enable - * @sa nrf_usbd_lowpower_check - */ -__STATIC_INLINE void nrf_usbd_lowpower_disable(void); - -/** - * @brief Function for checking the state of the low power mode - * - * @retval true USBD is in low power mode - * @retval false USBD is not in low power mode - */ -__STATIC_INLINE bool nrf_usbd_lowpower_check(void); - -/** - * @brief Function for configuring EasyDMA channel - * - * Configures EasyDMA for the transfer. - * - * @param ep Endpoint identifier (with direction) - * @param ptr Pointer to the data - * @param maxcnt Number of bytes to transfer - */ -__STATIC_INLINE void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt); - -/** - * @brief Function for getting number of transferred bytes - * - * Get number of transferred bytes in the last transaction - * - * @param ep Endpoint identifier - * - * @return The content of the AMOUNT register - */ -__STATIC_INLINE uint32_t nrf_usbd_ep_amount_get(uint8_t ep); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -void nrf_usbd_enable(void) -{ -#ifdef NRF_FPGA_IMPLEMENTATION - *(volatile uint32_t *)0x400005F4 = 3; - __ISB(); - __DSB(); - *(volatile uint32_t *)0x400005F0 = 3; - __ISB(); - __DSB(); -#endif - - NRF_USBD->ENABLE = USBD_ENABLE_ENABLE_Enabled << USBD_ENABLE_ENABLE_Pos; - __ISB(); - __DSB(); -} - -void nrf_usbd_disable(void) -{ - NRF_USBD->ENABLE = USBD_ENABLE_ENABLE_Disabled << USBD_ENABLE_ENABLE_Pos; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_eventcause_get(void) -{ - return NRF_USBD->EVENTCAUSE; -} - -void nrf_usbd_eventcause_clear(uint32_t flags) -{ - NRF_USBD->EVENTCAUSE = flags; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_eventcause_get_and_clear(void) -{ - uint32_t ret; - ret = nrf_usbd_eventcause_get(); - nrf_usbd_eventcause_clear(ret); - __ISB(); - __DSB(); - return ret; -} - -nrf_usbd_busstate_t nrf_usbd_busstate_get(void) -{ - return (nrf_usbd_busstate_t)(NRF_USBD->BUSSTATE); -} - -uint32_t nrf_usbd_haltedep(uint8_t ep) -{ - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - if (NRF_USBD_EPIN_CHECK(ep)) - { - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->HALTED.EPIN)); - return NRF_USBD->HALTED.EPIN[epnr]; - } - else - { - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->HALTED.EPOUT)); - return NRF_USBD->HALTED.EPOUT[epnr]; - } -} - -bool nrf_usbd_ep_is_stall(uint8_t ep) -{ - if (NRF_USBD_EPISO_CHECK(ep)) - return false; - return USBD_HALTED_EPOUT_GETSTATUS_Halted == nrf_usbd_haltedep(ep); -} - -uint32_t nrf_usbd_epstatus_get(void) -{ - return NRF_USBD->EPSTATUS; -} - -void nrf_usbd_epstatus_clear(uint32_t flags) -{ - NRF_USBD->EPSTATUS = flags; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_epstatus_get_and_clear(void) -{ - uint32_t ret; - ret = nrf_usbd_epstatus_get(); - nrf_usbd_epstatus_clear(ret); - return ret; -} - -uint32_t nrf_usbd_epdatastatus_get(void) -{ - return NRF_USBD->EPDATASTATUS; -} - -void nrf_usbd_epdatastatus_clear(uint32_t flags) -{ - NRF_USBD->EPDATASTATUS = flags; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_epdatastatus_get_and_clear(void) -{ - uint32_t ret; - ret = nrf_usbd_epdatastatus_get(); - nrf_usbd_epdatastatus_clear(ret); - __ISB(); - __DSB(); - return ret; -} - -uint8_t nrf_usbd_setup_bmrequesttype_get(void) -{ - return (uint8_t)(NRF_USBD->BMREQUESTTYPE); -} - -uint8_t nrf_usbd_setup_brequest_get(void) -{ - return (uint8_t)(NRF_USBD->BREQUEST); -} - -uint16_t nrf_usbd_setup_wvalue_get(void) -{ - const uint16_t val = NRF_USBD->WVALUEL; - return (uint16_t)(val | ((NRF_USBD->WVALUEH) << 8)); -} - -uint16_t nrf_usbd_setup_windex_get(void) -{ - const uint16_t val = NRF_USBD->WINDEXL; - return (uint16_t)(val | ((NRF_USBD->WINDEXH) << 8)); -} - -uint16_t nrf_usbd_setup_wlength_get(void) -{ - const uint16_t val = NRF_USBD->WLENGTHL; - return (uint16_t)(val | ((NRF_USBD->WLENGTHH) << 8)); -} - -size_t nrf_usbd_epout_size_get(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - ASSERT(NRF_USBD_EPOUT_CHECK(ep)); - if (NRF_USBD_EPISO_CHECK(ep)) - { - size_t size_isoout = NRF_USBD->SIZE.ISOOUT; - if ((size_isoout & USBD_SIZE_ISOOUT_ZERO_Msk) == (USBD_SIZE_ISOOUT_ZERO_ZeroData << USBD_SIZE_ISOOUT_ZERO_Pos)) - { - size_isoout = 0; - } - return size_isoout; - } - - ASSERT(NRF_USBD_EP_NR_GET(ep) < ARRAY_SIZE(NRF_USBD->SIZE.EPOUT)); - return NRF_USBD->SIZE.EPOUT[NRF_USBD_EP_NR_GET(ep)]; -} - -size_t nrf_usbd_episoout_size_get(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - ASSERT(NRF_USBD_EPOUT_CHECK(ep)); - ASSERT(NRF_USBD_EPISO_CHECK(ep)); - - size_t size_isoout = NRF_USBD->SIZE.ISOOUT; - if (size_isoout == 0) - { - size_isoout = NRF_USBD_EPISOOUT_NO_DATA; - } - else if ((size_isoout & USBD_SIZE_ISOOUT_ZERO_Msk) == (USBD_SIZE_ISOOUT_ZERO_ZeroData << USBD_SIZE_ISOOUT_ZERO_Pos)) - { - size_isoout = 0; - } - return size_isoout; -} - -void nrf_usbd_epout_clear(uint8_t ep) -{ - ASSERT(NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < ARRAY_SIZE(NRF_USBD->SIZE.EPOUT))); - NRF_USBD->SIZE.EPOUT[NRF_USBD_EP_NR_GET(ep)] = 0; - __ISB(); - __DSB(); -} - -void nrf_usbd_pullup_enable(void) -{ - NRF_USBD->USBPULLUP = USBD_USBPULLUP_CONNECT_Enabled << USBD_USBPULLUP_CONNECT_Pos; - __ISB(); - __DSB(); -} - -void nrf_usbd_pullup_disable(void) -{ - NRF_USBD->USBPULLUP = USBD_USBPULLUP_CONNECT_Disabled << USBD_USBPULLUP_CONNECT_Pos; - __ISB(); - __DSB(); -} - -bool nrf_usbd_pullup_check(void) -{ - return NRF_USBD->USBPULLUP == (USBD_USBPULLUP_CONNECT_Enabled << USBD_USBPULLUP_CONNECT_Pos); -} - -void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val) -{ - NRF_USBD->DPDMVALUE = ((uint32_t)val) << USBD_DPDMVALUE_STATE_Pos; -} - -void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); - __DSB(); - NRF_USBD->DTOGGLE = ep | (op << USBD_DTOGGLE_VALUE_Pos); - __ISB(); - __DSB(); -} - -nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep) -{ - uint32_t retval; - /* Select the endpoint to read */ - NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); - retval = ((NRF_USBD->DTOGGLE) & USBD_DTOGGLE_VALUE_Msk) >> USBD_DTOGGLE_VALUE_Pos; - return (nrf_usbd_dtoggle_t)retval; -} - -bool nrf_usbd_ep_enable_check(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - return 0 != (NRF_USBD->EPINEN & (1UL << epnr)); - } - else - { - return 0 != (NRF_USBD->EPOUTEN & (1UL << epnr)); - } -} - -void nrf_usbd_ep_enable(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - NRF_USBD->EPINEN |= 1UL << epnr; - } - else - { - NRF_USBD->EPOUTEN |= 1UL << epnr; - } - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_disable(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - NRF_USBD->EPINEN &= ~(1UL << epnr); - } - else - { - NRF_USBD->EPOUTEN &= ~(1UL << epnr); - } - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_all_disable(void) -{ - NRF_USBD->EPINEN = USBD_EPINEN_IN0_Enable << USBD_EPINEN_IN0_Pos; - NRF_USBD->EPOUTEN = USBD_EPOUTEN_OUT0_Enable << USBD_EPOUTEN_OUT0_Pos; - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_stall(uint8_t ep) -{ - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_Stall << USBD_EPSTALL_STALL_Pos) | ep; - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_unstall(uint8_t ep) -{ - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep; - __ISB(); - __DSB(); -} - -void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split) -{ - NRF_USBD->ISOSPLIT = split << USBD_ISOSPLIT_SPLIT_Pos; -} - -nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void) -{ - return (nrf_usbd_isosplit_t) - (((NRF_USBD->ISOSPLIT) & USBD_ISOSPLIT_SPLIT_Msk) >> USBD_ISOSPLIT_SPLIT_Pos); -} - -uint32_t nrf_usbd_framecntr_get(void) -{ - return NRF_USBD->FRAMECNTR; -} - -void nrf_usbd_lowpower_enable(void) -{ - NRF_USBD->LOWPOWER = USBD_LOWPOWER_LOWPOWER_LowPower << USBD_LOWPOWER_LOWPOWER_Pos; -} - -void nrf_usbd_lowpower_disable(void) -{ - NRF_USBD->LOWPOWER = USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos; -} - -bool nrf_usbd_lowpower_check(void) -{ - return (NRF_USBD->LOWPOWER != (USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos)); -} - - -void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt) -{ - if (NRF_USBD_EPIN_CHECK(ep)) - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - NRF_USBD->ISOIN.PTR = ptr; - NRF_USBD->ISOIN.MAXCNT = maxcnt; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPIN)); - NRF_USBD->EPIN[epnr].PTR = ptr; - NRF_USBD->EPIN[epnr].MAXCNT = maxcnt; - } - } - else - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - NRF_USBD->ISOOUT.PTR = ptr; - NRF_USBD->ISOOUT.MAXCNT = maxcnt; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); - NRF_USBD->EPOUT[epnr].PTR = ptr; - NRF_USBD->EPOUT[epnr].MAXCNT = maxcnt; - } - } -} - -uint32_t nrf_usbd_ep_amount_get(uint8_t ep) -{ - uint32_t ret; - - if (NRF_USBD_EPIN_CHECK(ep)) - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - ret = NRF_USBD->ISOIN.AMOUNT; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); - ret = NRF_USBD->EPIN[epnr].AMOUNT; - } - } - else - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - ret = NRF_USBD->ISOOUT.AMOUNT; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); - ret = NRF_USBD->EPOUT[epnr].AMOUNT; - } - } - - return ret; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_USBD_H__ */ diff --git a/lib/sdk/components/drivers_nrf/hal/nrf_wdt.h b/lib/sdk/components/drivers_nrf/hal/nrf_wdt.h deleted file mode 100644 index 85aa4f5..0000000 --- a/lib/sdk/components/drivers_nrf/hal/nrf_wdt.h +++ /dev/null @@ -1,339 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_wdt_hal WDT HAL - * @{ - * @ingroup nrf_wdt - * - * @brief Hardware access layer for accessing the watchdog timer (WDT) peripheral. - */ - -#ifndef NRF_WDT_H__ -#define NRF_WDT_H__ - -#include -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_WDT_CHANNEL_NUMBER 0x8UL -#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/ - -#define NRF_WDT_TASK_SET 1UL -#define NRF_WDT_EVENT_CLEAR 0UL - -/** - * @enum nrf_wdt_task_t - * @brief WDT tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */ - /*lint -restore*/ -} nrf_wdt_task_t; - -/** - * @enum nrf_wdt_event_t - * @brief WDT events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */ - /*lint -restore*/ -} nrf_wdt_event_t; - -/** - * @enum nrf_wdt_behaviour_t - * @brief WDT behavior in CPU SLEEP or HALT mode. - */ -typedef enum -{ - NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */ - NRF_WDT_BEHAVIOUR_RUN_HALT = WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in HALT mode. */ - NRF_WDT_BEHAVIOUR_RUN_SLEEP_HALT = WDT_CONFIG_SLEEP_Msk | WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in SLEEP or HALT mode. */ - NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */ -} nrf_wdt_behaviour_t; - -/** - * @enum nrf_wdt_rr_register_t - * @brief WDT reload request registers. - */ -typedef enum -{ - NRF_WDT_RR0 = 0, /**< Reload request register 0. */ - NRF_WDT_RR1, /**< Reload request register 1. */ - NRF_WDT_RR2, /**< Reload request register 2. */ - NRF_WDT_RR3, /**< Reload request register 3. */ - NRF_WDT_RR4, /**< Reload request register 4. */ - NRF_WDT_RR5, /**< Reload request register 5. */ - NRF_WDT_RR6, /**< Reload request register 6. */ - NRF_WDT_RR7 /**< Reload request register 7. */ -} nrf_wdt_rr_register_t; - -/** - * @enum nrf_wdt_int_mask_t - * @brief WDT interrupts. - */ -typedef enum -{ - NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */ -} nrf_wdt_int_mask_t; - -/** - * @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted. - * - * @param behaviour Watchdog behavior when CPU is in SLEEP or HALT mode. - */ -__STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour) -{ - NRF_WDT->CONFIG = behaviour; -} - - -/** - * @brief Function for starting the watchdog. - * - * @param[in] task Task. - */ -__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET; -} - - -/** - * @brief Function for clearing the WDT event. - * - * @param[in] event Event. - */ -__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for retrieving the state of the WDT event. - * - * @param[in] event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event) -{ - return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event)); -} - - -/** - * @brief Function for enabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask) -{ - NRF_WDT->INTENSET = int_mask; -} - - -/** - * @brief Function for retrieving the state of given interrupt. - * - * @param[in] int_mask Interrupt. - * - * @retval true Interrupt is enabled. - * @retval false Interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask) -{ - return (bool)(NRF_WDT->INTENSET & int_mask); -} - - -/** - * @brief Function for disabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask) -{ - NRF_WDT->INTENCLR = int_mask; -} - - -/** - * @brief Function for returning the address of a specific WDT task register. - * - * @param[in] task Task. - */ -__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task) -{ - return ((uint32_t)NRF_WDT + task); -} - - -/** - * @brief Function for returning the address of a specific WDT event register. - * - * @param[in] event Event. - * - * @retval address of requested event register - */ -__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event) -{ - return ((uint32_t)NRF_WDT + event); -} - - -/** - * @brief Function for retrieving the watchdog status. - * - * @retval true If the watchdog is started. - * @retval false If the watchdog is not started. - */ -__STATIC_INLINE bool nrf_wdt_started(void) -{ - return (bool)(NRF_WDT->RUNSTATUS); -} - - -/** - * @brief Function for retrieving the watchdog reload request status. - * - * @param[in] rr_register Reload request register to check. - * - * @retval true If a reload request is running. - * @retval false If no reload request is running. - */ -__STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register) -{ - return (bool)(((NRF_WDT->REQSTATUS) >> rr_register) & 0x1UL); -} - - -/** - * @brief Function for setting the watchdog reload value. - * - * @param[in] reload_value Watchdog counter initial value. - */ -__STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value) -{ - NRF_WDT->CRV = reload_value; -} - - -/** - * @brief Function for retrieving the watchdog reload value. - * - * @retval Reload value. - */ -__STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void) -{ - return (uint32_t)NRF_WDT->CRV; -} - - -/** - * @brief Function for enabling a specific reload request register. - * - * @param[in] rr_register Reload request register to enable. - */ -__STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register) -{ - NRF_WDT->RREN |= 0x1UL << rr_register; -} - - -/** - * @brief Function for disabling a specific reload request register. - * - * @param[in] rr_register Reload request register to disable. - */ -__STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register) -{ - NRF_WDT->RREN &= ~(0x1UL << rr_register); -} - - -/** - * @brief Function for retrieving the status of a specific reload request register. - * - * @param[in] rr_register Reload request register to check. - * - * @retval true If the reload request register is enabled. - * @retval false If the reload request register is not enabled. - */ -__STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register) -{ - return (bool)(NRF_WDT->RREN & (0x1UL << rr_register)); -} - - -/** - * @brief Function for setting a specific reload request register. - * - * @param[in] rr_register Reload request register to set. - */ -__STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register) -{ - NRF_WDT->RR[rr_register] = NRF_WDT_RR_VALUE; -} - - - -#ifdef __cplusplus -} -#endif - -#endif - -/** @} */