403 lines
13 KiB
C
403 lines
13 KiB
C
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/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
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*
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* The information contained herein is property of Nordic Semiconductor ASA.
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* Terms and conditions of usage are described in detail in NORDIC
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* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
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*
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* Licensees are granted free, non-transferable use of the information. NO
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* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
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* the file.
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*
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*/
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#ifndef NRF_PPI_H__
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#define NRF_PPI_H__
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#include <stddef.h>
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#include "nrf.h"
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/**
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* @defgroup nrf_ppi_hal PPI HAL
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* @{
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* @ingroup nrf_ppi
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* @brief Hardware access layer for setting up Programmable Peripheral Interconnect (PPI) channels.
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*/
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#define NRF_PPI_TASK_SET (1UL)
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/**
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* @enum nrf_ppi_channel_t
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* @brief PPI channels.
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*/
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typedef enum
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{
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NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */
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NRF_PPI_CHANNEL1 = PPI_CHEN_CH1_Pos, /**< Channel 1. */
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NRF_PPI_CHANNEL2 = PPI_CHEN_CH2_Pos, /**< Channel 2. */
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NRF_PPI_CHANNEL3 = PPI_CHEN_CH3_Pos, /**< Channel 3. */
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NRF_PPI_CHANNEL4 = PPI_CHEN_CH4_Pos, /**< Channel 4. */
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NRF_PPI_CHANNEL5 = PPI_CHEN_CH5_Pos, /**< Channel 5. */
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NRF_PPI_CHANNEL6 = PPI_CHEN_CH6_Pos, /**< Channel 6. */
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NRF_PPI_CHANNEL7 = PPI_CHEN_CH7_Pos, /**< Channel 7. */
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NRF_PPI_CHANNEL8 = PPI_CHEN_CH8_Pos, /**< Channel 8. */
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NRF_PPI_CHANNEL9 = PPI_CHEN_CH9_Pos, /**< Channel 9. */
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NRF_PPI_CHANNEL10 = PPI_CHEN_CH10_Pos, /**< Channel 10. */
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NRF_PPI_CHANNEL11 = PPI_CHEN_CH11_Pos, /**< Channel 11. */
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NRF_PPI_CHANNEL12 = PPI_CHEN_CH12_Pos, /**< Channel 12. */
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NRF_PPI_CHANNEL13 = PPI_CHEN_CH13_Pos, /**< Channel 13. */
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NRF_PPI_CHANNEL14 = PPI_CHEN_CH14_Pos, /**< Channel 14. */
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NRF_PPI_CHANNEL15 = PPI_CHEN_CH15_Pos, /**< Channel 15. */
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#ifdef NRF52
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NRF_PPI_CHANNEL16 = PPI_CHEN_CH16_Pos, /**< Channel 16. */
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NRF_PPI_CHANNEL17 = PPI_CHEN_CH17_Pos, /**< Channel 17. */
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NRF_PPI_CHANNEL18 = PPI_CHEN_CH18_Pos, /**< Channel 18. */
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NRF_PPI_CHANNEL19 = PPI_CHEN_CH19_Pos, /**< Channel 19. */
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#endif
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NRF_PPI_CHANNEL20 = PPI_CHEN_CH20_Pos, /**< Channel 20. */
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NRF_PPI_CHANNEL21 = PPI_CHEN_CH21_Pos, /**< Channel 21. */
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NRF_PPI_CHANNEL22 = PPI_CHEN_CH22_Pos, /**< Channel 22. */
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NRF_PPI_CHANNEL23 = PPI_CHEN_CH23_Pos, /**< Channel 23. */
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NRF_PPI_CHANNEL24 = PPI_CHEN_CH24_Pos, /**< Channel 24. */
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NRF_PPI_CHANNEL25 = PPI_CHEN_CH25_Pos, /**< Channel 25. */
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NRF_PPI_CHANNEL26 = PPI_CHEN_CH26_Pos, /**< Channel 26. */
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NRF_PPI_CHANNEL27 = PPI_CHEN_CH27_Pos, /**< Channel 27. */
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NRF_PPI_CHANNEL28 = PPI_CHEN_CH28_Pos, /**< Channel 28. */
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NRF_PPI_CHANNEL29 = PPI_CHEN_CH29_Pos, /**< Channel 29. */
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NRF_PPI_CHANNEL30 = PPI_CHEN_CH30_Pos, /**< Channel 30. */
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NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */
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} nrf_ppi_channel_t;
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/**
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* @enum nrf_ppi_channel_group_t
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* @brief PPI channel groups.
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*/
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typedef enum
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{
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NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */
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NRF_PPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */
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NRF_PPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */
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NRF_PPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */
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#ifdef NRF52
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NRF_PPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */
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NRF_PPI_CHANNEL_GROUP5 = 5 /**< Channel group 5. */
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#endif
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} nrf_ppi_channel_group_t;
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/**
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* @enum nrf_ppi_channel_include_t
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* @brief Definition of which PPI channels belong to a group.
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*/
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typedef enum
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{
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NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */
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NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */
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} nrf_ppi_channel_include_t;
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/**
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* @enum nrf_ppi_channel_enable_t
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* @brief Definition if a PPI channel is enabled.
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*/
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typedef enum
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{
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NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */
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NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */
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} nrf_ppi_channel_enable_t;
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/**
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* @enum nrf_ppi_task_t
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* @brief PPI tasks.
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*/
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typedef enum
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{
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/*lint -save -e30 -esym(628,__INTADDR__)*/
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NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0 */
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NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0 */
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NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1 */
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NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1 */
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NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2 */
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NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */
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NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3 */
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NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */
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#ifdef NRF52
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NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4 */
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NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */
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NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5 */
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NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5 */
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#endif
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/*lint -restore*/
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} nrf_ppi_task_t;
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/**
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* @brief Function for enabling a given PPI channel.
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*
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* @details This function enables only one channel.
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*
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* @param[in] channel Channel to enable.
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*
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* */
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__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel)
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{
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NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel);
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}
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/**
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* @brief Function for disabling a given PPI channel.
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*
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* @details This function disables only one channel.
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*
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* @param[in] channel Channel to disable.
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*/
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__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel)
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{
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NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel);
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}
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/**
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* @brief Function for checking if a given PPI channel is enabled.
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*
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* @details This function checks only one channel.
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*
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* @param[in] channel Channel to check.
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*
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* @retval NRF_PPI_CHANNEL_ENABLED If the channel is enabled.
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* @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled.
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*
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*/
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__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel)
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{
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if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel)))
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{
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return NRF_PPI_CHANNEL_ENABLED;
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}
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else
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{
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return NRF_PPI_CHANNEL_DISABLED;
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}
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}
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/**
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* @brief Function for disabling all PPI channels.
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*/
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__STATIC_INLINE void nrf_ppi_channel_disable_all(void)
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{
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NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL);
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}
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/**
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* @brief Function for disabling multiple PPI channels.
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*
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* @param[in] mask Channel mask.
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*/
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__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask)
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{
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NRF_PPI->CHENCLR = mask;
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}
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/**
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* @brief Function for setting up event and task endpoints for a given PPI channel.
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*
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* @param[in] eep Event register address.
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*
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* @param[in] tep Task register address.
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*
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* @param[in] channel Channel to which the given endpoints are assigned.
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*/
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__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
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uint32_t eep,
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uint32_t tep)
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{
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NRF_PPI->CH[(uint32_t) channel].EEP = eep;
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NRF_PPI->CH[(uint32_t) channel].TEP = tep;
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}
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#ifdef NRF52
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/**
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* @brief Function for setting up task endpoint for a given PPI fork.
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*
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* @param[in] fork_tep Task register address.
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*
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* @param[in] channel Channel to which the given fork endpoint is assigned.
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*/
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__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
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uint32_t fork_tep)
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{
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NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep;
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}
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/**
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* @brief Function for setting up event and task endpoints for a given PPI channel and fork.
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*
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* @param[in] eep Event register address.
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*
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* @param[in] tep Task register address.
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*
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* @param[in] fork_tep Fork task register address (register value).
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*
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* @param[in] channel Channel to which the given endpoints are assigned.
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*/
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__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
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uint32_t eep,
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uint32_t tep,
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uint32_t fork_tep)
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{
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nrf_ppi_channel_endpoint_setup(channel, eep, tep);
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nrf_ppi_fork_endpoint_setup(channel, fork_tep);
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}
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#endif
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/**
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* @brief Function for including a PPI channel in a channel group.
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*
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* @details This function adds only one channel to the group.
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*
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* @param[in] channel Channel to be included in the group.
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*
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* @param[in] channel_group Channel group.
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*
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*/
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__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
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nrf_ppi_channel_group_t channel_group)
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{
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NRF_PPI->CHG[(uint32_t) channel_group] =
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NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel));
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}
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/**
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* @brief Function for including multiple PPI channels in a channel group.
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*
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* @details This function adds all specified channels to the group.
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*
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* @param[in] channel_mask Channels to be included in the group.
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*
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* @param[in] channel_group Channel group.
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*
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*/
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__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
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nrf_ppi_channel_group_t channel_group)
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{
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NRF_PPI->CHG[(uint32_t) channel_group] =
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NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask);
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}
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/**
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* @brief Function for removing a PPI channel from a channel group.
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*
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* @details This function removes only one channel from the group.
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*
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* @param[in] channel Channel to be removed from the group.
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*
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* @param[in] channel_group Channel group.
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*/
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__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
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nrf_ppi_channel_group_t channel_group)
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{
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NRF_PPI->CHG[(uint32_t) channel_group] =
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NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel));
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}
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/**
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* @brief Function for removing multiple PPI channels from a channel group.
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*
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* @details This function removes all specified channels from the group.
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*
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* @param[in] channel_mask Channels to be removed from the group.
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*
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* @param[in] channel_group Channel group.
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*/
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__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
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nrf_ppi_channel_group_t channel_group)
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{
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NRF_PPI->CHG[(uint32_t) channel_group] =
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NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask);
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}
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/**
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* @brief Function for removing all PPI channels from a channel group.
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*
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* @param[in] group Channel group.
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*
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*/
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__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group)
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{
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NRF_PPI->CHG[(uint32_t) group] = 0;
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}
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/**
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* @brief Function for enabling a channel group.
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*
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* @param[in] group Channel group.
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*
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*/
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__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
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{
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NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET;
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}
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/**
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* @brief Function for disabling a channel group.
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*
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* @param[in] group Channel group.
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*
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*/
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__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group)
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{
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NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET;
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}
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/**
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* @brief Function for setting a PPI task.
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*
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* @param[in] ppi_task PPI task to set.
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*/
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__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task)
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{
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*((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET;
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}
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/**
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* @brief Function for returning the address of a specific PPI task register.
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*
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* @param[in] ppi_task PPI task.
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*/
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__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task)
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{
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return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task);
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}
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/**
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* @brief Function for returning the PPI enable task address of a specific group.
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*
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* @param[in] group PPI group.
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*/
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__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group)
|
||
|
{
|
||
|
return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Function for returning the PPI disable task address of a specific group.
|
||
|
*
|
||
|
* @param[in] group PPI group.
|
||
|
*/
|
||
|
__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group)
|
||
|
{
|
||
|
return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS;
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
*@}
|
||
|
**/
|
||
|
|
||
|
/*lint --flb "Leave library region" */
|
||
|
#endif // NRF_PPI_H__
|