411 lines
12 KiB
ArmAsm
411 lines
12 KiB
ArmAsm
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/*
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Copyright (c) 2009-2017 ARM Limited. All rights reserved.
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SPDX-License-Identifier: Apache-2.0
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Licensed under the Apache License, Version 2.0 (the License); you may
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not use this file except in compliance with the License.
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You may obtain a copy of the License at
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www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an AS IS BASIS, WITHOUT
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WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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NOTICE: This file has been modified by Nordic Semiconductor ASA.
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*/
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.syntax unified
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.arch armv7e-m
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#ifdef __STARTUP_CONFIG
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#include "startup_config.h"
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#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
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#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
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#endif
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#endif
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.section .stack
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#if defined(__STARTUP_CONFIG)
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.align __STARTUP_CONFIG_STACK_ALIGNEMENT
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.equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
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#elif defined(__STACK_SIZE)
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.align 3
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.equ Stack_Size, __STACK_SIZE
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#else
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.align 3
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.equ Stack_Size, 8192
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#if defined(__STARTUP_CONFIG)
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.equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
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#elif defined(__HEAP_SIZE)
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 8192
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.if Heap_Size
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.space Heap_Size
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.endif
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler
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.long NMI_Handler
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.long HardFault_Handler
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.long MemoryManagement_Handler
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.long BusFault_Handler
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.long UsageFault_Handler
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long SVC_Handler
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.long DebugMon_Handler
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.long 0 /*Reserved */
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.long PendSV_Handler
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.long SysTick_Handler
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/* External Interrupts */
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.long POWER_CLOCK_IRQHandler
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.long RADIO_IRQHandler
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.long UARTE0_UART0_IRQHandler
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.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
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.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
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.long NFCT_IRQHandler
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.long GPIOTE_IRQHandler
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.long SAADC_IRQHandler
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.long TIMER0_IRQHandler
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.long TIMER1_IRQHandler
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.long TIMER2_IRQHandler
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.long RTC0_IRQHandler
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.long TEMP_IRQHandler
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.long RNG_IRQHandler
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.long ECB_IRQHandler
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.long CCM_AAR_IRQHandler
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.long WDT_IRQHandler
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.long RTC1_IRQHandler
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.long QDEC_IRQHandler
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.long COMP_LPCOMP_IRQHandler
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.long SWI0_EGU0_IRQHandler
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.long SWI1_EGU1_IRQHandler
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.long SWI2_EGU2_IRQHandler
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.long SWI3_EGU3_IRQHandler
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.long SWI4_EGU4_IRQHandler
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.long SWI5_EGU5_IRQHandler
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.long TIMER3_IRQHandler
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.long TIMER4_IRQHandler
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.long PWM0_IRQHandler
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.long PDM_IRQHandler
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long MWU_IRQHandler
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.long PWM1_IRQHandler
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.long PWM2_IRQHandler
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.long SPIM2_SPIS2_SPI2_IRQHandler
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.long RTC2_IRQHandler
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.long I2S_IRQHandler
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.long FPU_IRQHandler
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.long USBD_IRQHandler
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.long UARTE1_IRQHandler
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.long QSPI_IRQHandler
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.long CRYPTOCELL_IRQHandler
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long PWM3_IRQHandler
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.long 0 /*Reserved */
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.long SPIM3_IRQHandler
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.long 0 /*Reserved */
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.size __isr_vector, . - __isr_vector
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/* Reset Handler */
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.text
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.thumb
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.thumb_func
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.align 1
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Loop to copy data from read only memory to RAM.
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* The ranges of copy from/to are specified by following symbols:
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* __etext: LMA of start of the section to copy from. Usually end of text
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* __data_start__: VMA of start of the section to copy to.
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* __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
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* the user can add their own initialized data section before BSS section with the INTERT AFTER command.
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__bss_start__
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subs r3, r2
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ble .L_loop1_done
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.L_loop1:
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subs r3, #4
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ldr r0, [r1,r3]
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str r0, [r2,r3]
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bgt .L_loop1
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.L_loop1_done:
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/* This part of work usually is done in C library startup code. Otherwise,
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* define __STARTUP_CLEAR_BSS to enable it in this startup. This section
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* clears the RAM where BSS data is located.
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*
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* The BSS section is specified by following symbols
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* __bss_start__: start of the BSS section.
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* __bss_end__: end of the BSS section.
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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#ifdef __STARTUP_CLEAR_BSS
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ldr r1, =__bss_start__
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ldr r2, =__bss_end__
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movs r0, 0
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subs r2, r1
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ble .L_loop3_done
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.L_loop3:
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subs r2, #4
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str r0, [r1, r2]
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bgt .L_loop3
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.L_loop3_done:
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#endif /* __STARTUP_CLEAR_BSS */
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/* Execute SystemInit function. */
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bl SystemInit
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/* Call _start function provided by libraries.
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* If those libraries are not accessible, define __START as your entry point.
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*/
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#ifndef __START
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#define __START _start
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#endif
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bl __START
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.pool
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.size Reset_Handler,.-Reset_Handler
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.section ".text"
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/* Dummy Exception Handlers (infinite loops which can be modified) */
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.weak NMI_Handler
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.type NMI_Handler, %function
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NMI_Handler:
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b .
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.size NMI_Handler, . - NMI_Handler
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.weak HardFault_Handler
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.type HardFault_Handler, %function
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HardFault_Handler:
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b .
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.size HardFault_Handler, . - HardFault_Handler
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.weak MemoryManagement_Handler
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.type MemoryManagement_Handler, %function
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MemoryManagement_Handler:
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b .
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.size MemoryManagement_Handler, . - MemoryManagement_Handler
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.weak BusFault_Handler
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.type BusFault_Handler, %function
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BusFault_Handler:
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b .
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.size BusFault_Handler, . - BusFault_Handler
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.weak UsageFault_Handler
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.type UsageFault_Handler, %function
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UsageFault_Handler:
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b .
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.size UsageFault_Handler, . - UsageFault_Handler
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.weak SVC_Handler
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.type SVC_Handler, %function
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SVC_Handler:
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b .
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.size SVC_Handler, . - SVC_Handler
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.weak DebugMon_Handler
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.type DebugMon_Handler, %function
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DebugMon_Handler:
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b .
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.size DebugMon_Handler, . - DebugMon_Handler
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.weak PendSV_Handler
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.type PendSV_Handler, %function
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PendSV_Handler:
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b .
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.size PendSV_Handler, . - PendSV_Handler
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.weak SysTick_Handler
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.type SysTick_Handler, %function
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SysTick_Handler:
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b .
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.size SysTick_Handler, . - SysTick_Handler
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/* IRQ Handlers */
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.globl Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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b .
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.size Default_Handler, . - Default_Handler
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.macro IRQ handler
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.weak \handler
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.set \handler, Default_Handler
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.endm
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IRQ POWER_CLOCK_IRQHandler
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IRQ RADIO_IRQHandler
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IRQ UARTE0_UART0_IRQHandler
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IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
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IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
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IRQ NFCT_IRQHandler
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IRQ GPIOTE_IRQHandler
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IRQ SAADC_IRQHandler
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IRQ TIMER0_IRQHandler
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IRQ TIMER1_IRQHandler
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IRQ TIMER2_IRQHandler
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IRQ RTC0_IRQHandler
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IRQ TEMP_IRQHandler
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IRQ RNG_IRQHandler
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IRQ ECB_IRQHandler
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IRQ CCM_AAR_IRQHandler
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IRQ WDT_IRQHandler
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IRQ RTC1_IRQHandler
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IRQ QDEC_IRQHandler
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IRQ COMP_LPCOMP_IRQHandler
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IRQ SWI0_EGU0_IRQHandler
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IRQ SWI1_EGU1_IRQHandler
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IRQ SWI2_EGU2_IRQHandler
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IRQ SWI3_EGU3_IRQHandler
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IRQ SWI4_EGU4_IRQHandler
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IRQ SWI5_EGU5_IRQHandler
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IRQ TIMER3_IRQHandler
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IRQ TIMER4_IRQHandler
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IRQ PWM0_IRQHandler
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IRQ PDM_IRQHandler
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IRQ MWU_IRQHandler
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IRQ PWM1_IRQHandler
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IRQ PWM2_IRQHandler
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IRQ SPIM2_SPIS2_SPI2_IRQHandler
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IRQ RTC2_IRQHandler
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IRQ I2S_IRQHandler
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IRQ FPU_IRQHandler
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IRQ USBD_IRQHandler
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IRQ UARTE1_IRQHandler
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IRQ QSPI_IRQHandler
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IRQ CRYPTOCELL_IRQHandler
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IRQ PWM3_IRQHandler
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IRQ SPIM3_IRQHandler
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.end
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