486 lines
15 KiB
C
486 lines
15 KiB
C
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/*
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* Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @defgroup nrf_nvic_api SoftDevice NVIC API
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* @{
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*
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* @note In order to use this module, the following code has to be added to a .c file:
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* \code
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* nrf_nvic_state_t nrf_nvic_state = {0};
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* \endcode
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*
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* @note Definitions and declarations starting with __ (double underscore) in this header file are
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* not intended for direct use by the application.
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*
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* @brief APIs for the accessing NVIC when using a SoftDevice.
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*
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*/
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#ifndef NRF_NVIC_H__
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#define NRF_NVIC_H__
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#include <stdint.h>
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#include "nrf.h"
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#include "nrf_error_soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**@addtogroup NRF_NVIC_DEFINES Defines
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* @{ */
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/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions
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* @{ */
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#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */
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#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */
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/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */
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#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \
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(1U << POWER_CLOCK_IRQn) \
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| (1U << RADIO_IRQn) \
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| (1U << RTC0_IRQn) \
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| (1U << TIMER0_IRQn) \
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| (1U << RNG_IRQn) \
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| (1U << ECB_IRQn) \
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| (1U << CCM_AAR_IRQn) \
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| (1U << TEMP_IRQn) \
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| (1U << __NRF_NVIC_NVMC_IRQn) \
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| (1U << (uint32_t)SWI5_EGU5_IRQn) \
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))
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/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */
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#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0)
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/**@brief Interrupts available for to application, with IRQn in the range 0-31. */
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#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0)
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/**@brief Interrupts available for to application, with IRQn in the range 32-63. */
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#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1)
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/**@} */
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/**@} */
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/**@addtogroup NRF_NVIC_VARIABLES Variables
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* @{ */
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/**@brief Type representing the state struct for the SoftDevice NVIC module. */
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typedef struct
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{
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uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */
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uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */
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} nrf_nvic_state_t;
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/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an
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* application source file. */
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extern nrf_nvic_state_t nrf_nvic_state;
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/**@} */
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/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions
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* @{ */
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/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts.
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*
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* @retval The value of PRIMASK prior to disabling the interrupts.
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*/
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__STATIC_INLINE int __sd_nvic_irq_disable(void);
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/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts.
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*/
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__STATIC_INLINE void __sd_nvic_irq_enable(void);
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/**@brief Checks if IRQn is available to application
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* @param[in] IRQn IRQ to check
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*
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* @retval 1 (true) if the IRQ to check is available to the application
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*/
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__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn);
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/**@brief Checks if priority is available to application
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* @param[in] priority priority to check
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*
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* @retval 1 (true) if the priority to check is available to the application
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*/
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__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority);
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/**@} */
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/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions
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* @{ */
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/**@brief Enable External Interrupt.
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* @note Corresponds to NVIC_EnableIRQ in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS.
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*
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* @retval ::NRF_SUCCESS The interrupt was enabled.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn);
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/**@brief Disable External Interrupt.
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* @note Corresponds to NVIC_DisableIRQ in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS.
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*
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* @retval ::NRF_SUCCESS The interrupt was disabled.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn);
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/**@brief Get Pending Interrupt.
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* @note Corresponds to NVIC_GetPendingIRQ in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS.
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* @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ.
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*
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* @retval ::NRF_SUCCESS The interrupt is available for the application.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq);
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/**@brief Set Pending Interrupt.
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* @note Corresponds to NVIC_SetPendingIRQ in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS.
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*
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* @retval ::NRF_SUCCESS The interrupt is set pending.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn);
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/**@brief Clear Pending Interrupt.
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* @note Corresponds to NVIC_ClearPendingIRQ in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS.
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*
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* @retval ::NRF_SUCCESS The interrupt pending flag is cleared.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn);
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/**@brief Set Interrupt Priority.
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* @note Corresponds to NVIC_SetPriority in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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* @pre Priority is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS.
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* @param[in] priority A valid IRQ priority for use by the application.
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*
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* @retval ::NRF_SUCCESS The interrupt and priority level is available for the application.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority);
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/**@brief Get Interrupt Priority.
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* @note Corresponds to NVIC_GetPriority in CMSIS.
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*
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* @pre IRQn is valid and not reserved by the stack.
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*
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* @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS.
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* @param[out] p_priority Return value from NVIC_GetPriority.
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*
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* @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority.
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* @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application.
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*/
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__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority);
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/**@brief System Reset.
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* @note Corresponds to NVIC_SystemReset in CMSIS.
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*
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* @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN
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*/
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__STATIC_INLINE uint32_t sd_nvic_SystemReset(void);
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/**@brief Enter critical region.
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*
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* @post Application interrupts will be disabled.
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* @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each
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* execution context
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* @sa sd_nvic_critical_region_exit
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*
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* @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region.
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*
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* @retval ::NRF_SUCCESS
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*/
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__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region);
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/**@brief Exit critical region.
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*
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* @pre Application has entered a critical region using ::sd_nvic_critical_region_enter.
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* @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called.
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*
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* @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter.
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*
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* @retval ::NRF_SUCCESS
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*/
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__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region);
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/**@} */
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#ifndef SUPPRESS_INLINE_IMPLEMENTATION
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__STATIC_INLINE int __sd_nvic_irq_disable(void)
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{
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int pm = __get_PRIMASK();
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__disable_irq();
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return pm;
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}
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__STATIC_INLINE void __sd_nvic_irq_enable(void)
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{
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__enable_irq();
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}
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__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn)
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{
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if (IRQn < 32)
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{
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return ((1UL<<IRQn) & __NRF_NVIC_APP_IRQS_0) != 0;
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}
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else if (IRQn < 64)
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{
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return ((1UL<<(IRQn-32)) & __NRF_NVIC_APP_IRQS_1) != 0;
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}
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else
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{
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return 1;
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}
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}
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__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority)
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{
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if(priority >= (1 << __NVIC_PRIO_BITS))
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{
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return 0;
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}
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if( priority == 0
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|| priority == 1
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|| priority == 4
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)
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{
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return 0;
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}
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return 1;
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}
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__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn)
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{
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if (!__sd_nvic_app_accessible_irq(IRQn))
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{
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return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
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}
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if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn)))
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{
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return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED;
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}
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if (nrf_nvic_state.__cr_flag)
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{
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nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F));
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}
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else
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{
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NVIC_EnableIRQ(IRQn);
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}
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return NRF_SUCCESS;
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}
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__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn)
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{
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if (!__sd_nvic_app_accessible_irq(IRQn))
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{
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return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
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}
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if (nrf_nvic_state.__cr_flag)
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{
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nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F));
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}
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else
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{
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NVIC_DisableIRQ(IRQn);
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}
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return NRF_SUCCESS;
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}
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__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq)
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{
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if (__sd_nvic_app_accessible_irq(IRQn))
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{
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*p_pending_irq = NVIC_GetPendingIRQ(IRQn);
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return NRF_SUCCESS;
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}
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else
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{
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return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
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}
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}
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__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn)
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{
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if (__sd_nvic_app_accessible_irq(IRQn))
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{
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NVIC_SetPendingIRQ(IRQn);
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return NRF_SUCCESS;
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}
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else
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{
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return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
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}
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}
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__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn)
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{
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if (__sd_nvic_app_accessible_irq(IRQn))
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{
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NVIC_ClearPendingIRQ(IRQn);
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return NRF_SUCCESS;
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}
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else
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{
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return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
|
{
|
||
|
if (!__sd_nvic_app_accessible_irq(IRQn))
|
||
|
{
|
||
|
return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
|
||
|
}
|
||
|
|
||
|
if (!__sd_nvic_is_app_accessible_priority(priority))
|
||
|
{
|
||
|
return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED;
|
||
|
}
|
||
|
|
||
|
NVIC_SetPriority(IRQn, (uint32_t)priority);
|
||
|
return NRF_SUCCESS;
|
||
|
}
|
||
|
|
||
|
__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority)
|
||
|
{
|
||
|
if (__sd_nvic_app_accessible_irq(IRQn))
|
||
|
{
|
||
|
*p_priority = (NVIC_GetPriority(IRQn) & 0xFF);
|
||
|
return NRF_SUCCESS;
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
__STATIC_INLINE uint32_t sd_nvic_SystemReset(void)
|
||
|
{
|
||
|
NVIC_SystemReset();
|
||
|
return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN;
|
||
|
}
|
||
|
|
||
|
__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region)
|
||
|
{
|
||
|
int was_masked = __sd_nvic_irq_disable();
|
||
|
if (!nrf_nvic_state.__cr_flag)
|
||
|
{
|
||
|
nrf_nvic_state.__cr_flag = 1;
|
||
|
nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 );
|
||
|
NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0;
|
||
|
nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 );
|
||
|
NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1;
|
||
|
*p_is_nested_critical_region = 0;
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
*p_is_nested_critical_region = 1;
|
||
|
}
|
||
|
if (!was_masked)
|
||
|
{
|
||
|
__sd_nvic_irq_enable();
|
||
|
}
|
||
|
return NRF_SUCCESS;
|
||
|
}
|
||
|
|
||
|
__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region)
|
||
|
{
|
||
|
if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0))
|
||
|
{
|
||
|
int was_masked = __sd_nvic_irq_disable();
|
||
|
NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0];
|
||
|
NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1];
|
||
|
nrf_nvic_state.__cr_flag = 0;
|
||
|
if (!was_masked)
|
||
|
{
|
||
|
__sd_nvic_irq_enable();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return NRF_SUCCESS;
|
||
|
}
|
||
|
|
||
|
#endif /* SUPPRESS_INLINE_IMPLEMENTATION */
|
||
|
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#endif // NRF_NVIC_H__
|
||
|
|
||
|
/**@} */
|