393 lines
11 KiB
Rust
393 lines
11 KiB
Rust
#[doc = "Reader of register LPOCLKS"]
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pub type R = crate::R<u32, super::LPOCLKS>;
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#[doc = "Writer for register LPOCLKS"]
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pub type W = crate::W<u32, super::LPOCLKS>;
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#[doc = "Register LPOCLKS `reset()`'s with value 0x03"]
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impl crate::ResetValue for super::LPOCLKS {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0x03
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}
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}
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#[doc = "1 kHz LPO_CLK enable\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LPO1KCLKEN_A {
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#[doc = "0: Disable 1 kHz LPO_CLK output"]
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_0 = 0,
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#[doc = "1: Enable 1 kHz LPO_CLK output"]
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_1 = 1,
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}
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impl From<LPO1KCLKEN_A> for bool {
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#[inline(always)]
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fn from(variant: LPO1KCLKEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LPO1KCLKEN`"]
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pub type LPO1KCLKEN_R = crate::R<bool, LPO1KCLKEN_A>;
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impl LPO1KCLKEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LPO1KCLKEN_A {
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match self.bits {
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false => LPO1KCLKEN_A::_0,
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true => LPO1KCLKEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LPO1KCLKEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LPO1KCLKEN_A::_1
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}
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}
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#[doc = "Write proxy for field `LPO1KCLKEN`"]
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pub struct LPO1KCLKEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LPO1KCLKEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LPO1KCLKEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Disable 1 kHz LPO_CLK output"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LPO1KCLKEN_A::_0)
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}
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#[doc = "Enable 1 kHz LPO_CLK output"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LPO1KCLKEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "32 kHz LPO_CLK enable\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LPO32KCLKEN_A {
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#[doc = "0: Disable 32 kHz LPO_CLK output"]
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_0 = 0,
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#[doc = "1: Enable 32 kHz LPO_CLK output"]
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_1 = 1,
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}
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impl From<LPO32KCLKEN_A> for bool {
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#[inline(always)]
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fn from(variant: LPO32KCLKEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LPO32KCLKEN`"]
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pub type LPO32KCLKEN_R = crate::R<bool, LPO32KCLKEN_A>;
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impl LPO32KCLKEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LPO32KCLKEN_A {
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match self.bits {
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false => LPO32KCLKEN_A::_0,
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true => LPO32KCLKEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LPO32KCLKEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LPO32KCLKEN_A::_1
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}
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}
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#[doc = "Write proxy for field `LPO32KCLKEN`"]
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pub struct LPO32KCLKEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LPO32KCLKEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LPO32KCLKEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Disable 32 kHz LPO_CLK output"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LPO32KCLKEN_A::_0)
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}
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#[doc = "Enable 32 kHz LPO_CLK output"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LPO32KCLKEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
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self.w
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}
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}
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#[doc = "LPO clock source select\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum LPOCLKSEL_A {
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#[doc = "0: 128 kHz LPO_CLK"]
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_00 = 0,
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#[doc = "1: No clock"]
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_01 = 1,
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#[doc = "2: 32 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
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_10 = 2,
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#[doc = "3: 1 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
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_11 = 3,
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}
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impl From<LPOCLKSEL_A> for u8 {
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#[inline(always)]
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fn from(variant: LPOCLKSEL_A) -> Self {
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variant as _
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}
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}
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#[doc = "Reader of field `LPOCLKSEL`"]
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pub type LPOCLKSEL_R = crate::R<u8, LPOCLKSEL_A>;
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impl LPOCLKSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LPOCLKSEL_A {
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match self.bits {
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0 => LPOCLKSEL_A::_00,
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1 => LPOCLKSEL_A::_01,
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2 => LPOCLKSEL_A::_10,
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3 => LPOCLKSEL_A::_11,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_00`"]
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#[inline(always)]
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pub fn is_00(&self) -> bool {
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*self == LPOCLKSEL_A::_00
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}
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#[doc = "Checks if the value of the field is `_01`"]
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#[inline(always)]
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pub fn is_01(&self) -> bool {
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*self == LPOCLKSEL_A::_01
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}
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#[doc = "Checks if the value of the field is `_10`"]
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#[inline(always)]
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pub fn is_10(&self) -> bool {
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*self == LPOCLKSEL_A::_10
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}
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#[doc = "Checks if the value of the field is `_11`"]
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#[inline(always)]
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pub fn is_11(&self) -> bool {
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*self == LPOCLKSEL_A::_11
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}
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}
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#[doc = "Write proxy for field `LPOCLKSEL`"]
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pub struct LPOCLKSEL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LPOCLKSEL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LPOCLKSEL_A) -> &'a mut W {
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{
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self.bits(variant.into())
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}
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}
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#[doc = "128 kHz LPO_CLK"]
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#[inline(always)]
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pub fn _00(self) -> &'a mut W {
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self.variant(LPOCLKSEL_A::_00)
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}
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#[doc = "No clock"]
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#[inline(always)]
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pub fn _01(self) -> &'a mut W {
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self.variant(LPOCLKSEL_A::_01)
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}
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#[doc = "32 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
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#[inline(always)]
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pub fn _10(self) -> &'a mut W {
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self.variant(LPOCLKSEL_A::_10)
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}
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#[doc = "1 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
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#[inline(always)]
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pub fn _11(self) -> &'a mut W {
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self.variant(LPOCLKSEL_A::_11)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
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self.w
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}
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}
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#[doc = "32 kHz clock source select\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum RTCCLKSEL_A {
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#[doc = "0: SOSCDIV1_CLK"]
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_00 = 0,
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#[doc = "1: 32 kHz LPO_CLK"]
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_01 = 1,
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#[doc = "2: RTC_CLKIN clock"]
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_10 = 2,
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#[doc = "3: FIRCDIV1_CLK"]
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_11 = 3,
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}
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impl From<RTCCLKSEL_A> for u8 {
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#[inline(always)]
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fn from(variant: RTCCLKSEL_A) -> Self {
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variant as _
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}
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}
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#[doc = "Reader of field `RTCCLKSEL`"]
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pub type RTCCLKSEL_R = crate::R<u8, RTCCLKSEL_A>;
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impl RTCCLKSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> RTCCLKSEL_A {
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match self.bits {
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0 => RTCCLKSEL_A::_00,
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1 => RTCCLKSEL_A::_01,
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2 => RTCCLKSEL_A::_10,
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3 => RTCCLKSEL_A::_11,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_00`"]
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#[inline(always)]
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pub fn is_00(&self) -> bool {
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*self == RTCCLKSEL_A::_00
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}
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#[doc = "Checks if the value of the field is `_01`"]
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#[inline(always)]
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pub fn is_01(&self) -> bool {
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*self == RTCCLKSEL_A::_01
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}
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#[doc = "Checks if the value of the field is `_10`"]
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#[inline(always)]
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pub fn is_10(&self) -> bool {
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*self == RTCCLKSEL_A::_10
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}
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#[doc = "Checks if the value of the field is `_11`"]
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#[inline(always)]
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pub fn is_11(&self) -> bool {
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*self == RTCCLKSEL_A::_11
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}
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}
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#[doc = "Write proxy for field `RTCCLKSEL`"]
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pub struct RTCCLKSEL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RTCCLKSEL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: RTCCLKSEL_A) -> &'a mut W {
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{
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self.bits(variant.into())
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}
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}
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#[doc = "SOSCDIV1_CLK"]
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#[inline(always)]
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pub fn _00(self) -> &'a mut W {
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self.variant(RTCCLKSEL_A::_00)
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}
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#[doc = "32 kHz LPO_CLK"]
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#[inline(always)]
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pub fn _01(self) -> &'a mut W {
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self.variant(RTCCLKSEL_A::_01)
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}
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#[doc = "RTC_CLKIN clock"]
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#[inline(always)]
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pub fn _10(self) -> &'a mut W {
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self.variant(RTCCLKSEL_A::_10)
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}
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#[doc = "FIRCDIV1_CLK"]
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#[inline(always)]
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pub fn _11(self) -> &'a mut W {
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self.variant(RTCCLKSEL_A::_11)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
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self.w
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}
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}
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impl R {
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#[doc = "Bit 0 - 1 kHz LPO_CLK enable"]
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#[inline(always)]
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pub fn lpo1kclken(&self) -> LPO1KCLKEN_R {
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LPO1KCLKEN_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bit 1 - 32 kHz LPO_CLK enable"]
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#[inline(always)]
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pub fn lpo32kclken(&self) -> LPO32KCLKEN_R {
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LPO32KCLKEN_R::new(((self.bits >> 1) & 0x01) != 0)
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}
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#[doc = "Bits 2:3 - LPO clock source select"]
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#[inline(always)]
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pub fn lpoclksel(&self) -> LPOCLKSEL_R {
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LPOCLKSEL_R::new(((self.bits >> 2) & 0x03) as u8)
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}
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#[doc = "Bits 4:5 - 32 kHz clock source select"]
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#[inline(always)]
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pub fn rtcclksel(&self) -> RTCCLKSEL_R {
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RTCCLKSEL_R::new(((self.bits >> 4) & 0x03) as u8)
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}
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}
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impl W {
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#[doc = "Bit 0 - 1 kHz LPO_CLK enable"]
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#[inline(always)]
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pub fn lpo1kclken(&mut self) -> LPO1KCLKEN_W {
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LPO1KCLKEN_W { w: self }
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}
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#[doc = "Bit 1 - 32 kHz LPO_CLK enable"]
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#[inline(always)]
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pub fn lpo32kclken(&mut self) -> LPO32KCLKEN_W {
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LPO32KCLKEN_W { w: self }
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}
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#[doc = "Bits 2:3 - LPO clock source select"]
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#[inline(always)]
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pub fn lpoclksel(&mut self) -> LPOCLKSEL_W {
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LPOCLKSEL_W { w: self }
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}
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#[doc = "Bits 4:5 - 32 kHz clock source select"]
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#[inline(always)]
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pub fn rtcclksel(&mut self) -> RTCCLKSEL_W {
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RTCCLKSEL_W { w: self }
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}
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}
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