524 lines
15 KiB
Rust
524 lines
15 KiB
Rust
#[doc = "Reader of register SOSCCSR"]
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pub type R = crate::R<u32, super::SOSCCSR>;
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#[doc = "Writer for register SOSCCSR"]
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pub type W = crate::W<u32, super::SOSCCSR>;
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#[doc = "Register SOSCCSR `reset()`'s with value 0"]
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impl crate::ResetValue for super::SOSCCSR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "System OSC Enable\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SOSCEN_A {
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#[doc = "0: System OSC is disabled"]
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_0 = 0,
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#[doc = "1: System OSC is enabled"]
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_1 = 1,
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}
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impl From<SOSCEN_A> for bool {
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#[inline(always)]
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fn from(variant: SOSCEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SOSCEN`"]
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pub type SOSCEN_R = crate::R<bool, SOSCEN_A>;
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impl SOSCEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SOSCEN_A {
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match self.bits {
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false => SOSCEN_A::_0,
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true => SOSCEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SOSCEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SOSCEN_A::_1
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}
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}
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#[doc = "Write proxy for field `SOSCEN`"]
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pub struct SOSCEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SOSCEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SOSCEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "System OSC is disabled"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SOSCEN_A::_0)
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}
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#[doc = "System OSC is enabled"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SOSCEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "System OSC Clock Monitor\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SOSCCM_A {
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#[doc = "0: System OSC Clock Monitor is disabled"]
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_0 = 0,
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#[doc = "1: System OSC Clock Monitor is enabled"]
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_1 = 1,
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}
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impl From<SOSCCM_A> for bool {
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#[inline(always)]
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fn from(variant: SOSCCM_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SOSCCM`"]
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pub type SOSCCM_R = crate::R<bool, SOSCCM_A>;
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impl SOSCCM_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SOSCCM_A {
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match self.bits {
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false => SOSCCM_A::_0,
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true => SOSCCM_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SOSCCM_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SOSCCM_A::_1
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}
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}
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#[doc = "Write proxy for field `SOSCCM`"]
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pub struct SOSCCM_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SOSCCM_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SOSCCM_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "System OSC Clock Monitor is disabled"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SOSCCM_A::_0)
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}
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#[doc = "System OSC Clock Monitor is enabled"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SOSCCM_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
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self.w
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}
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}
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#[doc = "System OSC Clock Monitor Reset Enable\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SOSCCMRE_A {
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#[doc = "0: Clock Monitor generates interrupt when error detected"]
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_0 = 0,
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#[doc = "1: Clock Monitor generates reset when error detected"]
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_1 = 1,
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}
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impl From<SOSCCMRE_A> for bool {
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#[inline(always)]
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fn from(variant: SOSCCMRE_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SOSCCMRE`"]
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pub type SOSCCMRE_R = crate::R<bool, SOSCCMRE_A>;
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impl SOSCCMRE_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SOSCCMRE_A {
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match self.bits {
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false => SOSCCMRE_A::_0,
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true => SOSCCMRE_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SOSCCMRE_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SOSCCMRE_A::_1
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}
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}
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#[doc = "Write proxy for field `SOSCCMRE`"]
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pub struct SOSCCMRE_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SOSCCMRE_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SOSCCMRE_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Clock Monitor generates interrupt when error detected"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SOSCCMRE_A::_0)
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}
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#[doc = "Clock Monitor generates reset when error detected"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SOSCCMRE_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
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self.w
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}
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}
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#[doc = "Lock Register\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LK_A {
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#[doc = "0: This Control Status Register can be written."]
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_0 = 0,
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#[doc = "1: This Control Status Register cannot be written."]
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_1 = 1,
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}
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impl From<LK_A> for bool {
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#[inline(always)]
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fn from(variant: LK_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LK`"]
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pub type LK_R = crate::R<bool, LK_A>;
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impl LK_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LK_A {
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match self.bits {
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false => LK_A::_0,
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true => LK_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LK_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LK_A::_1
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}
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}
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#[doc = "Write proxy for field `LK`"]
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pub struct LK_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LK_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LK_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "This Control Status Register can be written."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LK_A::_0)
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}
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#[doc = "This Control Status Register cannot be written."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LK_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
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self.w
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}
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}
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#[doc = "System OSC Valid\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SOSCVLD_A {
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#[doc = "0: System OSC is not enabled or clock is not valid"]
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_0 = 0,
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#[doc = "1: System OSC is enabled and output clock is valid"]
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_1 = 1,
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}
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impl From<SOSCVLD_A> for bool {
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#[inline(always)]
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fn from(variant: SOSCVLD_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SOSCVLD`"]
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pub type SOSCVLD_R = crate::R<bool, SOSCVLD_A>;
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impl SOSCVLD_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SOSCVLD_A {
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match self.bits {
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false => SOSCVLD_A::_0,
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true => SOSCVLD_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SOSCVLD_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SOSCVLD_A::_1
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}
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}
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#[doc = "System OSC Selected\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SOSCSEL_A {
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#[doc = "0: System OSC is not the system clock source"]
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_0 = 0,
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#[doc = "1: System OSC is the system clock source"]
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_1 = 1,
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}
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impl From<SOSCSEL_A> for bool {
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#[inline(always)]
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fn from(variant: SOSCSEL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SOSCSEL`"]
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pub type SOSCSEL_R = crate::R<bool, SOSCSEL_A>;
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impl SOSCSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SOSCSEL_A {
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match self.bits {
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false => SOSCSEL_A::_0,
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true => SOSCSEL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SOSCSEL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SOSCSEL_A::_1
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}
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}
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#[doc = "System OSC Clock Error\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SOSCERR_A {
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#[doc = "0: System OSC Clock Monitor is disabled or has not detected an error"]
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_0 = 0,
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#[doc = "1: System OSC Clock Monitor is enabled and detected an error"]
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_1 = 1,
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}
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impl From<SOSCERR_A> for bool {
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#[inline(always)]
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fn from(variant: SOSCERR_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SOSCERR`"]
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pub type SOSCERR_R = crate::R<bool, SOSCERR_A>;
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impl SOSCERR_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SOSCERR_A {
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match self.bits {
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false => SOSCERR_A::_0,
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true => SOSCERR_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SOSCERR_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SOSCERR_A::_1
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}
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}
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#[doc = "Write proxy for field `SOSCERR`"]
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pub struct SOSCERR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SOSCERR_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SOSCERR_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "System OSC Clock Monitor is disabled or has not detected an error"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SOSCERR_A::_0)
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}
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#[doc = "System OSC Clock Monitor is enabled and detected an error"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SOSCERR_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
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self.w
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}
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}
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impl R {
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#[doc = "Bit 0 - System OSC Enable"]
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#[inline(always)]
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pub fn soscen(&self) -> SOSCEN_R {
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SOSCEN_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bit 16 - System OSC Clock Monitor"]
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#[inline(always)]
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pub fn sosccm(&self) -> SOSCCM_R {
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SOSCCM_R::new(((self.bits >> 16) & 0x01) != 0)
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}
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#[doc = "Bit 17 - System OSC Clock Monitor Reset Enable"]
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#[inline(always)]
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pub fn sosccmre(&self) -> SOSCCMRE_R {
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SOSCCMRE_R::new(((self.bits >> 17) & 0x01) != 0)
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}
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#[doc = "Bit 23 - Lock Register"]
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#[inline(always)]
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pub fn lk(&self) -> LK_R {
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LK_R::new(((self.bits >> 23) & 0x01) != 0)
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}
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#[doc = "Bit 24 - System OSC Valid"]
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|
#[inline(always)]
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|
pub fn soscvld(&self) -> SOSCVLD_R {
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SOSCVLD_R::new(((self.bits >> 24) & 0x01) != 0)
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|
}
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#[doc = "Bit 25 - System OSC Selected"]
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|
#[inline(always)]
|
|
pub fn soscsel(&self) -> SOSCSEL_R {
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|
SOSCSEL_R::new(((self.bits >> 25) & 0x01) != 0)
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|
}
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|
#[doc = "Bit 26 - System OSC Clock Error"]
|
|
#[inline(always)]
|
|
pub fn soscerr(&self) -> SOSCERR_R {
|
|
SOSCERR_R::new(((self.bits >> 26) & 0x01) != 0)
|
|
}
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|
}
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|
impl W {
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|
#[doc = "Bit 0 - System OSC Enable"]
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|
#[inline(always)]
|
|
pub fn soscen(&mut self) -> SOSCEN_W {
|
|
SOSCEN_W { w: self }
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|
}
|
|
#[doc = "Bit 16 - System OSC Clock Monitor"]
|
|
#[inline(always)]
|
|
pub fn sosccm(&mut self) -> SOSCCM_W {
|
|
SOSCCM_W { w: self }
|
|
}
|
|
#[doc = "Bit 17 - System OSC Clock Monitor Reset Enable"]
|
|
#[inline(always)]
|
|
pub fn sosccmre(&mut self) -> SOSCCMRE_W {
|
|
SOSCCMRE_W { w: self }
|
|
}
|
|
#[doc = "Bit 23 - Lock Register"]
|
|
#[inline(always)]
|
|
pub fn lk(&mut self) -> LK_W {
|
|
LK_W { w: self }
|
|
}
|
|
#[doc = "Bit 26 - System OSC Clock Error"]
|
|
#[inline(always)]
|
|
pub fn soscerr(&mut self) -> SOSCERR_W {
|
|
SOSCERR_W { w: self }
|
|
}
|
|
}
|