439 lines
12 KiB
Rust
439 lines
12 KiB
Rust
#[doc = "Reader of register SIRCCSR"]
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pub type R = crate::R<u32, super::SIRCCSR>;
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#[doc = "Writer for register SIRCCSR"]
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pub type W = crate::W<u32, super::SIRCCSR>;
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#[doc = "Register SIRCCSR `reset()`'s with value 0x0100_0005"]
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impl crate::ResetValue for super::SIRCCSR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0x0100_0005
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}
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}
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#[doc = "Slow IRC Enable\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SIRCEN_A {
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#[doc = "0: Slow IRC is disabled"]
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_0 = 0,
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#[doc = "1: Slow IRC is enabled"]
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_1 = 1,
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}
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impl From<SIRCEN_A> for bool {
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#[inline(always)]
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fn from(variant: SIRCEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SIRCEN`"]
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pub type SIRCEN_R = crate::R<bool, SIRCEN_A>;
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impl SIRCEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SIRCEN_A {
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match self.bits {
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false => SIRCEN_A::_0,
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true => SIRCEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SIRCEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SIRCEN_A::_1
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}
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}
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#[doc = "Write proxy for field `SIRCEN`"]
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pub struct SIRCEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SIRCEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SIRCEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Slow IRC is disabled"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SIRCEN_A::_0)
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}
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#[doc = "Slow IRC is enabled"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SIRCEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "Slow IRC Stop Enable\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SIRCSTEN_A {
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#[doc = "0: Slow IRC is disabled in supported Stop modes"]
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_0 = 0,
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#[doc = "1: Slow IRC is enabled in supported Stop modes"]
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_1 = 1,
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}
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impl From<SIRCSTEN_A> for bool {
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#[inline(always)]
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fn from(variant: SIRCSTEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SIRCSTEN`"]
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pub type SIRCSTEN_R = crate::R<bool, SIRCSTEN_A>;
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impl SIRCSTEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SIRCSTEN_A {
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match self.bits {
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false => SIRCSTEN_A::_0,
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true => SIRCSTEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SIRCSTEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SIRCSTEN_A::_1
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}
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}
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#[doc = "Write proxy for field `SIRCSTEN`"]
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pub struct SIRCSTEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SIRCSTEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SIRCSTEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Slow IRC is disabled in supported Stop modes"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SIRCSTEN_A::_0)
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}
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#[doc = "Slow IRC is enabled in supported Stop modes"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SIRCSTEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Slow IRC Low Power Enable\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SIRCLPEN_A {
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#[doc = "0: Slow IRC is disabled in VLP modes"]
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_0 = 0,
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#[doc = "1: Slow IRC is enabled in VLP modes"]
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_1 = 1,
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}
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impl From<SIRCLPEN_A> for bool {
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#[inline(always)]
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fn from(variant: SIRCLPEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SIRCLPEN`"]
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pub type SIRCLPEN_R = crate::R<bool, SIRCLPEN_A>;
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impl SIRCLPEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SIRCLPEN_A {
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match self.bits {
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false => SIRCLPEN_A::_0,
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true => SIRCLPEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SIRCLPEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SIRCLPEN_A::_1
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}
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}
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#[doc = "Write proxy for field `SIRCLPEN`"]
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pub struct SIRCLPEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SIRCLPEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SIRCLPEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Slow IRC is disabled in VLP modes"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SIRCLPEN_A::_0)
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}
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#[doc = "Slow IRC is enabled in VLP modes"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SIRCLPEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Lock Register\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LK_A {
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#[doc = "0: Control Status Register can be written."]
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_0 = 0,
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#[doc = "1: Control Status Register cannot be written."]
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_1 = 1,
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}
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impl From<LK_A> for bool {
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#[inline(always)]
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fn from(variant: LK_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LK`"]
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pub type LK_R = crate::R<bool, LK_A>;
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impl LK_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LK_A {
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match self.bits {
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false => LK_A::_0,
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true => LK_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LK_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LK_A::_1
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}
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}
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#[doc = "Write proxy for field `LK`"]
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pub struct LK_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LK_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LK_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Control Status Register can be written."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LK_A::_0)
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}
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#[doc = "Control Status Register cannot be written."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LK_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
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self.w
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}
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}
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#[doc = "Slow IRC Valid\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SIRCVLD_A {
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#[doc = "0: Slow IRC is not enabled or clock is not valid"]
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_0 = 0,
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#[doc = "1: Slow IRC is enabled and output clock is valid"]
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_1 = 1,
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}
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impl From<SIRCVLD_A> for bool {
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#[inline(always)]
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fn from(variant: SIRCVLD_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SIRCVLD`"]
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pub type SIRCVLD_R = crate::R<bool, SIRCVLD_A>;
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impl SIRCVLD_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SIRCVLD_A {
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match self.bits {
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false => SIRCVLD_A::_0,
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true => SIRCVLD_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SIRCVLD_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SIRCVLD_A::_1
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}
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}
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#[doc = "Slow IRC Selected\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SIRCSEL_A {
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#[doc = "0: Slow IRC is not the system clock source"]
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_0 = 0,
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#[doc = "1: Slow IRC is the system clock source"]
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_1 = 1,
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}
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impl From<SIRCSEL_A> for bool {
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#[inline(always)]
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fn from(variant: SIRCSEL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SIRCSEL`"]
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pub type SIRCSEL_R = crate::R<bool, SIRCSEL_A>;
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impl SIRCSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SIRCSEL_A {
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match self.bits {
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false => SIRCSEL_A::_0,
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true => SIRCSEL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SIRCSEL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SIRCSEL_A::_1
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}
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}
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impl R {
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#[doc = "Bit 0 - Slow IRC Enable"]
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#[inline(always)]
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pub fn sircen(&self) -> SIRCEN_R {
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SIRCEN_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bit 1 - Slow IRC Stop Enable"]
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#[inline(always)]
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pub fn sircsten(&self) -> SIRCSTEN_R {
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SIRCSTEN_R::new(((self.bits >> 1) & 0x01) != 0)
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}
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#[doc = "Bit 2 - Slow IRC Low Power Enable"]
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#[inline(always)]
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pub fn sirclpen(&self) -> SIRCLPEN_R {
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SIRCLPEN_R::new(((self.bits >> 2) & 0x01) != 0)
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}
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#[doc = "Bit 23 - Lock Register"]
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#[inline(always)]
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pub fn lk(&self) -> LK_R {
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LK_R::new(((self.bits >> 23) & 0x01) != 0)
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}
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#[doc = "Bit 24 - Slow IRC Valid"]
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#[inline(always)]
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pub fn sircvld(&self) -> SIRCVLD_R {
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SIRCVLD_R::new(((self.bits >> 24) & 0x01) != 0)
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}
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#[doc = "Bit 25 - Slow IRC Selected"]
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#[inline(always)]
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pub fn sircsel(&self) -> SIRCSEL_R {
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SIRCSEL_R::new(((self.bits >> 25) & 0x01) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - Slow IRC Enable"]
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#[inline(always)]
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pub fn sircen(&mut self) -> SIRCEN_W {
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SIRCEN_W { w: self }
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}
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#[doc = "Bit 1 - Slow IRC Stop Enable"]
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#[inline(always)]
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pub fn sircsten(&mut self) -> SIRCSTEN_W {
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SIRCSTEN_W { w: self }
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}
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#[doc = "Bit 2 - Slow IRC Low Power Enable"]
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#[inline(always)]
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pub fn sirclpen(&mut self) -> SIRCLPEN_W {
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SIRCLPEN_W { w: self }
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}
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#[doc = "Bit 23 - Lock Register"]
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#[inline(always)]
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pub fn lk(&mut self) -> LK_W {
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LK_W { w: self }
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}
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}
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