439 lines
12 KiB
Rust
439 lines
12 KiB
Rust
#[doc = "Reader of register FIRCCSR"]
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pub type R = crate::R<u32, super::FIRCCSR>;
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#[doc = "Writer for register FIRCCSR"]
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pub type W = crate::W<u32, super::FIRCCSR>;
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#[doc = "Register FIRCCSR `reset()`'s with value 0x0300_0001"]
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impl crate::ResetValue for super::FIRCCSR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0x0300_0001
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}
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}
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#[doc = "Fast IRC Enable\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCEN_A {
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#[doc = "0: Fast IRC is disabled"]
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_0 = 0,
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#[doc = "1: Fast IRC is enabled"]
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_1 = 1,
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}
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impl From<FIRCEN_A> for bool {
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#[inline(always)]
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fn from(variant: FIRCEN_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `FIRCEN`"]
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pub type FIRCEN_R = crate::R<bool, FIRCEN_A>;
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impl FIRCEN_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> FIRCEN_A {
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match self.bits {
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false => FIRCEN_A::_0,
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true => FIRCEN_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == FIRCEN_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == FIRCEN_A::_1
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}
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}
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#[doc = "Write proxy for field `FIRCEN`"]
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pub struct FIRCEN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FIRCEN_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: FIRCEN_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Fast IRC is disabled"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(FIRCEN_A::_0)
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}
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#[doc = "Fast IRC is enabled"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(FIRCEN_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "Fast IRC Regulator Enable\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCREGOFF_A {
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#[doc = "0: Fast IRC Regulator is enabled."]
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_0 = 0,
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#[doc = "1: Fast IRC Regulator is disabled."]
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_1 = 1,
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}
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impl From<FIRCREGOFF_A> for bool {
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#[inline(always)]
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fn from(variant: FIRCREGOFF_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `FIRCREGOFF`"]
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pub type FIRCREGOFF_R = crate::R<bool, FIRCREGOFF_A>;
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impl FIRCREGOFF_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> FIRCREGOFF_A {
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match self.bits {
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false => FIRCREGOFF_A::_0,
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true => FIRCREGOFF_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == FIRCREGOFF_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == FIRCREGOFF_A::_1
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}
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}
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#[doc = "Write proxy for field `FIRCREGOFF`"]
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pub struct FIRCREGOFF_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FIRCREGOFF_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: FIRCREGOFF_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Fast IRC Regulator is enabled."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(FIRCREGOFF_A::_0)
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}
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#[doc = "Fast IRC Regulator is disabled."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(FIRCREGOFF_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Lock Register\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LK_A {
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#[doc = "0: Control Status Register can be written."]
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_0 = 0,
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#[doc = "1: Control Status Register cannot be written."]
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_1 = 1,
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}
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impl From<LK_A> for bool {
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#[inline(always)]
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fn from(variant: LK_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LK`"]
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pub type LK_R = crate::R<bool, LK_A>;
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impl LK_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LK_A {
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match self.bits {
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false => LK_A::_0,
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true => LK_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LK_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LK_A::_1
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}
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}
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#[doc = "Write proxy for field `LK`"]
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pub struct LK_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LK_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LK_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Control Status Register can be written."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LK_A::_0)
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}
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#[doc = "Control Status Register cannot be written."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LK_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
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self.w
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}
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}
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#[doc = "Fast IRC Valid status\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCVLD_A {
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#[doc = "0: Fast IRC is not enabled or clock is not valid."]
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_0 = 0,
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#[doc = "1: Fast IRC is enabled and output clock is valid. The clock is valid once there is an output clock from the FIRC analog."]
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_1 = 1,
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}
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impl From<FIRCVLD_A> for bool {
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#[inline(always)]
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fn from(variant: FIRCVLD_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `FIRCVLD`"]
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pub type FIRCVLD_R = crate::R<bool, FIRCVLD_A>;
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impl FIRCVLD_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> FIRCVLD_A {
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match self.bits {
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false => FIRCVLD_A::_0,
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true => FIRCVLD_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == FIRCVLD_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == FIRCVLD_A::_1
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}
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}
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#[doc = "Fast IRC Selected status\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCSEL_A {
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#[doc = "0: Fast IRC is not the system clock source"]
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_0 = 0,
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#[doc = "1: Fast IRC is the system clock source"]
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_1 = 1,
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}
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impl From<FIRCSEL_A> for bool {
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#[inline(always)]
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fn from(variant: FIRCSEL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `FIRCSEL`"]
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pub type FIRCSEL_R = crate::R<bool, FIRCSEL_A>;
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impl FIRCSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> FIRCSEL_A {
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match self.bits {
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false => FIRCSEL_A::_0,
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true => FIRCSEL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == FIRCSEL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == FIRCSEL_A::_1
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}
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}
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#[doc = "Fast IRC Clock Error\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCERR_A {
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#[doc = "0: Error not detected with the Fast IRC trimming."]
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_0 = 0,
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#[doc = "1: Error detected with the Fast IRC trimming."]
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_1 = 1,
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}
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impl From<FIRCERR_A> for bool {
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#[inline(always)]
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fn from(variant: FIRCERR_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `FIRCERR`"]
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pub type FIRCERR_R = crate::R<bool, FIRCERR_A>;
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impl FIRCERR_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> FIRCERR_A {
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match self.bits {
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false => FIRCERR_A::_0,
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true => FIRCERR_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == FIRCERR_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == FIRCERR_A::_1
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}
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}
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#[doc = "Write proxy for field `FIRCERR`"]
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pub struct FIRCERR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FIRCERR_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: FIRCERR_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Error not detected with the Fast IRC trimming."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(FIRCERR_A::_0)
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}
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#[doc = "Error detected with the Fast IRC trimming."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(FIRCERR_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
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self.w
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}
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}
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impl R {
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#[doc = "Bit 0 - Fast IRC Enable"]
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#[inline(always)]
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pub fn fircen(&self) -> FIRCEN_R {
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FIRCEN_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bit 3 - Fast IRC Regulator Enable"]
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#[inline(always)]
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pub fn fircregoff(&self) -> FIRCREGOFF_R {
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FIRCREGOFF_R::new(((self.bits >> 3) & 0x01) != 0)
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}
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#[doc = "Bit 23 - Lock Register"]
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#[inline(always)]
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pub fn lk(&self) -> LK_R {
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LK_R::new(((self.bits >> 23) & 0x01) != 0)
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}
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#[doc = "Bit 24 - Fast IRC Valid status"]
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#[inline(always)]
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pub fn fircvld(&self) -> FIRCVLD_R {
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FIRCVLD_R::new(((self.bits >> 24) & 0x01) != 0)
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}
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#[doc = "Bit 25 - Fast IRC Selected status"]
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#[inline(always)]
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pub fn fircsel(&self) -> FIRCSEL_R {
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FIRCSEL_R::new(((self.bits >> 25) & 0x01) != 0)
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}
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#[doc = "Bit 26 - Fast IRC Clock Error"]
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#[inline(always)]
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pub fn fircerr(&self) -> FIRCERR_R {
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FIRCERR_R::new(((self.bits >> 26) & 0x01) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - Fast IRC Enable"]
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#[inline(always)]
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pub fn fircen(&mut self) -> FIRCEN_W {
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FIRCEN_W { w: self }
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}
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#[doc = "Bit 3 - Fast IRC Regulator Enable"]
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#[inline(always)]
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pub fn fircregoff(&mut self) -> FIRCREGOFF_W {
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FIRCREGOFF_W { w: self }
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}
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#[doc = "Bit 23 - Lock Register"]
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#[inline(always)]
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pub fn lk(&mut self) -> LK_W {
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LK_W { w: self }
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}
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#[doc = "Bit 26 - Fast IRC Clock Error"]
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#[inline(always)]
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pub fn fircerr(&mut self) -> FIRCERR_W {
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FIRCERR_W { w: self }
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}
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}
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