851 lines
25 KiB
Rust
851 lines
25 KiB
Rust
#[doc = "Reader of register CFGR1"]
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pub type R = crate::R<u32, super::CFGR1>;
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#[doc = "Writer for register CFGR1"]
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pub type W = crate::W<u32, super::CFGR1>;
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#[doc = "Register CFGR1 `reset()`'s with value 0"]
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impl crate::ResetValue for super::CFGR1 {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Master Mode\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum MASTER_A {
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#[doc = "0: Slave mode."]
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_0 = 0,
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#[doc = "1: Master mode."]
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_1 = 1,
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}
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impl From<MASTER_A> for bool {
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#[inline(always)]
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fn from(variant: MASTER_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `MASTER`"]
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pub type MASTER_R = crate::R<bool, MASTER_A>;
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impl MASTER_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> MASTER_A {
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match self.bits {
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false => MASTER_A::_0,
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true => MASTER_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == MASTER_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == MASTER_A::_1
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}
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}
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#[doc = "Write proxy for field `MASTER`"]
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pub struct MASTER_W<'a> {
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w: &'a mut W,
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}
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impl<'a> MASTER_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: MASTER_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Slave mode."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(MASTER_A::_0)
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}
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#[doc = "Master mode."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(MASTER_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "Sample Point\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SAMPLE_A {
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#[doc = "0: Input data sampled on SCK edge."]
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_0 = 0,
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#[doc = "1: Input data sampled on delayed SCK edge."]
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_1 = 1,
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}
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impl From<SAMPLE_A> for bool {
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#[inline(always)]
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fn from(variant: SAMPLE_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `SAMPLE`"]
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pub type SAMPLE_R = crate::R<bool, SAMPLE_A>;
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impl SAMPLE_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> SAMPLE_A {
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match self.bits {
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false => SAMPLE_A::_0,
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true => SAMPLE_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == SAMPLE_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == SAMPLE_A::_1
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}
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}
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#[doc = "Write proxy for field `SAMPLE`"]
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pub struct SAMPLE_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SAMPLE_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: SAMPLE_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Input data sampled on SCK edge."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(SAMPLE_A::_0)
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}
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#[doc = "Input data sampled on delayed SCK edge."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(SAMPLE_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Automatic PCS\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum AUTOPCS_A {
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#[doc = "0: Automatic PCS generation disabled."]
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_0 = 0,
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#[doc = "1: Automatic PCS generation enabled."]
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_1 = 1,
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}
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impl From<AUTOPCS_A> for bool {
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#[inline(always)]
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fn from(variant: AUTOPCS_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `AUTOPCS`"]
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pub type AUTOPCS_R = crate::R<bool, AUTOPCS_A>;
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impl AUTOPCS_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> AUTOPCS_A {
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match self.bits {
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false => AUTOPCS_A::_0,
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true => AUTOPCS_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == AUTOPCS_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == AUTOPCS_A::_1
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}
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}
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#[doc = "Write proxy for field `AUTOPCS`"]
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pub struct AUTOPCS_W<'a> {
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w: &'a mut W,
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}
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impl<'a> AUTOPCS_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: AUTOPCS_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Automatic PCS generation disabled."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(AUTOPCS_A::_0)
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}
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#[doc = "Automatic PCS generation enabled."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(AUTOPCS_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
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self.w
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}
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}
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#[doc = "No Stall\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum NOSTALL_A {
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#[doc = "0: Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
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_0 = 0,
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#[doc = "1: Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
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_1 = 1,
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}
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impl From<NOSTALL_A> for bool {
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#[inline(always)]
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fn from(variant: NOSTALL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `NOSTALL`"]
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pub type NOSTALL_R = crate::R<bool, NOSTALL_A>;
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impl NOSTALL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> NOSTALL_A {
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match self.bits {
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false => NOSTALL_A::_0,
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true => NOSTALL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == NOSTALL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == NOSTALL_A::_1
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}
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}
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#[doc = "Write proxy for field `NOSTALL`"]
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pub struct NOSTALL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> NOSTALL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: NOSTALL_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(NOSTALL_A::_0)
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}
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#[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(NOSTALL_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Peripheral Chip Select Polarity\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum PCSPOL_A {
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#[doc = "0: The PCSx is active low."]
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_0000 = 0,
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#[doc = "1: The PCSx is active high."]
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_0001 = 1,
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}
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impl From<PCSPOL_A> for u8 {
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#[inline(always)]
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fn from(variant: PCSPOL_A) -> Self {
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variant as _
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}
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}
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#[doc = "Reader of field `PCSPOL`"]
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pub type PCSPOL_R = crate::R<u8, PCSPOL_A>;
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impl PCSPOL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> crate::Variant<u8, PCSPOL_A> {
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use crate::Variant::*;
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match self.bits {
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0 => Val(PCSPOL_A::_0000),
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1 => Val(PCSPOL_A::_0001),
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i => Res(i),
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}
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}
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#[doc = "Checks if the value of the field is `_0000`"]
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#[inline(always)]
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pub fn is_0000(&self) -> bool {
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*self == PCSPOL_A::_0000
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}
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#[doc = "Checks if the value of the field is `_0001`"]
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#[inline(always)]
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pub fn is_0001(&self) -> bool {
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*self == PCSPOL_A::_0001
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}
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}
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#[doc = "Write proxy for field `PCSPOL`"]
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pub struct PCSPOL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PCSPOL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: PCSPOL_A) -> &'a mut W {
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unsafe { self.bits(variant.into()) }
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}
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#[doc = "The PCSx is active low."]
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#[inline(always)]
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pub fn _0000(self) -> &'a mut W {
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self.variant(PCSPOL_A::_0000)
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}
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#[doc = "The PCSx is active high."]
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#[inline(always)]
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pub fn _0001(self) -> &'a mut W {
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self.variant(PCSPOL_A::_0001)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
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self.w
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}
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}
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#[doc = "Match Configuration\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum MATCFG_A {
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#[doc = "0: Match is disabled."]
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_000 = 0,
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#[doc = "2: 010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
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_010 = 2,
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#[doc = "3: 011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
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_011 = 3,
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#[doc = "4: 100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., \\[(1st data word = MATCH0) * (2nd data word = MATCH1)\\]"]
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_100 = 4,
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#[doc = "5: 101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., \\[(any data word = MATCH0) * (next data word = MATCH1)\\]"]
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_101 = 5,
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#[doc = "6: 110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., \\[(1st data word * MATCH1) = (MATCH0 * MATCH1)\\]"]
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_110 = 6,
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#[doc = "7: 111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., \\[(any data word * MATCH1) = (MATCH0 * MATCH1)\\]"]
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_111 = 7,
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}
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impl From<MATCFG_A> for u8 {
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#[inline(always)]
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fn from(variant: MATCFG_A) -> Self {
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variant as _
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}
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}
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#[doc = "Reader of field `MATCFG`"]
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pub type MATCFG_R = crate::R<u8, MATCFG_A>;
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impl MATCFG_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> crate::Variant<u8, MATCFG_A> {
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use crate::Variant::*;
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match self.bits {
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0 => Val(MATCFG_A::_000),
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2 => Val(MATCFG_A::_010),
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3 => Val(MATCFG_A::_011),
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4 => Val(MATCFG_A::_100),
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5 => Val(MATCFG_A::_101),
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6 => Val(MATCFG_A::_110),
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7 => Val(MATCFG_A::_111),
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i => Res(i),
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}
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}
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#[doc = "Checks if the value of the field is `_000`"]
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#[inline(always)]
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pub fn is_000(&self) -> bool {
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*self == MATCFG_A::_000
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}
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#[doc = "Checks if the value of the field is `_010`"]
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#[inline(always)]
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pub fn is_010(&self) -> bool {
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*self == MATCFG_A::_010
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}
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#[doc = "Checks if the value of the field is `_011`"]
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#[inline(always)]
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pub fn is_011(&self) -> bool {
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*self == MATCFG_A::_011
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}
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#[doc = "Checks if the value of the field is `_100`"]
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#[inline(always)]
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pub fn is_100(&self) -> bool {
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*self == MATCFG_A::_100
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}
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#[doc = "Checks if the value of the field is `_101`"]
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#[inline(always)]
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pub fn is_101(&self) -> bool {
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*self == MATCFG_A::_101
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}
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#[doc = "Checks if the value of the field is `_110`"]
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#[inline(always)]
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pub fn is_110(&self) -> bool {
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*self == MATCFG_A::_110
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}
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#[doc = "Checks if the value of the field is `_111`"]
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#[inline(always)]
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pub fn is_111(&self) -> bool {
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*self == MATCFG_A::_111
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}
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}
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#[doc = "Write proxy for field `MATCFG`"]
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pub struct MATCFG_W<'a> {
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w: &'a mut W,
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}
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impl<'a> MATCFG_W<'a> {
|
|
#[doc = r"Writes `variant` to the field"]
|
|
#[inline(always)]
|
|
pub fn variant(self, variant: MATCFG_A) -> &'a mut W {
|
|
unsafe { self.bits(variant.into()) }
|
|
}
|
|
#[doc = "Match is disabled."]
|
|
#[inline(always)]
|
|
pub fn _000(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_000)
|
|
}
|
|
#[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
|
|
#[inline(always)]
|
|
pub fn _010(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_010)
|
|
}
|
|
#[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
|
|
#[inline(always)]
|
|
pub fn _011(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_011)
|
|
}
|
|
#[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., \\[(1st data word = MATCH0) * (2nd data word = MATCH1)\\]"]
|
|
#[inline(always)]
|
|
pub fn _100(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_100)
|
|
}
|
|
#[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., \\[(any data word = MATCH0) * (next data word = MATCH1)\\]"]
|
|
#[inline(always)]
|
|
pub fn _101(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_101)
|
|
}
|
|
#[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., \\[(1st data word * MATCH1) = (MATCH0 * MATCH1)\\]"]
|
|
#[inline(always)]
|
|
pub fn _110(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_110)
|
|
}
|
|
#[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., \\[(any data word * MATCH1) = (MATCH0 * MATCH1)\\]"]
|
|
#[inline(always)]
|
|
pub fn _111(self) -> &'a mut W {
|
|
self.variant(MATCFG_A::_111)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !(0x07 << 16)) | (((value as u32) & 0x07) << 16);
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Pin Configuration\n\nValue on reset: 0"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
#[repr(u8)]
|
|
pub enum PINCFG_A {
|
|
#[doc = "0: SIN is used for input data and SOUT for output data."]
|
|
_00 = 0,
|
|
#[doc = "1: SIN is used for both input and output data."]
|
|
_01 = 1,
|
|
#[doc = "2: SOUT is used for both input and output data."]
|
|
_10 = 2,
|
|
#[doc = "3: SOUT is used for input data and SIN for output data."]
|
|
_11 = 3,
|
|
}
|
|
impl From<PINCFG_A> for u8 {
|
|
#[inline(always)]
|
|
fn from(variant: PINCFG_A) -> Self {
|
|
variant as _
|
|
}
|
|
}
|
|
#[doc = "Reader of field `PINCFG`"]
|
|
pub type PINCFG_R = crate::R<u8, PINCFG_A>;
|
|
impl PINCFG_R {
|
|
#[doc = r"Get enumerated values variant"]
|
|
#[inline(always)]
|
|
pub fn variant(&self) -> PINCFG_A {
|
|
match self.bits {
|
|
0 => PINCFG_A::_00,
|
|
1 => PINCFG_A::_01,
|
|
2 => PINCFG_A::_10,
|
|
3 => PINCFG_A::_11,
|
|
_ => unreachable!(),
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_00`"]
|
|
#[inline(always)]
|
|
pub fn is_00(&self) -> bool {
|
|
*self == PINCFG_A::_00
|
|
}
|
|
#[doc = "Checks if the value of the field is `_01`"]
|
|
#[inline(always)]
|
|
pub fn is_01(&self) -> bool {
|
|
*self == PINCFG_A::_01
|
|
}
|
|
#[doc = "Checks if the value of the field is `_10`"]
|
|
#[inline(always)]
|
|
pub fn is_10(&self) -> bool {
|
|
*self == PINCFG_A::_10
|
|
}
|
|
#[doc = "Checks if the value of the field is `_11`"]
|
|
#[inline(always)]
|
|
pub fn is_11(&self) -> bool {
|
|
*self == PINCFG_A::_11
|
|
}
|
|
}
|
|
#[doc = "Write proxy for field `PINCFG`"]
|
|
pub struct PINCFG_W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> PINCFG_W<'a> {
|
|
#[doc = r"Writes `variant` to the field"]
|
|
#[inline(always)]
|
|
pub fn variant(self, variant: PINCFG_A) -> &'a mut W {
|
|
{
|
|
self.bits(variant.into())
|
|
}
|
|
}
|
|
#[doc = "SIN is used for input data and SOUT for output data."]
|
|
#[inline(always)]
|
|
pub fn _00(self) -> &'a mut W {
|
|
self.variant(PINCFG_A::_00)
|
|
}
|
|
#[doc = "SIN is used for both input and output data."]
|
|
#[inline(always)]
|
|
pub fn _01(self) -> &'a mut W {
|
|
self.variant(PINCFG_A::_01)
|
|
}
|
|
#[doc = "SOUT is used for both input and output data."]
|
|
#[inline(always)]
|
|
pub fn _10(self) -> &'a mut W {
|
|
self.variant(PINCFG_A::_10)
|
|
}
|
|
#[doc = "SOUT is used for input data and SIN for output data."]
|
|
#[inline(always)]
|
|
pub fn _11(self) -> &'a mut W {
|
|
self.variant(PINCFG_A::_11)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Output Config\n\nValue on reset: 0"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum OUTCFG_A {
|
|
#[doc = "0: Output data retains last value when chip select is negated."]
|
|
_0 = 0,
|
|
#[doc = "1: Output data is tristated when chip select is negated."]
|
|
_1 = 1,
|
|
}
|
|
impl From<OUTCFG_A> for bool {
|
|
#[inline(always)]
|
|
fn from(variant: OUTCFG_A) -> Self {
|
|
variant as u8 != 0
|
|
}
|
|
}
|
|
#[doc = "Reader of field `OUTCFG`"]
|
|
pub type OUTCFG_R = crate::R<bool, OUTCFG_A>;
|
|
impl OUTCFG_R {
|
|
#[doc = r"Get enumerated values variant"]
|
|
#[inline(always)]
|
|
pub fn variant(&self) -> OUTCFG_A {
|
|
match self.bits {
|
|
false => OUTCFG_A::_0,
|
|
true => OUTCFG_A::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline(always)]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == OUTCFG_A::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline(always)]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == OUTCFG_A::_1
|
|
}
|
|
}
|
|
#[doc = "Write proxy for field `OUTCFG`"]
|
|
pub struct OUTCFG_W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> OUTCFG_W<'a> {
|
|
#[doc = r"Writes `variant` to the field"]
|
|
#[inline(always)]
|
|
pub fn variant(self, variant: OUTCFG_A) -> &'a mut W {
|
|
{
|
|
self.bit(variant.into())
|
|
}
|
|
}
|
|
#[doc = "Output data retains last value when chip select is negated."]
|
|
#[inline(always)]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(OUTCFG_A::_0)
|
|
}
|
|
#[doc = "Output data is tristated when chip select is negated."]
|
|
#[inline(always)]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(OUTCFG_A::_1)
|
|
}
|
|
#[doc = r"Sets the field bit"]
|
|
#[inline(always)]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r"Clears the field bit"]
|
|
#[inline(always)]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Peripheral Chip Select Configuration\n\nValue on reset: 0"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum PCSCFG_A {
|
|
#[doc = "0: PCS\\[3:2\\]
|
|
are enabled."]
|
|
_0 = 0,
|
|
#[doc = "1: PCS\\[3:2\\]
|
|
are disabled."]
|
|
_1 = 1,
|
|
}
|
|
impl From<PCSCFG_A> for bool {
|
|
#[inline(always)]
|
|
fn from(variant: PCSCFG_A) -> Self {
|
|
variant as u8 != 0
|
|
}
|
|
}
|
|
#[doc = "Reader of field `PCSCFG`"]
|
|
pub type PCSCFG_R = crate::R<bool, PCSCFG_A>;
|
|
impl PCSCFG_R {
|
|
#[doc = r"Get enumerated values variant"]
|
|
#[inline(always)]
|
|
pub fn variant(&self) -> PCSCFG_A {
|
|
match self.bits {
|
|
false => PCSCFG_A::_0,
|
|
true => PCSCFG_A::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline(always)]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == PCSCFG_A::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline(always)]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == PCSCFG_A::_1
|
|
}
|
|
}
|
|
#[doc = "Write proxy for field `PCSCFG`"]
|
|
pub struct PCSCFG_W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> PCSCFG_W<'a> {
|
|
#[doc = r"Writes `variant` to the field"]
|
|
#[inline(always)]
|
|
pub fn variant(self, variant: PCSCFG_A) -> &'a mut W {
|
|
{
|
|
self.bit(variant.into())
|
|
}
|
|
}
|
|
#[doc = "PCS\\[3:2\\]
|
|
are enabled."]
|
|
#[inline(always)]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(PCSCFG_A::_0)
|
|
}
|
|
#[doc = "PCS\\[3:2\\]
|
|
are disabled."]
|
|
#[inline(always)]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(PCSCFG_A::_1)
|
|
}
|
|
#[doc = r"Sets the field bit"]
|
|
#[inline(always)]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r"Clears the field bit"]
|
|
#[inline(always)]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = "Bit 0 - Master Mode"]
|
|
#[inline(always)]
|
|
pub fn master(&self) -> MASTER_R {
|
|
MASTER_R::new((self.bits & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 1 - Sample Point"]
|
|
#[inline(always)]
|
|
pub fn sample(&self) -> SAMPLE_R {
|
|
SAMPLE_R::new(((self.bits >> 1) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 2 - Automatic PCS"]
|
|
#[inline(always)]
|
|
pub fn autopcs(&self) -> AUTOPCS_R {
|
|
AUTOPCS_R::new(((self.bits >> 2) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 3 - No Stall"]
|
|
#[inline(always)]
|
|
pub fn nostall(&self) -> NOSTALL_R {
|
|
NOSTALL_R::new(((self.bits >> 3) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
|
|
#[inline(always)]
|
|
pub fn pcspol(&self) -> PCSPOL_R {
|
|
PCSPOL_R::new(((self.bits >> 8) & 0x0f) as u8)
|
|
}
|
|
#[doc = "Bits 16:18 - Match Configuration"]
|
|
#[inline(always)]
|
|
pub fn matcfg(&self) -> MATCFG_R {
|
|
MATCFG_R::new(((self.bits >> 16) & 0x07) as u8)
|
|
}
|
|
#[doc = "Bits 24:25 - Pin Configuration"]
|
|
#[inline(always)]
|
|
pub fn pincfg(&self) -> PINCFG_R {
|
|
PINCFG_R::new(((self.bits >> 24) & 0x03) as u8)
|
|
}
|
|
#[doc = "Bit 26 - Output Config"]
|
|
#[inline(always)]
|
|
pub fn outcfg(&self) -> OUTCFG_R {
|
|
OUTCFG_R::new(((self.bits >> 26) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 27 - Peripheral Chip Select Configuration"]
|
|
#[inline(always)]
|
|
pub fn pcscfg(&self) -> PCSCFG_R {
|
|
PCSCFG_R::new(((self.bits >> 27) & 0x01) != 0)
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = "Bit 0 - Master Mode"]
|
|
#[inline(always)]
|
|
pub fn master(&mut self) -> MASTER_W {
|
|
MASTER_W { w: self }
|
|
}
|
|
#[doc = "Bit 1 - Sample Point"]
|
|
#[inline(always)]
|
|
pub fn sample(&mut self) -> SAMPLE_W {
|
|
SAMPLE_W { w: self }
|
|
}
|
|
#[doc = "Bit 2 - Automatic PCS"]
|
|
#[inline(always)]
|
|
pub fn autopcs(&mut self) -> AUTOPCS_W {
|
|
AUTOPCS_W { w: self }
|
|
}
|
|
#[doc = "Bit 3 - No Stall"]
|
|
#[inline(always)]
|
|
pub fn nostall(&mut self) -> NOSTALL_W {
|
|
NOSTALL_W { w: self }
|
|
}
|
|
#[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
|
|
#[inline(always)]
|
|
pub fn pcspol(&mut self) -> PCSPOL_W {
|
|
PCSPOL_W { w: self }
|
|
}
|
|
#[doc = "Bits 16:18 - Match Configuration"]
|
|
#[inline(always)]
|
|
pub fn matcfg(&mut self) -> MATCFG_W {
|
|
MATCFG_W { w: self }
|
|
}
|
|
#[doc = "Bits 24:25 - Pin Configuration"]
|
|
#[inline(always)]
|
|
pub fn pincfg(&mut self) -> PINCFG_W {
|
|
PINCFG_W { w: self }
|
|
}
|
|
#[doc = "Bit 26 - Output Config"]
|
|
#[inline(always)]
|
|
pub fn outcfg(&mut self) -> OUTCFG_W {
|
|
OUTCFG_W { w: self }
|
|
}
|
|
#[doc = "Bit 27 - Peripheral Chip Select Configuration"]
|
|
#[inline(always)]
|
|
pub fn pcscfg(&mut self) -> PCSCFG_W {
|
|
PCSCFG_W { w: self }
|
|
}
|
|
}
|