671 lines
18 KiB
Rust
671 lines
18 KiB
Rust
#[doc = "Reader of register LMEM_PCCLCR"]
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pub type R = crate::R<u32, super::LMEM_PCCLCR>;
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#[doc = "Writer for register LMEM_PCCLCR"]
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pub type W = crate::W<u32, super::LMEM_PCCLCR>;
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#[doc = "Register LMEM_PCCLCR `reset()`'s with value 0"]
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impl crate::ResetValue for super::LMEM_PCCLCR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Initiate Cache Line Command\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LGO_A {
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#[doc = "0: Write: no effect. Read: no line command active."]
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_0 = 0,
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#[doc = "1: Write: initiate line command indicated by bits 27-24. Read: line command active."]
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_1 = 1,
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}
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impl From<LGO_A> for bool {
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#[inline(always)]
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fn from(variant: LGO_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LGO`"]
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pub type LGO_R = crate::R<bool, LGO_A>;
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impl LGO_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LGO_A {
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match self.bits {
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false => LGO_A::_0,
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true => LGO_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LGO_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LGO_A::_1
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}
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}
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#[doc = "Write proxy for field `LGO`"]
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pub struct LGO_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LGO_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LGO_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Write: no effect. Read: no line command active."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LGO_A::_0)
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}
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#[doc = "Write: initiate line command indicated by bits 27-24. Read: line command active."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LGO_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "Reader of field `CACHEADDR`"]
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pub type CACHEADDR_R = crate::R<u16, u16>;
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#[doc = "Write proxy for field `CACHEADDR`"]
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pub struct CACHEADDR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CACHEADDR_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x0fff << 2)) | (((value as u32) & 0x0fff) << 2);
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self.w
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}
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}
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#[doc = "Way select\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum WSEL_A {
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#[doc = "0: Way 0"]
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_0 = 0,
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#[doc = "1: Way 1"]
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_1 = 1,
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}
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impl From<WSEL_A> for bool {
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#[inline(always)]
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fn from(variant: WSEL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `WSEL`"]
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pub type WSEL_R = crate::R<bool, WSEL_A>;
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impl WSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> WSEL_A {
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match self.bits {
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false => WSEL_A::_0,
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true => WSEL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == WSEL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == WSEL_A::_1
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}
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}
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#[doc = "Write proxy for field `WSEL`"]
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pub struct WSEL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> WSEL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: WSEL_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Way 0"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(WSEL_A::_0)
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}
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#[doc = "Way 1"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(WSEL_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
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self.w
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}
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}
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#[doc = "Tag/Data Select\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TDSEL_A {
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#[doc = "0: Data"]
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_0 = 0,
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#[doc = "1: Tag"]
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_1 = 1,
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}
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impl From<TDSEL_A> for bool {
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#[inline(always)]
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fn from(variant: TDSEL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `TDSEL`"]
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pub type TDSEL_R = crate::R<bool, TDSEL_A>;
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impl TDSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> TDSEL_A {
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match self.bits {
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false => TDSEL_A::_0,
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true => TDSEL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == TDSEL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == TDSEL_A::_1
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}
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}
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#[doc = "Write proxy for field `TDSEL`"]
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pub struct TDSEL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TDSEL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: TDSEL_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Data"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(TDSEL_A::_0)
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}
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#[doc = "Tag"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(TDSEL_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
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self.w
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}
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}
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#[doc = "Reader of field `LCIVB`"]
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pub type LCIVB_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `LCIVB`"]
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pub struct LCIVB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LCIVB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
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self.w
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}
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}
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#[doc = "Reader of field `LCIMB`"]
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pub type LCIMB_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `LCIMB`"]
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pub struct LCIMB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LCIMB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
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self.w
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}
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}
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#[doc = "Reader of field `LCWAY`"]
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pub type LCWAY_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `LCWAY`"]
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pub struct LCWAY_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LCWAY_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
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self.w
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}
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}
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#[doc = "Line Command\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum LCMD_A {
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#[doc = "0: Search and read or write"]
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_00 = 0,
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#[doc = "1: Invalidate"]
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_01 = 1,
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#[doc = "2: Push"]
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_10 = 2,
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#[doc = "3: Clear"]
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_11 = 3,
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}
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impl From<LCMD_A> for u8 {
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#[inline(always)]
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fn from(variant: LCMD_A) -> Self {
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variant as _
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}
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}
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#[doc = "Reader of field `LCMD`"]
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pub type LCMD_R = crate::R<u8, LCMD_A>;
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impl LCMD_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LCMD_A {
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match self.bits {
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0 => LCMD_A::_00,
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1 => LCMD_A::_01,
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2 => LCMD_A::_10,
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3 => LCMD_A::_11,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_00`"]
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#[inline(always)]
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pub fn is_00(&self) -> bool {
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*self == LCMD_A::_00
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}
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#[doc = "Checks if the value of the field is `_01`"]
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#[inline(always)]
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pub fn is_01(&self) -> bool {
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*self == LCMD_A::_01
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}
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#[doc = "Checks if the value of the field is `_10`"]
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#[inline(always)]
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pub fn is_10(&self) -> bool {
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*self == LCMD_A::_10
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}
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#[doc = "Checks if the value of the field is `_11`"]
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#[inline(always)]
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pub fn is_11(&self) -> bool {
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*self == LCMD_A::_11
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}
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}
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#[doc = "Write proxy for field `LCMD`"]
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pub struct LCMD_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LCMD_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LCMD_A) -> &'a mut W {
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{
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self.bits(variant.into())
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}
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}
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#[doc = "Search and read or write"]
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#[inline(always)]
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pub fn _00(self) -> &'a mut W {
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self.variant(LCMD_A::_00)
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}
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#[doc = "Invalidate"]
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#[inline(always)]
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pub fn _01(self) -> &'a mut W {
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self.variant(LCMD_A::_01)
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}
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#[doc = "Push"]
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#[inline(always)]
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pub fn _10(self) -> &'a mut W {
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self.variant(LCMD_A::_10)
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}
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#[doc = "Clear"]
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#[inline(always)]
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pub fn _11(self) -> &'a mut W {
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self.variant(LCMD_A::_11)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
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self.w
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}
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}
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#[doc = "Line Address Select\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LADSEL_A {
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#[doc = "0: Cache address"]
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_0 = 0,
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#[doc = "1: Physical address"]
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_1 = 1,
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}
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impl From<LADSEL_A> for bool {
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#[inline(always)]
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fn from(variant: LADSEL_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `LADSEL`"]
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pub type LADSEL_R = crate::R<bool, LADSEL_A>;
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impl LADSEL_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> LADSEL_A {
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match self.bits {
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false => LADSEL_A::_0,
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true => LADSEL_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == LADSEL_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == LADSEL_A::_1
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}
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}
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#[doc = "Write proxy for field `LADSEL`"]
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pub struct LADSEL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> LADSEL_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: LADSEL_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Cache address"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(LADSEL_A::_0)
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}
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#[doc = "Physical address"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(LADSEL_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Line access type\n\nValue on reset: 0"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum LACC_A {
|
|
#[doc = "0: Read"]
|
|
_0 = 0,
|
|
#[doc = "1: Write"]
|
|
_1 = 1,
|
|
}
|
|
impl From<LACC_A> for bool {
|
|
#[inline(always)]
|
|
fn from(variant: LACC_A) -> Self {
|
|
variant as u8 != 0
|
|
}
|
|
}
|
|
#[doc = "Reader of field `LACC`"]
|
|
pub type LACC_R = crate::R<bool, LACC_A>;
|
|
impl LACC_R {
|
|
#[doc = r"Get enumerated values variant"]
|
|
#[inline(always)]
|
|
pub fn variant(&self) -> LACC_A {
|
|
match self.bits {
|
|
false => LACC_A::_0,
|
|
true => LACC_A::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline(always)]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == LACC_A::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline(always)]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == LACC_A::_1
|
|
}
|
|
}
|
|
#[doc = "Write proxy for field `LACC`"]
|
|
pub struct LACC_W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> LACC_W<'a> {
|
|
#[doc = r"Writes `variant` to the field"]
|
|
#[inline(always)]
|
|
pub fn variant(self, variant: LACC_A) -> &'a mut W {
|
|
{
|
|
self.bit(variant.into())
|
|
}
|
|
}
|
|
#[doc = "Read"]
|
|
#[inline(always)]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(LACC_A::_0)
|
|
}
|
|
#[doc = "Write"]
|
|
#[inline(always)]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(LACC_A::_1)
|
|
}
|
|
#[doc = r"Sets the field bit"]
|
|
#[inline(always)]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r"Clears the field bit"]
|
|
#[inline(always)]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = "Bit 0 - Initiate Cache Line Command"]
|
|
#[inline(always)]
|
|
pub fn lgo(&self) -> LGO_R {
|
|
LGO_R::new((self.bits & 0x01) != 0)
|
|
}
|
|
#[doc = "Bits 2:13 - Cache address"]
|
|
#[inline(always)]
|
|
pub fn cacheaddr(&self) -> CACHEADDR_R {
|
|
CACHEADDR_R::new(((self.bits >> 2) & 0x0fff) as u16)
|
|
}
|
|
#[doc = "Bit 14 - Way select"]
|
|
#[inline(always)]
|
|
pub fn wsel(&self) -> WSEL_R {
|
|
WSEL_R::new(((self.bits >> 14) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 16 - Tag/Data Select"]
|
|
#[inline(always)]
|
|
pub fn tdsel(&self) -> TDSEL_R {
|
|
TDSEL_R::new(((self.bits >> 16) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 20 - Line Command Initial Valid Bit"]
|
|
#[inline(always)]
|
|
pub fn lcivb(&self) -> LCIVB_R {
|
|
LCIVB_R::new(((self.bits >> 20) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 21 - Line Command Initial Modified Bit"]
|
|
#[inline(always)]
|
|
pub fn lcimb(&self) -> LCIMB_R {
|
|
LCIMB_R::new(((self.bits >> 21) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 22 - Line Command Way"]
|
|
#[inline(always)]
|
|
pub fn lcway(&self) -> LCWAY_R {
|
|
LCWAY_R::new(((self.bits >> 22) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bits 24:25 - Line Command"]
|
|
#[inline(always)]
|
|
pub fn lcmd(&self) -> LCMD_R {
|
|
LCMD_R::new(((self.bits >> 24) & 0x03) as u8)
|
|
}
|
|
#[doc = "Bit 26 - Line Address Select"]
|
|
#[inline(always)]
|
|
pub fn ladsel(&self) -> LADSEL_R {
|
|
LADSEL_R::new(((self.bits >> 26) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 27 - Line access type"]
|
|
#[inline(always)]
|
|
pub fn lacc(&self) -> LACC_R {
|
|
LACC_R::new(((self.bits >> 27) & 0x01) != 0)
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = "Bit 0 - Initiate Cache Line Command"]
|
|
#[inline(always)]
|
|
pub fn lgo(&mut self) -> LGO_W {
|
|
LGO_W { w: self }
|
|
}
|
|
#[doc = "Bits 2:13 - Cache address"]
|
|
#[inline(always)]
|
|
pub fn cacheaddr(&mut self) -> CACHEADDR_W {
|
|
CACHEADDR_W { w: self }
|
|
}
|
|
#[doc = "Bit 14 - Way select"]
|
|
#[inline(always)]
|
|
pub fn wsel(&mut self) -> WSEL_W {
|
|
WSEL_W { w: self }
|
|
}
|
|
#[doc = "Bit 16 - Tag/Data Select"]
|
|
#[inline(always)]
|
|
pub fn tdsel(&mut self) -> TDSEL_W {
|
|
TDSEL_W { w: self }
|
|
}
|
|
#[doc = "Bit 20 - Line Command Initial Valid Bit"]
|
|
#[inline(always)]
|
|
pub fn lcivb(&mut self) -> LCIVB_W {
|
|
LCIVB_W { w: self }
|
|
}
|
|
#[doc = "Bit 21 - Line Command Initial Modified Bit"]
|
|
#[inline(always)]
|
|
pub fn lcimb(&mut self) -> LCIMB_W {
|
|
LCIMB_W { w: self }
|
|
}
|
|
#[doc = "Bit 22 - Line Command Way"]
|
|
#[inline(always)]
|
|
pub fn lcway(&mut self) -> LCWAY_W {
|
|
LCWAY_W { w: self }
|
|
}
|
|
#[doc = "Bits 24:25 - Line Command"]
|
|
#[inline(always)]
|
|
pub fn lcmd(&mut self) -> LCMD_W {
|
|
LCMD_W { w: self }
|
|
}
|
|
#[doc = "Bit 26 - Line Address Select"]
|
|
#[inline(always)]
|
|
pub fn ladsel(&mut self) -> LADSEL_W {
|
|
LADSEL_W { w: self }
|
|
}
|
|
#[doc = "Bit 27 - Line access type"]
|
|
#[inline(always)]
|
|
pub fn lacc(&mut self) -> LACC_W {
|
|
LACC_W { w: self }
|
|
}
|
|
}
|