616 lines
18 KiB
Rust
616 lines
18 KiB
Rust
#[doc = "Reader of register C6SC"]
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pub type R = crate::R<u32, super::C6SC>;
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#[doc = "Writer for register C6SC"]
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pub type W = crate::W<u32, super::C6SC>;
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#[doc = "Register C6SC `reset()`'s with value 0"]
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impl crate::ResetValue for super::C6SC {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "DMA Enable\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum DMA_A {
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#[doc = "0: Disable DMA transfers."]
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_0 = 0,
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#[doc = "1: Enable DMA transfers."]
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_1 = 1,
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}
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impl From<DMA_A> for bool {
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#[inline(always)]
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fn from(variant: DMA_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `DMA`"]
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pub type DMA_R = crate::R<bool, DMA_A>;
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impl DMA_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> DMA_A {
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match self.bits {
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false => DMA_A::_0,
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true => DMA_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == DMA_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == DMA_A::_1
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}
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}
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#[doc = "Write proxy for field `DMA`"]
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pub struct DMA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> DMA_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: DMA_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Disable DMA transfers."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(DMA_A::_0)
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}
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#[doc = "Enable DMA transfers."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(DMA_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "FTM counter reset by the selected input capture event.\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ICRST_A {
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#[doc = "0: FTM counter is not reset when the selected channel (n) input event is detected."]
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_0 = 0,
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#[doc = "1: FTM counter is reset when the selected channel (n) input event is detected."]
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_1 = 1,
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}
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impl From<ICRST_A> for bool {
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#[inline(always)]
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fn from(variant: ICRST_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `ICRST`"]
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pub type ICRST_R = crate::R<bool, ICRST_A>;
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impl ICRST_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> ICRST_A {
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match self.bits {
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false => ICRST_A::_0,
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true => ICRST_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == ICRST_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == ICRST_A::_1
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}
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}
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#[doc = "Write proxy for field `ICRST`"]
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pub struct ICRST_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ICRST_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: ICRST_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(ICRST_A::_0)
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}
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#[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(ICRST_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Reader of field `ELSA`"]
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pub type ELSA_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `ELSA`"]
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pub struct ELSA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ELSA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Reader of field `ELSB`"]
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pub type ELSB_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `ELSB`"]
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pub struct ELSB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ELSB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Reader of field `MSA`"]
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pub type MSA_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `MSA`"]
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pub struct MSA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> MSA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Reader of field `MSB`"]
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pub type MSB_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `MSB`"]
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pub struct MSB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> MSB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
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self.w
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}
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}
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#[doc = "Channel (n) Interrupt Enable\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CHIE_A {
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#[doc = "0: Disable channel (n) interrupt. Use software polling."]
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_0 = 0,
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#[doc = "1: Enable channel (n) interrupt."]
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_1 = 1,
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}
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impl From<CHIE_A> for bool {
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#[inline(always)]
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fn from(variant: CHIE_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `CHIE`"]
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pub type CHIE_R = crate::R<bool, CHIE_A>;
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impl CHIE_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> CHIE_A {
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match self.bits {
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false => CHIE_A::_0,
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true => CHIE_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == CHIE_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == CHIE_A::_1
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}
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}
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#[doc = "Write proxy for field `CHIE`"]
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pub struct CHIE_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CHIE_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: CHIE_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Disable channel (n) interrupt. Use software polling."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(CHIE_A::_0)
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}
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#[doc = "Enable channel (n) interrupt."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(CHIE_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Channel (n) Flag\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CHF_A {
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#[doc = "0: No channel (n) event has occurred."]
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_0 = 0,
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#[doc = "1: A channel (n) event has occurred."]
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_1 = 1,
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}
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impl From<CHF_A> for bool {
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#[inline(always)]
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fn from(variant: CHF_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `CHF`"]
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pub type CHF_R = crate::R<bool, CHF_A>;
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impl CHF_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> CHF_A {
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match self.bits {
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false => CHF_A::_0,
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true => CHF_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == CHF_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == CHF_A::_1
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}
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}
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#[doc = "Trigger mode control\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TRIGMODE_A {
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#[doc = "0: Channel outputs will generate the normal PWM outputs without generating a pulse."]
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_0 = 0,
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#[doc = "1: If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
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_1 = 1,
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}
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impl From<TRIGMODE_A> for bool {
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#[inline(always)]
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fn from(variant: TRIGMODE_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `TRIGMODE`"]
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pub type TRIGMODE_R = crate::R<bool, TRIGMODE_A>;
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impl TRIGMODE_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> TRIGMODE_A {
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match self.bits {
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false => TRIGMODE_A::_0,
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true => TRIGMODE_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == TRIGMODE_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == TRIGMODE_A::_1
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}
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}
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#[doc = "Write proxy for field `TRIGMODE`"]
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pub struct TRIGMODE_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TRIGMODE_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: TRIGMODE_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(TRIGMODE_A::_0)
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}
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#[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(TRIGMODE_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
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self.w
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}
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}
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#[doc = "Channel (n) Input State\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CHIS_A {
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#[doc = "0: The channel (n) input is zero."]
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_0 = 0,
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#[doc = "1: The channel (n) input is one."]
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_1 = 1,
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}
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impl From<CHIS_A> for bool {
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#[inline(always)]
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fn from(variant: CHIS_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `CHIS`"]
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pub type CHIS_R = crate::R<bool, CHIS_A>;
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impl CHIS_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> CHIS_A {
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match self.bits {
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false => CHIS_A::_0,
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true => CHIS_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == CHIS_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline(always)]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == CHIS_A::_1
|
|
}
|
|
}
|
|
#[doc = "Channel (n) Output Value\n\nValue on reset: 0"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum CHOV_A {
|
|
#[doc = "0: The channel (n) output is zero."]
|
|
_0 = 0,
|
|
#[doc = "1: The channel (n) output is one."]
|
|
_1 = 1,
|
|
}
|
|
impl From<CHOV_A> for bool {
|
|
#[inline(always)]
|
|
fn from(variant: CHOV_A) -> Self {
|
|
variant as u8 != 0
|
|
}
|
|
}
|
|
#[doc = "Reader of field `CHOV`"]
|
|
pub type CHOV_R = crate::R<bool, CHOV_A>;
|
|
impl CHOV_R {
|
|
#[doc = r"Get enumerated values variant"]
|
|
#[inline(always)]
|
|
pub fn variant(&self) -> CHOV_A {
|
|
match self.bits {
|
|
false => CHOV_A::_0,
|
|
true => CHOV_A::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline(always)]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == CHOV_A::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline(always)]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == CHOV_A::_1
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = "Bit 0 - DMA Enable"]
|
|
#[inline(always)]
|
|
pub fn dma(&self) -> DMA_R {
|
|
DMA_R::new((self.bits & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
|
|
#[inline(always)]
|
|
pub fn icrst(&self) -> ICRST_R {
|
|
ICRST_R::new(((self.bits >> 1) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 2 - Channel (n) Edge or Level Select"]
|
|
#[inline(always)]
|
|
pub fn elsa(&self) -> ELSA_R {
|
|
ELSA_R::new(((self.bits >> 2) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 3 - Channel (n) Edge or Level Select"]
|
|
#[inline(always)]
|
|
pub fn elsb(&self) -> ELSB_R {
|
|
ELSB_R::new(((self.bits >> 3) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 4 - Channel (n) Mode Select"]
|
|
#[inline(always)]
|
|
pub fn msa(&self) -> MSA_R {
|
|
MSA_R::new(((self.bits >> 4) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 5 - Channel (n) Mode Select"]
|
|
#[inline(always)]
|
|
pub fn msb(&self) -> MSB_R {
|
|
MSB_R::new(((self.bits >> 5) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 6 - Channel (n) Interrupt Enable"]
|
|
#[inline(always)]
|
|
pub fn chie(&self) -> CHIE_R {
|
|
CHIE_R::new(((self.bits >> 6) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 7 - Channel (n) Flag"]
|
|
#[inline(always)]
|
|
pub fn chf(&self) -> CHF_R {
|
|
CHF_R::new(((self.bits >> 7) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 8 - Trigger mode control"]
|
|
#[inline(always)]
|
|
pub fn trigmode(&self) -> TRIGMODE_R {
|
|
TRIGMODE_R::new(((self.bits >> 8) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 9 - Channel (n) Input State"]
|
|
#[inline(always)]
|
|
pub fn chis(&self) -> CHIS_R {
|
|
CHIS_R::new(((self.bits >> 9) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 10 - Channel (n) Output Value"]
|
|
#[inline(always)]
|
|
pub fn chov(&self) -> CHOV_R {
|
|
CHOV_R::new(((self.bits >> 10) & 0x01) != 0)
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = "Bit 0 - DMA Enable"]
|
|
#[inline(always)]
|
|
pub fn dma(&mut self) -> DMA_W {
|
|
DMA_W { w: self }
|
|
}
|
|
#[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
|
|
#[inline(always)]
|
|
pub fn icrst(&mut self) -> ICRST_W {
|
|
ICRST_W { w: self }
|
|
}
|
|
#[doc = "Bit 2 - Channel (n) Edge or Level Select"]
|
|
#[inline(always)]
|
|
pub fn elsa(&mut self) -> ELSA_W {
|
|
ELSA_W { w: self }
|
|
}
|
|
#[doc = "Bit 3 - Channel (n) Edge or Level Select"]
|
|
#[inline(always)]
|
|
pub fn elsb(&mut self) -> ELSB_W {
|
|
ELSB_W { w: self }
|
|
}
|
|
#[doc = "Bit 4 - Channel (n) Mode Select"]
|
|
#[inline(always)]
|
|
pub fn msa(&mut self) -> MSA_W {
|
|
MSA_W { w: self }
|
|
}
|
|
#[doc = "Bit 5 - Channel (n) Mode Select"]
|
|
#[inline(always)]
|
|
pub fn msb(&mut self) -> MSB_W {
|
|
MSB_W { w: self }
|
|
}
|
|
#[doc = "Bit 6 - Channel (n) Interrupt Enable"]
|
|
#[inline(always)]
|
|
pub fn chie(&mut self) -> CHIE_W {
|
|
CHIE_W { w: self }
|
|
}
|
|
#[doc = "Bit 8 - Trigger mode control"]
|
|
#[inline(always)]
|
|
pub fn trigmode(&mut self) -> TRIGMODE_W {
|
|
TRIGMODE_W { w: self }
|
|
}
|
|
}
|