s32k118.rs/src/ftm1/c5v_mirror.rs

65 lines
2.0 KiB
Rust

#[doc = "Reader of register C5V_MIRROR"]
pub type R = crate::R<u32, super::C5V_MIRROR>;
#[doc = "Writer for register C5V_MIRROR"]
pub type W = crate::W<u32, super::C5V_MIRROR>;
#[doc = "Register C5V_MIRROR `reset()`'s with value 0"]
impl crate::ResetValue for super::C5V_MIRROR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `FRACVAL`"]
pub type FRACVAL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `FRACVAL`"]
pub struct FRACVAL_W<'a> {
w: &'a mut W,
}
impl<'a> FRACVAL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
self.w
}
}
#[doc = "Reader of field `VAL`"]
pub type VAL_R = crate::R<u16, u16>;
#[doc = "Write proxy for field `VAL`"]
pub struct VAL_W<'a> {
w: &'a mut W,
}
impl<'a> VAL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
self.w
}
}
impl R {
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
#[inline(always)]
pub fn fracval(&self) -> FRACVAL_R {
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
}
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
#[inline(always)]
pub fn val(&self) -> VAL_R {
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
}
}
impl W {
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
#[inline(always)]
pub fn fracval(&mut self) -> FRACVAL_W {
FRACVAL_W { w: self }
}
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
#[inline(always)]
pub fn val(&mut self) -> VAL_W {
VAL_W { w: self }
}
}