595 lines
19 KiB
Rust
595 lines
19 KiB
Rust
#[doc = "Reader of register CR"]
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pub type R = crate::R<u32, super::CR>;
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#[doc = "Writer for register CR"]
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pub type W = crate::W<u32, super::CR>;
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#[doc = "Register CR `reset()`'s with value 0"]
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impl crate::ResetValue for super::CR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Reader of field `EDBG`"]
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pub type EDBG_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `EDBG`"]
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pub struct EDBG_W<'a> {
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w: &'a mut W,
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}
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impl<'a> EDBG_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Reader of field `ERCA`"]
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pub type ERCA_R = crate::R<bool, bool>;
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#[doc = "Write proxy for field `ERCA`"]
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pub struct ERCA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ERCA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Halt On Error\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum HOE_A {
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#[doc = "0: Normal operation"]
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_0 = 0,
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#[doc = "1: Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
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_1 = 1,
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}
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impl From<HOE_A> for bool {
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#[inline(always)]
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fn from(variant: HOE_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `HOE`"]
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pub type HOE_R = crate::R<bool, HOE_A>;
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impl HOE_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> HOE_A {
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match self.bits {
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false => HOE_A::_0,
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true => HOE_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == HOE_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == HOE_A::_1
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}
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}
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#[doc = "Write proxy for field `HOE`"]
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pub struct HOE_W<'a> {
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w: &'a mut W,
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}
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impl<'a> HOE_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: HOE_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Normal operation"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(HOE_A::_0)
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}
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#[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(HOE_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Halt DMA Operations\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum HALT_A {
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#[doc = "0: Normal operation"]
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_0 = 0,
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#[doc = "1: Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
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_1 = 1,
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}
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impl From<HALT_A> for bool {
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#[inline(always)]
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fn from(variant: HALT_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `HALT`"]
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pub type HALT_R = crate::R<bool, HALT_A>;
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impl HALT_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> HALT_A {
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match self.bits {
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false => HALT_A::_0,
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true => HALT_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == HALT_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == HALT_A::_1
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}
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}
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#[doc = "Write proxy for field `HALT`"]
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pub struct HALT_W<'a> {
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w: &'a mut W,
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}
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impl<'a> HALT_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: HALT_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Normal operation"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(HALT_A::_0)
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}
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#[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(HALT_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
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self.w
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}
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}
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#[doc = "Continuous Link Mode\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CLM_A {
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#[doc = "0: A minor loop channel link made to itself goes through channel arbitration before being activated again."]
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_0 = 0,
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#[doc = "1: A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop."]
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_1 = 1,
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}
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impl From<CLM_A> for bool {
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#[inline(always)]
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fn from(variant: CLM_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `CLM`"]
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pub type CLM_R = crate::R<bool, CLM_A>;
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impl CLM_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> CLM_A {
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match self.bits {
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false => CLM_A::_0,
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true => CLM_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == CLM_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == CLM_A::_1
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}
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}
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#[doc = "Write proxy for field `CLM`"]
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pub struct CLM_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CLM_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: CLM_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "A minor loop channel link made to itself goes through channel arbitration before being activated again."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(CLM_A::_0)
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}
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#[doc = "A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(CLM_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Enable Minor Loop Mapping\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum EMLM_A {
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#[doc = "0: Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
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_0 = 0,
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#[doc = "1: Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
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_1 = 1,
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}
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impl From<EMLM_A> for bool {
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#[inline(always)]
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fn from(variant: EMLM_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `EMLM`"]
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pub type EMLM_R = crate::R<bool, EMLM_A>;
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impl EMLM_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> EMLM_A {
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match self.bits {
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false => EMLM_A::_0,
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true => EMLM_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == EMLM_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == EMLM_A::_1
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}
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}
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#[doc = "Write proxy for field `EMLM`"]
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pub struct EMLM_W<'a> {
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w: &'a mut W,
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}
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impl<'a> EMLM_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: EMLM_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(EMLM_A::_0)
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}
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#[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(EMLM_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
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self.w
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}
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}
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#[doc = "Error Cancel Transfer\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ECX_A {
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#[doc = "0: Normal operation"]
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_0 = 0,
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#[doc = "1: Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
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_1 = 1,
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}
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impl From<ECX_A> for bool {
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#[inline(always)]
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fn from(variant: ECX_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `ECX`"]
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pub type ECX_R = crate::R<bool, ECX_A>;
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impl ECX_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> ECX_A {
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match self.bits {
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false => ECX_A::_0,
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true => ECX_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == ECX_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == ECX_A::_1
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}
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}
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#[doc = "Write proxy for field `ECX`"]
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pub struct ECX_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ECX_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: ECX_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Normal operation"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(ECX_A::_0)
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}
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#[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(ECX_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
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self.w
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}
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}
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#[doc = "Cancel Transfer\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CX_A {
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#[doc = "0: Normal operation"]
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_0 = 0,
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#[doc = "1: Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
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_1 = 1,
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}
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impl From<CX_A> for bool {
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#[inline(always)]
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fn from(variant: CX_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `CX`"]
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pub type CX_R = crate::R<bool, CX_A>;
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impl CX_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> CX_A {
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match self.bits {
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false => CX_A::_0,
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true => CX_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == CX_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == CX_A::_1
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}
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}
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#[doc = "Write proxy for field `CX`"]
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pub struct CX_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CX_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: CX_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Normal operation"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(CX_A::_0)
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}
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#[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(CX_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
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self.w
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}
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}
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impl R {
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#[doc = "Bit 1 - Enable Debug"]
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#[inline(always)]
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pub fn edbg(&self) -> EDBG_R {
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EDBG_R::new(((self.bits >> 1) & 0x01) != 0)
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}
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#[doc = "Bit 2 - Enable Round Robin Channel Arbitration"]
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#[inline(always)]
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pub fn erca(&self) -> ERCA_R {
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ERCA_R::new(((self.bits >> 2) & 0x01) != 0)
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}
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#[doc = "Bit 4 - Halt On Error"]
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#[inline(always)]
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pub fn hoe(&self) -> HOE_R {
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HOE_R::new(((self.bits >> 4) & 0x01) != 0)
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}
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#[doc = "Bit 5 - Halt DMA Operations"]
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#[inline(always)]
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pub fn halt(&self) -> HALT_R {
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HALT_R::new(((self.bits >> 5) & 0x01) != 0)
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}
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#[doc = "Bit 6 - Continuous Link Mode"]
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#[inline(always)]
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pub fn clm(&self) -> CLM_R {
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CLM_R::new(((self.bits >> 6) & 0x01) != 0)
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}
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#[doc = "Bit 7 - Enable Minor Loop Mapping"]
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#[inline(always)]
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pub fn emlm(&self) -> EMLM_R {
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EMLM_R::new(((self.bits >> 7) & 0x01) != 0)
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}
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#[doc = "Bit 16 - Error Cancel Transfer"]
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#[inline(always)]
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pub fn ecx(&self) -> ECX_R {
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ECX_R::new(((self.bits >> 16) & 0x01) != 0)
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}
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#[doc = "Bit 17 - Cancel Transfer"]
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#[inline(always)]
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pub fn cx(&self) -> CX_R {
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CX_R::new(((self.bits >> 17) & 0x01) != 0)
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}
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}
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impl W {
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#[doc = "Bit 1 - Enable Debug"]
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#[inline(always)]
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pub fn edbg(&mut self) -> EDBG_W {
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EDBG_W { w: self }
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}
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#[doc = "Bit 2 - Enable Round Robin Channel Arbitration"]
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#[inline(always)]
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pub fn erca(&mut self) -> ERCA_W {
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ERCA_W { w: self }
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}
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#[doc = "Bit 4 - Halt On Error"]
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#[inline(always)]
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pub fn hoe(&mut self) -> HOE_W {
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HOE_W { w: self }
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}
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#[doc = "Bit 5 - Halt DMA Operations"]
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#[inline(always)]
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pub fn halt(&mut self) -> HALT_W {
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HALT_W { w: self }
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}
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#[doc = "Bit 6 - Continuous Link Mode"]
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#[inline(always)]
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pub fn clm(&mut self) -> CLM_W {
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CLM_W { w: self }
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}
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#[doc = "Bit 7 - Enable Minor Loop Mapping"]
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#[inline(always)]
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pub fn emlm(&mut self) -> EMLM_W {
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EMLM_W { w: self }
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}
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#[doc = "Bit 16 - Error Cancel Transfer"]
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#[inline(always)]
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pub fn ecx(&mut self) -> ECX_W {
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ECX_W { w: self }
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}
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#[doc = "Bit 17 - Cancel Transfer"]
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#[inline(always)]
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pub fn cx(&mut self) -> CX_W {
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CX_W { w: self }
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}
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}
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