3399 lines
218 KiB
Rust
3399 lines
218 KiB
Rust
#[doc = r"Register block"]
|
|
#[repr(C)]
|
|
pub struct RegisterBlock {
|
|
_reserved_0__embedded_ram: [u8; 4usize],
|
|
_reserved_1__embedded_ram: [u8; 4usize],
|
|
_reserved_2__embedded_ram: [u8; 4usize],
|
|
_reserved_3__embedded_ram: [u8; 4usize],
|
|
_reserved_4__embedded_ram: [u8; 4usize],
|
|
_reserved_5__embedded_ram: [u8; 4usize],
|
|
_reserved_6__embedded_ram: [u8; 4usize],
|
|
_reserved_7__embedded_ram: [u8; 4usize],
|
|
_reserved_8__embedded_ram: [u8; 4usize],
|
|
_reserved_9__embedded_ram: [u8; 4usize],
|
|
_reserved_10__embedded_ram1: [u8; 4usize],
|
|
_reserved_11__embedded_ram1: [u8; 4usize],
|
|
_reserved_12__embedded_ram1: [u8; 4usize],
|
|
_reserved_13__embedded_ram1: [u8; 4usize],
|
|
_reserved_14__embedded_ram1: [u8; 4usize],
|
|
_reserved_15__embedded_ram1: [u8; 4usize],
|
|
_reserved_16__embedded_ram1: [u8; 4usize],
|
|
_reserved_17__embedded_ram1: [u8; 4usize],
|
|
_reserved_18__embedded_ram1: [u8; 4usize],
|
|
_reserved_19__embedded_ram1: [u8; 4usize],
|
|
_reserved_20__embedded_ram2: [u8; 4usize],
|
|
_reserved_21__embedded_ram2: [u8; 4usize],
|
|
_reserved_22__embedded_ram2: [u8; 4usize],
|
|
_reserved_23__embedded_ram2: [u8; 4usize],
|
|
_reserved_24__embedded_ram2: [u8; 4usize],
|
|
_reserved_25__embedded_ram2: [u8; 4usize],
|
|
_reserved_26__embedded_ram2: [u8; 4usize],
|
|
_reserved_27__embedded_ram2: [u8; 4usize],
|
|
_reserved_28__embedded_ram2: [u8; 4usize],
|
|
_reserved_29__embedded_ram2: [u8; 4usize],
|
|
_reserved_30__embedded_ram3: [u8; 4usize],
|
|
_reserved_31__embedded_ram3: [u8; 4usize],
|
|
}
|
|
impl RegisterBlock {
|
|
#[doc = "0x00 - CSE PRAM0LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0ll(&self) -> &_EMBEDDEDRAM0LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(0usize) as *const _EMBEDDEDRAM0LL) }
|
|
}
|
|
#[doc = "0x00 - CSE PRAM0LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0ll_mut(&self) -> &mut _EMBEDDEDRAM0LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(0usize) as *mut _EMBEDDEDRAM0LL) }
|
|
}
|
|
#[doc = "0x00 - CSE PRAM 0 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0(&self) -> &_EMBEDDEDRAM0 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(0usize) as *const _EMBEDDEDRAM0) }
|
|
}
|
|
#[doc = "0x00 - CSE PRAM 0 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0_mut(&self) -> &mut _EMBEDDEDRAM0 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(0usize) as *mut _EMBEDDEDRAM0) }
|
|
}
|
|
#[doc = "0x01 - CSE PRAM0LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0lu(&self) -> &_EMBEDDEDRAM0LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(1usize) as *const _EMBEDDEDRAM0LU) }
|
|
}
|
|
#[doc = "0x01 - CSE PRAM0LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0lu_mut(&self) -> &mut _EMBEDDEDRAM0LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(1usize) as *mut _EMBEDDEDRAM0LU) }
|
|
}
|
|
#[doc = "0x02 - CSE PRAM0HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0hl(&self) -> &_EMBEDDEDRAM0HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(2usize) as *const _EMBEDDEDRAM0HL) }
|
|
}
|
|
#[doc = "0x02 - CSE PRAM0HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0hl_mut(&self) -> &mut _EMBEDDEDRAM0HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(2usize) as *mut _EMBEDDEDRAM0HL) }
|
|
}
|
|
#[doc = "0x03 - CSE PRAM0HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0hu(&self) -> &_EMBEDDEDRAM0HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(3usize) as *const _EMBEDDEDRAM0HU) }
|
|
}
|
|
#[doc = "0x03 - CSE PRAM0HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram0hu_mut(&self) -> &mut _EMBEDDEDRAM0HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(3usize) as *mut _EMBEDDEDRAM0HU) }
|
|
}
|
|
#[doc = "0x04 - CSE PRAM1LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1ll(&self) -> &_EMBEDDEDRAM1LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(4usize) as *const _EMBEDDEDRAM1LL) }
|
|
}
|
|
#[doc = "0x04 - CSE PRAM1LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1ll_mut(&self) -> &mut _EMBEDDEDRAM1LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(4usize) as *mut _EMBEDDEDRAM1LL) }
|
|
}
|
|
#[doc = "0x04 - CSE PRAM 1 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1(&self) -> &_EMBEDDEDRAM1 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(4usize) as *const _EMBEDDEDRAM1) }
|
|
}
|
|
#[doc = "0x04 - CSE PRAM 1 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1_mut(&self) -> &mut _EMBEDDEDRAM1 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(4usize) as *mut _EMBEDDEDRAM1) }
|
|
}
|
|
#[doc = "0x05 - CSE PRAM1LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1lu(&self) -> &_EMBEDDEDRAM1LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(5usize) as *const _EMBEDDEDRAM1LU) }
|
|
}
|
|
#[doc = "0x05 - CSE PRAM1LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1lu_mut(&self) -> &mut _EMBEDDEDRAM1LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(5usize) as *mut _EMBEDDEDRAM1LU) }
|
|
}
|
|
#[doc = "0x06 - CSE PRAM1HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1hl(&self) -> &_EMBEDDEDRAM1HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(6usize) as *const _EMBEDDEDRAM1HL) }
|
|
}
|
|
#[doc = "0x06 - CSE PRAM1HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1hl_mut(&self) -> &mut _EMBEDDEDRAM1HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(6usize) as *mut _EMBEDDEDRAM1HL) }
|
|
}
|
|
#[doc = "0x07 - CSE PRAM1HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1hu(&self) -> &_EMBEDDEDRAM1HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(7usize) as *const _EMBEDDEDRAM1HU) }
|
|
}
|
|
#[doc = "0x07 - CSE PRAM1HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram1hu_mut(&self) -> &mut _EMBEDDEDRAM1HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(7usize) as *mut _EMBEDDEDRAM1HU) }
|
|
}
|
|
#[doc = "0x08 - CSE PRAM2LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2ll(&self) -> &_EMBEDDEDRAM2LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(8usize) as *const _EMBEDDEDRAM2LL) }
|
|
}
|
|
#[doc = "0x08 - CSE PRAM2LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2ll_mut(&self) -> &mut _EMBEDDEDRAM2LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(8usize) as *mut _EMBEDDEDRAM2LL) }
|
|
}
|
|
#[doc = "0x08 - CSE PRAM 2 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2(&self) -> &_EMBEDDEDRAM2 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(8usize) as *const _EMBEDDEDRAM2) }
|
|
}
|
|
#[doc = "0x08 - CSE PRAM 2 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2_mut(&self) -> &mut _EMBEDDEDRAM2 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(8usize) as *mut _EMBEDDEDRAM2) }
|
|
}
|
|
#[doc = "0x09 - CSE PRAM2LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2lu(&self) -> &_EMBEDDEDRAM2LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(9usize) as *const _EMBEDDEDRAM2LU) }
|
|
}
|
|
#[doc = "0x09 - CSE PRAM2LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2lu_mut(&self) -> &mut _EMBEDDEDRAM2LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(9usize) as *mut _EMBEDDEDRAM2LU) }
|
|
}
|
|
#[doc = "0x0a - CSE PRAM2HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2hl(&self) -> &_EMBEDDEDRAM2HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(10usize) as *const _EMBEDDEDRAM2HL) }
|
|
}
|
|
#[doc = "0x0a - CSE PRAM2HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2hl_mut(&self) -> &mut _EMBEDDEDRAM2HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(10usize) as *mut _EMBEDDEDRAM2HL) }
|
|
}
|
|
#[doc = "0x0b - CSE PRAM2HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2hu(&self) -> &_EMBEDDEDRAM2HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(11usize) as *const _EMBEDDEDRAM2HU) }
|
|
}
|
|
#[doc = "0x0b - CSE PRAM2HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram2hu_mut(&self) -> &mut _EMBEDDEDRAM2HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(11usize) as *mut _EMBEDDEDRAM2HU) }
|
|
}
|
|
#[doc = "0x0c - CSE PRAM3LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3ll(&self) -> &_EMBEDDEDRAM3LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(12usize) as *const _EMBEDDEDRAM3LL) }
|
|
}
|
|
#[doc = "0x0c - CSE PRAM3LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3ll_mut(&self) -> &mut _EMBEDDEDRAM3LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(12usize) as *mut _EMBEDDEDRAM3LL) }
|
|
}
|
|
#[doc = "0x0c - CSE PRAM 3 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3(&self) -> &_EMBEDDEDRAM3 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(12usize) as *const _EMBEDDEDRAM3) }
|
|
}
|
|
#[doc = "0x0c - CSE PRAM 3 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3_mut(&self) -> &mut _EMBEDDEDRAM3 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(12usize) as *mut _EMBEDDEDRAM3) }
|
|
}
|
|
#[doc = "0x0d - CSE PRAM3LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3lu(&self) -> &_EMBEDDEDRAM3LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(13usize) as *const _EMBEDDEDRAM3LU) }
|
|
}
|
|
#[doc = "0x0d - CSE PRAM3LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3lu_mut(&self) -> &mut _EMBEDDEDRAM3LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(13usize) as *mut _EMBEDDEDRAM3LU) }
|
|
}
|
|
#[doc = "0x0e - CSE PRAM3HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3hl(&self) -> &_EMBEDDEDRAM3HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(14usize) as *const _EMBEDDEDRAM3HL) }
|
|
}
|
|
#[doc = "0x0e - CSE PRAM3HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3hl_mut(&self) -> &mut _EMBEDDEDRAM3HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(14usize) as *mut _EMBEDDEDRAM3HL) }
|
|
}
|
|
#[doc = "0x0f - CSE PRAM3HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3hu(&self) -> &_EMBEDDEDRAM3HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(15usize) as *const _EMBEDDEDRAM3HU) }
|
|
}
|
|
#[doc = "0x0f - CSE PRAM3HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram3hu_mut(&self) -> &mut _EMBEDDEDRAM3HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(15usize) as *mut _EMBEDDEDRAM3HU) }
|
|
}
|
|
#[doc = "0x10 - CSE PRAM4LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4ll(&self) -> &_EMBEDDEDRAM4LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(16usize) as *const _EMBEDDEDRAM4LL) }
|
|
}
|
|
#[doc = "0x10 - CSE PRAM4LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4ll_mut(&self) -> &mut _EMBEDDEDRAM4LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(16usize) as *mut _EMBEDDEDRAM4LL) }
|
|
}
|
|
#[doc = "0x10 - CSE PRAM 4 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4(&self) -> &_EMBEDDEDRAM4 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(16usize) as *const _EMBEDDEDRAM4) }
|
|
}
|
|
#[doc = "0x10 - CSE PRAM 4 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4_mut(&self) -> &mut _EMBEDDEDRAM4 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(16usize) as *mut _EMBEDDEDRAM4) }
|
|
}
|
|
#[doc = "0x11 - CSE PRAM4LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4lu(&self) -> &_EMBEDDEDRAM4LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(17usize) as *const _EMBEDDEDRAM4LU) }
|
|
}
|
|
#[doc = "0x11 - CSE PRAM4LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4lu_mut(&self) -> &mut _EMBEDDEDRAM4LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(17usize) as *mut _EMBEDDEDRAM4LU) }
|
|
}
|
|
#[doc = "0x12 - CSE PRAM4HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4hl(&self) -> &_EMBEDDEDRAM4HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(18usize) as *const _EMBEDDEDRAM4HL) }
|
|
}
|
|
#[doc = "0x12 - CSE PRAM4HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4hl_mut(&self) -> &mut _EMBEDDEDRAM4HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(18usize) as *mut _EMBEDDEDRAM4HL) }
|
|
}
|
|
#[doc = "0x13 - CSE PRAM4HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4hu(&self) -> &_EMBEDDEDRAM4HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(19usize) as *const _EMBEDDEDRAM4HU) }
|
|
}
|
|
#[doc = "0x13 - CSE PRAM4HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram4hu_mut(&self) -> &mut _EMBEDDEDRAM4HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(19usize) as *mut _EMBEDDEDRAM4HU) }
|
|
}
|
|
#[doc = "0x14 - CSE PRAM5LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5ll(&self) -> &_EMBEDDEDRAM5LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(20usize) as *const _EMBEDDEDRAM5LL) }
|
|
}
|
|
#[doc = "0x14 - CSE PRAM5LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5ll_mut(&self) -> &mut _EMBEDDEDRAM5LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(20usize) as *mut _EMBEDDEDRAM5LL) }
|
|
}
|
|
#[doc = "0x14 - CSE PRAM 5 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5(&self) -> &_EMBEDDEDRAM5 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(20usize) as *const _EMBEDDEDRAM5) }
|
|
}
|
|
#[doc = "0x14 - CSE PRAM 5 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5_mut(&self) -> &mut _EMBEDDEDRAM5 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(20usize) as *mut _EMBEDDEDRAM5) }
|
|
}
|
|
#[doc = "0x15 - CSE PRAM5LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5lu(&self) -> &_EMBEDDEDRAM5LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(21usize) as *const _EMBEDDEDRAM5LU) }
|
|
}
|
|
#[doc = "0x15 - CSE PRAM5LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5lu_mut(&self) -> &mut _EMBEDDEDRAM5LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(21usize) as *mut _EMBEDDEDRAM5LU) }
|
|
}
|
|
#[doc = "0x16 - CSE PRAM5HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5hl(&self) -> &_EMBEDDEDRAM5HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(22usize) as *const _EMBEDDEDRAM5HL) }
|
|
}
|
|
#[doc = "0x16 - CSE PRAM5HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5hl_mut(&self) -> &mut _EMBEDDEDRAM5HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(22usize) as *mut _EMBEDDEDRAM5HL) }
|
|
}
|
|
#[doc = "0x17 - CSE PRAM5HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5hu(&self) -> &_EMBEDDEDRAM5HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(23usize) as *const _EMBEDDEDRAM5HU) }
|
|
}
|
|
#[doc = "0x17 - CSE PRAM5HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram5hu_mut(&self) -> &mut _EMBEDDEDRAM5HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(23usize) as *mut _EMBEDDEDRAM5HU) }
|
|
}
|
|
#[doc = "0x18 - CSE PRAM6LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6ll(&self) -> &_EMBEDDEDRAM6LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const _EMBEDDEDRAM6LL) }
|
|
}
|
|
#[doc = "0x18 - CSE PRAM6LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6ll_mut(&self) -> &mut _EMBEDDEDRAM6LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(24usize) as *mut _EMBEDDEDRAM6LL) }
|
|
}
|
|
#[doc = "0x18 - CSE PRAM 6 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6(&self) -> &_EMBEDDEDRAM6 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const _EMBEDDEDRAM6) }
|
|
}
|
|
#[doc = "0x18 - CSE PRAM 6 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6_mut(&self) -> &mut _EMBEDDEDRAM6 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(24usize) as *mut _EMBEDDEDRAM6) }
|
|
}
|
|
#[doc = "0x19 - CSE PRAM6LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6lu(&self) -> &_EMBEDDEDRAM6LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(25usize) as *const _EMBEDDEDRAM6LU) }
|
|
}
|
|
#[doc = "0x19 - CSE PRAM6LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6lu_mut(&self) -> &mut _EMBEDDEDRAM6LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(25usize) as *mut _EMBEDDEDRAM6LU) }
|
|
}
|
|
#[doc = "0x1a - CSE PRAM6HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6hl(&self) -> &_EMBEDDEDRAM6HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(26usize) as *const _EMBEDDEDRAM6HL) }
|
|
}
|
|
#[doc = "0x1a - CSE PRAM6HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6hl_mut(&self) -> &mut _EMBEDDEDRAM6HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(26usize) as *mut _EMBEDDEDRAM6HL) }
|
|
}
|
|
#[doc = "0x1b - CSE PRAM6HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6hu(&self) -> &_EMBEDDEDRAM6HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(27usize) as *const _EMBEDDEDRAM6HU) }
|
|
}
|
|
#[doc = "0x1b - CSE PRAM6HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram6hu_mut(&self) -> &mut _EMBEDDEDRAM6HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(27usize) as *mut _EMBEDDEDRAM6HU) }
|
|
}
|
|
#[doc = "0x1c - CSE PRAM7LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7ll(&self) -> &_EMBEDDEDRAM7LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const _EMBEDDEDRAM7LL) }
|
|
}
|
|
#[doc = "0x1c - CSE PRAM7LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7ll_mut(&self) -> &mut _EMBEDDEDRAM7LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(28usize) as *mut _EMBEDDEDRAM7LL) }
|
|
}
|
|
#[doc = "0x1c - CSE PRAM 7 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7(&self) -> &_EMBEDDEDRAM7 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const _EMBEDDEDRAM7) }
|
|
}
|
|
#[doc = "0x1c - CSE PRAM 7 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7_mut(&self) -> &mut _EMBEDDEDRAM7 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(28usize) as *mut _EMBEDDEDRAM7) }
|
|
}
|
|
#[doc = "0x1d - CSE PRAM7LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7lu(&self) -> &_EMBEDDEDRAM7LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(29usize) as *const _EMBEDDEDRAM7LU) }
|
|
}
|
|
#[doc = "0x1d - CSE PRAM7LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7lu_mut(&self) -> &mut _EMBEDDEDRAM7LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(29usize) as *mut _EMBEDDEDRAM7LU) }
|
|
}
|
|
#[doc = "0x1e - CSE PRAM7HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7hl(&self) -> &_EMBEDDEDRAM7HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(30usize) as *const _EMBEDDEDRAM7HL) }
|
|
}
|
|
#[doc = "0x1e - CSE PRAM7HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7hl_mut(&self) -> &mut _EMBEDDEDRAM7HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(30usize) as *mut _EMBEDDEDRAM7HL) }
|
|
}
|
|
#[doc = "0x1f - CSE PRAM7HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7hu(&self) -> &_EMBEDDEDRAM7HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(31usize) as *const _EMBEDDEDRAM7HU) }
|
|
}
|
|
#[doc = "0x1f - CSE PRAM7HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram7hu_mut(&self) -> &mut _EMBEDDEDRAM7HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(31usize) as *mut _EMBEDDEDRAM7HU) }
|
|
}
|
|
#[doc = "0x20 - CSE PRAM8LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8ll(&self) -> &_EMBEDDEDRAM8LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(32usize) as *const _EMBEDDEDRAM8LL) }
|
|
}
|
|
#[doc = "0x20 - CSE PRAM8LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8ll_mut(&self) -> &mut _EMBEDDEDRAM8LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(32usize) as *mut _EMBEDDEDRAM8LL) }
|
|
}
|
|
#[doc = "0x20 - CSE PRAM 8 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8(&self) -> &_EMBEDDEDRAM8 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(32usize) as *const _EMBEDDEDRAM8) }
|
|
}
|
|
#[doc = "0x20 - CSE PRAM 8 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8_mut(&self) -> &mut _EMBEDDEDRAM8 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(32usize) as *mut _EMBEDDEDRAM8) }
|
|
}
|
|
#[doc = "0x21 - CSE PRAM8LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8lu(&self) -> &_EMBEDDEDRAM8LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(33usize) as *const _EMBEDDEDRAM8LU) }
|
|
}
|
|
#[doc = "0x21 - CSE PRAM8LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8lu_mut(&self) -> &mut _EMBEDDEDRAM8LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(33usize) as *mut _EMBEDDEDRAM8LU) }
|
|
}
|
|
#[doc = "0x22 - CSE PRAM8HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8hl(&self) -> &_EMBEDDEDRAM8HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(34usize) as *const _EMBEDDEDRAM8HL) }
|
|
}
|
|
#[doc = "0x22 - CSE PRAM8HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8hl_mut(&self) -> &mut _EMBEDDEDRAM8HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(34usize) as *mut _EMBEDDEDRAM8HL) }
|
|
}
|
|
#[doc = "0x23 - CSE PRAM8HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8hu(&self) -> &_EMBEDDEDRAM8HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(35usize) as *const _EMBEDDEDRAM8HU) }
|
|
}
|
|
#[doc = "0x23 - CSE PRAM8HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram8hu_mut(&self) -> &mut _EMBEDDEDRAM8HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(35usize) as *mut _EMBEDDEDRAM8HU) }
|
|
}
|
|
#[doc = "0x24 - CSE PRAM9LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9ll(&self) -> &_EMBEDDEDRAM9LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(36usize) as *const _EMBEDDEDRAM9LL) }
|
|
}
|
|
#[doc = "0x24 - CSE PRAM9LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9ll_mut(&self) -> &mut _EMBEDDEDRAM9LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(36usize) as *mut _EMBEDDEDRAM9LL) }
|
|
}
|
|
#[doc = "0x24 - CSE PRAM 9 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9(&self) -> &_EMBEDDEDRAM9 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(36usize) as *const _EMBEDDEDRAM9) }
|
|
}
|
|
#[doc = "0x24 - CSE PRAM 9 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9_mut(&self) -> &mut _EMBEDDEDRAM9 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(36usize) as *mut _EMBEDDEDRAM9) }
|
|
}
|
|
#[doc = "0x25 - CSE PRAM9LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9lu(&self) -> &_EMBEDDEDRAM9LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(37usize) as *const _EMBEDDEDRAM9LU) }
|
|
}
|
|
#[doc = "0x25 - CSE PRAM9LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9lu_mut(&self) -> &mut _EMBEDDEDRAM9LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(37usize) as *mut _EMBEDDEDRAM9LU) }
|
|
}
|
|
#[doc = "0x26 - CSE PRAM9HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9hl(&self) -> &_EMBEDDEDRAM9HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(38usize) as *const _EMBEDDEDRAM9HL) }
|
|
}
|
|
#[doc = "0x26 - CSE PRAM9HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9hl_mut(&self) -> &mut _EMBEDDEDRAM9HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(38usize) as *mut _EMBEDDEDRAM9HL) }
|
|
}
|
|
#[doc = "0x27 - CSE PRAM9HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9hu(&self) -> &_EMBEDDEDRAM9HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(39usize) as *const _EMBEDDEDRAM9HU) }
|
|
}
|
|
#[doc = "0x27 - CSE PRAM9HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram9hu_mut(&self) -> &mut _EMBEDDEDRAM9HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(39usize) as *mut _EMBEDDEDRAM9HU) }
|
|
}
|
|
#[doc = "0x28 - CSE PRAM10LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10ll(&self) -> &_EMBEDDEDRAM10LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(40usize) as *const _EMBEDDEDRAM10LL) }
|
|
}
|
|
#[doc = "0x28 - CSE PRAM10LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10ll_mut(&self) -> &mut _EMBEDDEDRAM10LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(40usize) as *mut _EMBEDDEDRAM10LL) }
|
|
}
|
|
#[doc = "0x28 - CSE PRAM 10 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10(&self) -> &_EMBEDDEDRAM10 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(40usize) as *const _EMBEDDEDRAM10) }
|
|
}
|
|
#[doc = "0x28 - CSE PRAM 10 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10_mut(&self) -> &mut _EMBEDDEDRAM10 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(40usize) as *mut _EMBEDDEDRAM10) }
|
|
}
|
|
#[doc = "0x29 - CSE PRAM10LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10lu(&self) -> &_EMBEDDEDRAM10LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(41usize) as *const _EMBEDDEDRAM10LU) }
|
|
}
|
|
#[doc = "0x29 - CSE PRAM10LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10lu_mut(&self) -> &mut _EMBEDDEDRAM10LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(41usize) as *mut _EMBEDDEDRAM10LU) }
|
|
}
|
|
#[doc = "0x2a - CSE PRAM10HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10hl(&self) -> &_EMBEDDEDRAM10HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(42usize) as *const _EMBEDDEDRAM10HL) }
|
|
}
|
|
#[doc = "0x2a - CSE PRAM10HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10hl_mut(&self) -> &mut _EMBEDDEDRAM10HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(42usize) as *mut _EMBEDDEDRAM10HL) }
|
|
}
|
|
#[doc = "0x2b - CSE PRAM10HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10hu(&self) -> &_EMBEDDEDRAM10HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(43usize) as *const _EMBEDDEDRAM10HU) }
|
|
}
|
|
#[doc = "0x2b - CSE PRAM10HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram10hu_mut(&self) -> &mut _EMBEDDEDRAM10HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(43usize) as *mut _EMBEDDEDRAM10HU) }
|
|
}
|
|
#[doc = "0x2c - CSE PRAM11LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11ll(&self) -> &_EMBEDDEDRAM11LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(44usize) as *const _EMBEDDEDRAM11LL) }
|
|
}
|
|
#[doc = "0x2c - CSE PRAM11LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11ll_mut(&self) -> &mut _EMBEDDEDRAM11LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(44usize) as *mut _EMBEDDEDRAM11LL) }
|
|
}
|
|
#[doc = "0x2c - CSE PRAM 11 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11(&self) -> &_EMBEDDEDRAM11 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(44usize) as *const _EMBEDDEDRAM11) }
|
|
}
|
|
#[doc = "0x2c - CSE PRAM 11 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11_mut(&self) -> &mut _EMBEDDEDRAM11 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(44usize) as *mut _EMBEDDEDRAM11) }
|
|
}
|
|
#[doc = "0x2d - CSE PRAM11LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11lu(&self) -> &_EMBEDDEDRAM11LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(45usize) as *const _EMBEDDEDRAM11LU) }
|
|
}
|
|
#[doc = "0x2d - CSE PRAM11LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11lu_mut(&self) -> &mut _EMBEDDEDRAM11LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(45usize) as *mut _EMBEDDEDRAM11LU) }
|
|
}
|
|
#[doc = "0x2e - CSE PRAM11HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11hl(&self) -> &_EMBEDDEDRAM11HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(46usize) as *const _EMBEDDEDRAM11HL) }
|
|
}
|
|
#[doc = "0x2e - CSE PRAM11HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11hl_mut(&self) -> &mut _EMBEDDEDRAM11HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(46usize) as *mut _EMBEDDEDRAM11HL) }
|
|
}
|
|
#[doc = "0x2f - CSE PRAM11HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11hu(&self) -> &_EMBEDDEDRAM11HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(47usize) as *const _EMBEDDEDRAM11HU) }
|
|
}
|
|
#[doc = "0x2f - CSE PRAM11HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram11hu_mut(&self) -> &mut _EMBEDDEDRAM11HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(47usize) as *mut _EMBEDDEDRAM11HU) }
|
|
}
|
|
#[doc = "0x30 - CSE PRAM12LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12ll(&self) -> &_EMBEDDEDRAM12LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(48usize) as *const _EMBEDDEDRAM12LL) }
|
|
}
|
|
#[doc = "0x30 - CSE PRAM12LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12ll_mut(&self) -> &mut _EMBEDDEDRAM12LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(48usize) as *mut _EMBEDDEDRAM12LL) }
|
|
}
|
|
#[doc = "0x30 - CSE PRAM 12 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12(&self) -> &_EMBEDDEDRAM12 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(48usize) as *const _EMBEDDEDRAM12) }
|
|
}
|
|
#[doc = "0x30 - CSE PRAM 12 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12_mut(&self) -> &mut _EMBEDDEDRAM12 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(48usize) as *mut _EMBEDDEDRAM12) }
|
|
}
|
|
#[doc = "0x31 - CSE PRAM12LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12lu(&self) -> &_EMBEDDEDRAM12LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(49usize) as *const _EMBEDDEDRAM12LU) }
|
|
}
|
|
#[doc = "0x31 - CSE PRAM12LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12lu_mut(&self) -> &mut _EMBEDDEDRAM12LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(49usize) as *mut _EMBEDDEDRAM12LU) }
|
|
}
|
|
#[doc = "0x32 - CSE PRAM12HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12hl(&self) -> &_EMBEDDEDRAM12HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(50usize) as *const _EMBEDDEDRAM12HL) }
|
|
}
|
|
#[doc = "0x32 - CSE PRAM12HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12hl_mut(&self) -> &mut _EMBEDDEDRAM12HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(50usize) as *mut _EMBEDDEDRAM12HL) }
|
|
}
|
|
#[doc = "0x33 - CSE PRAM12HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12hu(&self) -> &_EMBEDDEDRAM12HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(51usize) as *const _EMBEDDEDRAM12HU) }
|
|
}
|
|
#[doc = "0x33 - CSE PRAM12HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram12hu_mut(&self) -> &mut _EMBEDDEDRAM12HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(51usize) as *mut _EMBEDDEDRAM12HU) }
|
|
}
|
|
#[doc = "0x34 - CSE PRAM13LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13ll(&self) -> &_EMBEDDEDRAM13LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(52usize) as *const _EMBEDDEDRAM13LL) }
|
|
}
|
|
#[doc = "0x34 - CSE PRAM13LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13ll_mut(&self) -> &mut _EMBEDDEDRAM13LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(52usize) as *mut _EMBEDDEDRAM13LL) }
|
|
}
|
|
#[doc = "0x34 - CSE PRAM 13 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13(&self) -> &_EMBEDDEDRAM13 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(52usize) as *const _EMBEDDEDRAM13) }
|
|
}
|
|
#[doc = "0x34 - CSE PRAM 13 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13_mut(&self) -> &mut _EMBEDDEDRAM13 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(52usize) as *mut _EMBEDDEDRAM13) }
|
|
}
|
|
#[doc = "0x35 - CSE PRAM13LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13lu(&self) -> &_EMBEDDEDRAM13LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(53usize) as *const _EMBEDDEDRAM13LU) }
|
|
}
|
|
#[doc = "0x35 - CSE PRAM13LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13lu_mut(&self) -> &mut _EMBEDDEDRAM13LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(53usize) as *mut _EMBEDDEDRAM13LU) }
|
|
}
|
|
#[doc = "0x36 - CSE PRAM13HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13hl(&self) -> &_EMBEDDEDRAM13HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(54usize) as *const _EMBEDDEDRAM13HL) }
|
|
}
|
|
#[doc = "0x36 - CSE PRAM13HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13hl_mut(&self) -> &mut _EMBEDDEDRAM13HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(54usize) as *mut _EMBEDDEDRAM13HL) }
|
|
}
|
|
#[doc = "0x37 - CSE PRAM13HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13hu(&self) -> &_EMBEDDEDRAM13HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(55usize) as *const _EMBEDDEDRAM13HU) }
|
|
}
|
|
#[doc = "0x37 - CSE PRAM13HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram13hu_mut(&self) -> &mut _EMBEDDEDRAM13HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(55usize) as *mut _EMBEDDEDRAM13HU) }
|
|
}
|
|
#[doc = "0x38 - CSE PRAM14LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14ll(&self) -> &_EMBEDDEDRAM14LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(56usize) as *const _EMBEDDEDRAM14LL) }
|
|
}
|
|
#[doc = "0x38 - CSE PRAM14LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14ll_mut(&self) -> &mut _EMBEDDEDRAM14LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(56usize) as *mut _EMBEDDEDRAM14LL) }
|
|
}
|
|
#[doc = "0x38 - CSE PRAM 14 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14(&self) -> &_EMBEDDEDRAM14 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(56usize) as *const _EMBEDDEDRAM14) }
|
|
}
|
|
#[doc = "0x38 - CSE PRAM 14 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14_mut(&self) -> &mut _EMBEDDEDRAM14 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(56usize) as *mut _EMBEDDEDRAM14) }
|
|
}
|
|
#[doc = "0x39 - CSE PRAM14LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14lu(&self) -> &_EMBEDDEDRAM14LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(57usize) as *const _EMBEDDEDRAM14LU) }
|
|
}
|
|
#[doc = "0x39 - CSE PRAM14LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14lu_mut(&self) -> &mut _EMBEDDEDRAM14LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(57usize) as *mut _EMBEDDEDRAM14LU) }
|
|
}
|
|
#[doc = "0x3a - CSE PRAM14HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14hl(&self) -> &_EMBEDDEDRAM14HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(58usize) as *const _EMBEDDEDRAM14HL) }
|
|
}
|
|
#[doc = "0x3a - CSE PRAM14HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14hl_mut(&self) -> &mut _EMBEDDEDRAM14HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(58usize) as *mut _EMBEDDEDRAM14HL) }
|
|
}
|
|
#[doc = "0x3b - CSE PRAM14HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14hu(&self) -> &_EMBEDDEDRAM14HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(59usize) as *const _EMBEDDEDRAM14HU) }
|
|
}
|
|
#[doc = "0x3b - CSE PRAM14HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram14hu_mut(&self) -> &mut _EMBEDDEDRAM14HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(59usize) as *mut _EMBEDDEDRAM14HU) }
|
|
}
|
|
#[doc = "0x3c - CSE PRAM15LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15ll(&self) -> &_EMBEDDEDRAM15LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(60usize) as *const _EMBEDDEDRAM15LL) }
|
|
}
|
|
#[doc = "0x3c - CSE PRAM15LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15ll_mut(&self) -> &mut _EMBEDDEDRAM15LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(60usize) as *mut _EMBEDDEDRAM15LL) }
|
|
}
|
|
#[doc = "0x3c - CSE PRAM 15 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15(&self) -> &_EMBEDDEDRAM15 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(60usize) as *const _EMBEDDEDRAM15) }
|
|
}
|
|
#[doc = "0x3c - CSE PRAM 15 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15_mut(&self) -> &mut _EMBEDDEDRAM15 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(60usize) as *mut _EMBEDDEDRAM15) }
|
|
}
|
|
#[doc = "0x3d - CSE PRAM15LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15lu(&self) -> &_EMBEDDEDRAM15LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(61usize) as *const _EMBEDDEDRAM15LU) }
|
|
}
|
|
#[doc = "0x3d - CSE PRAM15LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15lu_mut(&self) -> &mut _EMBEDDEDRAM15LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(61usize) as *mut _EMBEDDEDRAM15LU) }
|
|
}
|
|
#[doc = "0x3e - CSE PRAM15HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15hl(&self) -> &_EMBEDDEDRAM15HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(62usize) as *const _EMBEDDEDRAM15HL) }
|
|
}
|
|
#[doc = "0x3e - CSE PRAM15HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15hl_mut(&self) -> &mut _EMBEDDEDRAM15HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(62usize) as *mut _EMBEDDEDRAM15HL) }
|
|
}
|
|
#[doc = "0x3f - CSE PRAM15HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15hu(&self) -> &_EMBEDDEDRAM15HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(63usize) as *const _EMBEDDEDRAM15HU) }
|
|
}
|
|
#[doc = "0x3f - CSE PRAM15HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram15hu_mut(&self) -> &mut _EMBEDDEDRAM15HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(63usize) as *mut _EMBEDDEDRAM15HU) }
|
|
}
|
|
#[doc = "0x40 - CSE PRAM16LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16ll(&self) -> &_EMBEDDEDRAM16LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(64usize) as *const _EMBEDDEDRAM16LL) }
|
|
}
|
|
#[doc = "0x40 - CSE PRAM16LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16ll_mut(&self) -> &mut _EMBEDDEDRAM16LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(64usize) as *mut _EMBEDDEDRAM16LL) }
|
|
}
|
|
#[doc = "0x40 - CSE PRAM 16 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16(&self) -> &_EMBEDDEDRAM16 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(64usize) as *const _EMBEDDEDRAM16) }
|
|
}
|
|
#[doc = "0x40 - CSE PRAM 16 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16_mut(&self) -> &mut _EMBEDDEDRAM16 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(64usize) as *mut _EMBEDDEDRAM16) }
|
|
}
|
|
#[doc = "0x41 - CSE PRAM16LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16lu(&self) -> &_EMBEDDEDRAM16LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(65usize) as *const _EMBEDDEDRAM16LU) }
|
|
}
|
|
#[doc = "0x41 - CSE PRAM16LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16lu_mut(&self) -> &mut _EMBEDDEDRAM16LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(65usize) as *mut _EMBEDDEDRAM16LU) }
|
|
}
|
|
#[doc = "0x42 - CSE PRAM16HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16hl(&self) -> &_EMBEDDEDRAM16HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(66usize) as *const _EMBEDDEDRAM16HL) }
|
|
}
|
|
#[doc = "0x42 - CSE PRAM16HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16hl_mut(&self) -> &mut _EMBEDDEDRAM16HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(66usize) as *mut _EMBEDDEDRAM16HL) }
|
|
}
|
|
#[doc = "0x43 - CSE PRAM16HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16hu(&self) -> &_EMBEDDEDRAM16HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(67usize) as *const _EMBEDDEDRAM16HU) }
|
|
}
|
|
#[doc = "0x43 - CSE PRAM16HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram16hu_mut(&self) -> &mut _EMBEDDEDRAM16HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(67usize) as *mut _EMBEDDEDRAM16HU) }
|
|
}
|
|
#[doc = "0x44 - CSE PRAM17LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17ll(&self) -> &_EMBEDDEDRAM17LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(68usize) as *const _EMBEDDEDRAM17LL) }
|
|
}
|
|
#[doc = "0x44 - CSE PRAM17LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17ll_mut(&self) -> &mut _EMBEDDEDRAM17LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(68usize) as *mut _EMBEDDEDRAM17LL) }
|
|
}
|
|
#[doc = "0x44 - CSE PRAM 17 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17(&self) -> &_EMBEDDEDRAM17 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(68usize) as *const _EMBEDDEDRAM17) }
|
|
}
|
|
#[doc = "0x44 - CSE PRAM 17 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17_mut(&self) -> &mut _EMBEDDEDRAM17 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(68usize) as *mut _EMBEDDEDRAM17) }
|
|
}
|
|
#[doc = "0x45 - CSE PRAM17LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17lu(&self) -> &_EMBEDDEDRAM17LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(69usize) as *const _EMBEDDEDRAM17LU) }
|
|
}
|
|
#[doc = "0x45 - CSE PRAM17LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17lu_mut(&self) -> &mut _EMBEDDEDRAM17LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(69usize) as *mut _EMBEDDEDRAM17LU) }
|
|
}
|
|
#[doc = "0x46 - CSE PRAM17HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17hl(&self) -> &_EMBEDDEDRAM17HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(70usize) as *const _EMBEDDEDRAM17HL) }
|
|
}
|
|
#[doc = "0x46 - CSE PRAM17HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17hl_mut(&self) -> &mut _EMBEDDEDRAM17HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(70usize) as *mut _EMBEDDEDRAM17HL) }
|
|
}
|
|
#[doc = "0x47 - CSE PRAM17HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17hu(&self) -> &_EMBEDDEDRAM17HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(71usize) as *const _EMBEDDEDRAM17HU) }
|
|
}
|
|
#[doc = "0x47 - CSE PRAM17HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram17hu_mut(&self) -> &mut _EMBEDDEDRAM17HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(71usize) as *mut _EMBEDDEDRAM17HU) }
|
|
}
|
|
#[doc = "0x48 - CSE PRAM18LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18ll(&self) -> &_EMBEDDEDRAM18LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(72usize) as *const _EMBEDDEDRAM18LL) }
|
|
}
|
|
#[doc = "0x48 - CSE PRAM18LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18ll_mut(&self) -> &mut _EMBEDDEDRAM18LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(72usize) as *mut _EMBEDDEDRAM18LL) }
|
|
}
|
|
#[doc = "0x48 - CSE PRAM 18 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18(&self) -> &_EMBEDDEDRAM18 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(72usize) as *const _EMBEDDEDRAM18) }
|
|
}
|
|
#[doc = "0x48 - CSE PRAM 18 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18_mut(&self) -> &mut _EMBEDDEDRAM18 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(72usize) as *mut _EMBEDDEDRAM18) }
|
|
}
|
|
#[doc = "0x49 - CSE PRAM18LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18lu(&self) -> &_EMBEDDEDRAM18LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(73usize) as *const _EMBEDDEDRAM18LU) }
|
|
}
|
|
#[doc = "0x49 - CSE PRAM18LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18lu_mut(&self) -> &mut _EMBEDDEDRAM18LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(73usize) as *mut _EMBEDDEDRAM18LU) }
|
|
}
|
|
#[doc = "0x4a - CSE PRAM18HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18hl(&self) -> &_EMBEDDEDRAM18HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(74usize) as *const _EMBEDDEDRAM18HL) }
|
|
}
|
|
#[doc = "0x4a - CSE PRAM18HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18hl_mut(&self) -> &mut _EMBEDDEDRAM18HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(74usize) as *mut _EMBEDDEDRAM18HL) }
|
|
}
|
|
#[doc = "0x4b - CSE PRAM18HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18hu(&self) -> &_EMBEDDEDRAM18HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(75usize) as *const _EMBEDDEDRAM18HU) }
|
|
}
|
|
#[doc = "0x4b - CSE PRAM18HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram18hu_mut(&self) -> &mut _EMBEDDEDRAM18HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(75usize) as *mut _EMBEDDEDRAM18HU) }
|
|
}
|
|
#[doc = "0x4c - CSE PRAM19LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19ll(&self) -> &_EMBEDDEDRAM19LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(76usize) as *const _EMBEDDEDRAM19LL) }
|
|
}
|
|
#[doc = "0x4c - CSE PRAM19LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19ll_mut(&self) -> &mut _EMBEDDEDRAM19LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(76usize) as *mut _EMBEDDEDRAM19LL) }
|
|
}
|
|
#[doc = "0x4c - CSE PRAM 19 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19(&self) -> &_EMBEDDEDRAM19 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(76usize) as *const _EMBEDDEDRAM19) }
|
|
}
|
|
#[doc = "0x4c - CSE PRAM 19 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19_mut(&self) -> &mut _EMBEDDEDRAM19 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(76usize) as *mut _EMBEDDEDRAM19) }
|
|
}
|
|
#[doc = "0x4d - CSE PRAM19LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19lu(&self) -> &_EMBEDDEDRAM19LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(77usize) as *const _EMBEDDEDRAM19LU) }
|
|
}
|
|
#[doc = "0x4d - CSE PRAM19LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19lu_mut(&self) -> &mut _EMBEDDEDRAM19LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(77usize) as *mut _EMBEDDEDRAM19LU) }
|
|
}
|
|
#[doc = "0x4e - CSE PRAM19HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19hl(&self) -> &_EMBEDDEDRAM19HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(78usize) as *const _EMBEDDEDRAM19HL) }
|
|
}
|
|
#[doc = "0x4e - CSE PRAM19HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19hl_mut(&self) -> &mut _EMBEDDEDRAM19HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(78usize) as *mut _EMBEDDEDRAM19HL) }
|
|
}
|
|
#[doc = "0x4f - CSE PRAM19HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19hu(&self) -> &_EMBEDDEDRAM19HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(79usize) as *const _EMBEDDEDRAM19HU) }
|
|
}
|
|
#[doc = "0x4f - CSE PRAM19HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram19hu_mut(&self) -> &mut _EMBEDDEDRAM19HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(79usize) as *mut _EMBEDDEDRAM19HU) }
|
|
}
|
|
#[doc = "0x50 - CSE PRAM20LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20ll(&self) -> &_EMBEDDEDRAM20LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(80usize) as *const _EMBEDDEDRAM20LL) }
|
|
}
|
|
#[doc = "0x50 - CSE PRAM20LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20ll_mut(&self) -> &mut _EMBEDDEDRAM20LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(80usize) as *mut _EMBEDDEDRAM20LL) }
|
|
}
|
|
#[doc = "0x50 - CSE PRAM 20 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20(&self) -> &_EMBEDDEDRAM20 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(80usize) as *const _EMBEDDEDRAM20) }
|
|
}
|
|
#[doc = "0x50 - CSE PRAM 20 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20_mut(&self) -> &mut _EMBEDDEDRAM20 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(80usize) as *mut _EMBEDDEDRAM20) }
|
|
}
|
|
#[doc = "0x51 - CSE PRAM20LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20lu(&self) -> &_EMBEDDEDRAM20LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(81usize) as *const _EMBEDDEDRAM20LU) }
|
|
}
|
|
#[doc = "0x51 - CSE PRAM20LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20lu_mut(&self) -> &mut _EMBEDDEDRAM20LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(81usize) as *mut _EMBEDDEDRAM20LU) }
|
|
}
|
|
#[doc = "0x52 - CSE PRAM20HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20hl(&self) -> &_EMBEDDEDRAM20HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(82usize) as *const _EMBEDDEDRAM20HL) }
|
|
}
|
|
#[doc = "0x52 - CSE PRAM20HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20hl_mut(&self) -> &mut _EMBEDDEDRAM20HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(82usize) as *mut _EMBEDDEDRAM20HL) }
|
|
}
|
|
#[doc = "0x53 - CSE PRAM20HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20hu(&self) -> &_EMBEDDEDRAM20HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(83usize) as *const _EMBEDDEDRAM20HU) }
|
|
}
|
|
#[doc = "0x53 - CSE PRAM20HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram20hu_mut(&self) -> &mut _EMBEDDEDRAM20HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(83usize) as *mut _EMBEDDEDRAM20HU) }
|
|
}
|
|
#[doc = "0x54 - CSE PRAM21LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21ll(&self) -> &_EMBEDDEDRAM21LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(84usize) as *const _EMBEDDEDRAM21LL) }
|
|
}
|
|
#[doc = "0x54 - CSE PRAM21LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21ll_mut(&self) -> &mut _EMBEDDEDRAM21LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(84usize) as *mut _EMBEDDEDRAM21LL) }
|
|
}
|
|
#[doc = "0x54 - CSE PRAM 21 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21(&self) -> &_EMBEDDEDRAM21 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(84usize) as *const _EMBEDDEDRAM21) }
|
|
}
|
|
#[doc = "0x54 - CSE PRAM 21 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21_mut(&self) -> &mut _EMBEDDEDRAM21 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(84usize) as *mut _EMBEDDEDRAM21) }
|
|
}
|
|
#[doc = "0x55 - CSE PRAM21LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21lu(&self) -> &_EMBEDDEDRAM21LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(85usize) as *const _EMBEDDEDRAM21LU) }
|
|
}
|
|
#[doc = "0x55 - CSE PRAM21LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21lu_mut(&self) -> &mut _EMBEDDEDRAM21LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(85usize) as *mut _EMBEDDEDRAM21LU) }
|
|
}
|
|
#[doc = "0x56 - CSE PRAM21HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21hl(&self) -> &_EMBEDDEDRAM21HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(86usize) as *const _EMBEDDEDRAM21HL) }
|
|
}
|
|
#[doc = "0x56 - CSE PRAM21HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21hl_mut(&self) -> &mut _EMBEDDEDRAM21HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(86usize) as *mut _EMBEDDEDRAM21HL) }
|
|
}
|
|
#[doc = "0x57 - CSE PRAM21HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21hu(&self) -> &_EMBEDDEDRAM21HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(87usize) as *const _EMBEDDEDRAM21HU) }
|
|
}
|
|
#[doc = "0x57 - CSE PRAM21HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram21hu_mut(&self) -> &mut _EMBEDDEDRAM21HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(87usize) as *mut _EMBEDDEDRAM21HU) }
|
|
}
|
|
#[doc = "0x58 - CSE PRAM22LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22ll(&self) -> &_EMBEDDEDRAM22LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(88usize) as *const _EMBEDDEDRAM22LL) }
|
|
}
|
|
#[doc = "0x58 - CSE PRAM22LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22ll_mut(&self) -> &mut _EMBEDDEDRAM22LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(88usize) as *mut _EMBEDDEDRAM22LL) }
|
|
}
|
|
#[doc = "0x58 - CSE PRAM 22 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22(&self) -> &_EMBEDDEDRAM22 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(88usize) as *const _EMBEDDEDRAM22) }
|
|
}
|
|
#[doc = "0x58 - CSE PRAM 22 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22_mut(&self) -> &mut _EMBEDDEDRAM22 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(88usize) as *mut _EMBEDDEDRAM22) }
|
|
}
|
|
#[doc = "0x59 - CSE PRAM22LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22lu(&self) -> &_EMBEDDEDRAM22LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(89usize) as *const _EMBEDDEDRAM22LU) }
|
|
}
|
|
#[doc = "0x59 - CSE PRAM22LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22lu_mut(&self) -> &mut _EMBEDDEDRAM22LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(89usize) as *mut _EMBEDDEDRAM22LU) }
|
|
}
|
|
#[doc = "0x5a - CSE PRAM22HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22hl(&self) -> &_EMBEDDEDRAM22HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(90usize) as *const _EMBEDDEDRAM22HL) }
|
|
}
|
|
#[doc = "0x5a - CSE PRAM22HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22hl_mut(&self) -> &mut _EMBEDDEDRAM22HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(90usize) as *mut _EMBEDDEDRAM22HL) }
|
|
}
|
|
#[doc = "0x5b - CSE PRAM22HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22hu(&self) -> &_EMBEDDEDRAM22HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(91usize) as *const _EMBEDDEDRAM22HU) }
|
|
}
|
|
#[doc = "0x5b - CSE PRAM22HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram22hu_mut(&self) -> &mut _EMBEDDEDRAM22HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(91usize) as *mut _EMBEDDEDRAM22HU) }
|
|
}
|
|
#[doc = "0x5c - CSE PRAM23LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23ll(&self) -> &_EMBEDDEDRAM23LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(92usize) as *const _EMBEDDEDRAM23LL) }
|
|
}
|
|
#[doc = "0x5c - CSE PRAM23LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23ll_mut(&self) -> &mut _EMBEDDEDRAM23LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(92usize) as *mut _EMBEDDEDRAM23LL) }
|
|
}
|
|
#[doc = "0x5c - CSE PRAM 23 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23(&self) -> &_EMBEDDEDRAM23 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(92usize) as *const _EMBEDDEDRAM23) }
|
|
}
|
|
#[doc = "0x5c - CSE PRAM 23 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23_mut(&self) -> &mut _EMBEDDEDRAM23 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(92usize) as *mut _EMBEDDEDRAM23) }
|
|
}
|
|
#[doc = "0x5d - CSE PRAM23LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23lu(&self) -> &_EMBEDDEDRAM23LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(93usize) as *const _EMBEDDEDRAM23LU) }
|
|
}
|
|
#[doc = "0x5d - CSE PRAM23LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23lu_mut(&self) -> &mut _EMBEDDEDRAM23LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(93usize) as *mut _EMBEDDEDRAM23LU) }
|
|
}
|
|
#[doc = "0x5e - CSE PRAM23HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23hl(&self) -> &_EMBEDDEDRAM23HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(94usize) as *const _EMBEDDEDRAM23HL) }
|
|
}
|
|
#[doc = "0x5e - CSE PRAM23HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23hl_mut(&self) -> &mut _EMBEDDEDRAM23HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(94usize) as *mut _EMBEDDEDRAM23HL) }
|
|
}
|
|
#[doc = "0x5f - CSE PRAM23HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23hu(&self) -> &_EMBEDDEDRAM23HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(95usize) as *const _EMBEDDEDRAM23HU) }
|
|
}
|
|
#[doc = "0x5f - CSE PRAM23HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram23hu_mut(&self) -> &mut _EMBEDDEDRAM23HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(95usize) as *mut _EMBEDDEDRAM23HU) }
|
|
}
|
|
#[doc = "0x60 - CSE PRAM24LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24ll(&self) -> &_EMBEDDEDRAM24LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(96usize) as *const _EMBEDDEDRAM24LL) }
|
|
}
|
|
#[doc = "0x60 - CSE PRAM24LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24ll_mut(&self) -> &mut _EMBEDDEDRAM24LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(96usize) as *mut _EMBEDDEDRAM24LL) }
|
|
}
|
|
#[doc = "0x60 - CSE PRAM 24 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24(&self) -> &_EMBEDDEDRAM24 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(96usize) as *const _EMBEDDEDRAM24) }
|
|
}
|
|
#[doc = "0x60 - CSE PRAM 24 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24_mut(&self) -> &mut _EMBEDDEDRAM24 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(96usize) as *mut _EMBEDDEDRAM24) }
|
|
}
|
|
#[doc = "0x61 - CSE PRAM24LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24lu(&self) -> &_EMBEDDEDRAM24LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(97usize) as *const _EMBEDDEDRAM24LU) }
|
|
}
|
|
#[doc = "0x61 - CSE PRAM24LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24lu_mut(&self) -> &mut _EMBEDDEDRAM24LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(97usize) as *mut _EMBEDDEDRAM24LU) }
|
|
}
|
|
#[doc = "0x62 - CSE PRAM24HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24hl(&self) -> &_EMBEDDEDRAM24HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(98usize) as *const _EMBEDDEDRAM24HL) }
|
|
}
|
|
#[doc = "0x62 - CSE PRAM24HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24hl_mut(&self) -> &mut _EMBEDDEDRAM24HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(98usize) as *mut _EMBEDDEDRAM24HL) }
|
|
}
|
|
#[doc = "0x63 - CSE PRAM24HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24hu(&self) -> &_EMBEDDEDRAM24HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(99usize) as *const _EMBEDDEDRAM24HU) }
|
|
}
|
|
#[doc = "0x63 - CSE PRAM24HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram24hu_mut(&self) -> &mut _EMBEDDEDRAM24HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(99usize) as *mut _EMBEDDEDRAM24HU) }
|
|
}
|
|
#[doc = "0x64 - CSE PRAM25LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25ll(&self) -> &_EMBEDDEDRAM25LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(100usize) as *const _EMBEDDEDRAM25LL) }
|
|
}
|
|
#[doc = "0x64 - CSE PRAM25LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25ll_mut(&self) -> &mut _EMBEDDEDRAM25LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(100usize) as *mut _EMBEDDEDRAM25LL) }
|
|
}
|
|
#[doc = "0x64 - CSE PRAM 25 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25(&self) -> &_EMBEDDEDRAM25 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(100usize) as *const _EMBEDDEDRAM25) }
|
|
}
|
|
#[doc = "0x64 - CSE PRAM 25 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25_mut(&self) -> &mut _EMBEDDEDRAM25 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(100usize) as *mut _EMBEDDEDRAM25) }
|
|
}
|
|
#[doc = "0x65 - CSE PRAM25LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25lu(&self) -> &_EMBEDDEDRAM25LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(101usize) as *const _EMBEDDEDRAM25LU) }
|
|
}
|
|
#[doc = "0x65 - CSE PRAM25LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25lu_mut(&self) -> &mut _EMBEDDEDRAM25LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(101usize) as *mut _EMBEDDEDRAM25LU) }
|
|
}
|
|
#[doc = "0x66 - CSE PRAM25HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25hl(&self) -> &_EMBEDDEDRAM25HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(102usize) as *const _EMBEDDEDRAM25HL) }
|
|
}
|
|
#[doc = "0x66 - CSE PRAM25HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25hl_mut(&self) -> &mut _EMBEDDEDRAM25HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(102usize) as *mut _EMBEDDEDRAM25HL) }
|
|
}
|
|
#[doc = "0x67 - CSE PRAM25HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25hu(&self) -> &_EMBEDDEDRAM25HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(103usize) as *const _EMBEDDEDRAM25HU) }
|
|
}
|
|
#[doc = "0x67 - CSE PRAM25HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram25hu_mut(&self) -> &mut _EMBEDDEDRAM25HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(103usize) as *mut _EMBEDDEDRAM25HU) }
|
|
}
|
|
#[doc = "0x68 - CSE PRAM26LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26ll(&self) -> &_EMBEDDEDRAM26LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(104usize) as *const _EMBEDDEDRAM26LL) }
|
|
}
|
|
#[doc = "0x68 - CSE PRAM26LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26ll_mut(&self) -> &mut _EMBEDDEDRAM26LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(104usize) as *mut _EMBEDDEDRAM26LL) }
|
|
}
|
|
#[doc = "0x68 - CSE PRAM 26 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26(&self) -> &_EMBEDDEDRAM26 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(104usize) as *const _EMBEDDEDRAM26) }
|
|
}
|
|
#[doc = "0x68 - CSE PRAM 26 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26_mut(&self) -> &mut _EMBEDDEDRAM26 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(104usize) as *mut _EMBEDDEDRAM26) }
|
|
}
|
|
#[doc = "0x69 - CSE PRAM26LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26lu(&self) -> &_EMBEDDEDRAM26LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(105usize) as *const _EMBEDDEDRAM26LU) }
|
|
}
|
|
#[doc = "0x69 - CSE PRAM26LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26lu_mut(&self) -> &mut _EMBEDDEDRAM26LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(105usize) as *mut _EMBEDDEDRAM26LU) }
|
|
}
|
|
#[doc = "0x6a - CSE PRAM26HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26hl(&self) -> &_EMBEDDEDRAM26HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(106usize) as *const _EMBEDDEDRAM26HL) }
|
|
}
|
|
#[doc = "0x6a - CSE PRAM26HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26hl_mut(&self) -> &mut _EMBEDDEDRAM26HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(106usize) as *mut _EMBEDDEDRAM26HL) }
|
|
}
|
|
#[doc = "0x6b - CSE PRAM26HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26hu(&self) -> &_EMBEDDEDRAM26HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(107usize) as *const _EMBEDDEDRAM26HU) }
|
|
}
|
|
#[doc = "0x6b - CSE PRAM26HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram26hu_mut(&self) -> &mut _EMBEDDEDRAM26HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(107usize) as *mut _EMBEDDEDRAM26HU) }
|
|
}
|
|
#[doc = "0x6c - CSE PRAM27LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27ll(&self) -> &_EMBEDDEDRAM27LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(108usize) as *const _EMBEDDEDRAM27LL) }
|
|
}
|
|
#[doc = "0x6c - CSE PRAM27LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27ll_mut(&self) -> &mut _EMBEDDEDRAM27LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(108usize) as *mut _EMBEDDEDRAM27LL) }
|
|
}
|
|
#[doc = "0x6c - CSE PRAM 27 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27(&self) -> &_EMBEDDEDRAM27 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(108usize) as *const _EMBEDDEDRAM27) }
|
|
}
|
|
#[doc = "0x6c - CSE PRAM 27 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27_mut(&self) -> &mut _EMBEDDEDRAM27 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(108usize) as *mut _EMBEDDEDRAM27) }
|
|
}
|
|
#[doc = "0x6d - CSE PRAM27LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27lu(&self) -> &_EMBEDDEDRAM27LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(109usize) as *const _EMBEDDEDRAM27LU) }
|
|
}
|
|
#[doc = "0x6d - CSE PRAM27LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27lu_mut(&self) -> &mut _EMBEDDEDRAM27LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(109usize) as *mut _EMBEDDEDRAM27LU) }
|
|
}
|
|
#[doc = "0x6e - CSE PRAM27HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27hl(&self) -> &_EMBEDDEDRAM27HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(110usize) as *const _EMBEDDEDRAM27HL) }
|
|
}
|
|
#[doc = "0x6e - CSE PRAM27HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27hl_mut(&self) -> &mut _EMBEDDEDRAM27HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(110usize) as *mut _EMBEDDEDRAM27HL) }
|
|
}
|
|
#[doc = "0x6f - CSE PRAM27HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27hu(&self) -> &_EMBEDDEDRAM27HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(111usize) as *const _EMBEDDEDRAM27HU) }
|
|
}
|
|
#[doc = "0x6f - CSE PRAM27HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram27hu_mut(&self) -> &mut _EMBEDDEDRAM27HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(111usize) as *mut _EMBEDDEDRAM27HU) }
|
|
}
|
|
#[doc = "0x70 - CSE PRAM28LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28ll(&self) -> &_EMBEDDEDRAM28LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(112usize) as *const _EMBEDDEDRAM28LL) }
|
|
}
|
|
#[doc = "0x70 - CSE PRAM28LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28ll_mut(&self) -> &mut _EMBEDDEDRAM28LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(112usize) as *mut _EMBEDDEDRAM28LL) }
|
|
}
|
|
#[doc = "0x70 - CSE PRAM 28 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28(&self) -> &_EMBEDDEDRAM28 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(112usize) as *const _EMBEDDEDRAM28) }
|
|
}
|
|
#[doc = "0x70 - CSE PRAM 28 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28_mut(&self) -> &mut _EMBEDDEDRAM28 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(112usize) as *mut _EMBEDDEDRAM28) }
|
|
}
|
|
#[doc = "0x71 - CSE PRAM28LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28lu(&self) -> &_EMBEDDEDRAM28LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(113usize) as *const _EMBEDDEDRAM28LU) }
|
|
}
|
|
#[doc = "0x71 - CSE PRAM28LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28lu_mut(&self) -> &mut _EMBEDDEDRAM28LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(113usize) as *mut _EMBEDDEDRAM28LU) }
|
|
}
|
|
#[doc = "0x72 - CSE PRAM28HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28hl(&self) -> &_EMBEDDEDRAM28HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(114usize) as *const _EMBEDDEDRAM28HL) }
|
|
}
|
|
#[doc = "0x72 - CSE PRAM28HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28hl_mut(&self) -> &mut _EMBEDDEDRAM28HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(114usize) as *mut _EMBEDDEDRAM28HL) }
|
|
}
|
|
#[doc = "0x73 - CSE PRAM28HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28hu(&self) -> &_EMBEDDEDRAM28HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(115usize) as *const _EMBEDDEDRAM28HU) }
|
|
}
|
|
#[doc = "0x73 - CSE PRAM28HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram28hu_mut(&self) -> &mut _EMBEDDEDRAM28HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(115usize) as *mut _EMBEDDEDRAM28HU) }
|
|
}
|
|
#[doc = "0x74 - CSE PRAM29LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29ll(&self) -> &_EMBEDDEDRAM29LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(116usize) as *const _EMBEDDEDRAM29LL) }
|
|
}
|
|
#[doc = "0x74 - CSE PRAM29LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29ll_mut(&self) -> &mut _EMBEDDEDRAM29LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(116usize) as *mut _EMBEDDEDRAM29LL) }
|
|
}
|
|
#[doc = "0x74 - CSE PRAM 29 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29(&self) -> &_EMBEDDEDRAM29 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(116usize) as *const _EMBEDDEDRAM29) }
|
|
}
|
|
#[doc = "0x74 - CSE PRAM 29 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29_mut(&self) -> &mut _EMBEDDEDRAM29 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(116usize) as *mut _EMBEDDEDRAM29) }
|
|
}
|
|
#[doc = "0x75 - CSE PRAM29LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29lu(&self) -> &_EMBEDDEDRAM29LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(117usize) as *const _EMBEDDEDRAM29LU) }
|
|
}
|
|
#[doc = "0x75 - CSE PRAM29LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29lu_mut(&self) -> &mut _EMBEDDEDRAM29LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(117usize) as *mut _EMBEDDEDRAM29LU) }
|
|
}
|
|
#[doc = "0x76 - CSE PRAM29HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29hl(&self) -> &_EMBEDDEDRAM29HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(118usize) as *const _EMBEDDEDRAM29HL) }
|
|
}
|
|
#[doc = "0x76 - CSE PRAM29HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29hl_mut(&self) -> &mut _EMBEDDEDRAM29HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(118usize) as *mut _EMBEDDEDRAM29HL) }
|
|
}
|
|
#[doc = "0x77 - CSE PRAM29HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29hu(&self) -> &_EMBEDDEDRAM29HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(119usize) as *const _EMBEDDEDRAM29HU) }
|
|
}
|
|
#[doc = "0x77 - CSE PRAM29HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram29hu_mut(&self) -> &mut _EMBEDDEDRAM29HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(119usize) as *mut _EMBEDDEDRAM29HU) }
|
|
}
|
|
#[doc = "0x78 - CSE PRAM30LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30ll(&self) -> &_EMBEDDEDRAM30LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(120usize) as *const _EMBEDDEDRAM30LL) }
|
|
}
|
|
#[doc = "0x78 - CSE PRAM30LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30ll_mut(&self) -> &mut _EMBEDDEDRAM30LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(120usize) as *mut _EMBEDDEDRAM30LL) }
|
|
}
|
|
#[doc = "0x78 - CSE PRAM 30 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30(&self) -> &_EMBEDDEDRAM30 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(120usize) as *const _EMBEDDEDRAM30) }
|
|
}
|
|
#[doc = "0x78 - CSE PRAM 30 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30_mut(&self) -> &mut _EMBEDDEDRAM30 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(120usize) as *mut _EMBEDDEDRAM30) }
|
|
}
|
|
#[doc = "0x79 - CSE PRAM30LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30lu(&self) -> &_EMBEDDEDRAM30LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(121usize) as *const _EMBEDDEDRAM30LU) }
|
|
}
|
|
#[doc = "0x79 - CSE PRAM30LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30lu_mut(&self) -> &mut _EMBEDDEDRAM30LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(121usize) as *mut _EMBEDDEDRAM30LU) }
|
|
}
|
|
#[doc = "0x7a - CSE PRAM30HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30hl(&self) -> &_EMBEDDEDRAM30HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(122usize) as *const _EMBEDDEDRAM30HL) }
|
|
}
|
|
#[doc = "0x7a - CSE PRAM30HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30hl_mut(&self) -> &mut _EMBEDDEDRAM30HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(122usize) as *mut _EMBEDDEDRAM30HL) }
|
|
}
|
|
#[doc = "0x7b - CSE PRAM30HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30hu(&self) -> &_EMBEDDEDRAM30HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(123usize) as *const _EMBEDDEDRAM30HU) }
|
|
}
|
|
#[doc = "0x7b - CSE PRAM30HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram30hu_mut(&self) -> &mut _EMBEDDEDRAM30HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(123usize) as *mut _EMBEDDEDRAM30HU) }
|
|
}
|
|
#[doc = "0x7c - CSE PRAM31LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31ll(&self) -> &_EMBEDDEDRAM31LL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(124usize) as *const _EMBEDDEDRAM31LL) }
|
|
}
|
|
#[doc = "0x7c - CSE PRAM31LL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31ll_mut(&self) -> &mut _EMBEDDEDRAM31LL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(124usize) as *mut _EMBEDDEDRAM31LL) }
|
|
}
|
|
#[doc = "0x7c - CSE PRAM 31 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31(&self) -> &_EMBEDDEDRAM31 {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(124usize) as *const _EMBEDDEDRAM31) }
|
|
}
|
|
#[doc = "0x7c - CSE PRAM 31 Register"]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31_mut(&self) -> &mut _EMBEDDEDRAM31 {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(124usize) as *mut _EMBEDDEDRAM31) }
|
|
}
|
|
#[doc = "0x7d - CSE PRAM31LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31lu(&self) -> &_EMBEDDEDRAM31LU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(125usize) as *const _EMBEDDEDRAM31LU) }
|
|
}
|
|
#[doc = "0x7d - CSE PRAM31LU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31lu_mut(&self) -> &mut _EMBEDDEDRAM31LU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(125usize) as *mut _EMBEDDEDRAM31LU) }
|
|
}
|
|
#[doc = "0x7e - CSE PRAM31HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31hl(&self) -> &_EMBEDDEDRAM31HL {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(126usize) as *const _EMBEDDEDRAM31HL) }
|
|
}
|
|
#[doc = "0x7e - CSE PRAM31HL register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31hl_mut(&self) -> &mut _EMBEDDEDRAM31HL {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(126usize) as *mut _EMBEDDEDRAM31HL) }
|
|
}
|
|
#[doc = "0x7f - CSE PRAM31HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31hu(&self) -> &_EMBEDDEDRAM31HU {
|
|
unsafe { &*(((self as *const Self) as *const u8).add(127usize) as *const _EMBEDDEDRAM31HU) }
|
|
}
|
|
#[doc = "0x7f - CSE PRAM31HU register."]
|
|
#[inline(always)]
|
|
pub fn _embedded_ram31hu_mut(&self) -> &mut _EMBEDDEDRAM31HU {
|
|
unsafe { &mut *(((self as *const Self) as *mut u8).add(127usize) as *mut _EMBEDDEDRAM31HU) }
|
|
}
|
|
}
|
|
#[doc = "CSE PRAM 0 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram0](_embedded_ram0) module"]
|
|
pub type _EMBEDDEDRAM0 = crate::Reg<u32, __EMBEDDEDRAM0>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM0;
|
|
#[doc = "`read()` method returns [_embedded_ram0::R](_embedded_ram0::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM0 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram0::W](_embedded_ram0::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM0 {}
|
|
#[doc = "CSE PRAM 0 Register"]
|
|
pub mod _embedded_ram0;
|
|
#[doc = "CSE PRAM0LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram0ll](_embedded_ram0ll) module"]
|
|
pub type _EMBEDDEDRAM0LL = crate::Reg<u8, __EMBEDDEDRAM0LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM0LL;
|
|
#[doc = "`read()` method returns [_embedded_ram0ll::R](_embedded_ram0ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM0LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram0ll::W](_embedded_ram0ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM0LL {}
|
|
#[doc = "CSE PRAM0LL register."]
|
|
pub mod _embedded_ram0ll;
|
|
#[doc = "CSE PRAM0LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram0lu](_embedded_ram0lu) module"]
|
|
pub type _EMBEDDEDRAM0LU = crate::Reg<u8, __EMBEDDEDRAM0LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM0LU;
|
|
#[doc = "`read()` method returns [_embedded_ram0lu::R](_embedded_ram0lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM0LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram0lu::W](_embedded_ram0lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM0LU {}
|
|
#[doc = "CSE PRAM0LU register."]
|
|
pub mod _embedded_ram0lu;
|
|
#[doc = "CSE PRAM0HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram0hl](_embedded_ram0hl) module"]
|
|
pub type _EMBEDDEDRAM0HL = crate::Reg<u8, __EMBEDDEDRAM0HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM0HL;
|
|
#[doc = "`read()` method returns [_embedded_ram0hl::R](_embedded_ram0hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM0HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram0hl::W](_embedded_ram0hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM0HL {}
|
|
#[doc = "CSE PRAM0HL register."]
|
|
pub mod _embedded_ram0hl;
|
|
#[doc = "CSE PRAM0HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram0hu](_embedded_ram0hu) module"]
|
|
pub type _EMBEDDEDRAM0HU = crate::Reg<u8, __EMBEDDEDRAM0HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM0HU;
|
|
#[doc = "`read()` method returns [_embedded_ram0hu::R](_embedded_ram0hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM0HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram0hu::W](_embedded_ram0hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM0HU {}
|
|
#[doc = "CSE PRAM0HU register."]
|
|
pub mod _embedded_ram0hu;
|
|
#[doc = "CSE PRAM 1 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram1](_embedded_ram1) module"]
|
|
pub type _EMBEDDEDRAM1 = crate::Reg<u32, __EMBEDDEDRAM1>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM1;
|
|
#[doc = "`read()` method returns [_embedded_ram1::R](_embedded_ram1::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM1 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram1::W](_embedded_ram1::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM1 {}
|
|
#[doc = "CSE PRAM 1 Register"]
|
|
pub mod _embedded_ram1;
|
|
#[doc = "CSE PRAM1LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram1ll](_embedded_ram1ll) module"]
|
|
pub type _EMBEDDEDRAM1LL = crate::Reg<u8, __EMBEDDEDRAM1LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM1LL;
|
|
#[doc = "`read()` method returns [_embedded_ram1ll::R](_embedded_ram1ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM1LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram1ll::W](_embedded_ram1ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM1LL {}
|
|
#[doc = "CSE PRAM1LL register."]
|
|
pub mod _embedded_ram1ll;
|
|
#[doc = "CSE PRAM1LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram1lu](_embedded_ram1lu) module"]
|
|
pub type _EMBEDDEDRAM1LU = crate::Reg<u8, __EMBEDDEDRAM1LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM1LU;
|
|
#[doc = "`read()` method returns [_embedded_ram1lu::R](_embedded_ram1lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM1LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram1lu::W](_embedded_ram1lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM1LU {}
|
|
#[doc = "CSE PRAM1LU register."]
|
|
pub mod _embedded_ram1lu;
|
|
#[doc = "CSE PRAM1HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram1hl](_embedded_ram1hl) module"]
|
|
pub type _EMBEDDEDRAM1HL = crate::Reg<u8, __EMBEDDEDRAM1HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM1HL;
|
|
#[doc = "`read()` method returns [_embedded_ram1hl::R](_embedded_ram1hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM1HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram1hl::W](_embedded_ram1hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM1HL {}
|
|
#[doc = "CSE PRAM1HL register."]
|
|
pub mod _embedded_ram1hl;
|
|
#[doc = "CSE PRAM1HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram1hu](_embedded_ram1hu) module"]
|
|
pub type _EMBEDDEDRAM1HU = crate::Reg<u8, __EMBEDDEDRAM1HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM1HU;
|
|
#[doc = "`read()` method returns [_embedded_ram1hu::R](_embedded_ram1hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM1HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram1hu::W](_embedded_ram1hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM1HU {}
|
|
#[doc = "CSE PRAM1HU register."]
|
|
pub mod _embedded_ram1hu;
|
|
#[doc = "CSE PRAM 2 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram2](_embedded_ram2) module"]
|
|
pub type _EMBEDDEDRAM2 = crate::Reg<u32, __EMBEDDEDRAM2>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM2;
|
|
#[doc = "`read()` method returns [_embedded_ram2::R](_embedded_ram2::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM2 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram2::W](_embedded_ram2::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM2 {}
|
|
#[doc = "CSE PRAM 2 Register"]
|
|
pub mod _embedded_ram2;
|
|
#[doc = "CSE PRAM2LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram2ll](_embedded_ram2ll) module"]
|
|
pub type _EMBEDDEDRAM2LL = crate::Reg<u8, __EMBEDDEDRAM2LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM2LL;
|
|
#[doc = "`read()` method returns [_embedded_ram2ll::R](_embedded_ram2ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM2LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram2ll::W](_embedded_ram2ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM2LL {}
|
|
#[doc = "CSE PRAM2LL register."]
|
|
pub mod _embedded_ram2ll;
|
|
#[doc = "CSE PRAM2LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram2lu](_embedded_ram2lu) module"]
|
|
pub type _EMBEDDEDRAM2LU = crate::Reg<u8, __EMBEDDEDRAM2LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM2LU;
|
|
#[doc = "`read()` method returns [_embedded_ram2lu::R](_embedded_ram2lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM2LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram2lu::W](_embedded_ram2lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM2LU {}
|
|
#[doc = "CSE PRAM2LU register."]
|
|
pub mod _embedded_ram2lu;
|
|
#[doc = "CSE PRAM2HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram2hl](_embedded_ram2hl) module"]
|
|
pub type _EMBEDDEDRAM2HL = crate::Reg<u8, __EMBEDDEDRAM2HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM2HL;
|
|
#[doc = "`read()` method returns [_embedded_ram2hl::R](_embedded_ram2hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM2HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram2hl::W](_embedded_ram2hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM2HL {}
|
|
#[doc = "CSE PRAM2HL register."]
|
|
pub mod _embedded_ram2hl;
|
|
#[doc = "CSE PRAM2HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram2hu](_embedded_ram2hu) module"]
|
|
pub type _EMBEDDEDRAM2HU = crate::Reg<u8, __EMBEDDEDRAM2HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM2HU;
|
|
#[doc = "`read()` method returns [_embedded_ram2hu::R](_embedded_ram2hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM2HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram2hu::W](_embedded_ram2hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM2HU {}
|
|
#[doc = "CSE PRAM2HU register."]
|
|
pub mod _embedded_ram2hu;
|
|
#[doc = "CSE PRAM 3 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram3](_embedded_ram3) module"]
|
|
pub type _EMBEDDEDRAM3 = crate::Reg<u32, __EMBEDDEDRAM3>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM3;
|
|
#[doc = "`read()` method returns [_embedded_ram3::R](_embedded_ram3::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM3 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram3::W](_embedded_ram3::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM3 {}
|
|
#[doc = "CSE PRAM 3 Register"]
|
|
pub mod _embedded_ram3;
|
|
#[doc = "CSE PRAM3LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram3ll](_embedded_ram3ll) module"]
|
|
pub type _EMBEDDEDRAM3LL = crate::Reg<u8, __EMBEDDEDRAM3LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM3LL;
|
|
#[doc = "`read()` method returns [_embedded_ram3ll::R](_embedded_ram3ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM3LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram3ll::W](_embedded_ram3ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM3LL {}
|
|
#[doc = "CSE PRAM3LL register."]
|
|
pub mod _embedded_ram3ll;
|
|
#[doc = "CSE PRAM3LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram3lu](_embedded_ram3lu) module"]
|
|
pub type _EMBEDDEDRAM3LU = crate::Reg<u8, __EMBEDDEDRAM3LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM3LU;
|
|
#[doc = "`read()` method returns [_embedded_ram3lu::R](_embedded_ram3lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM3LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram3lu::W](_embedded_ram3lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM3LU {}
|
|
#[doc = "CSE PRAM3LU register."]
|
|
pub mod _embedded_ram3lu;
|
|
#[doc = "CSE PRAM3HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram3hl](_embedded_ram3hl) module"]
|
|
pub type _EMBEDDEDRAM3HL = crate::Reg<u8, __EMBEDDEDRAM3HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM3HL;
|
|
#[doc = "`read()` method returns [_embedded_ram3hl::R](_embedded_ram3hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM3HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram3hl::W](_embedded_ram3hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM3HL {}
|
|
#[doc = "CSE PRAM3HL register."]
|
|
pub mod _embedded_ram3hl;
|
|
#[doc = "CSE PRAM3HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram3hu](_embedded_ram3hu) module"]
|
|
pub type _EMBEDDEDRAM3HU = crate::Reg<u8, __EMBEDDEDRAM3HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM3HU;
|
|
#[doc = "`read()` method returns [_embedded_ram3hu::R](_embedded_ram3hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM3HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram3hu::W](_embedded_ram3hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM3HU {}
|
|
#[doc = "CSE PRAM3HU register."]
|
|
pub mod _embedded_ram3hu;
|
|
#[doc = "CSE PRAM 4 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram4](_embedded_ram4) module"]
|
|
pub type _EMBEDDEDRAM4 = crate::Reg<u32, __EMBEDDEDRAM4>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM4;
|
|
#[doc = "`read()` method returns [_embedded_ram4::R](_embedded_ram4::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM4 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram4::W](_embedded_ram4::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM4 {}
|
|
#[doc = "CSE PRAM 4 Register"]
|
|
pub mod _embedded_ram4;
|
|
#[doc = "CSE PRAM4LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram4ll](_embedded_ram4ll) module"]
|
|
pub type _EMBEDDEDRAM4LL = crate::Reg<u8, __EMBEDDEDRAM4LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM4LL;
|
|
#[doc = "`read()` method returns [_embedded_ram4ll::R](_embedded_ram4ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM4LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram4ll::W](_embedded_ram4ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM4LL {}
|
|
#[doc = "CSE PRAM4LL register."]
|
|
pub mod _embedded_ram4ll;
|
|
#[doc = "CSE PRAM4LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram4lu](_embedded_ram4lu) module"]
|
|
pub type _EMBEDDEDRAM4LU = crate::Reg<u8, __EMBEDDEDRAM4LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM4LU;
|
|
#[doc = "`read()` method returns [_embedded_ram4lu::R](_embedded_ram4lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM4LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram4lu::W](_embedded_ram4lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM4LU {}
|
|
#[doc = "CSE PRAM4LU register."]
|
|
pub mod _embedded_ram4lu;
|
|
#[doc = "CSE PRAM4HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram4hl](_embedded_ram4hl) module"]
|
|
pub type _EMBEDDEDRAM4HL = crate::Reg<u8, __EMBEDDEDRAM4HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM4HL;
|
|
#[doc = "`read()` method returns [_embedded_ram4hl::R](_embedded_ram4hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM4HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram4hl::W](_embedded_ram4hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM4HL {}
|
|
#[doc = "CSE PRAM4HL register."]
|
|
pub mod _embedded_ram4hl;
|
|
#[doc = "CSE PRAM4HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram4hu](_embedded_ram4hu) module"]
|
|
pub type _EMBEDDEDRAM4HU = crate::Reg<u8, __EMBEDDEDRAM4HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM4HU;
|
|
#[doc = "`read()` method returns [_embedded_ram4hu::R](_embedded_ram4hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM4HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram4hu::W](_embedded_ram4hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM4HU {}
|
|
#[doc = "CSE PRAM4HU register."]
|
|
pub mod _embedded_ram4hu;
|
|
#[doc = "CSE PRAM 5 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram5](_embedded_ram5) module"]
|
|
pub type _EMBEDDEDRAM5 = crate::Reg<u32, __EMBEDDEDRAM5>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM5;
|
|
#[doc = "`read()` method returns [_embedded_ram5::R](_embedded_ram5::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM5 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram5::W](_embedded_ram5::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM5 {}
|
|
#[doc = "CSE PRAM 5 Register"]
|
|
pub mod _embedded_ram5;
|
|
#[doc = "CSE PRAM5LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram5ll](_embedded_ram5ll) module"]
|
|
pub type _EMBEDDEDRAM5LL = crate::Reg<u8, __EMBEDDEDRAM5LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM5LL;
|
|
#[doc = "`read()` method returns [_embedded_ram5ll::R](_embedded_ram5ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM5LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram5ll::W](_embedded_ram5ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM5LL {}
|
|
#[doc = "CSE PRAM5LL register."]
|
|
pub mod _embedded_ram5ll;
|
|
#[doc = "CSE PRAM5LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram5lu](_embedded_ram5lu) module"]
|
|
pub type _EMBEDDEDRAM5LU = crate::Reg<u8, __EMBEDDEDRAM5LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM5LU;
|
|
#[doc = "`read()` method returns [_embedded_ram5lu::R](_embedded_ram5lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM5LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram5lu::W](_embedded_ram5lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM5LU {}
|
|
#[doc = "CSE PRAM5LU register."]
|
|
pub mod _embedded_ram5lu;
|
|
#[doc = "CSE PRAM5HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram5hl](_embedded_ram5hl) module"]
|
|
pub type _EMBEDDEDRAM5HL = crate::Reg<u8, __EMBEDDEDRAM5HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM5HL;
|
|
#[doc = "`read()` method returns [_embedded_ram5hl::R](_embedded_ram5hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM5HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram5hl::W](_embedded_ram5hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM5HL {}
|
|
#[doc = "CSE PRAM5HL register."]
|
|
pub mod _embedded_ram5hl;
|
|
#[doc = "CSE PRAM5HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram5hu](_embedded_ram5hu) module"]
|
|
pub type _EMBEDDEDRAM5HU = crate::Reg<u8, __EMBEDDEDRAM5HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM5HU;
|
|
#[doc = "`read()` method returns [_embedded_ram5hu::R](_embedded_ram5hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM5HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram5hu::W](_embedded_ram5hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM5HU {}
|
|
#[doc = "CSE PRAM5HU register."]
|
|
pub mod _embedded_ram5hu;
|
|
#[doc = "CSE PRAM 6 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram6](_embedded_ram6) module"]
|
|
pub type _EMBEDDEDRAM6 = crate::Reg<u32, __EMBEDDEDRAM6>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM6;
|
|
#[doc = "`read()` method returns [_embedded_ram6::R](_embedded_ram6::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM6 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram6::W](_embedded_ram6::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM6 {}
|
|
#[doc = "CSE PRAM 6 Register"]
|
|
pub mod _embedded_ram6;
|
|
#[doc = "CSE PRAM6LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram6ll](_embedded_ram6ll) module"]
|
|
pub type _EMBEDDEDRAM6LL = crate::Reg<u8, __EMBEDDEDRAM6LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM6LL;
|
|
#[doc = "`read()` method returns [_embedded_ram6ll::R](_embedded_ram6ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM6LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram6ll::W](_embedded_ram6ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM6LL {}
|
|
#[doc = "CSE PRAM6LL register."]
|
|
pub mod _embedded_ram6ll;
|
|
#[doc = "CSE PRAM6LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram6lu](_embedded_ram6lu) module"]
|
|
pub type _EMBEDDEDRAM6LU = crate::Reg<u8, __EMBEDDEDRAM6LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM6LU;
|
|
#[doc = "`read()` method returns [_embedded_ram6lu::R](_embedded_ram6lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM6LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram6lu::W](_embedded_ram6lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM6LU {}
|
|
#[doc = "CSE PRAM6LU register."]
|
|
pub mod _embedded_ram6lu;
|
|
#[doc = "CSE PRAM6HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram6hl](_embedded_ram6hl) module"]
|
|
pub type _EMBEDDEDRAM6HL = crate::Reg<u8, __EMBEDDEDRAM6HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM6HL;
|
|
#[doc = "`read()` method returns [_embedded_ram6hl::R](_embedded_ram6hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM6HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram6hl::W](_embedded_ram6hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM6HL {}
|
|
#[doc = "CSE PRAM6HL register."]
|
|
pub mod _embedded_ram6hl;
|
|
#[doc = "CSE PRAM6HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram6hu](_embedded_ram6hu) module"]
|
|
pub type _EMBEDDEDRAM6HU = crate::Reg<u8, __EMBEDDEDRAM6HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM6HU;
|
|
#[doc = "`read()` method returns [_embedded_ram6hu::R](_embedded_ram6hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM6HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram6hu::W](_embedded_ram6hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM6HU {}
|
|
#[doc = "CSE PRAM6HU register."]
|
|
pub mod _embedded_ram6hu;
|
|
#[doc = "CSE PRAM 7 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram7](_embedded_ram7) module"]
|
|
pub type _EMBEDDEDRAM7 = crate::Reg<u32, __EMBEDDEDRAM7>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM7;
|
|
#[doc = "`read()` method returns [_embedded_ram7::R](_embedded_ram7::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM7 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram7::W](_embedded_ram7::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM7 {}
|
|
#[doc = "CSE PRAM 7 Register"]
|
|
pub mod _embedded_ram7;
|
|
#[doc = "CSE PRAM7LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram7ll](_embedded_ram7ll) module"]
|
|
pub type _EMBEDDEDRAM7LL = crate::Reg<u8, __EMBEDDEDRAM7LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM7LL;
|
|
#[doc = "`read()` method returns [_embedded_ram7ll::R](_embedded_ram7ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM7LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram7ll::W](_embedded_ram7ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM7LL {}
|
|
#[doc = "CSE PRAM7LL register."]
|
|
pub mod _embedded_ram7ll;
|
|
#[doc = "CSE PRAM7LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram7lu](_embedded_ram7lu) module"]
|
|
pub type _EMBEDDEDRAM7LU = crate::Reg<u8, __EMBEDDEDRAM7LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM7LU;
|
|
#[doc = "`read()` method returns [_embedded_ram7lu::R](_embedded_ram7lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM7LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram7lu::W](_embedded_ram7lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM7LU {}
|
|
#[doc = "CSE PRAM7LU register."]
|
|
pub mod _embedded_ram7lu;
|
|
#[doc = "CSE PRAM7HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram7hl](_embedded_ram7hl) module"]
|
|
pub type _EMBEDDEDRAM7HL = crate::Reg<u8, __EMBEDDEDRAM7HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM7HL;
|
|
#[doc = "`read()` method returns [_embedded_ram7hl::R](_embedded_ram7hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM7HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram7hl::W](_embedded_ram7hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM7HL {}
|
|
#[doc = "CSE PRAM7HL register."]
|
|
pub mod _embedded_ram7hl;
|
|
#[doc = "CSE PRAM7HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram7hu](_embedded_ram7hu) module"]
|
|
pub type _EMBEDDEDRAM7HU = crate::Reg<u8, __EMBEDDEDRAM7HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM7HU;
|
|
#[doc = "`read()` method returns [_embedded_ram7hu::R](_embedded_ram7hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM7HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram7hu::W](_embedded_ram7hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM7HU {}
|
|
#[doc = "CSE PRAM7HU register."]
|
|
pub mod _embedded_ram7hu;
|
|
#[doc = "CSE PRAM 8 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram8](_embedded_ram8) module"]
|
|
pub type _EMBEDDEDRAM8 = crate::Reg<u32, __EMBEDDEDRAM8>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM8;
|
|
#[doc = "`read()` method returns [_embedded_ram8::R](_embedded_ram8::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM8 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram8::W](_embedded_ram8::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM8 {}
|
|
#[doc = "CSE PRAM 8 Register"]
|
|
pub mod _embedded_ram8;
|
|
#[doc = "CSE PRAM8LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram8ll](_embedded_ram8ll) module"]
|
|
pub type _EMBEDDEDRAM8LL = crate::Reg<u8, __EMBEDDEDRAM8LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM8LL;
|
|
#[doc = "`read()` method returns [_embedded_ram8ll::R](_embedded_ram8ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM8LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram8ll::W](_embedded_ram8ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM8LL {}
|
|
#[doc = "CSE PRAM8LL register."]
|
|
pub mod _embedded_ram8ll;
|
|
#[doc = "CSE PRAM8LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram8lu](_embedded_ram8lu) module"]
|
|
pub type _EMBEDDEDRAM8LU = crate::Reg<u8, __EMBEDDEDRAM8LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM8LU;
|
|
#[doc = "`read()` method returns [_embedded_ram8lu::R](_embedded_ram8lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM8LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram8lu::W](_embedded_ram8lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM8LU {}
|
|
#[doc = "CSE PRAM8LU register."]
|
|
pub mod _embedded_ram8lu;
|
|
#[doc = "CSE PRAM8HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram8hl](_embedded_ram8hl) module"]
|
|
pub type _EMBEDDEDRAM8HL = crate::Reg<u8, __EMBEDDEDRAM8HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM8HL;
|
|
#[doc = "`read()` method returns [_embedded_ram8hl::R](_embedded_ram8hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM8HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram8hl::W](_embedded_ram8hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM8HL {}
|
|
#[doc = "CSE PRAM8HL register."]
|
|
pub mod _embedded_ram8hl;
|
|
#[doc = "CSE PRAM8HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram8hu](_embedded_ram8hu) module"]
|
|
pub type _EMBEDDEDRAM8HU = crate::Reg<u8, __EMBEDDEDRAM8HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM8HU;
|
|
#[doc = "`read()` method returns [_embedded_ram8hu::R](_embedded_ram8hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM8HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram8hu::W](_embedded_ram8hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM8HU {}
|
|
#[doc = "CSE PRAM8HU register."]
|
|
pub mod _embedded_ram8hu;
|
|
#[doc = "CSE PRAM 9 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram9](_embedded_ram9) module"]
|
|
pub type _EMBEDDEDRAM9 = crate::Reg<u32, __EMBEDDEDRAM9>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM9;
|
|
#[doc = "`read()` method returns [_embedded_ram9::R](_embedded_ram9::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM9 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram9::W](_embedded_ram9::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM9 {}
|
|
#[doc = "CSE PRAM 9 Register"]
|
|
pub mod _embedded_ram9;
|
|
#[doc = "CSE PRAM9LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram9ll](_embedded_ram9ll) module"]
|
|
pub type _EMBEDDEDRAM9LL = crate::Reg<u8, __EMBEDDEDRAM9LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM9LL;
|
|
#[doc = "`read()` method returns [_embedded_ram9ll::R](_embedded_ram9ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM9LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram9ll::W](_embedded_ram9ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM9LL {}
|
|
#[doc = "CSE PRAM9LL register."]
|
|
pub mod _embedded_ram9ll;
|
|
#[doc = "CSE PRAM9LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram9lu](_embedded_ram9lu) module"]
|
|
pub type _EMBEDDEDRAM9LU = crate::Reg<u8, __EMBEDDEDRAM9LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM9LU;
|
|
#[doc = "`read()` method returns [_embedded_ram9lu::R](_embedded_ram9lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM9LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram9lu::W](_embedded_ram9lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM9LU {}
|
|
#[doc = "CSE PRAM9LU register."]
|
|
pub mod _embedded_ram9lu;
|
|
#[doc = "CSE PRAM9HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram9hl](_embedded_ram9hl) module"]
|
|
pub type _EMBEDDEDRAM9HL = crate::Reg<u8, __EMBEDDEDRAM9HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM9HL;
|
|
#[doc = "`read()` method returns [_embedded_ram9hl::R](_embedded_ram9hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM9HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram9hl::W](_embedded_ram9hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM9HL {}
|
|
#[doc = "CSE PRAM9HL register."]
|
|
pub mod _embedded_ram9hl;
|
|
#[doc = "CSE PRAM9HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram9hu](_embedded_ram9hu) module"]
|
|
pub type _EMBEDDEDRAM9HU = crate::Reg<u8, __EMBEDDEDRAM9HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM9HU;
|
|
#[doc = "`read()` method returns [_embedded_ram9hu::R](_embedded_ram9hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM9HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram9hu::W](_embedded_ram9hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM9HU {}
|
|
#[doc = "CSE PRAM9HU register."]
|
|
pub mod _embedded_ram9hu;
|
|
#[doc = "CSE PRAM 10 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram10](_embedded_ram10) module"]
|
|
pub type _EMBEDDEDRAM10 = crate::Reg<u32, __EMBEDDEDRAM10>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM10;
|
|
#[doc = "`read()` method returns [_embedded_ram10::R](_embedded_ram10::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM10 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram10::W](_embedded_ram10::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM10 {}
|
|
#[doc = "CSE PRAM 10 Register"]
|
|
pub mod _embedded_ram10;
|
|
#[doc = "CSE PRAM10LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram10ll](_embedded_ram10ll) module"]
|
|
pub type _EMBEDDEDRAM10LL = crate::Reg<u8, __EMBEDDEDRAM10LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM10LL;
|
|
#[doc = "`read()` method returns [_embedded_ram10ll::R](_embedded_ram10ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM10LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram10ll::W](_embedded_ram10ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM10LL {}
|
|
#[doc = "CSE PRAM10LL register."]
|
|
pub mod _embedded_ram10ll;
|
|
#[doc = "CSE PRAM10LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram10lu](_embedded_ram10lu) module"]
|
|
pub type _EMBEDDEDRAM10LU = crate::Reg<u8, __EMBEDDEDRAM10LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM10LU;
|
|
#[doc = "`read()` method returns [_embedded_ram10lu::R](_embedded_ram10lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM10LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram10lu::W](_embedded_ram10lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM10LU {}
|
|
#[doc = "CSE PRAM10LU register."]
|
|
pub mod _embedded_ram10lu;
|
|
#[doc = "CSE PRAM10HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram10hl](_embedded_ram10hl) module"]
|
|
pub type _EMBEDDEDRAM10HL = crate::Reg<u8, __EMBEDDEDRAM10HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM10HL;
|
|
#[doc = "`read()` method returns [_embedded_ram10hl::R](_embedded_ram10hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM10HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram10hl::W](_embedded_ram10hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM10HL {}
|
|
#[doc = "CSE PRAM10HL register."]
|
|
pub mod _embedded_ram10hl;
|
|
#[doc = "CSE PRAM10HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram10hu](_embedded_ram10hu) module"]
|
|
pub type _EMBEDDEDRAM10HU = crate::Reg<u8, __EMBEDDEDRAM10HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM10HU;
|
|
#[doc = "`read()` method returns [_embedded_ram10hu::R](_embedded_ram10hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM10HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram10hu::W](_embedded_ram10hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM10HU {}
|
|
#[doc = "CSE PRAM10HU register."]
|
|
pub mod _embedded_ram10hu;
|
|
#[doc = "CSE PRAM 11 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram11](_embedded_ram11) module"]
|
|
pub type _EMBEDDEDRAM11 = crate::Reg<u32, __EMBEDDEDRAM11>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM11;
|
|
#[doc = "`read()` method returns [_embedded_ram11::R](_embedded_ram11::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM11 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram11::W](_embedded_ram11::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM11 {}
|
|
#[doc = "CSE PRAM 11 Register"]
|
|
pub mod _embedded_ram11;
|
|
#[doc = "CSE PRAM11LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram11ll](_embedded_ram11ll) module"]
|
|
pub type _EMBEDDEDRAM11LL = crate::Reg<u8, __EMBEDDEDRAM11LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM11LL;
|
|
#[doc = "`read()` method returns [_embedded_ram11ll::R](_embedded_ram11ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM11LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram11ll::W](_embedded_ram11ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM11LL {}
|
|
#[doc = "CSE PRAM11LL register."]
|
|
pub mod _embedded_ram11ll;
|
|
#[doc = "CSE PRAM11LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram11lu](_embedded_ram11lu) module"]
|
|
pub type _EMBEDDEDRAM11LU = crate::Reg<u8, __EMBEDDEDRAM11LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM11LU;
|
|
#[doc = "`read()` method returns [_embedded_ram11lu::R](_embedded_ram11lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM11LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram11lu::W](_embedded_ram11lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM11LU {}
|
|
#[doc = "CSE PRAM11LU register."]
|
|
pub mod _embedded_ram11lu;
|
|
#[doc = "CSE PRAM11HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram11hl](_embedded_ram11hl) module"]
|
|
pub type _EMBEDDEDRAM11HL = crate::Reg<u8, __EMBEDDEDRAM11HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM11HL;
|
|
#[doc = "`read()` method returns [_embedded_ram11hl::R](_embedded_ram11hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM11HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram11hl::W](_embedded_ram11hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM11HL {}
|
|
#[doc = "CSE PRAM11HL register."]
|
|
pub mod _embedded_ram11hl;
|
|
#[doc = "CSE PRAM11HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram11hu](_embedded_ram11hu) module"]
|
|
pub type _EMBEDDEDRAM11HU = crate::Reg<u8, __EMBEDDEDRAM11HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM11HU;
|
|
#[doc = "`read()` method returns [_embedded_ram11hu::R](_embedded_ram11hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM11HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram11hu::W](_embedded_ram11hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM11HU {}
|
|
#[doc = "CSE PRAM11HU register."]
|
|
pub mod _embedded_ram11hu;
|
|
#[doc = "CSE PRAM 12 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram12](_embedded_ram12) module"]
|
|
pub type _EMBEDDEDRAM12 = crate::Reg<u32, __EMBEDDEDRAM12>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM12;
|
|
#[doc = "`read()` method returns [_embedded_ram12::R](_embedded_ram12::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM12 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram12::W](_embedded_ram12::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM12 {}
|
|
#[doc = "CSE PRAM 12 Register"]
|
|
pub mod _embedded_ram12;
|
|
#[doc = "CSE PRAM12LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram12ll](_embedded_ram12ll) module"]
|
|
pub type _EMBEDDEDRAM12LL = crate::Reg<u8, __EMBEDDEDRAM12LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM12LL;
|
|
#[doc = "`read()` method returns [_embedded_ram12ll::R](_embedded_ram12ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM12LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram12ll::W](_embedded_ram12ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM12LL {}
|
|
#[doc = "CSE PRAM12LL register."]
|
|
pub mod _embedded_ram12ll;
|
|
#[doc = "CSE PRAM12LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram12lu](_embedded_ram12lu) module"]
|
|
pub type _EMBEDDEDRAM12LU = crate::Reg<u8, __EMBEDDEDRAM12LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM12LU;
|
|
#[doc = "`read()` method returns [_embedded_ram12lu::R](_embedded_ram12lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM12LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram12lu::W](_embedded_ram12lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM12LU {}
|
|
#[doc = "CSE PRAM12LU register."]
|
|
pub mod _embedded_ram12lu;
|
|
#[doc = "CSE PRAM12HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram12hl](_embedded_ram12hl) module"]
|
|
pub type _EMBEDDEDRAM12HL = crate::Reg<u8, __EMBEDDEDRAM12HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM12HL;
|
|
#[doc = "`read()` method returns [_embedded_ram12hl::R](_embedded_ram12hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM12HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram12hl::W](_embedded_ram12hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM12HL {}
|
|
#[doc = "CSE PRAM12HL register."]
|
|
pub mod _embedded_ram12hl;
|
|
#[doc = "CSE PRAM12HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram12hu](_embedded_ram12hu) module"]
|
|
pub type _EMBEDDEDRAM12HU = crate::Reg<u8, __EMBEDDEDRAM12HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM12HU;
|
|
#[doc = "`read()` method returns [_embedded_ram12hu::R](_embedded_ram12hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM12HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram12hu::W](_embedded_ram12hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM12HU {}
|
|
#[doc = "CSE PRAM12HU register."]
|
|
pub mod _embedded_ram12hu;
|
|
#[doc = "CSE PRAM 13 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram13](_embedded_ram13) module"]
|
|
pub type _EMBEDDEDRAM13 = crate::Reg<u32, __EMBEDDEDRAM13>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM13;
|
|
#[doc = "`read()` method returns [_embedded_ram13::R](_embedded_ram13::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM13 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram13::W](_embedded_ram13::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM13 {}
|
|
#[doc = "CSE PRAM 13 Register"]
|
|
pub mod _embedded_ram13;
|
|
#[doc = "CSE PRAM13LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram13ll](_embedded_ram13ll) module"]
|
|
pub type _EMBEDDEDRAM13LL = crate::Reg<u8, __EMBEDDEDRAM13LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM13LL;
|
|
#[doc = "`read()` method returns [_embedded_ram13ll::R](_embedded_ram13ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM13LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram13ll::W](_embedded_ram13ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM13LL {}
|
|
#[doc = "CSE PRAM13LL register."]
|
|
pub mod _embedded_ram13ll;
|
|
#[doc = "CSE PRAM13LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram13lu](_embedded_ram13lu) module"]
|
|
pub type _EMBEDDEDRAM13LU = crate::Reg<u8, __EMBEDDEDRAM13LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM13LU;
|
|
#[doc = "`read()` method returns [_embedded_ram13lu::R](_embedded_ram13lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM13LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram13lu::W](_embedded_ram13lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM13LU {}
|
|
#[doc = "CSE PRAM13LU register."]
|
|
pub mod _embedded_ram13lu;
|
|
#[doc = "CSE PRAM13HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram13hl](_embedded_ram13hl) module"]
|
|
pub type _EMBEDDEDRAM13HL = crate::Reg<u8, __EMBEDDEDRAM13HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM13HL;
|
|
#[doc = "`read()` method returns [_embedded_ram13hl::R](_embedded_ram13hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM13HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram13hl::W](_embedded_ram13hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM13HL {}
|
|
#[doc = "CSE PRAM13HL register."]
|
|
pub mod _embedded_ram13hl;
|
|
#[doc = "CSE PRAM13HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram13hu](_embedded_ram13hu) module"]
|
|
pub type _EMBEDDEDRAM13HU = crate::Reg<u8, __EMBEDDEDRAM13HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM13HU;
|
|
#[doc = "`read()` method returns [_embedded_ram13hu::R](_embedded_ram13hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM13HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram13hu::W](_embedded_ram13hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM13HU {}
|
|
#[doc = "CSE PRAM13HU register."]
|
|
pub mod _embedded_ram13hu;
|
|
#[doc = "CSE PRAM 14 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram14](_embedded_ram14) module"]
|
|
pub type _EMBEDDEDRAM14 = crate::Reg<u32, __EMBEDDEDRAM14>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM14;
|
|
#[doc = "`read()` method returns [_embedded_ram14::R](_embedded_ram14::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM14 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram14::W](_embedded_ram14::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM14 {}
|
|
#[doc = "CSE PRAM 14 Register"]
|
|
pub mod _embedded_ram14;
|
|
#[doc = "CSE PRAM14LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram14ll](_embedded_ram14ll) module"]
|
|
pub type _EMBEDDEDRAM14LL = crate::Reg<u8, __EMBEDDEDRAM14LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM14LL;
|
|
#[doc = "`read()` method returns [_embedded_ram14ll::R](_embedded_ram14ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM14LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram14ll::W](_embedded_ram14ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM14LL {}
|
|
#[doc = "CSE PRAM14LL register."]
|
|
pub mod _embedded_ram14ll;
|
|
#[doc = "CSE PRAM14LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram14lu](_embedded_ram14lu) module"]
|
|
pub type _EMBEDDEDRAM14LU = crate::Reg<u8, __EMBEDDEDRAM14LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM14LU;
|
|
#[doc = "`read()` method returns [_embedded_ram14lu::R](_embedded_ram14lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM14LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram14lu::W](_embedded_ram14lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM14LU {}
|
|
#[doc = "CSE PRAM14LU register."]
|
|
pub mod _embedded_ram14lu;
|
|
#[doc = "CSE PRAM14HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram14hl](_embedded_ram14hl) module"]
|
|
pub type _EMBEDDEDRAM14HL = crate::Reg<u8, __EMBEDDEDRAM14HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM14HL;
|
|
#[doc = "`read()` method returns [_embedded_ram14hl::R](_embedded_ram14hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM14HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram14hl::W](_embedded_ram14hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM14HL {}
|
|
#[doc = "CSE PRAM14HL register."]
|
|
pub mod _embedded_ram14hl;
|
|
#[doc = "CSE PRAM14HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram14hu](_embedded_ram14hu) module"]
|
|
pub type _EMBEDDEDRAM14HU = crate::Reg<u8, __EMBEDDEDRAM14HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM14HU;
|
|
#[doc = "`read()` method returns [_embedded_ram14hu::R](_embedded_ram14hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM14HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram14hu::W](_embedded_ram14hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM14HU {}
|
|
#[doc = "CSE PRAM14HU register."]
|
|
pub mod _embedded_ram14hu;
|
|
#[doc = "CSE PRAM 15 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram15](_embedded_ram15) module"]
|
|
pub type _EMBEDDEDRAM15 = crate::Reg<u32, __EMBEDDEDRAM15>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM15;
|
|
#[doc = "`read()` method returns [_embedded_ram15::R](_embedded_ram15::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM15 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram15::W](_embedded_ram15::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM15 {}
|
|
#[doc = "CSE PRAM 15 Register"]
|
|
pub mod _embedded_ram15;
|
|
#[doc = "CSE PRAM15LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram15ll](_embedded_ram15ll) module"]
|
|
pub type _EMBEDDEDRAM15LL = crate::Reg<u8, __EMBEDDEDRAM15LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM15LL;
|
|
#[doc = "`read()` method returns [_embedded_ram15ll::R](_embedded_ram15ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM15LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram15ll::W](_embedded_ram15ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM15LL {}
|
|
#[doc = "CSE PRAM15LL register."]
|
|
pub mod _embedded_ram15ll;
|
|
#[doc = "CSE PRAM15LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram15lu](_embedded_ram15lu) module"]
|
|
pub type _EMBEDDEDRAM15LU = crate::Reg<u8, __EMBEDDEDRAM15LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM15LU;
|
|
#[doc = "`read()` method returns [_embedded_ram15lu::R](_embedded_ram15lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM15LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram15lu::W](_embedded_ram15lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM15LU {}
|
|
#[doc = "CSE PRAM15LU register."]
|
|
pub mod _embedded_ram15lu;
|
|
#[doc = "CSE PRAM15HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram15hl](_embedded_ram15hl) module"]
|
|
pub type _EMBEDDEDRAM15HL = crate::Reg<u8, __EMBEDDEDRAM15HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM15HL;
|
|
#[doc = "`read()` method returns [_embedded_ram15hl::R](_embedded_ram15hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM15HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram15hl::W](_embedded_ram15hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM15HL {}
|
|
#[doc = "CSE PRAM15HL register."]
|
|
pub mod _embedded_ram15hl;
|
|
#[doc = "CSE PRAM15HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram15hu](_embedded_ram15hu) module"]
|
|
pub type _EMBEDDEDRAM15HU = crate::Reg<u8, __EMBEDDEDRAM15HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM15HU;
|
|
#[doc = "`read()` method returns [_embedded_ram15hu::R](_embedded_ram15hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM15HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram15hu::W](_embedded_ram15hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM15HU {}
|
|
#[doc = "CSE PRAM15HU register."]
|
|
pub mod _embedded_ram15hu;
|
|
#[doc = "CSE PRAM 16 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram16](_embedded_ram16) module"]
|
|
pub type _EMBEDDEDRAM16 = crate::Reg<u32, __EMBEDDEDRAM16>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM16;
|
|
#[doc = "`read()` method returns [_embedded_ram16::R](_embedded_ram16::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM16 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram16::W](_embedded_ram16::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM16 {}
|
|
#[doc = "CSE PRAM 16 Register"]
|
|
pub mod _embedded_ram16;
|
|
#[doc = "CSE PRAM16LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram16ll](_embedded_ram16ll) module"]
|
|
pub type _EMBEDDEDRAM16LL = crate::Reg<u8, __EMBEDDEDRAM16LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM16LL;
|
|
#[doc = "`read()` method returns [_embedded_ram16ll::R](_embedded_ram16ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM16LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram16ll::W](_embedded_ram16ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM16LL {}
|
|
#[doc = "CSE PRAM16LL register."]
|
|
pub mod _embedded_ram16ll;
|
|
#[doc = "CSE PRAM16LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram16lu](_embedded_ram16lu) module"]
|
|
pub type _EMBEDDEDRAM16LU = crate::Reg<u8, __EMBEDDEDRAM16LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM16LU;
|
|
#[doc = "`read()` method returns [_embedded_ram16lu::R](_embedded_ram16lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM16LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram16lu::W](_embedded_ram16lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM16LU {}
|
|
#[doc = "CSE PRAM16LU register."]
|
|
pub mod _embedded_ram16lu;
|
|
#[doc = "CSE PRAM16HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram16hl](_embedded_ram16hl) module"]
|
|
pub type _EMBEDDEDRAM16HL = crate::Reg<u8, __EMBEDDEDRAM16HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM16HL;
|
|
#[doc = "`read()` method returns [_embedded_ram16hl::R](_embedded_ram16hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM16HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram16hl::W](_embedded_ram16hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM16HL {}
|
|
#[doc = "CSE PRAM16HL register."]
|
|
pub mod _embedded_ram16hl;
|
|
#[doc = "CSE PRAM16HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram16hu](_embedded_ram16hu) module"]
|
|
pub type _EMBEDDEDRAM16HU = crate::Reg<u8, __EMBEDDEDRAM16HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM16HU;
|
|
#[doc = "`read()` method returns [_embedded_ram16hu::R](_embedded_ram16hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM16HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram16hu::W](_embedded_ram16hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM16HU {}
|
|
#[doc = "CSE PRAM16HU register."]
|
|
pub mod _embedded_ram16hu;
|
|
#[doc = "CSE PRAM 17 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram17](_embedded_ram17) module"]
|
|
pub type _EMBEDDEDRAM17 = crate::Reg<u32, __EMBEDDEDRAM17>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM17;
|
|
#[doc = "`read()` method returns [_embedded_ram17::R](_embedded_ram17::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM17 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram17::W](_embedded_ram17::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM17 {}
|
|
#[doc = "CSE PRAM 17 Register"]
|
|
pub mod _embedded_ram17;
|
|
#[doc = "CSE PRAM17LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram17ll](_embedded_ram17ll) module"]
|
|
pub type _EMBEDDEDRAM17LL = crate::Reg<u8, __EMBEDDEDRAM17LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM17LL;
|
|
#[doc = "`read()` method returns [_embedded_ram17ll::R](_embedded_ram17ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM17LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram17ll::W](_embedded_ram17ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM17LL {}
|
|
#[doc = "CSE PRAM17LL register."]
|
|
pub mod _embedded_ram17ll;
|
|
#[doc = "CSE PRAM17LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram17lu](_embedded_ram17lu) module"]
|
|
pub type _EMBEDDEDRAM17LU = crate::Reg<u8, __EMBEDDEDRAM17LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM17LU;
|
|
#[doc = "`read()` method returns [_embedded_ram17lu::R](_embedded_ram17lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM17LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram17lu::W](_embedded_ram17lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM17LU {}
|
|
#[doc = "CSE PRAM17LU register."]
|
|
pub mod _embedded_ram17lu;
|
|
#[doc = "CSE PRAM17HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram17hl](_embedded_ram17hl) module"]
|
|
pub type _EMBEDDEDRAM17HL = crate::Reg<u8, __EMBEDDEDRAM17HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM17HL;
|
|
#[doc = "`read()` method returns [_embedded_ram17hl::R](_embedded_ram17hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM17HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram17hl::W](_embedded_ram17hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM17HL {}
|
|
#[doc = "CSE PRAM17HL register."]
|
|
pub mod _embedded_ram17hl;
|
|
#[doc = "CSE PRAM17HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram17hu](_embedded_ram17hu) module"]
|
|
pub type _EMBEDDEDRAM17HU = crate::Reg<u8, __EMBEDDEDRAM17HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM17HU;
|
|
#[doc = "`read()` method returns [_embedded_ram17hu::R](_embedded_ram17hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM17HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram17hu::W](_embedded_ram17hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM17HU {}
|
|
#[doc = "CSE PRAM17HU register."]
|
|
pub mod _embedded_ram17hu;
|
|
#[doc = "CSE PRAM 18 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram18](_embedded_ram18) module"]
|
|
pub type _EMBEDDEDRAM18 = crate::Reg<u32, __EMBEDDEDRAM18>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM18;
|
|
#[doc = "`read()` method returns [_embedded_ram18::R](_embedded_ram18::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM18 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram18::W](_embedded_ram18::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM18 {}
|
|
#[doc = "CSE PRAM 18 Register"]
|
|
pub mod _embedded_ram18;
|
|
#[doc = "CSE PRAM18LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram18ll](_embedded_ram18ll) module"]
|
|
pub type _EMBEDDEDRAM18LL = crate::Reg<u8, __EMBEDDEDRAM18LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM18LL;
|
|
#[doc = "`read()` method returns [_embedded_ram18ll::R](_embedded_ram18ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM18LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram18ll::W](_embedded_ram18ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM18LL {}
|
|
#[doc = "CSE PRAM18LL register."]
|
|
pub mod _embedded_ram18ll;
|
|
#[doc = "CSE PRAM18LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram18lu](_embedded_ram18lu) module"]
|
|
pub type _EMBEDDEDRAM18LU = crate::Reg<u8, __EMBEDDEDRAM18LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM18LU;
|
|
#[doc = "`read()` method returns [_embedded_ram18lu::R](_embedded_ram18lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM18LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram18lu::W](_embedded_ram18lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM18LU {}
|
|
#[doc = "CSE PRAM18LU register."]
|
|
pub mod _embedded_ram18lu;
|
|
#[doc = "CSE PRAM18HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram18hl](_embedded_ram18hl) module"]
|
|
pub type _EMBEDDEDRAM18HL = crate::Reg<u8, __EMBEDDEDRAM18HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM18HL;
|
|
#[doc = "`read()` method returns [_embedded_ram18hl::R](_embedded_ram18hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM18HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram18hl::W](_embedded_ram18hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM18HL {}
|
|
#[doc = "CSE PRAM18HL register."]
|
|
pub mod _embedded_ram18hl;
|
|
#[doc = "CSE PRAM18HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram18hu](_embedded_ram18hu) module"]
|
|
pub type _EMBEDDEDRAM18HU = crate::Reg<u8, __EMBEDDEDRAM18HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM18HU;
|
|
#[doc = "`read()` method returns [_embedded_ram18hu::R](_embedded_ram18hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM18HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram18hu::W](_embedded_ram18hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM18HU {}
|
|
#[doc = "CSE PRAM18HU register."]
|
|
pub mod _embedded_ram18hu;
|
|
#[doc = "CSE PRAM 19 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram19](_embedded_ram19) module"]
|
|
pub type _EMBEDDEDRAM19 = crate::Reg<u32, __EMBEDDEDRAM19>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM19;
|
|
#[doc = "`read()` method returns [_embedded_ram19::R](_embedded_ram19::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM19 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram19::W](_embedded_ram19::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM19 {}
|
|
#[doc = "CSE PRAM 19 Register"]
|
|
pub mod _embedded_ram19;
|
|
#[doc = "CSE PRAM19LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram19ll](_embedded_ram19ll) module"]
|
|
pub type _EMBEDDEDRAM19LL = crate::Reg<u8, __EMBEDDEDRAM19LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM19LL;
|
|
#[doc = "`read()` method returns [_embedded_ram19ll::R](_embedded_ram19ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM19LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram19ll::W](_embedded_ram19ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM19LL {}
|
|
#[doc = "CSE PRAM19LL register."]
|
|
pub mod _embedded_ram19ll;
|
|
#[doc = "CSE PRAM19LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram19lu](_embedded_ram19lu) module"]
|
|
pub type _EMBEDDEDRAM19LU = crate::Reg<u8, __EMBEDDEDRAM19LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM19LU;
|
|
#[doc = "`read()` method returns [_embedded_ram19lu::R](_embedded_ram19lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM19LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram19lu::W](_embedded_ram19lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM19LU {}
|
|
#[doc = "CSE PRAM19LU register."]
|
|
pub mod _embedded_ram19lu;
|
|
#[doc = "CSE PRAM19HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram19hl](_embedded_ram19hl) module"]
|
|
pub type _EMBEDDEDRAM19HL = crate::Reg<u8, __EMBEDDEDRAM19HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM19HL;
|
|
#[doc = "`read()` method returns [_embedded_ram19hl::R](_embedded_ram19hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM19HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram19hl::W](_embedded_ram19hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM19HL {}
|
|
#[doc = "CSE PRAM19HL register."]
|
|
pub mod _embedded_ram19hl;
|
|
#[doc = "CSE PRAM19HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram19hu](_embedded_ram19hu) module"]
|
|
pub type _EMBEDDEDRAM19HU = crate::Reg<u8, __EMBEDDEDRAM19HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM19HU;
|
|
#[doc = "`read()` method returns [_embedded_ram19hu::R](_embedded_ram19hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM19HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram19hu::W](_embedded_ram19hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM19HU {}
|
|
#[doc = "CSE PRAM19HU register."]
|
|
pub mod _embedded_ram19hu;
|
|
#[doc = "CSE PRAM 20 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram20](_embedded_ram20) module"]
|
|
pub type _EMBEDDEDRAM20 = crate::Reg<u32, __EMBEDDEDRAM20>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM20;
|
|
#[doc = "`read()` method returns [_embedded_ram20::R](_embedded_ram20::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM20 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram20::W](_embedded_ram20::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM20 {}
|
|
#[doc = "CSE PRAM 20 Register"]
|
|
pub mod _embedded_ram20;
|
|
#[doc = "CSE PRAM20LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram20ll](_embedded_ram20ll) module"]
|
|
pub type _EMBEDDEDRAM20LL = crate::Reg<u8, __EMBEDDEDRAM20LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM20LL;
|
|
#[doc = "`read()` method returns [_embedded_ram20ll::R](_embedded_ram20ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM20LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram20ll::W](_embedded_ram20ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM20LL {}
|
|
#[doc = "CSE PRAM20LL register."]
|
|
pub mod _embedded_ram20ll;
|
|
#[doc = "CSE PRAM20LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram20lu](_embedded_ram20lu) module"]
|
|
pub type _EMBEDDEDRAM20LU = crate::Reg<u8, __EMBEDDEDRAM20LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM20LU;
|
|
#[doc = "`read()` method returns [_embedded_ram20lu::R](_embedded_ram20lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM20LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram20lu::W](_embedded_ram20lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM20LU {}
|
|
#[doc = "CSE PRAM20LU register."]
|
|
pub mod _embedded_ram20lu;
|
|
#[doc = "CSE PRAM20HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram20hl](_embedded_ram20hl) module"]
|
|
pub type _EMBEDDEDRAM20HL = crate::Reg<u8, __EMBEDDEDRAM20HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM20HL;
|
|
#[doc = "`read()` method returns [_embedded_ram20hl::R](_embedded_ram20hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM20HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram20hl::W](_embedded_ram20hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM20HL {}
|
|
#[doc = "CSE PRAM20HL register."]
|
|
pub mod _embedded_ram20hl;
|
|
#[doc = "CSE PRAM20HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram20hu](_embedded_ram20hu) module"]
|
|
pub type _EMBEDDEDRAM20HU = crate::Reg<u8, __EMBEDDEDRAM20HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM20HU;
|
|
#[doc = "`read()` method returns [_embedded_ram20hu::R](_embedded_ram20hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM20HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram20hu::W](_embedded_ram20hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM20HU {}
|
|
#[doc = "CSE PRAM20HU register."]
|
|
pub mod _embedded_ram20hu;
|
|
#[doc = "CSE PRAM 21 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram21](_embedded_ram21) module"]
|
|
pub type _EMBEDDEDRAM21 = crate::Reg<u32, __EMBEDDEDRAM21>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM21;
|
|
#[doc = "`read()` method returns [_embedded_ram21::R](_embedded_ram21::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM21 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram21::W](_embedded_ram21::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM21 {}
|
|
#[doc = "CSE PRAM 21 Register"]
|
|
pub mod _embedded_ram21;
|
|
#[doc = "CSE PRAM21LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram21ll](_embedded_ram21ll) module"]
|
|
pub type _EMBEDDEDRAM21LL = crate::Reg<u8, __EMBEDDEDRAM21LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM21LL;
|
|
#[doc = "`read()` method returns [_embedded_ram21ll::R](_embedded_ram21ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM21LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram21ll::W](_embedded_ram21ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM21LL {}
|
|
#[doc = "CSE PRAM21LL register."]
|
|
pub mod _embedded_ram21ll;
|
|
#[doc = "CSE PRAM21LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram21lu](_embedded_ram21lu) module"]
|
|
pub type _EMBEDDEDRAM21LU = crate::Reg<u8, __EMBEDDEDRAM21LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM21LU;
|
|
#[doc = "`read()` method returns [_embedded_ram21lu::R](_embedded_ram21lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM21LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram21lu::W](_embedded_ram21lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM21LU {}
|
|
#[doc = "CSE PRAM21LU register."]
|
|
pub mod _embedded_ram21lu;
|
|
#[doc = "CSE PRAM21HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram21hl](_embedded_ram21hl) module"]
|
|
pub type _EMBEDDEDRAM21HL = crate::Reg<u8, __EMBEDDEDRAM21HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM21HL;
|
|
#[doc = "`read()` method returns [_embedded_ram21hl::R](_embedded_ram21hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM21HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram21hl::W](_embedded_ram21hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM21HL {}
|
|
#[doc = "CSE PRAM21HL register."]
|
|
pub mod _embedded_ram21hl;
|
|
#[doc = "CSE PRAM21HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram21hu](_embedded_ram21hu) module"]
|
|
pub type _EMBEDDEDRAM21HU = crate::Reg<u8, __EMBEDDEDRAM21HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM21HU;
|
|
#[doc = "`read()` method returns [_embedded_ram21hu::R](_embedded_ram21hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM21HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram21hu::W](_embedded_ram21hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM21HU {}
|
|
#[doc = "CSE PRAM21HU register."]
|
|
pub mod _embedded_ram21hu;
|
|
#[doc = "CSE PRAM 22 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram22](_embedded_ram22) module"]
|
|
pub type _EMBEDDEDRAM22 = crate::Reg<u32, __EMBEDDEDRAM22>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM22;
|
|
#[doc = "`read()` method returns [_embedded_ram22::R](_embedded_ram22::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM22 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram22::W](_embedded_ram22::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM22 {}
|
|
#[doc = "CSE PRAM 22 Register"]
|
|
pub mod _embedded_ram22;
|
|
#[doc = "CSE PRAM22LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram22ll](_embedded_ram22ll) module"]
|
|
pub type _EMBEDDEDRAM22LL = crate::Reg<u8, __EMBEDDEDRAM22LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM22LL;
|
|
#[doc = "`read()` method returns [_embedded_ram22ll::R](_embedded_ram22ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM22LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram22ll::W](_embedded_ram22ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM22LL {}
|
|
#[doc = "CSE PRAM22LL register."]
|
|
pub mod _embedded_ram22ll;
|
|
#[doc = "CSE PRAM22LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram22lu](_embedded_ram22lu) module"]
|
|
pub type _EMBEDDEDRAM22LU = crate::Reg<u8, __EMBEDDEDRAM22LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM22LU;
|
|
#[doc = "`read()` method returns [_embedded_ram22lu::R](_embedded_ram22lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM22LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram22lu::W](_embedded_ram22lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM22LU {}
|
|
#[doc = "CSE PRAM22LU register."]
|
|
pub mod _embedded_ram22lu;
|
|
#[doc = "CSE PRAM22HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram22hl](_embedded_ram22hl) module"]
|
|
pub type _EMBEDDEDRAM22HL = crate::Reg<u8, __EMBEDDEDRAM22HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM22HL;
|
|
#[doc = "`read()` method returns [_embedded_ram22hl::R](_embedded_ram22hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM22HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram22hl::W](_embedded_ram22hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM22HL {}
|
|
#[doc = "CSE PRAM22HL register."]
|
|
pub mod _embedded_ram22hl;
|
|
#[doc = "CSE PRAM22HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram22hu](_embedded_ram22hu) module"]
|
|
pub type _EMBEDDEDRAM22HU = crate::Reg<u8, __EMBEDDEDRAM22HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM22HU;
|
|
#[doc = "`read()` method returns [_embedded_ram22hu::R](_embedded_ram22hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM22HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram22hu::W](_embedded_ram22hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM22HU {}
|
|
#[doc = "CSE PRAM22HU register."]
|
|
pub mod _embedded_ram22hu;
|
|
#[doc = "CSE PRAM 23 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram23](_embedded_ram23) module"]
|
|
pub type _EMBEDDEDRAM23 = crate::Reg<u32, __EMBEDDEDRAM23>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM23;
|
|
#[doc = "`read()` method returns [_embedded_ram23::R](_embedded_ram23::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM23 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram23::W](_embedded_ram23::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM23 {}
|
|
#[doc = "CSE PRAM 23 Register"]
|
|
pub mod _embedded_ram23;
|
|
#[doc = "CSE PRAM23LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram23ll](_embedded_ram23ll) module"]
|
|
pub type _EMBEDDEDRAM23LL = crate::Reg<u8, __EMBEDDEDRAM23LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM23LL;
|
|
#[doc = "`read()` method returns [_embedded_ram23ll::R](_embedded_ram23ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM23LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram23ll::W](_embedded_ram23ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM23LL {}
|
|
#[doc = "CSE PRAM23LL register."]
|
|
pub mod _embedded_ram23ll;
|
|
#[doc = "CSE PRAM23LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram23lu](_embedded_ram23lu) module"]
|
|
pub type _EMBEDDEDRAM23LU = crate::Reg<u8, __EMBEDDEDRAM23LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM23LU;
|
|
#[doc = "`read()` method returns [_embedded_ram23lu::R](_embedded_ram23lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM23LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram23lu::W](_embedded_ram23lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM23LU {}
|
|
#[doc = "CSE PRAM23LU register."]
|
|
pub mod _embedded_ram23lu;
|
|
#[doc = "CSE PRAM23HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram23hl](_embedded_ram23hl) module"]
|
|
pub type _EMBEDDEDRAM23HL = crate::Reg<u8, __EMBEDDEDRAM23HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM23HL;
|
|
#[doc = "`read()` method returns [_embedded_ram23hl::R](_embedded_ram23hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM23HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram23hl::W](_embedded_ram23hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM23HL {}
|
|
#[doc = "CSE PRAM23HL register."]
|
|
pub mod _embedded_ram23hl;
|
|
#[doc = "CSE PRAM23HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram23hu](_embedded_ram23hu) module"]
|
|
pub type _EMBEDDEDRAM23HU = crate::Reg<u8, __EMBEDDEDRAM23HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM23HU;
|
|
#[doc = "`read()` method returns [_embedded_ram23hu::R](_embedded_ram23hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM23HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram23hu::W](_embedded_ram23hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM23HU {}
|
|
#[doc = "CSE PRAM23HU register."]
|
|
pub mod _embedded_ram23hu;
|
|
#[doc = "CSE PRAM 24 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram24](_embedded_ram24) module"]
|
|
pub type _EMBEDDEDRAM24 = crate::Reg<u32, __EMBEDDEDRAM24>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM24;
|
|
#[doc = "`read()` method returns [_embedded_ram24::R](_embedded_ram24::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM24 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram24::W](_embedded_ram24::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM24 {}
|
|
#[doc = "CSE PRAM 24 Register"]
|
|
pub mod _embedded_ram24;
|
|
#[doc = "CSE PRAM24LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram24ll](_embedded_ram24ll) module"]
|
|
pub type _EMBEDDEDRAM24LL = crate::Reg<u8, __EMBEDDEDRAM24LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM24LL;
|
|
#[doc = "`read()` method returns [_embedded_ram24ll::R](_embedded_ram24ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM24LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram24ll::W](_embedded_ram24ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM24LL {}
|
|
#[doc = "CSE PRAM24LL register."]
|
|
pub mod _embedded_ram24ll;
|
|
#[doc = "CSE PRAM24LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram24lu](_embedded_ram24lu) module"]
|
|
pub type _EMBEDDEDRAM24LU = crate::Reg<u8, __EMBEDDEDRAM24LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM24LU;
|
|
#[doc = "`read()` method returns [_embedded_ram24lu::R](_embedded_ram24lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM24LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram24lu::W](_embedded_ram24lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM24LU {}
|
|
#[doc = "CSE PRAM24LU register."]
|
|
pub mod _embedded_ram24lu;
|
|
#[doc = "CSE PRAM24HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram24hl](_embedded_ram24hl) module"]
|
|
pub type _EMBEDDEDRAM24HL = crate::Reg<u8, __EMBEDDEDRAM24HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM24HL;
|
|
#[doc = "`read()` method returns [_embedded_ram24hl::R](_embedded_ram24hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM24HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram24hl::W](_embedded_ram24hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM24HL {}
|
|
#[doc = "CSE PRAM24HL register."]
|
|
pub mod _embedded_ram24hl;
|
|
#[doc = "CSE PRAM24HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram24hu](_embedded_ram24hu) module"]
|
|
pub type _EMBEDDEDRAM24HU = crate::Reg<u8, __EMBEDDEDRAM24HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM24HU;
|
|
#[doc = "`read()` method returns [_embedded_ram24hu::R](_embedded_ram24hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM24HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram24hu::W](_embedded_ram24hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM24HU {}
|
|
#[doc = "CSE PRAM24HU register."]
|
|
pub mod _embedded_ram24hu;
|
|
#[doc = "CSE PRAM 25 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram25](_embedded_ram25) module"]
|
|
pub type _EMBEDDEDRAM25 = crate::Reg<u32, __EMBEDDEDRAM25>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM25;
|
|
#[doc = "`read()` method returns [_embedded_ram25::R](_embedded_ram25::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM25 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram25::W](_embedded_ram25::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM25 {}
|
|
#[doc = "CSE PRAM 25 Register"]
|
|
pub mod _embedded_ram25;
|
|
#[doc = "CSE PRAM25LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram25ll](_embedded_ram25ll) module"]
|
|
pub type _EMBEDDEDRAM25LL = crate::Reg<u8, __EMBEDDEDRAM25LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM25LL;
|
|
#[doc = "`read()` method returns [_embedded_ram25ll::R](_embedded_ram25ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM25LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram25ll::W](_embedded_ram25ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM25LL {}
|
|
#[doc = "CSE PRAM25LL register."]
|
|
pub mod _embedded_ram25ll;
|
|
#[doc = "CSE PRAM25LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram25lu](_embedded_ram25lu) module"]
|
|
pub type _EMBEDDEDRAM25LU = crate::Reg<u8, __EMBEDDEDRAM25LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM25LU;
|
|
#[doc = "`read()` method returns [_embedded_ram25lu::R](_embedded_ram25lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM25LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram25lu::W](_embedded_ram25lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM25LU {}
|
|
#[doc = "CSE PRAM25LU register."]
|
|
pub mod _embedded_ram25lu;
|
|
#[doc = "CSE PRAM25HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram25hl](_embedded_ram25hl) module"]
|
|
pub type _EMBEDDEDRAM25HL = crate::Reg<u8, __EMBEDDEDRAM25HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM25HL;
|
|
#[doc = "`read()` method returns [_embedded_ram25hl::R](_embedded_ram25hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM25HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram25hl::W](_embedded_ram25hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM25HL {}
|
|
#[doc = "CSE PRAM25HL register."]
|
|
pub mod _embedded_ram25hl;
|
|
#[doc = "CSE PRAM25HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram25hu](_embedded_ram25hu) module"]
|
|
pub type _EMBEDDEDRAM25HU = crate::Reg<u8, __EMBEDDEDRAM25HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM25HU;
|
|
#[doc = "`read()` method returns [_embedded_ram25hu::R](_embedded_ram25hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM25HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram25hu::W](_embedded_ram25hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM25HU {}
|
|
#[doc = "CSE PRAM25HU register."]
|
|
pub mod _embedded_ram25hu;
|
|
#[doc = "CSE PRAM 26 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram26](_embedded_ram26) module"]
|
|
pub type _EMBEDDEDRAM26 = crate::Reg<u32, __EMBEDDEDRAM26>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM26;
|
|
#[doc = "`read()` method returns [_embedded_ram26::R](_embedded_ram26::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM26 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram26::W](_embedded_ram26::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM26 {}
|
|
#[doc = "CSE PRAM 26 Register"]
|
|
pub mod _embedded_ram26;
|
|
#[doc = "CSE PRAM26LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram26ll](_embedded_ram26ll) module"]
|
|
pub type _EMBEDDEDRAM26LL = crate::Reg<u8, __EMBEDDEDRAM26LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM26LL;
|
|
#[doc = "`read()` method returns [_embedded_ram26ll::R](_embedded_ram26ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM26LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram26ll::W](_embedded_ram26ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM26LL {}
|
|
#[doc = "CSE PRAM26LL register."]
|
|
pub mod _embedded_ram26ll;
|
|
#[doc = "CSE PRAM26LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram26lu](_embedded_ram26lu) module"]
|
|
pub type _EMBEDDEDRAM26LU = crate::Reg<u8, __EMBEDDEDRAM26LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM26LU;
|
|
#[doc = "`read()` method returns [_embedded_ram26lu::R](_embedded_ram26lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM26LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram26lu::W](_embedded_ram26lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM26LU {}
|
|
#[doc = "CSE PRAM26LU register."]
|
|
pub mod _embedded_ram26lu;
|
|
#[doc = "CSE PRAM26HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram26hl](_embedded_ram26hl) module"]
|
|
pub type _EMBEDDEDRAM26HL = crate::Reg<u8, __EMBEDDEDRAM26HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM26HL;
|
|
#[doc = "`read()` method returns [_embedded_ram26hl::R](_embedded_ram26hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM26HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram26hl::W](_embedded_ram26hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM26HL {}
|
|
#[doc = "CSE PRAM26HL register."]
|
|
pub mod _embedded_ram26hl;
|
|
#[doc = "CSE PRAM26HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram26hu](_embedded_ram26hu) module"]
|
|
pub type _EMBEDDEDRAM26HU = crate::Reg<u8, __EMBEDDEDRAM26HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM26HU;
|
|
#[doc = "`read()` method returns [_embedded_ram26hu::R](_embedded_ram26hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM26HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram26hu::W](_embedded_ram26hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM26HU {}
|
|
#[doc = "CSE PRAM26HU register."]
|
|
pub mod _embedded_ram26hu;
|
|
#[doc = "CSE PRAM 27 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram27](_embedded_ram27) module"]
|
|
pub type _EMBEDDEDRAM27 = crate::Reg<u32, __EMBEDDEDRAM27>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM27;
|
|
#[doc = "`read()` method returns [_embedded_ram27::R](_embedded_ram27::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM27 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram27::W](_embedded_ram27::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM27 {}
|
|
#[doc = "CSE PRAM 27 Register"]
|
|
pub mod _embedded_ram27;
|
|
#[doc = "CSE PRAM27LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram27ll](_embedded_ram27ll) module"]
|
|
pub type _EMBEDDEDRAM27LL = crate::Reg<u8, __EMBEDDEDRAM27LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM27LL;
|
|
#[doc = "`read()` method returns [_embedded_ram27ll::R](_embedded_ram27ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM27LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram27ll::W](_embedded_ram27ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM27LL {}
|
|
#[doc = "CSE PRAM27LL register."]
|
|
pub mod _embedded_ram27ll;
|
|
#[doc = "CSE PRAM27LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram27lu](_embedded_ram27lu) module"]
|
|
pub type _EMBEDDEDRAM27LU = crate::Reg<u8, __EMBEDDEDRAM27LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM27LU;
|
|
#[doc = "`read()` method returns [_embedded_ram27lu::R](_embedded_ram27lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM27LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram27lu::W](_embedded_ram27lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM27LU {}
|
|
#[doc = "CSE PRAM27LU register."]
|
|
pub mod _embedded_ram27lu;
|
|
#[doc = "CSE PRAM27HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram27hl](_embedded_ram27hl) module"]
|
|
pub type _EMBEDDEDRAM27HL = crate::Reg<u8, __EMBEDDEDRAM27HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM27HL;
|
|
#[doc = "`read()` method returns [_embedded_ram27hl::R](_embedded_ram27hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM27HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram27hl::W](_embedded_ram27hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM27HL {}
|
|
#[doc = "CSE PRAM27HL register."]
|
|
pub mod _embedded_ram27hl;
|
|
#[doc = "CSE PRAM27HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram27hu](_embedded_ram27hu) module"]
|
|
pub type _EMBEDDEDRAM27HU = crate::Reg<u8, __EMBEDDEDRAM27HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM27HU;
|
|
#[doc = "`read()` method returns [_embedded_ram27hu::R](_embedded_ram27hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM27HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram27hu::W](_embedded_ram27hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM27HU {}
|
|
#[doc = "CSE PRAM27HU register."]
|
|
pub mod _embedded_ram27hu;
|
|
#[doc = "CSE PRAM 28 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram28](_embedded_ram28) module"]
|
|
pub type _EMBEDDEDRAM28 = crate::Reg<u32, __EMBEDDEDRAM28>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM28;
|
|
#[doc = "`read()` method returns [_embedded_ram28::R](_embedded_ram28::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM28 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram28::W](_embedded_ram28::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM28 {}
|
|
#[doc = "CSE PRAM 28 Register"]
|
|
pub mod _embedded_ram28;
|
|
#[doc = "CSE PRAM28LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram28ll](_embedded_ram28ll) module"]
|
|
pub type _EMBEDDEDRAM28LL = crate::Reg<u8, __EMBEDDEDRAM28LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM28LL;
|
|
#[doc = "`read()` method returns [_embedded_ram28ll::R](_embedded_ram28ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM28LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram28ll::W](_embedded_ram28ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM28LL {}
|
|
#[doc = "CSE PRAM28LL register."]
|
|
pub mod _embedded_ram28ll;
|
|
#[doc = "CSE PRAM28LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram28lu](_embedded_ram28lu) module"]
|
|
pub type _EMBEDDEDRAM28LU = crate::Reg<u8, __EMBEDDEDRAM28LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM28LU;
|
|
#[doc = "`read()` method returns [_embedded_ram28lu::R](_embedded_ram28lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM28LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram28lu::W](_embedded_ram28lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM28LU {}
|
|
#[doc = "CSE PRAM28LU register."]
|
|
pub mod _embedded_ram28lu;
|
|
#[doc = "CSE PRAM28HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram28hl](_embedded_ram28hl) module"]
|
|
pub type _EMBEDDEDRAM28HL = crate::Reg<u8, __EMBEDDEDRAM28HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM28HL;
|
|
#[doc = "`read()` method returns [_embedded_ram28hl::R](_embedded_ram28hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM28HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram28hl::W](_embedded_ram28hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM28HL {}
|
|
#[doc = "CSE PRAM28HL register."]
|
|
pub mod _embedded_ram28hl;
|
|
#[doc = "CSE PRAM28HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram28hu](_embedded_ram28hu) module"]
|
|
pub type _EMBEDDEDRAM28HU = crate::Reg<u8, __EMBEDDEDRAM28HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM28HU;
|
|
#[doc = "`read()` method returns [_embedded_ram28hu::R](_embedded_ram28hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM28HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram28hu::W](_embedded_ram28hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM28HU {}
|
|
#[doc = "CSE PRAM28HU register."]
|
|
pub mod _embedded_ram28hu;
|
|
#[doc = "CSE PRAM 29 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram29](_embedded_ram29) module"]
|
|
pub type _EMBEDDEDRAM29 = crate::Reg<u32, __EMBEDDEDRAM29>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM29;
|
|
#[doc = "`read()` method returns [_embedded_ram29::R](_embedded_ram29::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM29 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram29::W](_embedded_ram29::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM29 {}
|
|
#[doc = "CSE PRAM 29 Register"]
|
|
pub mod _embedded_ram29;
|
|
#[doc = "CSE PRAM29LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram29ll](_embedded_ram29ll) module"]
|
|
pub type _EMBEDDEDRAM29LL = crate::Reg<u8, __EMBEDDEDRAM29LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM29LL;
|
|
#[doc = "`read()` method returns [_embedded_ram29ll::R](_embedded_ram29ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM29LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram29ll::W](_embedded_ram29ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM29LL {}
|
|
#[doc = "CSE PRAM29LL register."]
|
|
pub mod _embedded_ram29ll;
|
|
#[doc = "CSE PRAM29LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram29lu](_embedded_ram29lu) module"]
|
|
pub type _EMBEDDEDRAM29LU = crate::Reg<u8, __EMBEDDEDRAM29LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM29LU;
|
|
#[doc = "`read()` method returns [_embedded_ram29lu::R](_embedded_ram29lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM29LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram29lu::W](_embedded_ram29lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM29LU {}
|
|
#[doc = "CSE PRAM29LU register."]
|
|
pub mod _embedded_ram29lu;
|
|
#[doc = "CSE PRAM29HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram29hl](_embedded_ram29hl) module"]
|
|
pub type _EMBEDDEDRAM29HL = crate::Reg<u8, __EMBEDDEDRAM29HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM29HL;
|
|
#[doc = "`read()` method returns [_embedded_ram29hl::R](_embedded_ram29hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM29HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram29hl::W](_embedded_ram29hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM29HL {}
|
|
#[doc = "CSE PRAM29HL register."]
|
|
pub mod _embedded_ram29hl;
|
|
#[doc = "CSE PRAM29HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram29hu](_embedded_ram29hu) module"]
|
|
pub type _EMBEDDEDRAM29HU = crate::Reg<u8, __EMBEDDEDRAM29HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM29HU;
|
|
#[doc = "`read()` method returns [_embedded_ram29hu::R](_embedded_ram29hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM29HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram29hu::W](_embedded_ram29hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM29HU {}
|
|
#[doc = "CSE PRAM29HU register."]
|
|
pub mod _embedded_ram29hu;
|
|
#[doc = "CSE PRAM 30 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram30](_embedded_ram30) module"]
|
|
pub type _EMBEDDEDRAM30 = crate::Reg<u32, __EMBEDDEDRAM30>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM30;
|
|
#[doc = "`read()` method returns [_embedded_ram30::R](_embedded_ram30::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM30 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram30::W](_embedded_ram30::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM30 {}
|
|
#[doc = "CSE PRAM 30 Register"]
|
|
pub mod _embedded_ram30;
|
|
#[doc = "CSE PRAM30LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram30ll](_embedded_ram30ll) module"]
|
|
pub type _EMBEDDEDRAM30LL = crate::Reg<u8, __EMBEDDEDRAM30LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM30LL;
|
|
#[doc = "`read()` method returns [_embedded_ram30ll::R](_embedded_ram30ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM30LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram30ll::W](_embedded_ram30ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM30LL {}
|
|
#[doc = "CSE PRAM30LL register."]
|
|
pub mod _embedded_ram30ll;
|
|
#[doc = "CSE PRAM30LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram30lu](_embedded_ram30lu) module"]
|
|
pub type _EMBEDDEDRAM30LU = crate::Reg<u8, __EMBEDDEDRAM30LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM30LU;
|
|
#[doc = "`read()` method returns [_embedded_ram30lu::R](_embedded_ram30lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM30LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram30lu::W](_embedded_ram30lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM30LU {}
|
|
#[doc = "CSE PRAM30LU register."]
|
|
pub mod _embedded_ram30lu;
|
|
#[doc = "CSE PRAM30HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram30hl](_embedded_ram30hl) module"]
|
|
pub type _EMBEDDEDRAM30HL = crate::Reg<u8, __EMBEDDEDRAM30HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM30HL;
|
|
#[doc = "`read()` method returns [_embedded_ram30hl::R](_embedded_ram30hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM30HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram30hl::W](_embedded_ram30hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM30HL {}
|
|
#[doc = "CSE PRAM30HL register."]
|
|
pub mod _embedded_ram30hl;
|
|
#[doc = "CSE PRAM30HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram30hu](_embedded_ram30hu) module"]
|
|
pub type _EMBEDDEDRAM30HU = crate::Reg<u8, __EMBEDDEDRAM30HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM30HU;
|
|
#[doc = "`read()` method returns [_embedded_ram30hu::R](_embedded_ram30hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM30HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram30hu::W](_embedded_ram30hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM30HU {}
|
|
#[doc = "CSE PRAM30HU register."]
|
|
pub mod _embedded_ram30hu;
|
|
#[doc = "CSE PRAM 31 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram31](_embedded_ram31) module"]
|
|
pub type _EMBEDDEDRAM31 = crate::Reg<u32, __EMBEDDEDRAM31>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM31;
|
|
#[doc = "`read()` method returns [_embedded_ram31::R](_embedded_ram31::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM31 {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram31::W](_embedded_ram31::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM31 {}
|
|
#[doc = "CSE PRAM 31 Register"]
|
|
pub mod _embedded_ram31;
|
|
#[doc = "CSE PRAM31LL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram31ll](_embedded_ram31ll) module"]
|
|
pub type _EMBEDDEDRAM31LL = crate::Reg<u8, __EMBEDDEDRAM31LL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM31LL;
|
|
#[doc = "`read()` method returns [_embedded_ram31ll::R](_embedded_ram31ll::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM31LL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram31ll::W](_embedded_ram31ll::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM31LL {}
|
|
#[doc = "CSE PRAM31LL register."]
|
|
pub mod _embedded_ram31ll;
|
|
#[doc = "CSE PRAM31LU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram31lu](_embedded_ram31lu) module"]
|
|
pub type _EMBEDDEDRAM31LU = crate::Reg<u8, __EMBEDDEDRAM31LU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM31LU;
|
|
#[doc = "`read()` method returns [_embedded_ram31lu::R](_embedded_ram31lu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM31LU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram31lu::W](_embedded_ram31lu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM31LU {}
|
|
#[doc = "CSE PRAM31LU register."]
|
|
pub mod _embedded_ram31lu;
|
|
#[doc = "CSE PRAM31HL register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram31hl](_embedded_ram31hl) module"]
|
|
pub type _EMBEDDEDRAM31HL = crate::Reg<u8, __EMBEDDEDRAM31HL>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM31HL;
|
|
#[doc = "`read()` method returns [_embedded_ram31hl::R](_embedded_ram31hl::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM31HL {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram31hl::W](_embedded_ram31hl::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM31HL {}
|
|
#[doc = "CSE PRAM31HL register."]
|
|
pub mod _embedded_ram31hl;
|
|
#[doc = "CSE PRAM31HU register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_embedded_ram31hu](_embedded_ram31hu) module"]
|
|
pub type _EMBEDDEDRAM31HU = crate::Reg<u8, __EMBEDDEDRAM31HU>;
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
pub struct __EMBEDDEDRAM31HU;
|
|
#[doc = "`read()` method returns [_embedded_ram31hu::R](_embedded_ram31hu::R) reader structure"]
|
|
impl crate::Readable for _EMBEDDEDRAM31HU {}
|
|
#[doc = "`write(|w| ..)` method takes [_embedded_ram31hu::W](_embedded_ram31hu::W) writer structure"]
|
|
impl crate::Writable for _EMBEDDEDRAM31HU {}
|
|
#[doc = "CSE PRAM31HU register."]
|
|
pub mod _embedded_ram31hu;
|