409 lines
13 KiB
Rust
409 lines
13 KiB
Rust
#[doc = "Reader of register IFLAG1"]
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pub type R = crate::R<u32, super::IFLAG1>;
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#[doc = "Writer for register IFLAG1"]
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pub type W = crate::W<u32, super::IFLAG1>;
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#[doc = "Register IFLAG1 `reset()`'s with value 0"]
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impl crate::ResetValue for super::IFLAG1 {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Buffer MB0 Interrupt Or Clear FIFO bit\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BUF0I_A {
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#[doc = "0: The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR\\[RFEN\\]=0."]
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_0 = 0,
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#[doc = "1: The corresponding buffer has successfully completed transmission or reception when MCR\\[RFEN\\]=0."]
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_1 = 1,
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}
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impl From<BUF0I_A> for bool {
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#[inline(always)]
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fn from(variant: BUF0I_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `BUF0I`"]
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pub type BUF0I_R = crate::R<bool, BUF0I_A>;
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impl BUF0I_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> BUF0I_A {
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match self.bits {
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false => BUF0I_A::_0,
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true => BUF0I_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == BUF0I_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == BUF0I_A::_1
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}
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}
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#[doc = "Write proxy for field `BUF0I`"]
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pub struct BUF0I_W<'a> {
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w: &'a mut W,
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}
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impl<'a> BUF0I_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: BUF0I_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR\\[RFEN\\]=0."]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(BUF0I_A::_0)
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}
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#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR\\[RFEN\\]=0."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(BUF0I_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
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self.w
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}
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}
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#[doc = "Reader of field `BUF4TO1I`"]
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pub type BUF4TO1I_R = crate::R<u8, u8>;
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#[doc = "Write proxy for field `BUF4TO1I`"]
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pub struct BUF4TO1I_W<'a> {
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w: &'a mut W,
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}
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impl<'a> BUF4TO1I_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x0f << 1)) | (((value as u32) & 0x0f) << 1);
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self.w
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}
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}
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#[doc = "Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\"\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BUF5I_A {
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#[doc = "0: No occurrence of MB5 completing transmission/reception when MCR\\[RFEN\\]=0, or of frame(s) available in the FIFO, when MCR\\[RFEN\\]=1"]
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_0 = 0,
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#[doc = "1: MB5 completed transmission/reception when MCR\\[RFEN\\]=0, or frame(s) available in the Rx FIFO when MCR\\[RFEN\\]=1. It generates a DMA request in case of MCR\\[RFEN\\]
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and MCR\\[DMA\\]
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are enabled."]
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_1 = 1,
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}
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impl From<BUF5I_A> for bool {
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#[inline(always)]
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fn from(variant: BUF5I_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `BUF5I`"]
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pub type BUF5I_R = crate::R<bool, BUF5I_A>;
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impl BUF5I_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> BUF5I_A {
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match self.bits {
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false => BUF5I_A::_0,
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true => BUF5I_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == BUF5I_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == BUF5I_A::_1
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}
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}
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#[doc = "Write proxy for field `BUF5I`"]
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pub struct BUF5I_W<'a> {
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w: &'a mut W,
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}
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impl<'a> BUF5I_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: BUF5I_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "No occurrence of MB5 completing transmission/reception when MCR\\[RFEN\\]=0, or of frame(s) available in the FIFO, when MCR\\[RFEN\\]=1"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(BUF5I_A::_0)
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}
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#[doc = "MB5 completed transmission/reception when MCR\\[RFEN\\]=0, or frame(s) available in the Rx FIFO when MCR\\[RFEN\\]=1. It generates a DMA request in case of MCR\\[RFEN\\]
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and MCR\\[DMA\\]
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are enabled."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(BUF5I_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
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self.w
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}
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}
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#[doc = "Buffer MB6 Interrupt Or \"Rx FIFO Warning\"\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BUF6I_A {
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#[doc = "0: No occurrence of MB6 completing transmission/reception when MCR\\[RFEN\\]=0, or of Rx FIFO almost full when MCR\\[RFEN\\]=1"]
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_0 = 0,
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#[doc = "1: MB6 completed transmission/reception when MCR\\[RFEN\\]=0, or Rx FIFO almost full when MCR\\[RFEN\\]=1"]
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_1 = 1,
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}
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impl From<BUF6I_A> for bool {
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#[inline(always)]
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fn from(variant: BUF6I_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `BUF6I`"]
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pub type BUF6I_R = crate::R<bool, BUF6I_A>;
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impl BUF6I_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> BUF6I_A {
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match self.bits {
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false => BUF6I_A::_0,
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true => BUF6I_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == BUF6I_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == BUF6I_A::_1
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}
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}
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#[doc = "Write proxy for field `BUF6I`"]
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pub struct BUF6I_W<'a> {
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w: &'a mut W,
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}
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impl<'a> BUF6I_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: BUF6I_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "No occurrence of MB6 completing transmission/reception when MCR\\[RFEN\\]=0, or of Rx FIFO almost full when MCR\\[RFEN\\]=1"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(BUF6I_A::_0)
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}
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#[doc = "MB6 completed transmission/reception when MCR\\[RFEN\\]=0, or Rx FIFO almost full when MCR\\[RFEN\\]=1"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(BUF6I_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
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self.w
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}
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}
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#[doc = "Buffer MB7 Interrupt Or \"Rx FIFO Overflow\"\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BUF7I_A {
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#[doc = "0: No occurrence of MB7 completing transmission/reception when MCR\\[RFEN\\]=0, or of Rx FIFO overflow when MCR\\[RFEN\\]=1"]
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_0 = 0,
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#[doc = "1: MB7 completed transmission/reception when MCR\\[RFEN\\]=0, or Rx FIFO overflow when MCR\\[RFEN\\]=1"]
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_1 = 1,
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}
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impl From<BUF7I_A> for bool {
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#[inline(always)]
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fn from(variant: BUF7I_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `BUF7I`"]
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pub type BUF7I_R = crate::R<bool, BUF7I_A>;
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impl BUF7I_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> BUF7I_A {
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match self.bits {
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false => BUF7I_A::_0,
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true => BUF7I_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == BUF7I_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == BUF7I_A::_1
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}
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}
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#[doc = "Write proxy for field `BUF7I`"]
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pub struct BUF7I_W<'a> {
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w: &'a mut W,
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}
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impl<'a> BUF7I_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: BUF7I_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "No occurrence of MB7 completing transmission/reception when MCR\\[RFEN\\]=0, or of Rx FIFO overflow when MCR\\[RFEN\\]=1"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(BUF7I_A::_0)
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}
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#[doc = "MB7 completed transmission/reception when MCR\\[RFEN\\]=0, or Rx FIFO overflow when MCR\\[RFEN\\]=1"]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(BUF7I_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
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self.w
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}
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}
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#[doc = "Reader of field `BUF31TO8I`"]
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pub type BUF31TO8I_R = crate::R<u32, u32>;
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#[doc = "Write proxy for field `BUF31TO8I`"]
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pub struct BUF31TO8I_W<'a> {
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w: &'a mut W,
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}
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impl<'a> BUF31TO8I_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u32) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x00ff_ffff << 8)) | (((value as u32) & 0x00ff_ffff) << 8);
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self.w
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}
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}
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impl R {
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#[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
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#[inline(always)]
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pub fn buf0i(&self) -> BUF0I_R {
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BUF0I_R::new((self.bits & 0x01) != 0)
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}
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#[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
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#[inline(always)]
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pub fn buf4to1i(&self) -> BUF4TO1I_R {
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BUF4TO1I_R::new(((self.bits >> 1) & 0x0f) as u8)
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}
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#[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
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#[inline(always)]
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pub fn buf5i(&self) -> BUF5I_R {
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BUF5I_R::new(((self.bits >> 5) & 0x01) != 0)
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}
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#[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
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#[inline(always)]
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pub fn buf6i(&self) -> BUF6I_R {
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BUF6I_R::new(((self.bits >> 6) & 0x01) != 0)
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}
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#[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
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#[inline(always)]
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pub fn buf7i(&self) -> BUF7I_R {
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BUF7I_R::new(((self.bits >> 7) & 0x01) != 0)
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}
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#[doc = "Bits 8:31 - Buffer MBi Interrupt"]
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#[inline(always)]
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pub fn buf31to8i(&self) -> BUF31TO8I_R {
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BUF31TO8I_R::new(((self.bits >> 8) & 0x00ff_ffff) as u32)
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}
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}
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impl W {
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#[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
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#[inline(always)]
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pub fn buf0i(&mut self) -> BUF0I_W {
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BUF0I_W { w: self }
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}
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#[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
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#[inline(always)]
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pub fn buf4to1i(&mut self) -> BUF4TO1I_W {
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BUF4TO1I_W { w: self }
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}
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#[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
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#[inline(always)]
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pub fn buf5i(&mut self) -> BUF5I_W {
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BUF5I_W { w: self }
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}
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#[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
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#[inline(always)]
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pub fn buf6i(&mut self) -> BUF6I_W {
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BUF6I_W { w: self }
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}
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#[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
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#[inline(always)]
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pub fn buf7i(&mut self) -> BUF7I_W {
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BUF7I_W { w: self }
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}
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#[doc = "Bits 8:31 - Buffer MBi Interrupt"]
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#[inline(always)]
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pub fn buf31to8i(&mut self) -> BUF31TO8I_W {
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BUF31TO8I_W { w: self }
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}
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}
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