s32k118.rs/S32K118.svd

<?xml version="1.0" encoding="UTF-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
  <vendor>NXP</vendor>
  <vendorID>NXP</vendorID>
  <name>S32K118</name>
  <series>S32K</series>
  <version>1.6</version>
  <description>S32K118 NXP Microcontroller</description>
  <licenseText>Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n   of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n   list of conditions and the following disclaimer in the documentation and/or\n   other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n   contributors may be used to endorse or promote products derived from this\n   software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS &quot;AS IS&quot; AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</licenseText>
  <cpu>
    <name>CM0PLUS</name>
    <revision>r0p0</revision>
    <endian>little</endian>
    <mpuPresent>true</mpuPresent>
    <fpuPresent>true</fpuPresent>
    <nvicPrioBits>2</nvicPrioBits>
    <vendorSystickConfig>false</vendorSystickConfig>
  </cpu>
  <addressUnitBits>8</addressUnitBits>
  <width>32</width>
  <peripherals>
    <peripheral>
      <name>CSE_PRAM</name>
      <description>CSE_PRAM</description>
      <prependToName>CSE_PRAM</prependToName>
      <baseAddress>0x14000800</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x80</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>_EmbeddedRAM0</name>
          <description>CSE PRAM 0 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM0LL</name>
          <description>CSE PRAM0LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM0LU</name>
          <description>CSE PRAM0LU register.</description>
          <addressOffset>0x1</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM0HL</name>
          <description>CSE PRAM0HL register.</description>
          <addressOffset>0x2</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM0HU</name>
          <description>CSE PRAM0HU register.</description>
          <addressOffset>0x3</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM1</name>
          <description>CSE PRAM 1 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM1LL</name>
          <description>CSE PRAM1LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x4</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM1LU</name>
          <description>CSE PRAM1LU register.</description>
          <addressOffset>0x5</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM1HL</name>
          <description>CSE PRAM1HL register.</description>
          <addressOffset>0x6</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM1HU</name>
          <description>CSE PRAM1HU register.</description>
          <addressOffset>0x7</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM2</name>
          <description>CSE PRAM 2 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM2LL</name>
          <description>CSE PRAM2LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x8</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM2LU</name>
          <description>CSE PRAM2LU register.</description>
          <addressOffset>0x9</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM2HL</name>
          <description>CSE PRAM2HL register.</description>
          <addressOffset>0xA</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM2HU</name>
          <description>CSE PRAM2HU register.</description>
          <addressOffset>0xB</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM3</name>
          <description>CSE PRAM 3 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM3LL</name>
          <description>CSE PRAM3LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0xC</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM3LU</name>
          <description>CSE PRAM3LU register.</description>
          <addressOffset>0xD</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM3HL</name>
          <description>CSE PRAM3HL register.</description>
          <addressOffset>0xE</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM3HU</name>
          <description>CSE PRAM3HU register.</description>
          <addressOffset>0xF</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM4</name>
          <description>CSE PRAM 4 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM4LL</name>
          <description>CSE PRAM4LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x10</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM4LU</name>
          <description>CSE PRAM4LU register.</description>
          <addressOffset>0x11</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM4HL</name>
          <description>CSE PRAM4HL register.</description>
          <addressOffset>0x12</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM4HU</name>
          <description>CSE PRAM4HU register.</description>
          <addressOffset>0x13</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM5</name>
          <description>CSE PRAM 5 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM5LL</name>
          <description>CSE PRAM5LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x14</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM5LU</name>
          <description>CSE PRAM5LU register.</description>
          <addressOffset>0x15</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM5HL</name>
          <description>CSE PRAM5HL register.</description>
          <addressOffset>0x16</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM5HU</name>
          <description>CSE PRAM5HU register.</description>
          <addressOffset>0x17</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM6</name>
          <description>CSE PRAM 6 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM6LL</name>
          <description>CSE PRAM6LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x18</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM6LU</name>
          <description>CSE PRAM6LU register.</description>
          <addressOffset>0x19</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM6HL</name>
          <description>CSE PRAM6HL register.</description>
          <addressOffset>0x1A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM6HU</name>
          <description>CSE PRAM6HU register.</description>
          <addressOffset>0x1B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM7</name>
          <description>CSE PRAM 7 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM7LL</name>
          <description>CSE PRAM7LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x1C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM7LU</name>
          <description>CSE PRAM7LU register.</description>
          <addressOffset>0x1D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM7HL</name>
          <description>CSE PRAM7HL register.</description>
          <addressOffset>0x1E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM7HU</name>
          <description>CSE PRAM7HU register.</description>
          <addressOffset>0x1F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM8</name>
          <description>CSE PRAM 8 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM8LL</name>
          <description>CSE PRAM8LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x20</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM8LU</name>
          <description>CSE PRAM8LU register.</description>
          <addressOffset>0x21</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM8HL</name>
          <description>CSE PRAM8HL register.</description>
          <addressOffset>0x22</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM8HU</name>
          <description>CSE PRAM8HU register.</description>
          <addressOffset>0x23</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM9</name>
          <description>CSE PRAM 9 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM9LL</name>
          <description>CSE PRAM9LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x24</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM9LU</name>
          <description>CSE PRAM9LU register.</description>
          <addressOffset>0x25</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM9HL</name>
          <description>CSE PRAM9HL register.</description>
          <addressOffset>0x26</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM9HU</name>
          <description>CSE PRAM9HU register.</description>
          <addressOffset>0x27</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM10</name>
          <description>CSE PRAM 10 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM10LL</name>
          <description>CSE PRAM10LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x28</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM10LU</name>
          <description>CSE PRAM10LU register.</description>
          <addressOffset>0x29</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM10HL</name>
          <description>CSE PRAM10HL register.</description>
          <addressOffset>0x2A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM10HU</name>
          <description>CSE PRAM10HU register.</description>
          <addressOffset>0x2B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM11</name>
          <description>CSE PRAM 11 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM11LL</name>
          <description>CSE PRAM11LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x2C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM11LU</name>
          <description>CSE PRAM11LU register.</description>
          <addressOffset>0x2D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM11HL</name>
          <description>CSE PRAM11HL register.</description>
          <addressOffset>0x2E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM11HU</name>
          <description>CSE PRAM11HU register.</description>
          <addressOffset>0x2F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM12</name>
          <description>CSE PRAM 12 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM12LL</name>
          <description>CSE PRAM12LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x30</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM12LU</name>
          <description>CSE PRAM12LU register.</description>
          <addressOffset>0x31</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM12HL</name>
          <description>CSE PRAM12HL register.</description>
          <addressOffset>0x32</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM12HU</name>
          <description>CSE PRAM12HU register.</description>
          <addressOffset>0x33</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM13</name>
          <description>CSE PRAM 13 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM13LL</name>
          <description>CSE PRAM13LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x34</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM13LU</name>
          <description>CSE PRAM13LU register.</description>
          <addressOffset>0x35</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM13HL</name>
          <description>CSE PRAM13HL register.</description>
          <addressOffset>0x36</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM13HU</name>
          <description>CSE PRAM13HU register.</description>
          <addressOffset>0x37</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM14</name>
          <description>CSE PRAM 14 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM14LL</name>
          <description>CSE PRAM14LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x38</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM14LU</name>
          <description>CSE PRAM14LU register.</description>
          <addressOffset>0x39</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM14HL</name>
          <description>CSE PRAM14HL register.</description>
          <addressOffset>0x3A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM14HU</name>
          <description>CSE PRAM14HU register.</description>
          <addressOffset>0x3B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM15</name>
          <description>CSE PRAM 15 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM15LL</name>
          <description>CSE PRAM15LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x3C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM15LU</name>
          <description>CSE PRAM15LU register.</description>
          <addressOffset>0x3D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM15HL</name>
          <description>CSE PRAM15HL register.</description>
          <addressOffset>0x3E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM15HU</name>
          <description>CSE PRAM15HU register.</description>
          <addressOffset>0x3F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM16</name>
          <description>CSE PRAM 16 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM16LL</name>
          <description>CSE PRAM16LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x40</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM16LU</name>
          <description>CSE PRAM16LU register.</description>
          <addressOffset>0x41</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM16HL</name>
          <description>CSE PRAM16HL register.</description>
          <addressOffset>0x42</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM16HU</name>
          <description>CSE PRAM16HU register.</description>
          <addressOffset>0x43</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM17</name>
          <description>CSE PRAM 17 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM17LL</name>
          <description>CSE PRAM17LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x44</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM17LU</name>
          <description>CSE PRAM17LU register.</description>
          <addressOffset>0x45</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM17HL</name>
          <description>CSE PRAM17HL register.</description>
          <addressOffset>0x46</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM17HU</name>
          <description>CSE PRAM17HU register.</description>
          <addressOffset>0x47</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM18</name>
          <description>CSE PRAM 18 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM18LL</name>
          <description>CSE PRAM18LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x48</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM18LU</name>
          <description>CSE PRAM18LU register.</description>
          <addressOffset>0x49</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM18HL</name>
          <description>CSE PRAM18HL register.</description>
          <addressOffset>0x4A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM18HU</name>
          <description>CSE PRAM18HU register.</description>
          <addressOffset>0x4B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM19</name>
          <description>CSE PRAM 19 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM19LL</name>
          <description>CSE PRAM19LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x4C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM19LU</name>
          <description>CSE PRAM19LU register.</description>
          <addressOffset>0x4D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM19HL</name>
          <description>CSE PRAM19HL register.</description>
          <addressOffset>0x4E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM19HU</name>
          <description>CSE PRAM19HU register.</description>
          <addressOffset>0x4F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM20</name>
          <description>CSE PRAM 20 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM20LL</name>
          <description>CSE PRAM20LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x50</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM20LU</name>
          <description>CSE PRAM20LU register.</description>
          <addressOffset>0x51</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM20HL</name>
          <description>CSE PRAM20HL register.</description>
          <addressOffset>0x52</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM20HU</name>
          <description>CSE PRAM20HU register.</description>
          <addressOffset>0x53</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM21</name>
          <description>CSE PRAM 21 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM21LL</name>
          <description>CSE PRAM21LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x54</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM21LU</name>
          <description>CSE PRAM21LU register.</description>
          <addressOffset>0x55</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM21HL</name>
          <description>CSE PRAM21HL register.</description>
          <addressOffset>0x56</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM21HU</name>
          <description>CSE PRAM21HU register.</description>
          <addressOffset>0x57</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM22</name>
          <description>CSE PRAM 22 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM22LL</name>
          <description>CSE PRAM22LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x58</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM22LU</name>
          <description>CSE PRAM22LU register.</description>
          <addressOffset>0x59</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM22HL</name>
          <description>CSE PRAM22HL register.</description>
          <addressOffset>0x5A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM22HU</name>
          <description>CSE PRAM22HU register.</description>
          <addressOffset>0x5B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM23</name>
          <description>CSE PRAM 23 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM23LL</name>
          <description>CSE PRAM23LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x5C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM23LU</name>
          <description>CSE PRAM23LU register.</description>
          <addressOffset>0x5D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM23HL</name>
          <description>CSE PRAM23HL register.</description>
          <addressOffset>0x5E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM23HU</name>
          <description>CSE PRAM23HU register.</description>
          <addressOffset>0x5F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM24</name>
          <description>CSE PRAM 24 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM24LL</name>
          <description>CSE PRAM24LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x60</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM24LU</name>
          <description>CSE PRAM24LU register.</description>
          <addressOffset>0x61</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM24HL</name>
          <description>CSE PRAM24HL register.</description>
          <addressOffset>0x62</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM24HU</name>
          <description>CSE PRAM24HU register.</description>
          <addressOffset>0x63</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM25</name>
          <description>CSE PRAM 25 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM25LL</name>
          <description>CSE PRAM25LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x64</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM25LU</name>
          <description>CSE PRAM25LU register.</description>
          <addressOffset>0x65</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM25HL</name>
          <description>CSE PRAM25HL register.</description>
          <addressOffset>0x66</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM25HU</name>
          <description>CSE PRAM25HU register.</description>
          <addressOffset>0x67</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM26</name>
          <description>CSE PRAM 26 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM26LL</name>
          <description>CSE PRAM26LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x68</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM26LU</name>
          <description>CSE PRAM26LU register.</description>
          <addressOffset>0x69</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM26HL</name>
          <description>CSE PRAM26HL register.</description>
          <addressOffset>0x6A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM26HU</name>
          <description>CSE PRAM26HU register.</description>
          <addressOffset>0x6B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM27</name>
          <description>CSE PRAM 27 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM27LL</name>
          <description>CSE PRAM27LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x6C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM27LU</name>
          <description>CSE PRAM27LU register.</description>
          <addressOffset>0x6D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM27HL</name>
          <description>CSE PRAM27HL register.</description>
          <addressOffset>0x6E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM27HU</name>
          <description>CSE PRAM27HU register.</description>
          <addressOffset>0x6F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM28</name>
          <description>CSE PRAM 28 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM28LL</name>
          <description>CSE PRAM28LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x70</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM28LU</name>
          <description>CSE PRAM28LU register.</description>
          <addressOffset>0x71</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM28HL</name>
          <description>CSE PRAM28HL register.</description>
          <addressOffset>0x72</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM28HU</name>
          <description>CSE PRAM28HU register.</description>
          <addressOffset>0x73</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM29</name>
          <description>CSE PRAM 29 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM29LL</name>
          <description>CSE PRAM29LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x74</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM29LU</name>
          <description>CSE PRAM29LU register.</description>
          <addressOffset>0x75</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM29HL</name>
          <description>CSE PRAM29HL register.</description>
          <addressOffset>0x76</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM29HU</name>
          <description>CSE PRAM29HU register.</description>
          <addressOffset>0x77</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM30</name>
          <description>CSE PRAM 30 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM30LL</name>
          <description>CSE PRAM30LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x78</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM30LU</name>
          <description>CSE PRAM30LU register.</description>
          <addressOffset>0x79</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM30HL</name>
          <description>CSE PRAM30HL register.</description>
          <addressOffset>0x7A</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM30HU</name>
          <description>CSE PRAM30HU register.</description>
          <addressOffset>0x7B</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM31</name>
          <description>CSE PRAM 31 Register</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM31LL</name>
          <description>CSE PRAM31LL register.</description>
          <alternateGroup>CSE_PRAM</alternateGroup>
          <addressOffset>0x7C</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LL</name>
              <description>RAM_LL stores the first 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM31LU</name>
          <description>CSE PRAM31LU register.</description>
          <addressOffset>0x7D</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_LU</name>
              <description>RAM_LU stores the second 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM31HL</name>
          <description>CSE PRAM31HL register.</description>
          <addressOffset>0x7E</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HL</name>
              <description>RAM_HL stores the third 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>_EmbeddedRAM31HU</name>
          <description>CSE PRAM31HU register.</description>
          <addressOffset>0x7F</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>RAM_HU</name>
              <description>RAM_HU stores the fourth 8 bits of the 32 bit CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>AIPS</name>
      <description>AIPS-Lite Bridge</description>
      <prependToName>AIPS_</prependToName>
      <baseAddress>0x40000000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x70</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>MPRA</name>
          <description>Master Privilege Register A</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x77700000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MPL2</name>
              <description>Master 2 Privilege Level</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from this master are forced to user-mode.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from this master are not forced to user-mode.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTW2</name>
              <description>Master 2 Trusted For Writes</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This master is not trusted for write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This master is trusted for write accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTR2</name>
              <description>Master 2 Trusted For Read</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This master is not trusted for read accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This master is trusted for read accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MPL1</name>
              <description>Master 1 Privilege Level</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from this master are forced to user-mode.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from this master are not forced to user-mode.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTW1</name>
              <description>Master 1 Trusted for Writes</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This master is not trusted for write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This master is trusted for write accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTR1</name>
              <description>Master 1 Trusted for Read</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This master is not trusted for read accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This master is trusted for read accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MPL0</name>
              <description>Master 0 Privilege Level</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from this master are forced to user-mode.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from this master are not forced to user-mode.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTW0</name>
              <description>Master 0 Trusted For Writes</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This master is not trusted for write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This master is trusted for write accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTR0</name>
              <description>Master 0 Trusted For Read</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This master is not trusted for read accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This master is trusted for read accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PACRA</name>
          <description>Peripheral Access Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x54000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PACRB</name>
          <description>Peripheral Access Control Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44000400</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PACRC</name>
          <description>Peripheral Access Control Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>PACRD</name>
          <description>Peripheral Access Control Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRA</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44004444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP7</name>
              <description>Trusted Protect</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP7</name>
              <description>Write Protect</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP7</name>
              <description>Supervisor Protect</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP6</name>
              <description>Trusted Protect</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP6</name>
              <description>Write Protect</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP6</name>
              <description>Supervisor Protect</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP4</name>
              <description>Trusted Protect</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP4</name>
              <description>Write Protect</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP4</name>
              <description>Supervisor Protect</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRB</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44440</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP6</name>
              <description>Trusted Protect</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP6</name>
              <description>Write Protect</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP6</name>
              <description>Supervisor Protect</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP4</name>
              <description>Trusted Protect</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP4</name>
              <description>Write Protect</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP4</name>
              <description>Supervisor Protect</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP3</name>
              <description>Trusted Protect</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP3</name>
              <description>Write Protect</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP3</name>
              <description>Supervisor Protect</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRC</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4400044</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP7</name>
              <description>Trusted Protect</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP7</name>
              <description>Write Protect</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP7</name>
              <description>Supervisor Protect</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP6</name>
              <description>Trusted Protect</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP6</name>
              <description>Write Protect</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP6</name>
              <description>Supervisor Protect</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP2</name>
              <description>Trusted Protect</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP2</name>
              <description>Write Protect</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP2</name>
              <description>Supervisor Protect</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRD</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44440400</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP3</name>
              <description>Trusted Protect</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP3</name>
              <description>Write Protect</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP3</name>
              <description>Supervisor Protect</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP2</name>
              <description>Trusted Protect</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP2</name>
              <description>Write Protect</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP2</name>
              <description>Supervisor Protect</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRE</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40000040</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP6</name>
              <description>Trusted Protect</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP6</name>
              <description>Write Protect</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP6</name>
              <description>Supervisor Protect</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRF</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44444400</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP4</name>
              <description>Trusted Protect</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP4</name>
              <description>Write Protect</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP4</name>
              <description>Supervisor Protect</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP3</name>
              <description>Trusted Protect</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP3</name>
              <description>Write Protect</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP3</name>
              <description>Supervisor Protect</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP2</name>
              <description>Trusted Protect</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP2</name>
              <description>Write Protect</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP2</name>
              <description>Supervisor Protect</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP0</name>
              <description>Trusted Protect</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP0</name>
              <description>Write Protect</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP0</name>
              <description>Supervisor Protect</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRG</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x400000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP2</name>
              <description>Trusted Protect</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP2</name>
              <description>Write Protect</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP2</name>
              <description>Supervisor Protect</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRH</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x400000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP2</name>
              <description>Trusted Protect</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP2</name>
              <description>Write Protect</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP2</name>
              <description>Supervisor Protect</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRI</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4044440</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP6</name>
              <description>Trusted Protect</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP6</name>
              <description>Write Protect</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP6</name>
              <description>Supervisor Protect</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP4</name>
              <description>Trusted Protect</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP4</name>
              <description>Write Protect</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP4</name>
              <description>Supervisor Protect</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP3</name>
              <description>Trusted Protect</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP3</name>
              <description>Write Protect</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP3</name>
              <description>Supervisor Protect</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP1</name>
              <description>Trusted Protect</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP1</name>
              <description>Write Protect</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP1</name>
              <description>Supervisor Protect</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRJ</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x444000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP4</name>
              <description>Trusted Protect</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP4</name>
              <description>Write Protect</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP4</name>
              <description>Supervisor Protect</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP3</name>
              <description>Trusted Protect</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP3</name>
              <description>Write Protect</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP3</name>
              <description>Supervisor Protect</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP2</name>
              <description>Trusted Protect</description>
              <bitOffset>20</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP2</name>
              <description>Write Protect</description>
              <bitOffset>21</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP2</name>
              <description>Supervisor Protect</description>
              <bitOffset>22</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRK</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP3</name>
              <description>Trusted Protect</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP3</name>
              <description>Write Protect</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP3</name>
              <description>Supervisor Protect</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACRL</name>
          <description>Off-Platform Peripheral Access Control Register</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TP7</name>
              <description>Trusted Protect</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP7</name>
              <description>Write Protect</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP7</name>
              <description>Supervisor Protect</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP6</name>
              <description>Trusted Protect</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP6</name>
              <description>Write Protect</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP6</name>
              <description>Supervisor Protect</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP5</name>
              <description>Trusted Protect</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Accesses from an untrusted master are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Accesses from an untrusted master are not allowed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP5</name>
              <description>Write Protect</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral allows write accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral is write protected.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP5</name>
              <description>Supervisor Protect</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>This peripheral requires supervisor privilege level for accesses.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>MSCM</name>
      <description>MSCM</description>
      <prependToName>MSCM_</prependToName>
      <baseAddress>0x40001000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x40C</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>CPxTYPE</name>
          <description>Processor X Type Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>RYPZ</name>
              <description>Processor x Revision</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PERSONALITY</name>
              <description>Processor x Personality</description>
              <bitOffset>8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxNUM</name>
          <description>Processor X Number Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFE</resetMask>
          <fields>
            <field>
              <name>CPN</name>
              <description>Processor x Number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxMASTER</name>
          <description>Processor X Master Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFC0</resetMask>
          <fields>
            <field>
              <name>PPMN</name>
              <description>Processor x Physical Master Number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxCOUNT</name>
          <description>Processor X Count Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PCNT</name>
              <description>Processor Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxCFG0</name>
          <description>Processor X Configuration Register 0</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DCWY</name>
              <description>Level 1 Data Cache Ways</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DCSZ</name>
              <description>Level 1 Data Cache Size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ICWY</name>
              <description>Level 1 Instruction Cache Ways</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ICSZ</name>
              <description>Level 1 Instruction Cache Size</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxCFG1</name>
          <description>Processor X Configuration Register 1</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>L2WY</name>
              <description>Level 2 Instruction Cache Ways</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>L2SZ</name>
              <description>Level 2 Instruction Cache Size</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxCFG2</name>
          <description>Processor X Configuration Register 2</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10001</resetValue>
          <resetMask>0xFF00FF</resetMask>
          <fields>
            <field>
              <name>TMUSZ</name>
              <description>Tightly-coupled Memory Upper Size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TMLSZ</name>
              <description>Tightly-coupled Memory Lower Size</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPxCFG3</name>
          <description>Processor X Configuration Register 3</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFC80</resetMask>
          <fields>
            <field>
              <name>FPU</name>
              <description>Floating Point Unit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>FPU support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>FPU support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SIMD</name>
              <description>SIMD/NEON instruction support</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>SIMD/NEON support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>SIMD/NEON support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>JAZ</name>
              <description>Jazelle support</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Jazelle support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Jazelle support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MMU</name>
              <description>Memory Management Unit</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>MMU support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>MMU support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TZ</name>
              <description>Trust Zone</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Trust Zone support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Trust Zone support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMP</name>
              <description>Core Memory Protection unit</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Core Memory Protection is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Core Memory Protection is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BB</name>
              <description>Bit Banding</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bit Banding is not supported.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bit Banding is supported.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBP</name>
              <description>System Bus Ports</description>
              <bitOffset>8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0TYPE</name>
          <description>Processor 0 Type Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x434D3401</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RYPZ</name>
              <description>Processor 0 Revision</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PERSONALITY</name>
              <description>Processor 0 Personality</description>
              <bitOffset>8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0NUM</name>
          <description>Processor 0 Number Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CPN</name>
              <description>Processor 0 Number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0MASTER</name>
          <description>Processor 0 Master Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PPMN</name>
              <description>Processor 0 Physical Master Number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0COUNT</name>
          <description>Processor 0 Count Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PCNT</name>
              <description>Processor Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0CFG0</name>
          <description>Processor 0 Configuration Register 0</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x4000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DCWY</name>
              <description>Level 1 Data Cache Ways</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DCSZ</name>
              <description>Level 1 Data Cache Size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ICWY</name>
              <description>Level 1 Instruction Cache Ways</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ICSZ</name>
              <description>Level 1 Instruction Cache Size</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0CFG1</name>
          <description>Processor 0 Configuration Register 1</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>L2WY</name>
              <description>Level 2 Instruction Cache Ways</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>L2SZ</name>
              <description>Level 2 Instruction Cache Size</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0CFG2</name>
          <description>Processor 0 Configuration Register 2</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x7010701</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TMUSZ</name>
              <description>Tightly-coupled Memory Upper Size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TMLSZ</name>
              <description>Tightly-coupled Memory Lower Size</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CP0CFG3</name>
          <description>Processor 0 Configuration Register 3</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x101</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FPU</name>
              <description>Floating Point Unit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>FPU support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>FPU support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SIMD</name>
              <description>SIMD/NEON instruction support</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>SIMD/NEON support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>SIMD/NEON support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>JAZ</name>
              <description>Jazelle support</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Jazelle support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Jazelle support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MMU</name>
              <description>Memory Management Unit</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>MMU support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>MMU support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TZ</name>
              <description>Trust Zone</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Trust Zone support is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Trust Zone support is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMP</name>
              <description>Core Memory Protection unit</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Core Memory Protection is not included.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Core Memory Protection is included.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BB</name>
              <description>Bit Banding</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bit Banding is not supported.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bit Banding is supported.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBP</name>
              <description>System Bus Ports</description>
              <bitOffset>8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OCMDR0</name>
          <description>On-Chip Memory Descriptor Register</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xCA089000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OCM1</name>
              <description>OCMEM Control Field 1</description>
              <bitOffset>4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OCMPU</name>
              <description>OCMPU</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OCMT</name>
              <description>OCMT</description>
              <bitOffset>13</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>100</name>
                  <description>OCMEMn is a Program Flash.</description>
                  <value>#100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>101</name>
                  <description>OCMEMn is a Data Flash.</description>
                  <value>#101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>110</name>
                  <description>OCMEMn is an EEE.</description>
                  <value>#110</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RO</name>
              <description>RO</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Writes to the OCMDRn[11:0] are allowed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Writes to the OCMDRn[11:0] are ignored</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMW</name>
              <description>OCMW</description>
              <bitOffset>17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>010</name>
                  <description>OCMEMn 32-bits wide</description>
                  <value>#010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>011</name>
                  <description>OCMEMn 64-bits wide</description>
                  <value>#011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>100</name>
                  <description>OCMEMn 128-bits wide</description>
                  <value>#100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>101</name>
                  <description>OCMEMn 256-bits wide</description>
                  <value>#101</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMSZ</name>
              <description>OCMSZ</description>
              <bitOffset>24</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0000</name>
                  <description>no OCMEMn</description>
                  <value>#0000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0001</name>
                  <description>1KB OCMEMn</description>
                  <value>#0001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0010</name>
                  <description>2KB OCMEMn</description>
                  <value>#0010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0011</name>
                  <description>4KB OCMEMn</description>
                  <value>#0011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0100</name>
                  <description>8KB OCMEMn</description>
                  <value>#0100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0101</name>
                  <description>16KB OCMEMn</description>
                  <value>#0101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0110</name>
                  <description>32KB OCMEMn</description>
                  <value>#0110</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0111</name>
                  <description>64KB OCMEMn</description>
                  <value>#0111</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1000</name>
                  <description>128KB OCMEMn</description>
                  <value>#1000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1001</name>
                  <description>256KB OCMEMn</description>
                  <value>#1001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1010</name>
                  <description>512KB OCMEMn</description>
                  <value>#1010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1011</name>
                  <description>1MB OCMEMn</description>
                  <value>#1011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1100</name>
                  <description>2MB OCMEMn</description>
                  <value>#1100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1101</name>
                  <description>4MB OCMEMn</description>
                  <value>#1101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1110</name>
                  <description>8MB OCMEMn</description>
                  <value>#1110</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1111</name>
                  <description>16MB OCMEMn</description>
                  <value>#1111</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMSZH</name>
              <description>OCMSZH</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>OCMEMn is a power-of-2 capacity.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>V</name>
              <description>V</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>OCMEMn is not present.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>OCMEMn is present.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OCMDR1</name>
          <description>On-Chip Memory Descriptor Register</description>
          <addressOffset>0x404</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC706B000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OCM1</name>
              <description>OCMEM Control Field 1</description>
              <bitOffset>4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OCMPU</name>
              <description>OCMPU</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OCMT</name>
              <description>OCMT</description>
              <bitOffset>13</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>100</name>
                  <description>OCMEMn is a Program Flash.</description>
                  <value>#100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>101</name>
                  <description>OCMEMn is a Data Flash.</description>
                  <value>#101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>110</name>
                  <description>OCMEMn is an EEE.</description>
                  <value>#110</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RO</name>
              <description>RO</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Writes to the OCMDRn[11:0] are allowed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Writes to the OCMDRn[11:0] are ignored</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMW</name>
              <description>OCMW</description>
              <bitOffset>17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>010</name>
                  <description>OCMEMn 32-bits wide</description>
                  <value>#010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>011</name>
                  <description>OCMEMn 64-bits wide</description>
                  <value>#011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>100</name>
                  <description>OCMEMn 128-bits wide</description>
                  <value>#100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>101</name>
                  <description>OCMEMn 256-bits wide</description>
                  <value>#101</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMSZ</name>
              <description>OCMSZ</description>
              <bitOffset>24</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0000</name>
                  <description>no OCMEMn</description>
                  <value>#0000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0001</name>
                  <description>1KB OCMEMn</description>
                  <value>#0001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0010</name>
                  <description>2KB OCMEMn</description>
                  <value>#0010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0011</name>
                  <description>4KB OCMEMn</description>
                  <value>#0011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0100</name>
                  <description>8KB OCMEMn</description>
                  <value>#0100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0101</name>
                  <description>16KB OCMEMn</description>
                  <value>#0101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0110</name>
                  <description>32KB OCMEMn</description>
                  <value>#0110</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0111</name>
                  <description>64KB OCMEMn</description>
                  <value>#0111</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1000</name>
                  <description>128KB OCMEMn</description>
                  <value>#1000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1001</name>
                  <description>256KB OCMEMn</description>
                  <value>#1001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1010</name>
                  <description>512KB OCMEMn</description>
                  <value>#1010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1011</name>
                  <description>1MB OCMEMn</description>
                  <value>#1011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1100</name>
                  <description>2MB OCMEMn</description>
                  <value>#1100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1101</name>
                  <description>4MB OCMEMn</description>
                  <value>#1101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1110</name>
                  <description>8MB OCMEMn</description>
                  <value>#1110</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1111</name>
                  <description>16MB OCMEMn</description>
                  <value>#1111</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMSZH</name>
              <description>OCMSZH</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>OCMEMn is a power-of-2 capacity.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>V</name>
              <description>V</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>OCMEMn is not present.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>OCMEMn is present.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OCMDR2</name>
          <description>On-Chip Memory Descriptor Register</description>
          <addressOffset>0x408</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC304D000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OCMPU</name>
              <description>OCMPU</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OCMT</name>
              <description>OCMT</description>
              <bitOffset>13</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>100</name>
                  <description>OCMEMn is a Program Flash.</description>
                  <value>#100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>101</name>
                  <description>OCMEMn is a Data Flash.</description>
                  <value>#101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>110</name>
                  <description>OCMEMn is an EEE.</description>
                  <value>#110</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RO</name>
              <description>RO</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Writes to the OCMDRn[11:0] are allowed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Writes to the OCMDRn[11:0] are ignored</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMW</name>
              <description>OCMW</description>
              <bitOffset>17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>010</name>
                  <description>OCMEMn 32-bits wide</description>
                  <value>#010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>011</name>
                  <description>OCMEMn 64-bits wide</description>
                  <value>#011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>100</name>
                  <description>OCMEMn 128-bits wide</description>
                  <value>#100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>101</name>
                  <description>OCMEMn 256-bits wide</description>
                  <value>#101</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMSZ</name>
              <description>OCMSZ</description>
              <bitOffset>24</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0000</name>
                  <description>no OCMEMn</description>
                  <value>#0000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0001</name>
                  <description>1KB OCMEMn</description>
                  <value>#0001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0010</name>
                  <description>2KB OCMEMn</description>
                  <value>#0010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0011</name>
                  <description>4KB OCMEMn</description>
                  <value>#0011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0100</name>
                  <description>8KB OCMEMn</description>
                  <value>#0100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0101</name>
                  <description>16KB OCMEMn</description>
                  <value>#0101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0110</name>
                  <description>32KB OCMEMn</description>
                  <value>#0110</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0111</name>
                  <description>64KB OCMEMn</description>
                  <value>#0111</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1000</name>
                  <description>128KB OCMEMn</description>
                  <value>#1000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1001</name>
                  <description>256KB OCMEMn</description>
                  <value>#1001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1010</name>
                  <description>512KB OCMEMn</description>
                  <value>#1010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1011</name>
                  <description>1MB OCMEMn</description>
                  <value>#1011</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1100</name>
                  <description>2MB OCMEMn</description>
                  <value>#1100</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1101</name>
                  <description>4MB OCMEMn</description>
                  <value>#1101</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1110</name>
                  <description>8MB OCMEMn</description>
                  <value>#1110</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1111</name>
                  <description>16MB OCMEMn</description>
                  <value>#1111</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCMSZH</name>
              <description>OCMSZH</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>OCMEMn is a power-of-2 capacity.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>V</name>
              <description>V</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>OCMEMn is not present.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>OCMEMn is present.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>DMA</name>
      <description>Enhanced Direct Memory Access</description>
      <prependToName>DMA_</prependToName>
      <baseAddress>0x40008000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x1080</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>DMA0</name>
        <value>0</value>
      </interrupt>
      <interrupt>
        <name>DMA1</name>
        <value>1</value>
      </interrupt>
      <interrupt>
        <name>DMA2</name>
        <value>2</value>
      </interrupt>
      <interrupt>
        <name>DMA3</name>
        <value>3</value>
      </interrupt>
      <interrupt>
        <name>DMA_Error</name>
        <value>4</value>
      </interrupt>
      <registers>
        <register>
          <name>CR</name>
          <description>Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EDBG</name>
              <description>Enable Debug</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERCA</name>
              <description>Enable Round Robin Channel Arbitration</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOE</name>
              <description>Halt On Error</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HALT</name>
              <description>Halt DMA Operations</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLM</name>
              <description>Continuous Link Mode</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A minor loop channel link made to itself goes through channel arbitration before being activated again.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EMLM</name>
              <description>Enable Minor Loop Mapping</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disabled. TCDn.word2 is defined as a 32-bit NBYTES field.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECX</name>
              <description>Error Cancel Transfer</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CX</name>
              <description>Cancel Transfer</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ES</name>
          <description>Error Status Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DBE</name>
              <description>Destination Bus Error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No destination bus error</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a bus error on a destination write</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBE</name>
              <description>Source Bus Error</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No source bus error</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a bus error on a source read</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SGE</name>
              <description>Scatter/Gather Configuration Error</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No scatter/gather configuration error</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR[ESG] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NCE</name>
              <description>NBYTES/CITER Configuration Error</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No NBYTES/CITER configuration error</description>
                  <value>#0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOE</name>
              <description>Destination Offset Error</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No destination offset configuration error</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR[DSIZE].</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DAE</name>
              <description>Destination Address Error</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No destination address configuration error</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR[DSIZE].</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SOE</name>
              <description>Source Offset Error</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No source offset configuration error</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR[SSIZE].</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAE</name>
              <description>Source Address Error</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No source address configuration error.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR[SSIZE].</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERRCHN</name>
              <description>Error Channel Number or Canceled Channel Number</description>
              <bitOffset>8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CPE</name>
              <description>Channel Priority Error</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No channel priority error</description>
                  <value>#0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECX</name>
              <description>Transfer Canceled</description>
              <bitOffset>16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No canceled transfers</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The last recorded entry was a canceled transfer by the error cancel transfer input</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VLD</name>
              <description>VLD</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No ERR bits are set.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>At least one ERR bit is set indicating a valid error exists that has not been cleared.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ERQ</name>
          <description>Enable Request Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERQ0</name>
              <description>Enable DMA Request 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ1</name>
              <description>Enable DMA Request 1</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ2</name>
              <description>Enable DMA Request 2</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ3</name>
              <description>Enable DMA Request 3</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ4</name>
              <description>Enable DMA Request 4</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ5</name>
              <description>Enable DMA Request 5</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ6</name>
              <description>Enable DMA Request 6</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ7</name>
              <description>Enable DMA Request 7</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ8</name>
              <description>Enable DMA Request 8</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ9</name>
              <description>Enable DMA Request 9</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ10</name>
              <description>Enable DMA Request 10</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ11</name>
              <description>Enable DMA Request 11</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ12</name>
              <description>Enable DMA Request 12</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ13</name>
              <description>Enable DMA Request 13</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ14</name>
              <description>Enable DMA Request 14</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERQ15</name>
              <description>Enable DMA Request 15</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The DMA request signal for the corresponding channel is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The DMA request signal for the corresponding channel is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EEI</name>
          <description>Enable Error Interrupt Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EEI0</name>
              <description>Enable Error Interrupt 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI1</name>
              <description>Enable Error Interrupt 1</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI2</name>
              <description>Enable Error Interrupt 2</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI3</name>
              <description>Enable Error Interrupt 3</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI4</name>
              <description>Enable Error Interrupt 4</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI5</name>
              <description>Enable Error Interrupt 5</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI6</name>
              <description>Enable Error Interrupt 6</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI7</name>
              <description>Enable Error Interrupt 7</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI8</name>
              <description>Enable Error Interrupt 8</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI9</name>
              <description>Enable Error Interrupt 9</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI10</name>
              <description>Enable Error Interrupt 10</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI11</name>
              <description>Enable Error Interrupt 11</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI12</name>
              <description>Enable Error Interrupt 12</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI13</name>
              <description>Enable Error Interrupt 13</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI14</name>
              <description>Enable Error Interrupt 14</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EEI15</name>
              <description>Enable Error Interrupt 15</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CEEI</name>
          <description>Clear Enable Error Interrupt Register</description>
          <addressOffset>0x18</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>CEEI</name>
              <description>Clear Enable Error Interrupt</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>CAEE</name>
              <description>Clear All Enable Error Interrupts</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SEEI</name>
          <description>Set Enable Error Interrupt Register</description>
          <addressOffset>0x19</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>SEEI</name>
              <description>Set Enable Error Interrupt</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>SAEE</name>
              <description>Sets All Enable Error Interrupts</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CERQ</name>
          <description>Clear Enable Request Register</description>
          <addressOffset>0x1A</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>CERQ</name>
              <description>Clear Enable Request</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>CAER</name>
              <description>Clear All Enable Requests</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SERQ</name>
          <description>Set Enable Request Register</description>
          <addressOffset>0x1B</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>SERQ</name>
              <description>Set Enable Request</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>SAER</name>
              <description>Set All Enable Requests</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CDNE</name>
          <description>Clear DONE Status Bit Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>CDNE</name>
              <description>Clear DONE Bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>CADN</name>
              <description>Clears All DONE Bits</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Clears only the TCDn_CSR[DONE] bit specified in the CDNE field</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Clears all bits in TCDn_CSR[DONE]</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SSRT</name>
          <description>Set START Bit Register</description>
          <addressOffset>0x1D</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>SSRT</name>
              <description>Set START Bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>SAST</name>
              <description>Set All START Bits (activates all channels)</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Set only the TCDn_CSR[START] bit specified in the SSRT field</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Set all bits in TCDn_CSR[START]</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CERR</name>
          <description>Clear Error Register</description>
          <addressOffset>0x1E</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>CERR</name>
              <description>Clear Error Indicator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>CAEI</name>
              <description>Clear All Error Indicators</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CINT</name>
          <description>Clear Interrupt Request Register</description>
          <addressOffset>0x1F</addressOffset>
          <size>8</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>CINT</name>
              <description>Clear Interrupt Request</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>CAIR</name>
              <description>Clear All Interrupt Requests</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>NOP</name>
              <description>No Op enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Normal operation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>No operation, ignore the other bits in this register</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>INT</name>
          <description>Interrupt Request Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INT0</name>
              <description>Interrupt Request 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT1</name>
              <description>Interrupt Request 1</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT2</name>
              <description>Interrupt Request 2</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT3</name>
              <description>Interrupt Request 3</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT4</name>
              <description>Interrupt Request 4</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT5</name>
              <description>Interrupt Request 5</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT6</name>
              <description>Interrupt Request 6</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT7</name>
              <description>Interrupt Request 7</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT8</name>
              <description>Interrupt Request 8</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT9</name>
              <description>Interrupt Request 9</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT10</name>
              <description>Interrupt Request 10</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT11</name>
              <description>Interrupt Request 11</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT12</name>
              <description>Interrupt Request 12</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT13</name>
              <description>Interrupt Request 13</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT14</name>
              <description>Interrupt Request 14</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT15</name>
              <description>Interrupt Request 15</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The interrupt request for corresponding channel is cleared</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The interrupt request for corresponding channel is active</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ERR</name>
          <description>Error Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERR0</name>
              <description>Error In Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR1</name>
              <description>Error In Channel 1</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR2</name>
              <description>Error In Channel 2</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR3</name>
              <description>Error In Channel 3</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR4</name>
              <description>Error In Channel 4</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR5</name>
              <description>Error In Channel 5</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR6</name>
              <description>Error In Channel 6</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR7</name>
              <description>Error In Channel 7</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR8</name>
              <description>Error In Channel 8</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR9</name>
              <description>Error In Channel 9</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR10</name>
              <description>Error In Channel 10</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR11</name>
              <description>Error In Channel 11</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR12</name>
              <description>Error In Channel 12</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR13</name>
              <description>Error In Channel 13</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR14</name>
              <description>Error In Channel 14</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR15</name>
              <description>Error In Channel 15</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>An error in this channel has not occurred</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error in this channel has occurred</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HRS</name>
          <description>Hardware Request Status Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HRS0</name>
              <description>Hardware Request Status Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 0 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 0 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS1</name>
              <description>Hardware Request Status Channel 1</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 1 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 1 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS2</name>
              <description>Hardware Request Status Channel 2</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 2 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 2 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS3</name>
              <description>Hardware Request Status Channel 3</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 3 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 3 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS4</name>
              <description>Hardware Request Status Channel 4</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 4 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 4 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS5</name>
              <description>Hardware Request Status Channel 5</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 5 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 5 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS6</name>
              <description>Hardware Request Status Channel 6</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 6 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 6 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS7</name>
              <description>Hardware Request Status Channel 7</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 7 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 7 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS8</name>
              <description>Hardware Request Status Channel 8</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 8 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 8 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS9</name>
              <description>Hardware Request Status Channel 9</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 9 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 9 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS10</name>
              <description>Hardware Request Status Channel 10</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 10 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 10 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS11</name>
              <description>Hardware Request Status Channel 11</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 11 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 11 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS12</name>
              <description>Hardware Request Status Channel 12</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 12 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 12 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS13</name>
              <description>Hardware Request Status Channel 13</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 13 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 13 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS14</name>
              <description>Hardware Request Status Channel 14</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 14 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 14 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRS15</name>
              <description>Hardware Request Status Channel 15</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>A hardware service request for channel 15 is not present</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>A hardware service request for channel 15 is present</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EARS</name>
          <description>Enable Asynchronous Request in Stop Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EDREQ_0</name>
              <description>Enable asynchronous DMA request in stop mode for channel 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 0.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 0.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_1</name>
              <description>Enable asynchronous DMA request in stop mode for channel 1.</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 1</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 1.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_2</name>
              <description>Enable asynchronous DMA request in stop mode for channel 2.</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 2.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 2.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_3</name>
              <description>Enable asynchronous DMA request in stop mode for channel 3.</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 3.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 3.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_4</name>
              <description>Enable asynchronous DMA request in stop mode for channel 4</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 4.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 4.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_5</name>
              <description>Enable asynchronous DMA request in stop mode for channel 5</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 5.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 5.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_6</name>
              <description>Enable asynchronous DMA request in stop mode for channel 6</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 6.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 6.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_7</name>
              <description>Enable asynchronous DMA request in stop mode for channel 7</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 7.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 7.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_8</name>
              <description>Enable asynchronous DMA request in stop mode for channel 8</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 8.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 8.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_9</name>
              <description>Enable asynchronous DMA request in stop mode for channel 9</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 9.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 9.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_10</name>
              <description>Enable asynchronous DMA request in stop mode for channel 10</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 10.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 10.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_11</name>
              <description>Enable asynchronous DMA request in stop mode for channel 11</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 11.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 11.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_12</name>
              <description>Enable asynchronous DMA request in stop mode for channel 12</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 12.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 12.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_13</name>
              <description>Enable asynchronous DMA request in stop mode for channel 13</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 13.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 13.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_14</name>
              <description>Enable asynchronous DMA request in stop mode for channel 14</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 14.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 14.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EDREQ_15</name>
              <description>Enable asynchronous DMA request in stop mode for channel 15</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Disable asynchronous DMA request for channel 15.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Enable asynchronous DMA request for channel 15.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DCHPRI3</name>
          <description>Channel n Priority Register</description>
          <addressOffset>0x100</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0x3</resetValue>
          <resetMask>0xCF</resetMask>
          <fields>
            <field>
              <name>CHPRI</name>
              <description>Channel n Arbitration Priority</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DPA</name>
              <description>Disable Preempt Ability. This field resets to 0.</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n can suspend a lower priority channel.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n cannot suspend any channel, regardless of channel priority.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECP</name>
              <description>Enable Channel Preemption. This field resets to 0.</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n cannot be suspended by a higher priority channel&apos;s service request.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n can be temporarily suspended by the service request of a higher priority channel.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DCHPRI2</name>
          <description>Channel n Priority Register</description>
          <addressOffset>0x101</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xCF</resetMask>
          <fields>
            <field>
              <name>CHPRI</name>
              <description>Channel n Arbitration Priority</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DPA</name>
              <description>Disable Preempt Ability. This field resets to 0.</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n can suspend a lower priority channel.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n cannot suspend any channel, regardless of channel priority.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECP</name>
              <description>Enable Channel Preemption. This field resets to 0.</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n cannot be suspended by a higher priority channel&apos;s service request.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n can be temporarily suspended by the service request of a higher priority channel.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DCHPRI1</name>
          <description>Channel n Priority Register</description>
          <addressOffset>0x102</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xCF</resetMask>
          <fields>
            <field>
              <name>CHPRI</name>
              <description>Channel n Arbitration Priority</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DPA</name>
              <description>Disable Preempt Ability. This field resets to 0.</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n can suspend a lower priority channel.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n cannot suspend any channel, regardless of channel priority.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECP</name>
              <description>Enable Channel Preemption. This field resets to 0.</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n cannot be suspended by a higher priority channel&apos;s service request.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n can be temporarily suspended by the service request of a higher priority channel.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DCHPRI0</name>
          <description>Channel n Priority Register</description>
          <addressOffset>0x103</addressOffset>
          <size>8</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xCF</resetMask>
          <fields>
            <field>
              <name>CHPRI</name>
              <description>Channel n Arbitration Priority</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DPA</name>
              <description>Disable Preempt Ability. This field resets to 0.</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n can suspend a lower priority channel.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n cannot suspend any channel, regardless of channel priority.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECP</name>
              <description>Enable Channel Preemption. This field resets to 0.</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel n cannot be suspended by a higher priority channel&apos;s service request.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel n can be temporarily suspended by the service request of a higher priority channel.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_SADDR</name>
          <description>TCD Source Address</description>
          <addressOffset>0x1000</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SADDR</name>
              <description>Source Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_SOFF</name>
          <description>TCD Signed Source Address Offset</description>
          <addressOffset>0x1004</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SOFF</name>
              <description>Source address signed offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_ATTR</name>
          <description>TCD Transfer Attributes</description>
          <addressOffset>0x1006</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DSIZE</name>
              <description>Destination data transfer size</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMOD</name>
              <description>Destination Address Modulo</description>
              <bitOffset>3</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSIZE</name>
              <description>Source data transfer size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8-bit</description>
                  <value>#000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16-bit</description>
                  <value>#001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>32-bit</description>
                  <value>#010</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMOD</name>
              <description>Source Address Modulo</description>
              <bitOffset>11</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Source address modulo feature is disabled</description>
                  <value>#00000</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_NBYTES_MLNO</name>
          <description>TCD Minor Byte Count (Minor Loop Mapping Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1008</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_NBYTES_MLOFFNO</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1008</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_NBYTES_MLOFFYES</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1008</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MLOFF</name>
              <description>If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes.</description>
              <bitOffset>10</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_SLAST</name>
          <description>TCD Last Source Address Adjustment</description>
          <addressOffset>0x100C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SLAST</name>
              <description>Last Source Address Adjustment</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_DADDR</name>
          <description>TCD Destination Address</description>
          <addressOffset>0x1010</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DADDR</name>
              <description>Destination Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_DOFF</name>
          <description>TCD Signed Destination Address Offset</description>
          <addressOffset>0x1014</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DOFF</name>
              <description>Destination Address Signed Offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_CITER_ELINKNO</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1016</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_CITER_ELINKYES</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1016</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER_LE</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Minor Loop Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_DLASTSGA</name>
          <description>TCD Last Destination Address Adjustment/Scatter Gather Address</description>
          <addressOffset>0x1018</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DLASTSGA</name>
              <description>DLASTSGA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_CSR</name>
          <description>TCD Control and Status</description>
          <addressOffset>0x101C</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Channel Start</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel is not explicitly started.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel is explicitly started via a software initiated service request.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTMAJOR</name>
              <description>Enable an interrupt when major iteration count completes.</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The end-of-major loop interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The end-of-major loop interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTHALF</name>
              <description>Enable an interrupt when major counter is half complete.</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The half-point interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The half-point interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DREQ</name>
              <description>Disable Request</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ESG</name>
              <description>Enable Scatter/Gather Processing</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The current channel&apos;s TCD is normal format.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The current channel&apos;s TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAJORELINK</name>
              <description>Enable channel-to-channel linking on major loop complete</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACTIVE</name>
              <description>Channel Active</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DONE</name>
              <description>Channel Done</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MAJORLINKCH</name>
              <description>Major Loop Link Channel Number</description>
              <bitOffset>8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BWC</name>
              <description>Bandwidth Control</description>
              <bitOffset>14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No eDMA engine stalls.</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>eDMA engine stalls for 4 cycles after each R/W.</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>eDMA engine stalls for 8 cycles after each R/W.</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_BITER_ELINKNO</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x101E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD0_BITER_ELINKYES</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x101E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting major iteration count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_SADDR</name>
          <description>TCD Source Address</description>
          <addressOffset>0x1020</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SADDR</name>
              <description>Source Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_SOFF</name>
          <description>TCD Signed Source Address Offset</description>
          <addressOffset>0x1024</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SOFF</name>
              <description>Source address signed offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_ATTR</name>
          <description>TCD Transfer Attributes</description>
          <addressOffset>0x1026</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DSIZE</name>
              <description>Destination data transfer size</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMOD</name>
              <description>Destination Address Modulo</description>
              <bitOffset>3</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSIZE</name>
              <description>Source data transfer size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8-bit</description>
                  <value>#000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16-bit</description>
                  <value>#001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>32-bit</description>
                  <value>#010</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMOD</name>
              <description>Source Address Modulo</description>
              <bitOffset>11</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Source address modulo feature is disabled</description>
                  <value>#00000</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_NBYTES_MLNO</name>
          <description>TCD Minor Byte Count (Minor Loop Mapping Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1028</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_NBYTES_MLOFFNO</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1028</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_NBYTES_MLOFFYES</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1028</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MLOFF</name>
              <description>If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes.</description>
              <bitOffset>10</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_SLAST</name>
          <description>TCD Last Source Address Adjustment</description>
          <addressOffset>0x102C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SLAST</name>
              <description>Last Source Address Adjustment</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_DADDR</name>
          <description>TCD Destination Address</description>
          <addressOffset>0x1030</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DADDR</name>
              <description>Destination Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_DOFF</name>
          <description>TCD Signed Destination Address Offset</description>
          <addressOffset>0x1034</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DOFF</name>
              <description>Destination Address Signed Offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_CITER_ELINKNO</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1036</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_CITER_ELINKYES</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1036</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER_LE</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Minor Loop Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_DLASTSGA</name>
          <description>TCD Last Destination Address Adjustment/Scatter Gather Address</description>
          <addressOffset>0x1038</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DLASTSGA</name>
              <description>DLASTSGA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_CSR</name>
          <description>TCD Control and Status</description>
          <addressOffset>0x103C</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Channel Start</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel is not explicitly started.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel is explicitly started via a software initiated service request.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTMAJOR</name>
              <description>Enable an interrupt when major iteration count completes.</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The end-of-major loop interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The end-of-major loop interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTHALF</name>
              <description>Enable an interrupt when major counter is half complete.</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The half-point interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The half-point interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DREQ</name>
              <description>Disable Request</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ESG</name>
              <description>Enable Scatter/Gather Processing</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The current channel&apos;s TCD is normal format.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The current channel&apos;s TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAJORELINK</name>
              <description>Enable channel-to-channel linking on major loop complete</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACTIVE</name>
              <description>Channel Active</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DONE</name>
              <description>Channel Done</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MAJORLINKCH</name>
              <description>Major Loop Link Channel Number</description>
              <bitOffset>8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BWC</name>
              <description>Bandwidth Control</description>
              <bitOffset>14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No eDMA engine stalls.</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>eDMA engine stalls for 4 cycles after each R/W.</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>eDMA engine stalls for 8 cycles after each R/W.</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_BITER_ELINKNO</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x103E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD1_BITER_ELINKYES</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x103E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting major iteration count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_SADDR</name>
          <description>TCD Source Address</description>
          <addressOffset>0x1040</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SADDR</name>
              <description>Source Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_SOFF</name>
          <description>TCD Signed Source Address Offset</description>
          <addressOffset>0x1044</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SOFF</name>
              <description>Source address signed offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_ATTR</name>
          <description>TCD Transfer Attributes</description>
          <addressOffset>0x1046</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DSIZE</name>
              <description>Destination data transfer size</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMOD</name>
              <description>Destination Address Modulo</description>
              <bitOffset>3</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSIZE</name>
              <description>Source data transfer size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8-bit</description>
                  <value>#000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16-bit</description>
                  <value>#001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>32-bit</description>
                  <value>#010</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMOD</name>
              <description>Source Address Modulo</description>
              <bitOffset>11</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Source address modulo feature is disabled</description>
                  <value>#00000</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_NBYTES_MLNO</name>
          <description>TCD Minor Byte Count (Minor Loop Mapping Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1048</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_NBYTES_MLOFFNO</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1048</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_NBYTES_MLOFFYES</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1048</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MLOFF</name>
              <description>If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes.</description>
              <bitOffset>10</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_SLAST</name>
          <description>TCD Last Source Address Adjustment</description>
          <addressOffset>0x104C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SLAST</name>
              <description>Last Source Address Adjustment</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_DADDR</name>
          <description>TCD Destination Address</description>
          <addressOffset>0x1050</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DADDR</name>
              <description>Destination Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_DOFF</name>
          <description>TCD Signed Destination Address Offset</description>
          <addressOffset>0x1054</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DOFF</name>
              <description>Destination Address Signed Offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_CITER_ELINKNO</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1056</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_CITER_ELINKYES</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1056</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER_LE</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Minor Loop Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_DLASTSGA</name>
          <description>TCD Last Destination Address Adjustment/Scatter Gather Address</description>
          <addressOffset>0x1058</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DLASTSGA</name>
              <description>DLASTSGA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_CSR</name>
          <description>TCD Control and Status</description>
          <addressOffset>0x105C</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Channel Start</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel is not explicitly started.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel is explicitly started via a software initiated service request.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTMAJOR</name>
              <description>Enable an interrupt when major iteration count completes.</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The end-of-major loop interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The end-of-major loop interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTHALF</name>
              <description>Enable an interrupt when major counter is half complete.</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The half-point interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The half-point interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DREQ</name>
              <description>Disable Request</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ESG</name>
              <description>Enable Scatter/Gather Processing</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The current channel&apos;s TCD is normal format.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The current channel&apos;s TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAJORELINK</name>
              <description>Enable channel-to-channel linking on major loop complete</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACTIVE</name>
              <description>Channel Active</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DONE</name>
              <description>Channel Done</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MAJORLINKCH</name>
              <description>Major Loop Link Channel Number</description>
              <bitOffset>8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BWC</name>
              <description>Bandwidth Control</description>
              <bitOffset>14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No eDMA engine stalls.</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>eDMA engine stalls for 4 cycles after each R/W.</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>eDMA engine stalls for 8 cycles after each R/W.</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_BITER_ELINKNO</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x105E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD2_BITER_ELINKYES</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x105E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting major iteration count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_SADDR</name>
          <description>TCD Source Address</description>
          <addressOffset>0x1060</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SADDR</name>
              <description>Source Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_SOFF</name>
          <description>TCD Signed Source Address Offset</description>
          <addressOffset>0x1064</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SOFF</name>
              <description>Source address signed offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_ATTR</name>
          <description>TCD Transfer Attributes</description>
          <addressOffset>0x1066</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DSIZE</name>
              <description>Destination data transfer size</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMOD</name>
              <description>Destination Address Modulo</description>
              <bitOffset>3</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSIZE</name>
              <description>Source data transfer size</description>
              <bitOffset>8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8-bit</description>
                  <value>#000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16-bit</description>
                  <value>#001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>32-bit</description>
                  <value>#010</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMOD</name>
              <description>Source Address Modulo</description>
              <bitOffset>11</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Source address modulo feature is disabled</description>
                  <value>#00000</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_NBYTES_MLNO</name>
          <description>TCD Minor Byte Count (Minor Loop Mapping Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1068</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_NBYTES_MLOFFNO</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1068</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_NBYTES_MLOFFYES</name>
          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1068</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>NBYTES</name>
              <description>Minor Byte Transfer Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MLOFF</name>
              <description>If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes.</description>
              <bitOffset>10</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMLOE</name>
              <description>Destination Minor Loop Offset enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the DADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the DADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMLOE</name>
              <description>Source Minor Loop Offset Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The minor loop offset is not applied to the SADDR</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The minor loop offset is applied to the SADDR</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_SLAST</name>
          <description>TCD Last Source Address Adjustment</description>
          <addressOffset>0x106C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>SLAST</name>
              <description>Last Source Address Adjustment</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_DADDR</name>
          <description>TCD Destination Address</description>
          <addressOffset>0x1070</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DADDR</name>
              <description>Destination Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_DOFF</name>
          <description>TCD Signed Destination Address Offset</description>
          <addressOffset>0x1074</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DOFF</name>
              <description>Destination Address Signed Offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_CITER_ELINKNO</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1076</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_CITER_ELINKYES</name>
          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x1076</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>CITER_LE</name>
              <description>Current Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Minor Loop Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enable channel-to-channel linking on minor-loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_DLASTSGA</name>
          <description>TCD Last Destination Address Adjustment/Scatter Gather Address</description>
          <addressOffset>0x1078</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>DLASTSGA</name>
              <description>DLASTSGA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_CSR</name>
          <description>TCD Control and Status</description>
          <addressOffset>0x107C</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Channel Start</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel is not explicitly started.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel is explicitly started via a software initiated service request.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTMAJOR</name>
              <description>Enable an interrupt when major iteration count completes.</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The end-of-major loop interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The end-of-major loop interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTHALF</name>
              <description>Enable an interrupt when major counter is half complete.</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The half-point interrupt is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The half-point interrupt is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DREQ</name>
              <description>Disable Request</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ESG</name>
              <description>Enable Scatter/Gather Processing</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The current channel&apos;s TCD is normal format.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The current channel&apos;s TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAJORELINK</name>
              <description>Enable channel-to-channel linking on major loop complete</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACTIVE</name>
              <description>Channel Active</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DONE</name>
              <description>Channel Done</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MAJORLINKCH</name>
              <description>Major Loop Link Channel Number</description>
              <bitOffset>8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BWC</name>
              <description>Bandwidth Control</description>
              <bitOffset>14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No eDMA engine stalls.</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>eDMA engine stalls for 4 cycles after each R/W.</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>eDMA engine stalls for 8 cycles after each R/W.</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_BITER_ELINKNO</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x107E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting Major Iteration Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCD3_BITER_ELINKYES</name>
          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
          <alternateGroup>DMA</alternateGroup>
          <addressOffset>0x107E</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0</resetMask>
          <fields>
            <field>
              <name>BITER</name>
              <description>Starting major iteration count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LINKCH</name>
              <description>Link Channel Number</description>
              <bitOffset>9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ELINK</name>
              <description>Enables channel-to-channel linking on minor loop complete</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>The channel-to-channel linking is disabled</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>The channel-to-channel linking is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>MPU</name>
      <description>Memory protection unit</description>
      <prependToName>MPU_</prependToName>
      <baseAddress>0x4000D000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x820</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>CESR</name>
          <description>Control/Error Status Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x814001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>MPU is disabled. All accesses from all bus masters are allowed.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>MPU is enabled</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NRGD</name>
              <description>Number Of Region Descriptors</description>
              <bitOffset>8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0000</name>
                  <description>8 region descriptors</description>
                  <value>#0000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0001</name>
                  <description>12 region descriptors</description>
                  <value>#0001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>0010</name>
                  <description>16 region descriptors</description>
                  <value>#0010</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NSP</name>
              <description>Number Of Slave Ports</description>
              <bitOffset>12</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HRL</name>
              <description>Hardware Revision Level</description>
              <bitOffset>16</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SPERR1</name>
              <description>Slave Port 1 Error</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No error has occurred for slave port 1.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error has occurred for slave port 1.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPERR0</name>
              <description>Slave Port 0 Error</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>No error has occurred for slave port 0.</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>An error has occurred for slave port 0.</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EAR0</name>
          <description>Error Address Register, slave port 0</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EADDR</name>
              <description>Error Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>EDR0</name>
          <description>Error Detail Register, slave port 0</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERW</name>
              <description>Error Read/Write</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Read</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Write</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EATTR</name>
              <description>Error Attributes</description>
              <bitOffset>1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>000</name>
                  <description>User mode, instruction access</description>
                  <value>#000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>001</name>
                  <description>User mode, data access</description>
                  <value>#001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>010</name>
                  <description>Supervisor mode, instruction access</description>
                  <value>#010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>011</name>
                  <description>Supervisor mode, data access</description>
                  <value>#011</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EMN</name>
              <description>Error Master Number</description>
              <bitOffset>4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EPID</name>
              <description>Error Process Identification</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EACD</name>
              <description>Error Access Control Detail</description>
              <bitOffset>16</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>EAR1</name>
          <description>Error Address Register, slave port 1</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EADDR</name>
              <description>Error Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>EDR1</name>
          <description>Error Detail Register, slave port 1</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERW</name>
              <description>Error Read/Write</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Read</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Write</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EATTR</name>
              <description>Error Attributes</description>
              <bitOffset>1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>000</name>
                  <description>User mode, instruction access</description>
                  <value>#000</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>001</name>
                  <description>User mode, data access</description>
                  <value>#001</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>010</name>
                  <description>Supervisor mode, instruction access</description>
                  <value>#010</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>011</name>
                  <description>Supervisor mode, data access</description>
                  <value>#011</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EMN</name>
              <description>Error Master Number</description>
              <bitOffset>4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EPID</name>
              <description>Error Process Identification</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EACD</name>
              <description>Error Access Control Detail</description>
              <bitOffset>16</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD0_WORD0</name>
          <description>Region Descriptor 0, Word 0</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD0_WORD1</name>
          <description>Region Descriptor 0, Word 1</description>
          <addressOffset>0x404</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD0_WORD2</name>
          <description>Region Descriptor 0, Word 2</description>
          <addressOffset>0x408</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x61F7DF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD0_WORD3</name>
          <description>Region Descriptor 0, Word 3</description>
          <addressOffset>0x40C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD1_WORD0</name>
          <description>Region Descriptor 1, Word 0</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD1_WORD1</name>
          <description>Region Descriptor 1, Word 1</description>
          <addressOffset>0x414</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD1_WORD2</name>
          <description>Region Descriptor 1, Word 2</description>
          <addressOffset>0x418</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD1_WORD3</name>
          <description>Region Descriptor 1, Word 3</description>
          <addressOffset>0x41C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD2_WORD0</name>
          <description>Region Descriptor 2, Word 0</description>
          <addressOffset>0x420</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD2_WORD1</name>
          <description>Region Descriptor 2, Word 1</description>
          <addressOffset>0x424</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD2_WORD2</name>
          <description>Region Descriptor 2, Word 2</description>
          <addressOffset>0x428</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD2_WORD3</name>
          <description>Region Descriptor 2, Word 3</description>
          <addressOffset>0x42C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD3_WORD0</name>
          <description>Region Descriptor 3, Word 0</description>
          <addressOffset>0x430</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD3_WORD1</name>
          <description>Region Descriptor 3, Word 1</description>
          <addressOffset>0x434</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD3_WORD2</name>
          <description>Region Descriptor 3, Word 2</description>
          <addressOffset>0x438</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD3_WORD3</name>
          <description>Region Descriptor 3, Word 3</description>
          <addressOffset>0x43C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD4_WORD0</name>
          <description>Region Descriptor 4, Word 0</description>
          <addressOffset>0x440</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD4_WORD1</name>
          <description>Region Descriptor 4, Word 1</description>
          <addressOffset>0x444</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD4_WORD2</name>
          <description>Region Descriptor 4, Word 2</description>
          <addressOffset>0x448</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD4_WORD3</name>
          <description>Region Descriptor 4, Word 3</description>
          <addressOffset>0x44C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD5_WORD0</name>
          <description>Region Descriptor 5, Word 0</description>
          <addressOffset>0x450</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD5_WORD1</name>
          <description>Region Descriptor 5, Word 1</description>
          <addressOffset>0x454</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD5_WORD2</name>
          <description>Region Descriptor 5, Word 2</description>
          <addressOffset>0x458</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD5_WORD3</name>
          <description>Region Descriptor 5, Word 3</description>
          <addressOffset>0x45C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD6_WORD0</name>
          <description>Region Descriptor 6, Word 0</description>
          <addressOffset>0x460</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD6_WORD1</name>
          <description>Region Descriptor 6, Word 1</description>
          <addressOffset>0x464</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD6_WORD2</name>
          <description>Region Descriptor 6, Word 2</description>
          <addressOffset>0x468</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD6_WORD3</name>
          <description>Region Descriptor 6, Word 3</description>
          <addressOffset>0x46C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD7_WORD0</name>
          <description>Region Descriptor 7, Word 0</description>
          <addressOffset>0x470</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRTADDR</name>
              <description>Start Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD7_WORD1</name>
          <description>Region Descriptor 7, Word 1</description>
          <addressOffset>0x474</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDADDR</name>
              <description>End Address</description>
              <bitOffset>5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD7_WORD2</name>
          <description>Region Descriptor 7, Word 2</description>
          <addressOffset>0x478</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGD7_WORD3</name>
          <description>Region Descriptor 7, Word 3</description>
          <addressOffset>0x47C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD</name>
              <description>Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Region descriptor is invalid</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Region descriptor is valid</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIDMASK</name>
              <description>Process Identifier Mask</description>
              <bitOffset>16</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PID</name>
              <description>Process Identifier</description>
              <bitOffset>24</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RGDAAC0</name>
          <description>Region Descriptor Alternate Access Control 0</description>
          <addressOffset>0x800</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x61F7DF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier Enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access Control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGDAAC1</name>
          <description>Region Descriptor Alternate Access Control 1</description>
          <addressOffset>0x804</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier Enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access Control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGDAAC2</name>
          <description>Region Descriptor Alternate Access Control 2</description>
          <addressOffset>0x808</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier Enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access Control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGDAAC3</name>
          <description>Region Descriptor Alternate Access Control 3</description>
          <addressOffset>0x80C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier Enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access Control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGDAAC4</name>
          <description>Region Descriptor Alternate Access Control 4</description>
          <addressOffset>0x810</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier Enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access Control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M3SM</name>
              <description>Bus Master 3 Supervisor Mode Access Control</description>
              <bitOffset>21</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M3UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4WE</name>
              <description>Bus Master 4 Write Enable</description>
              <bitOffset>24</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M4RE</name>
              <description>Bus Master 4 Read Enable</description>
              <bitOffset>25</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 4 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5WE</name>
              <description>Bus Master 5 Write Enable</description>
              <bitOffset>26</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M5RE</name>
              <description>Bus Master 5 Read Enable</description>
              <bitOffset>27</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 5 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6WE</name>
              <description>Bus Master 6 Write Enable</description>
              <bitOffset>28</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M6RE</name>
              <description>Bus Master 6 Read Enable</description>
              <bitOffset>29</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 6 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7WE</name>
              <description>Bus Master 7 Write Enable</description>
              <bitOffset>30</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 writes allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M7RE</name>
              <description>Bus Master 7 Read Enable</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Bus master 7 reads allowed</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RGDAAC5</name>
          <description>Region Descriptor Alternate Access Control 5</description>
          <addressOffset>0x814</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>M0UM</name>
              <description>Bus Master 0 User Mode Access Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M0SM</name>
              <description>Bus Master 0 Supervisor Mode Access Control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M0UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M0PE</name>
              <description>Bus Master 0 Process Identifier Enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Do not include the process identifier in the evaluation</description>
                  <value>#0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
                  <value>#1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M1UM</name>
              <description>Bus Master 1 User Mode Access Control</description>
              <bitOffset>6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M1SM</name>
              <description>Bus Master 1 Supervisor Mode Access Control</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M1UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M2UM</name>
              <description>Bus Master 2 User Mode Access Control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2SM</name>
              <description>Bus Master 2 Supervisor Mode Access Control</description>
              <bitOffset>15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>00</name>
                  <description>r/w/x; read, write and execute allowed</description>
                  <value>#00</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>01</name>
                  <description>r/x; read and execute allowed, but no write</description>
                  <value>#01</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>10</name>
                  <description>r/w; read and write allowed, but no execute</description>
                  <value>#10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>11</name>
                  <description>Same as User mode defined in M2UM</description>
                  <value>#11</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>M3UM</name>
              <description>Bus Master 3 User Mode Access Control</description>
              <bitOffset>18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>