From bcaa0438b9096a36582bd2cf8abfabc1293f2794 Mon Sep 17 00:00:00 2001 From: Kjetil Kjeka Date: Sat, 8 Jul 2017 16:09:24 +0200 Subject: [PATCH] Generated with svd2rust 0.11.0, some basic features is moved out of cortex-m into bare-metal --- Cargo.toml | 3 +- src/lib.rs | 2783 ++++++++++++++++++++++++++-------------------------- 2 files changed, 1402 insertions(+), 1384 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index b5bfd6f..c5efb7b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -12,5 +12,6 @@ cateogries = ["embedded"] license = "Apache-2.0/MIT" [dependencies] -cortex-m = "0.2.10" +cortex-m = "0.3.0" +bare-metal = "0.1.0" vcell = "0.1.0" diff --git a/src/lib.rs b/src/lib.rs index c9586ec..b440661 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,1380 +1,1202 @@ -# ! [ doc = "Peripheral access API for S32K144 microcontrollers (generated using svd2rust v0.10.0)\n\nYou can find an overview of the API [here].\n\n[here]: https://docs.rs/svd2rust/0.10.0/svd2rust/#peripheral-api" ] # ! [ deny ( missing_docs ) ] # ! [ allow ( non_camel_case_types ) ] # ! [ feature ( const_fn ) ] # ! [ feature ( optin_builtin_traits ) ] # ! [ no_std ]extern crate cortex_m ; +# ! [ cfg_attr ( feature = "rt" , feature ( asm ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( core_intrinsics ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( linkage ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( macro_reexport ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( naked_functions ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( used ) ) ] # ! [ doc = "Peripheral access API for S32K144 microcontrollers (generated using svd2rust v0.11.1)\n\nYou can find an overview of the API [here].\n\n[here]: https://docs.rs/svd2rust/0.11.1/svd2rust/#peripheral-api" ] # ! [ deny ( missing_docs ) ] # ! [ allow ( non_camel_case_types ) ] # ! [ feature ( const_fn ) ] # ! [ no_std ]extern crate cortex_m ; +# [ macro_reexport ( default_handler , exception ) ] +# [ cfg ( feature = "rt" ) ] +extern crate cortex_m_rt ; +extern crate bare_metal ; extern crate vcell ; use core::ops::Deref; -use cortex_m::peripheral::Peripheral; -# [ doc = r" Interrupts" ] +use bare_metal::Peripheral; +# [ doc = r" Number available in the NVIC for configuring priority" ] +pub const NVIC_PRIO_BITS: u8 = 4; +pub use interrupt::Interrupt; +# [ doc ( hidden ) ] pub mod interrupt { - use cortex_m::ctxt::Context; - use cortex_m::exception; - use cortex_m::interrupt::Nr; - # [ doc = "0 - DMA0" ] - pub struct DMA0 { - _0: (), - } - unsafe impl Context for DMA0 {} - unsafe impl Nr for DMA0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 0 - } - } - impl !Send for DMA0 {} - # [ doc = "1 - DMA1" ] - pub struct DMA1 { - _0: (), - } - unsafe impl Context for DMA1 {} - unsafe impl Nr for DMA1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 1 - } - } - impl !Send for DMA1 {} - # [ doc = "2 - DMA2" ] - pub struct DMA2 { - _0: (), - } - unsafe impl Context for DMA2 {} - unsafe impl Nr for DMA2 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 2 - } - } - impl !Send for DMA2 {} - # [ doc = "3 - DMA3" ] - pub struct DMA3 { - _0: (), - } - unsafe impl Context for DMA3 {} - unsafe impl Nr for DMA3 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 3 - } - } - impl !Send for DMA3 {} - # [ doc = "4 - DMA4" ] - pub struct DMA4 { - _0: (), - } - unsafe impl Context for DMA4 {} - unsafe impl Nr for DMA4 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 4 - } - } - impl !Send for DMA4 {} - # [ doc = "5 - DMA5" ] - pub struct DMA5 { - _0: (), - } - unsafe impl Context for DMA5 {} - unsafe impl Nr for DMA5 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 5 - } - } - impl !Send for DMA5 {} - # [ doc = "6 - DMA6" ] - pub struct DMA6 { - _0: (), - } - unsafe impl Context for DMA6 {} - unsafe impl Nr for DMA6 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 6 - } - } - impl !Send for DMA6 {} - # [ doc = "7 - DMA7" ] - pub struct DMA7 { - _0: (), - } - unsafe impl Context for DMA7 {} - unsafe impl Nr for DMA7 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 7 - } - } - impl !Send for DMA7 {} - # [ doc = "8 - DMA8" ] - pub struct DMA8 { - _0: (), - } - unsafe impl Context for DMA8 {} - unsafe impl Nr for DMA8 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 8 - } - } - impl !Send for DMA8 {} - # [ doc = "9 - DMA9" ] - pub struct DMA9 { - _0: (), - } - unsafe impl Context for DMA9 {} - unsafe impl Nr for DMA9 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 9 - } - } - impl !Send for DMA9 {} - # [ doc = "10 - DMA10" ] - pub struct DMA10 { - _0: (), - } - unsafe impl Context for DMA10 {} - unsafe impl Nr for DMA10 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 10 - } - } - impl !Send for DMA10 {} - # [ doc = "11 - DMA11" ] - pub struct DMA11 { - _0: (), - } - unsafe impl Context for DMA11 {} - unsafe impl Nr for DMA11 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 11 - } - } - impl !Send for DMA11 {} - # [ doc = "12 - DMA12" ] - pub struct DMA12 { - _0: (), - } - unsafe impl Context for DMA12 {} - unsafe impl Nr for DMA12 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 12 - } - } - impl !Send for DMA12 {} - # [ doc = "13 - DMA13" ] - pub struct DMA13 { - _0: (), - } - unsafe impl Context for DMA13 {} - unsafe impl Nr for DMA13 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 13 - } - } - impl !Send for DMA13 {} - # [ doc = "14 - DMA14" ] - pub struct DMA14 { - _0: (), - } - unsafe impl Context for DMA14 {} - unsafe impl Nr for DMA14 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 14 - } - } - impl !Send for DMA14 {} - # [ doc = "15 - DMA15" ] - pub struct DMA15 { - _0: (), - } - unsafe impl Context for DMA15 {} - unsafe impl Nr for DMA15 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 15 - } - } - impl !Send for DMA15 {} - # [ doc = "16 - DMA_Error" ] - pub struct DMA_ERROR { - _0: (), - } - unsafe impl Context for DMA_ERROR {} - unsafe impl Nr for DMA_ERROR { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 16 - } - } - impl !Send for DMA_ERROR {} - # [ doc = "17 - MCM" ] - pub struct MCM { - _0: (), - } - unsafe impl Context for MCM {} - unsafe impl Nr for MCM { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 17 - } - } - impl !Send for MCM {} - # [ doc = "18 - FTFC" ] - pub struct FTFC { - _0: (), - } - unsafe impl Context for FTFC {} - unsafe impl Nr for FTFC { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 18 - } - } - impl !Send for FTFC {} - # [ doc = "19 - Read_Collision" ] - pub struct READ_COLLISION { - _0: (), - } - unsafe impl Context for READ_COLLISION {} - unsafe impl Nr for READ_COLLISION { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 19 - } - } - impl !Send for READ_COLLISION {} - # [ doc = "20 - LVD_LVW" ] - pub struct LVD_LVW { - _0: (), - } - unsafe impl Context for LVD_LVW {} - unsafe impl Nr for LVD_LVW { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 20 - } - } - impl !Send for LVD_LVW {} - # [ doc = "21 - FTFC_Fault" ] - pub struct FTFC_FAULT { - _0: (), - } - unsafe impl Context for FTFC_FAULT {} - unsafe impl Nr for FTFC_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 21 - } - } - impl !Send for FTFC_FAULT {} - # [ doc = "22 - WDOG_EWM" ] - pub struct WDOG_EWM { - _0: (), - } - unsafe impl Context for WDOG_EWM {} - unsafe impl Nr for WDOG_EWM { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 22 - } - } - impl !Send for WDOG_EWM {} - # [ doc = "23 - RCM" ] - pub struct RCM { - _0: (), - } - unsafe impl Context for RCM {} - unsafe impl Nr for RCM { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 23 - } - } - impl !Send for RCM {} - # [ doc = "24 - LPI2C0_Master" ] - pub struct LPI2C0_MASTER { - _0: (), - } - unsafe impl Context for LPI2C0_MASTER {} - unsafe impl Nr for LPI2C0_MASTER { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 24 - } - } - impl !Send for LPI2C0_MASTER {} - # [ doc = "25 - LPI2C0_Slave" ] - pub struct LPI2C0_SLAVE { - _0: (), - } - unsafe impl Context for LPI2C0_SLAVE {} - unsafe impl Nr for LPI2C0_SLAVE { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 25 - } - } - impl !Send for LPI2C0_SLAVE {} - # [ doc = "26 - LPSPI0" ] - pub struct LPSPI0 { - _0: (), - } - unsafe impl Context for LPSPI0 {} - unsafe impl Nr for LPSPI0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 26 - } - } - impl !Send for LPSPI0 {} - # [ doc = "27 - LPSPI1" ] - pub struct LPSPI1 { - _0: (), - } - unsafe impl Context for LPSPI1 {} - unsafe impl Nr for LPSPI1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 27 - } - } - impl !Send for LPSPI1 {} - # [ doc = "28 - LPSPI2" ] - pub struct LPSPI2 { - _0: (), - } - unsafe impl Context for LPSPI2 {} - unsafe impl Nr for LPSPI2 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 28 - } - } - impl !Send for LPSPI2 {} - # [ doc = "31 - LPUART0_RxTx" ] - pub struct LPUART0_RXTX { - _0: (), - } - unsafe impl Context for LPUART0_RXTX {} - unsafe impl Nr for LPUART0_RXTX { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 31 - } - } - impl !Send for LPUART0_RXTX {} - # [ doc = "33 - LPUART1_RxTx" ] - pub struct LPUART1_RXTX { - _0: (), - } - unsafe impl Context for LPUART1_RXTX {} - unsafe impl Nr for LPUART1_RXTX { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 33 - } - } - impl !Send for LPUART1_RXTX {} - # [ doc = "35 - LPUART2_RxTx" ] - pub struct LPUART2_RXTX { - _0: (), - } - unsafe impl Context for LPUART2_RXTX {} - unsafe impl Nr for LPUART2_RXTX { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 35 - } - } - impl !Send for LPUART2_RXTX {} - # [ doc = "39 - ADC0" ] - pub struct ADC0 { - _0: (), - } - unsafe impl Context for ADC0 {} - unsafe impl Nr for ADC0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 39 - } - } - impl !Send for ADC0 {} - # [ doc = "40 - ADC1" ] - pub struct ADC1 { - _0: (), - } - unsafe impl Context for ADC1 {} - unsafe impl Nr for ADC1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 40 - } - } - impl !Send for ADC1 {} - # [ doc = "41 - CMP0" ] - pub struct CMP0 { - _0: (), - } - unsafe impl Context for CMP0 {} - unsafe impl Nr for CMP0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 41 - } - } - impl !Send for CMP0 {} - # [ doc = "44 - ERM_single_fault" ] - pub struct ERM_SINGLE_FAULT { - _0: (), - } - unsafe impl Context for ERM_SINGLE_FAULT {} - unsafe impl Nr for ERM_SINGLE_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 44 - } - } - impl !Send for ERM_SINGLE_FAULT {} - # [ doc = "45 - ERM_double_fault" ] - pub struct ERM_DOUBLE_FAULT { - _0: (), - } - unsafe impl Context for ERM_DOUBLE_FAULT {} - unsafe impl Nr for ERM_DOUBLE_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 45 - } - } - impl !Send for ERM_DOUBLE_FAULT {} - # [ doc = "46 - RTC" ] - pub struct RTC { - _0: (), - } - unsafe impl Context for RTC {} - unsafe impl Nr for RTC { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 46 - } - } - impl !Send for RTC {} - # [ doc = "47 - RTC_Seconds" ] - pub struct RTC_SECONDS { - _0: (), - } - unsafe impl Context for RTC_SECONDS {} - unsafe impl Nr for RTC_SECONDS { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 47 - } - } - impl !Send for RTC_SECONDS {} - # [ doc = "48 - LPIT0_Ch0" ] - pub struct LPIT0_CH0 { - _0: (), - } - unsafe impl Context for LPIT0_CH0 {} - unsafe impl Nr for LPIT0_CH0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 48 - } - } - impl !Send for LPIT0_CH0 {} - # [ doc = "49 - LPIT0_Ch1" ] - pub struct LPIT0_CH1 { - _0: (), - } - unsafe impl Context for LPIT0_CH1 {} - unsafe impl Nr for LPIT0_CH1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 49 - } - } - impl !Send for LPIT0_CH1 {} - # [ doc = "50 - LPIT0_Ch2" ] - pub struct LPIT0_CH2 { - _0: (), - } - unsafe impl Context for LPIT0_CH2 {} - unsafe impl Nr for LPIT0_CH2 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 50 - } - } - impl !Send for LPIT0_CH2 {} - # [ doc = "51 - LPIT0_Ch3" ] - pub struct LPIT0_CH3 { - _0: (), - } - unsafe impl Context for LPIT0_CH3 {} - unsafe impl Nr for LPIT0_CH3 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 51 - } - } - impl !Send for LPIT0_CH3 {} - # [ doc = "52 - PDB0" ] - pub struct PDB0 { - _0: (), - } - unsafe impl Context for PDB0 {} - unsafe impl Nr for PDB0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 52 - } - } - impl !Send for PDB0 {} - # [ doc = "57 - SCG" ] - pub struct SCG { - _0: (), - } - unsafe impl Context for SCG {} - unsafe impl Nr for SCG { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 57 - } - } - impl !Send for SCG {} - # [ doc = "58 - LPTMR0" ] - pub struct LPTMR0 { - _0: (), - } - unsafe impl Context for LPTMR0 {} - unsafe impl Nr for LPTMR0 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 58 - } - } - impl !Send for LPTMR0 {} - # [ doc = "59 - PORTA" ] - pub struct PORTA { - _0: (), - } - unsafe impl Context for PORTA {} - unsafe impl Nr for PORTA { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 59 - } - } - impl !Send for PORTA {} - # [ doc = "60 - PORTB" ] - pub struct PORTB { - _0: (), - } - unsafe impl Context for PORTB {} - unsafe impl Nr for PORTB { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 60 - } - } - impl !Send for PORTB {} - # [ doc = "61 - PORTC" ] - pub struct PORTC { - _0: (), - } - unsafe impl Context for PORTC {} - unsafe impl Nr for PORTC { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 61 - } - } - impl !Send for PORTC {} - # [ doc = "62 - PORTD" ] - pub struct PORTD { - _0: (), - } - unsafe impl Context for PORTD {} - unsafe impl Nr for PORTD { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 62 - } - } - impl !Send for PORTD {} - # [ doc = "63 - PORTE" ] - pub struct PORTE { - _0: (), - } - unsafe impl Context for PORTE {} - unsafe impl Nr for PORTE { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 63 - } - } - impl !Send for PORTE {} - # [ doc = "68 - PDB1" ] - pub struct PDB1 { - _0: (), - } - unsafe impl Context for PDB1 {} - unsafe impl Nr for PDB1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 68 - } - } - impl !Send for PDB1 {} - # [ doc = "69 - FLEXIO" ] - pub struct FLEXIO { - _0: (), - } - unsafe impl Context for FLEXIO {} - unsafe impl Nr for FLEXIO { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 69 - } - } - impl !Send for FLEXIO {} - # [ doc = "78 - CAN0_ORed" ] - pub struct CAN0_ORED { - _0: (), - } - unsafe impl Context for CAN0_ORED {} - unsafe impl Nr for CAN0_ORED { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 78 - } - } - impl !Send for CAN0_ORED {} - # [ doc = "79 - CAN0_Error" ] - pub struct CAN0_ERROR { - _0: (), - } - unsafe impl Context for CAN0_ERROR {} - unsafe impl Nr for CAN0_ERROR { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 79 - } - } - impl !Send for CAN0_ERROR {} - # [ doc = "80 - CAN0_Wake_Up" ] - pub struct CAN0_WAKE_UP { - _0: (), - } - unsafe impl Context for CAN0_WAKE_UP {} - unsafe impl Nr for CAN0_WAKE_UP { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 80 - } - } - impl !Send for CAN0_WAKE_UP {} - # [ doc = "81 - CAN0_ORed_0_15_MB" ] - pub struct CAN0_ORED_0_15_MB { - _0: (), - } - unsafe impl Context for CAN0_ORED_0_15_MB {} - unsafe impl Nr for CAN0_ORED_0_15_MB { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 81 - } - } - impl !Send for CAN0_ORED_0_15_MB {} - # [ doc = "82 - CAN0_ORed_16_31_MB" ] - pub struct CAN0_ORED_16_31_MB { - _0: (), - } - unsafe impl Context for CAN0_ORED_16_31_MB {} - unsafe impl Nr for CAN0_ORED_16_31_MB { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 82 - } - } - impl !Send for CAN0_ORED_16_31_MB {} - # [ doc = "85 - CAN1_ORed" ] - pub struct CAN1_ORED { - _0: (), - } - unsafe impl Context for CAN1_ORED {} - unsafe impl Nr for CAN1_ORED { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 85 - } - } - impl !Send for CAN1_ORED {} - # [ doc = "86 - CAN1_Error" ] - pub struct CAN1_ERROR { - _0: (), - } - unsafe impl Context for CAN1_ERROR {} - unsafe impl Nr for CAN1_ERROR { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 86 - } - } - impl !Send for CAN1_ERROR {} - # [ doc = "88 - CAN1_ORed_0_15_MB" ] - pub struct CAN1_ORED_0_15_MB { - _0: (), - } - unsafe impl Context for CAN1_ORED_0_15_MB {} - unsafe impl Nr for CAN1_ORED_0_15_MB { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 88 - } - } - impl !Send for CAN1_ORED_0_15_MB {} - # [ doc = "92 - CAN2_ORed" ] - pub struct CAN2_ORED { - _0: (), - } - unsafe impl Context for CAN2_ORED {} - unsafe impl Nr for CAN2_ORED { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 92 - } - } - impl !Send for CAN2_ORED {} - # [ doc = "93 - CAN2_Error" ] - pub struct CAN2_ERROR { - _0: (), - } - unsafe impl Context for CAN2_ERROR {} - unsafe impl Nr for CAN2_ERROR { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 93 - } - } - impl !Send for CAN2_ERROR {} - # [ doc = "95 - CAN2_ORed_0_15_MB" ] - pub struct CAN2_ORED_0_15_MB { - _0: (), - } - unsafe impl Context for CAN2_ORED_0_15_MB {} - unsafe impl Nr for CAN2_ORED_0_15_MB { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 95 - } - } - impl !Send for CAN2_ORED_0_15_MB {} - # [ doc = "99 - FTM0_Ch0_Ch1" ] - pub struct FTM0_CH0_CH1 { - _0: (), - } - unsafe impl Context for FTM0_CH0_CH1 {} - unsafe impl Nr for FTM0_CH0_CH1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 99 - } - } - impl !Send for FTM0_CH0_CH1 {} - # [ doc = "100 - FTM0_Ch2_Ch3" ] - pub struct FTM0_CH2_CH3 { - _0: (), - } - unsafe impl Context for FTM0_CH2_CH3 {} - unsafe impl Nr for FTM0_CH2_CH3 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 100 - } - } - impl !Send for FTM0_CH2_CH3 {} - # [ doc = "101 - FTM0_Ch4_Ch5" ] - pub struct FTM0_CH4_CH5 { - _0: (), - } - unsafe impl Context for FTM0_CH4_CH5 {} - unsafe impl Nr for FTM0_CH4_CH5 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 101 - } - } - impl !Send for FTM0_CH4_CH5 {} - # [ doc = "102 - FTM0_Ch6_Ch7" ] - pub struct FTM0_CH6_CH7 { - _0: (), - } - unsafe impl Context for FTM0_CH6_CH7 {} - unsafe impl Nr for FTM0_CH6_CH7 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 102 - } - } - impl !Send for FTM0_CH6_CH7 {} - # [ doc = "103 - FTM0_Fault" ] - pub struct FTM0_FAULT { - _0: (), - } - unsafe impl Context for FTM0_FAULT {} - unsafe impl Nr for FTM0_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 103 - } - } - impl !Send for FTM0_FAULT {} - # [ doc = "104 - FTM0_Ovf_Reload" ] - pub struct FTM0_OVF_RELOAD { - _0: (), - } - unsafe impl Context for FTM0_OVF_RELOAD {} - unsafe impl Nr for FTM0_OVF_RELOAD { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 104 - } - } - impl !Send for FTM0_OVF_RELOAD {} - # [ doc = "105 - FTM1_Ch0_Ch1" ] - pub struct FTM1_CH0_CH1 { - _0: (), - } - unsafe impl Context for FTM1_CH0_CH1 {} - unsafe impl Nr for FTM1_CH0_CH1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 105 - } - } - impl !Send for FTM1_CH0_CH1 {} - # [ doc = "106 - FTM1_Ch2_Ch3" ] - pub struct FTM1_CH2_CH3 { - _0: (), - } - unsafe impl Context for FTM1_CH2_CH3 {} - unsafe impl Nr for FTM1_CH2_CH3 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 106 - } - } - impl !Send for FTM1_CH2_CH3 {} - # [ doc = "107 - FTM1_Ch4_Ch5" ] - pub struct FTM1_CH4_CH5 { - _0: (), - } - unsafe impl Context for FTM1_CH4_CH5 {} - unsafe impl Nr for FTM1_CH4_CH5 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 107 - } - } - impl !Send for FTM1_CH4_CH5 {} - # [ doc = "108 - FTM1_Ch6_Ch7" ] - pub struct FTM1_CH6_CH7 { - _0: (), - } - unsafe impl Context for FTM1_CH6_CH7 {} - unsafe impl Nr for FTM1_CH6_CH7 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 108 - } - } - impl !Send for FTM1_CH6_CH7 {} - # [ doc = "109 - FTM1_Fault" ] - pub struct FTM1_FAULT { - _0: (), - } - unsafe impl Context for FTM1_FAULT {} - unsafe impl Nr for FTM1_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 109 - } - } - impl !Send for FTM1_FAULT {} - # [ doc = "110 - FTM1_Ovf_Reload" ] - pub struct FTM1_OVF_RELOAD { - _0: (), - } - unsafe impl Context for FTM1_OVF_RELOAD {} - unsafe impl Nr for FTM1_OVF_RELOAD { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 110 - } - } - impl !Send for FTM1_OVF_RELOAD {} - # [ doc = "111 - FTM2_Ch0_Ch1" ] - pub struct FTM2_CH0_CH1 { - _0: (), - } - unsafe impl Context for FTM2_CH0_CH1 {} - unsafe impl Nr for FTM2_CH0_CH1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 111 - } - } - impl !Send for FTM2_CH0_CH1 {} - # [ doc = "112 - FTM2_Ch2_Ch3" ] - pub struct FTM2_CH2_CH3 { - _0: (), - } - unsafe impl Context for FTM2_CH2_CH3 {} - unsafe impl Nr for FTM2_CH2_CH3 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 112 - } - } - impl !Send for FTM2_CH2_CH3 {} - # [ doc = "113 - FTM2_Ch4_Ch5" ] - pub struct FTM2_CH4_CH5 { - _0: (), - } - unsafe impl Context for FTM2_CH4_CH5 {} - unsafe impl Nr for FTM2_CH4_CH5 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 113 - } - } - impl !Send for FTM2_CH4_CH5 {} - # [ doc = "114 - FTM2_Ch6_Ch7" ] - pub struct FTM2_CH6_CH7 { - _0: (), - } - unsafe impl Context for FTM2_CH6_CH7 {} - unsafe impl Nr for FTM2_CH6_CH7 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 114 - } - } - impl !Send for FTM2_CH6_CH7 {} - # [ doc = "115 - FTM2_Fault" ] - pub struct FTM2_FAULT { - _0: (), - } - unsafe impl Context for FTM2_FAULT {} - unsafe impl Nr for FTM2_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 115 - } - } - impl !Send for FTM2_FAULT {} - # [ doc = "116 - FTM2_Ovf_Reload" ] - pub struct FTM2_OVF_RELOAD { - _0: (), - } - unsafe impl Context for FTM2_OVF_RELOAD {} - unsafe impl Nr for FTM2_OVF_RELOAD { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 116 - } - } - impl !Send for FTM2_OVF_RELOAD {} - # [ doc = "117 - FTM3_Ch0_Ch1" ] - pub struct FTM3_CH0_CH1 { - _0: (), - } - unsafe impl Context for FTM3_CH0_CH1 {} - unsafe impl Nr for FTM3_CH0_CH1 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 117 - } - } - impl !Send for FTM3_CH0_CH1 {} - # [ doc = "118 - FTM3_Ch2_Ch3" ] - pub struct FTM3_CH2_CH3 { - _0: (), - } - unsafe impl Context for FTM3_CH2_CH3 {} - unsafe impl Nr for FTM3_CH2_CH3 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 118 - } - } - impl !Send for FTM3_CH2_CH3 {} - # [ doc = "119 - FTM3_Ch4_Ch5" ] - pub struct FTM3_CH4_CH5 { - _0: (), - } - unsafe impl Context for FTM3_CH4_CH5 {} - unsafe impl Nr for FTM3_CH4_CH5 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 119 - } - } - impl !Send for FTM3_CH4_CH5 {} - # [ doc = "120 - FTM3_Ch6_Ch7" ] - pub struct FTM3_CH6_CH7 { - _0: (), - } - unsafe impl Context for FTM3_CH6_CH7 {} - unsafe impl Nr for FTM3_CH6_CH7 { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 120 - } - } - impl !Send for FTM3_CH6_CH7 {} - # [ doc = "121 - FTM3_Fault" ] - pub struct FTM3_FAULT { - _0: (), - } - unsafe impl Context for FTM3_FAULT {} - unsafe impl Nr for FTM3_FAULT { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 121 - } - } - impl !Send for FTM3_FAULT {} - # [ doc = "122 - FTM3_Ovf_Reload" ] - pub struct FTM3_OVF_RELOAD { - _0: (), - } - unsafe impl Context for FTM3_OVF_RELOAD {} - unsafe impl Nr for FTM3_OVF_RELOAD { - # [ inline ( always ) ] - fn nr(&self) -> u8 { - 122 - } - } - impl !Send for FTM3_OVF_RELOAD {} - use cortex_m::Reserved; - # [ doc = r" Interrupt handlers" ] + use bare_metal::Nr; # [ allow ( non_snake_case ) ] - # [ repr ( C ) ] - pub struct Handlers { - # [ doc = "0 - DMA0" ] - pub DMA0: extern "C" fn(DMA0), - # [ doc = "1 - DMA1" ] - pub DMA1: extern "C" fn(DMA1), - # [ doc = "2 - DMA2" ] - pub DMA2: extern "C" fn(DMA2), - # [ doc = "3 - DMA3" ] - pub DMA3: extern "C" fn(DMA3), - # [ doc = "4 - DMA4" ] - pub DMA4: extern "C" fn(DMA4), - # [ doc = "5 - DMA5" ] - pub DMA5: extern "C" fn(DMA5), - # [ doc = "6 - DMA6" ] - pub DMA6: extern "C" fn(DMA6), - # [ doc = "7 - DMA7" ] - pub DMA7: extern "C" fn(DMA7), - # [ doc = "8 - DMA8" ] - pub DMA8: extern "C" fn(DMA8), - # [ doc = "9 - DMA9" ] - pub DMA9: extern "C" fn(DMA9), - # [ doc = "10 - DMA10" ] - pub DMA10: extern "C" fn(DMA10), - # [ doc = "11 - DMA11" ] - pub DMA11: extern "C" fn(DMA11), - # [ doc = "12 - DMA12" ] - pub DMA12: extern "C" fn(DMA12), - # [ doc = "13 - DMA13" ] - pub DMA13: extern "C" fn(DMA13), - # [ doc = "14 - DMA14" ] - pub DMA14: extern "C" fn(DMA14), - # [ doc = "15 - DMA15" ] - pub DMA15: extern "C" fn(DMA15), - # [ doc = "16 - DMA_Error" ] - pub DMA_ERROR: extern "C" fn(DMA_ERROR), - # [ doc = "17 - MCM" ] - pub MCM: extern "C" fn(MCM), - # [ doc = "18 - FTFC" ] - pub FTFC: extern "C" fn(FTFC), - # [ doc = "19 - Read_Collision" ] - pub READ_COLLISION: extern "C" fn(READ_COLLISION), - # [ doc = "20 - LVD_LVW" ] - pub LVD_LVW: extern "C" fn(LVD_LVW), - # [ doc = "21 - FTFC_Fault" ] - pub FTFC_FAULT: extern "C" fn(FTFC_FAULT), - # [ doc = "22 - WDOG_EWM" ] - pub WDOG_EWM: extern "C" fn(WDOG_EWM), - # [ doc = "23 - RCM" ] - pub RCM: extern "C" fn(RCM), - # [ doc = "24 - LPI2C0_Master" ] - pub LPI2C0_MASTER: extern "C" fn(LPI2C0_MASTER), - # [ doc = "25 - LPI2C0_Slave" ] - pub LPI2C0_SLAVE: extern "C" fn(LPI2C0_SLAVE), - # [ doc = "26 - LPSPI0" ] - pub LPSPI0: extern "C" fn(LPSPI0), - # [ doc = "27 - LPSPI1" ] - pub LPSPI1: extern "C" fn(LPSPI1), - # [ doc = "28 - LPSPI2" ] - pub LPSPI2: extern "C" fn(LPSPI2), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved0: [Reserved; 2], - # [ doc = "31 - LPUART0_RxTx" ] - pub LPUART0_RXTX: extern "C" fn(LPUART0_RXTX), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved1: [Reserved; 1], - # [ doc = "33 - LPUART1_RxTx" ] - pub LPUART1_RXTX: extern "C" fn(LPUART1_RXTX), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved2: [Reserved; 1], - # [ doc = "35 - LPUART2_RxTx" ] - pub LPUART2_RXTX: extern "C" fn(LPUART2_RXTX), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved3: [Reserved; 3], - # [ doc = "39 - ADC0" ] - pub ADC0: extern "C" fn(ADC0), - # [ doc = "40 - ADC1" ] - pub ADC1: extern "C" fn(ADC1), - # [ doc = "41 - CMP0" ] - pub CMP0: extern "C" fn(CMP0), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved4: [Reserved; 2], - # [ doc = "44 - ERM_single_fault" ] - pub ERM_SINGLE_FAULT: extern "C" fn(ERM_SINGLE_FAULT), - # [ doc = "45 - ERM_double_fault" ] - pub ERM_DOUBLE_FAULT: extern "C" fn(ERM_DOUBLE_FAULT), - # [ doc = "46 - RTC" ] - pub RTC: extern "C" fn(RTC), - # [ doc = "47 - RTC_Seconds" ] - pub RTC_SECONDS: extern "C" fn(RTC_SECONDS), - # [ doc = "48 - LPIT0_Ch0" ] - pub LPIT0_CH0: extern "C" fn(LPIT0_CH0), - # [ doc = "49 - LPIT0_Ch1" ] - pub LPIT0_CH1: extern "C" fn(LPIT0_CH1), - # [ doc = "50 - LPIT0_Ch2" ] - pub LPIT0_CH2: extern "C" fn(LPIT0_CH2), - # [ doc = "51 - LPIT0_Ch3" ] - pub LPIT0_CH3: extern "C" fn(LPIT0_CH3), - # [ doc = "52 - PDB0" ] - pub PDB0: extern "C" fn(PDB0), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved5: [Reserved; 4], - # [ doc = "57 - SCG" ] - pub SCG: extern "C" fn(SCG), - # [ doc = "58 - LPTMR0" ] - pub LPTMR0: extern "C" fn(LPTMR0), - # [ doc = "59 - PORTA" ] - pub PORTA: extern "C" fn(PORTA), - # [ doc = "60 - PORTB" ] - pub PORTB: extern "C" fn(PORTB), - # [ doc = "61 - PORTC" ] - pub PORTC: extern "C" fn(PORTC), - # [ doc = "62 - PORTD" ] - pub PORTD: extern "C" fn(PORTD), - # [ doc = "63 - PORTE" ] - pub PORTE: extern "C" fn(PORTE), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved6: [Reserved; 4], - # [ doc = "68 - PDB1" ] - pub PDB1: extern "C" fn(PDB1), - # [ doc = "69 - FLEXIO" ] - pub FLEXIO: extern "C" fn(FLEXIO), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved7: [Reserved; 8], - # [ doc = "78 - CAN0_ORed" ] - pub CAN0_ORED: extern "C" fn(CAN0_ORED), - # [ doc = "79 - CAN0_Error" ] - pub CAN0_ERROR: extern "C" fn(CAN0_ERROR), - # [ doc = "80 - CAN0_Wake_Up" ] - pub CAN0_WAKE_UP: extern "C" fn(CAN0_WAKE_UP), - # [ doc = "81 - CAN0_ORed_0_15_MB" ] - pub CAN0_ORED_0_15_MB: extern "C" fn(CAN0_ORED_0_15_MB), - # [ doc = "82 - CAN0_ORed_16_31_MB" ] - pub CAN0_ORED_16_31_MB: extern "C" fn(CAN0_ORED_16_31_MB), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved8: [Reserved; 2], - # [ doc = "85 - CAN1_ORed" ] - pub CAN1_ORED: extern "C" fn(CAN1_ORED), - # [ doc = "86 - CAN1_Error" ] - pub CAN1_ERROR: extern "C" fn(CAN1_ERROR), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved9: [Reserved; 1], - # [ doc = "88 - CAN1_ORed_0_15_MB" ] - pub CAN1_ORED_0_15_MB: extern "C" fn(CAN1_ORED_0_15_MB), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved10: [Reserved; 3], - # [ doc = "92 - CAN2_ORed" ] - pub CAN2_ORED: extern "C" fn(CAN2_ORED), - # [ doc = "93 - CAN2_Error" ] - pub CAN2_ERROR: extern "C" fn(CAN2_ERROR), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved11: [Reserved; 1], - # [ doc = "95 - CAN2_ORed_0_15_MB" ] - pub CAN2_ORED_0_15_MB: extern "C" fn(CAN2_ORED_0_15_MB), - # [ doc = r" Reserved spot in the vector table" ] - pub _reserved12: [Reserved; 3], - # [ doc = "99 - FTM0_Ch0_Ch1" ] - pub FTM0_CH0_CH1: extern "C" fn(FTM0_CH0_CH1), - # [ doc = "100 - FTM0_Ch2_Ch3" ] - pub FTM0_CH2_CH3: extern "C" fn(FTM0_CH2_CH3), - # [ doc = "101 - FTM0_Ch4_Ch5" ] - pub FTM0_CH4_CH5: extern "C" fn(FTM0_CH4_CH5), - # [ doc = "102 - FTM0_Ch6_Ch7" ] - pub FTM0_CH6_CH7: extern "C" fn(FTM0_CH6_CH7), - # [ doc = "103 - FTM0_Fault" ] - pub FTM0_FAULT: extern "C" fn(FTM0_FAULT), - # [ doc = "104 - FTM0_Ovf_Reload" ] - pub FTM0_OVF_RELOAD: extern "C" fn(FTM0_OVF_RELOAD), - # [ doc = "105 - FTM1_Ch0_Ch1" ] - pub FTM1_CH0_CH1: extern "C" fn(FTM1_CH0_CH1), - # [ doc = "106 - FTM1_Ch2_Ch3" ] - pub FTM1_CH2_CH3: extern "C" fn(FTM1_CH2_CH3), - # [ doc = "107 - FTM1_Ch4_Ch5" ] - pub FTM1_CH4_CH5: extern "C" fn(FTM1_CH4_CH5), - # [ doc = "108 - FTM1_Ch6_Ch7" ] - pub FTM1_CH6_CH7: extern "C" fn(FTM1_CH6_CH7), - # [ doc = "109 - FTM1_Fault" ] - pub FTM1_FAULT: extern "C" fn(FTM1_FAULT), - # [ doc = "110 - FTM1_Ovf_Reload" ] - pub FTM1_OVF_RELOAD: extern "C" fn(FTM1_OVF_RELOAD), - # [ doc = "111 - FTM2_Ch0_Ch1" ] - pub FTM2_CH0_CH1: extern "C" fn(FTM2_CH0_CH1), - # [ doc = "112 - FTM2_Ch2_Ch3" ] - pub FTM2_CH2_CH3: extern "C" fn(FTM2_CH2_CH3), - # [ doc = "113 - FTM2_Ch4_Ch5" ] - pub FTM2_CH4_CH5: extern "C" fn(FTM2_CH4_CH5), - # [ doc = "114 - FTM2_Ch6_Ch7" ] - pub FTM2_CH6_CH7: extern "C" fn(FTM2_CH6_CH7), - # [ doc = "115 - FTM2_Fault" ] - pub FTM2_FAULT: extern "C" fn(FTM2_FAULT), - # [ doc = "116 - FTM2_Ovf_Reload" ] - pub FTM2_OVF_RELOAD: extern "C" fn(FTM2_OVF_RELOAD), - # [ doc = "117 - FTM3_Ch0_Ch1" ] - pub FTM3_CH0_CH1: extern "C" fn(FTM3_CH0_CH1), - # [ doc = "118 - FTM3_Ch2_Ch3" ] - pub FTM3_CH2_CH3: extern "C" fn(FTM3_CH2_CH3), - # [ doc = "119 - FTM3_Ch4_Ch5" ] - pub FTM3_CH4_CH5: extern "C" fn(FTM3_CH4_CH5), - # [ doc = "120 - FTM3_Ch6_Ch7" ] - pub FTM3_CH6_CH7: extern "C" fn(FTM3_CH6_CH7), - # [ doc = "121 - FTM3_Fault" ] - pub FTM3_FAULT: extern "C" fn(FTM3_FAULT), - # [ doc = "122 - FTM3_Ovf_Reload" ] - pub FTM3_OVF_RELOAD: extern "C" fn(FTM3_OVF_RELOAD), + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } } - # [ doc = r" Default interrupt handlers" ] - pub const DEFAULT_HANDLERS: Handlers = Handlers { - DMA0: exception::default_handler, - DMA1: exception::default_handler, - DMA2: exception::default_handler, - DMA3: exception::default_handler, - DMA4: exception::default_handler, - DMA5: exception::default_handler, - DMA6: exception::default_handler, - DMA7: exception::default_handler, - DMA8: exception::default_handler, - DMA9: exception::default_handler, - DMA10: exception::default_handler, - DMA11: exception::default_handler, - DMA12: exception::default_handler, - DMA13: exception::default_handler, - DMA14: exception::default_handler, - DMA15: exception::default_handler, - DMA_ERROR: exception::default_handler, - MCM: exception::default_handler, - FTFC: exception::default_handler, - READ_COLLISION: exception::default_handler, - LVD_LVW: exception::default_handler, - FTFC_FAULT: exception::default_handler, - WDOG_EWM: exception::default_handler, - RCM: exception::default_handler, - LPI2C0_MASTER: exception::default_handler, - LPI2C0_SLAVE: exception::default_handler, - LPSPI0: exception::default_handler, - LPSPI1: exception::default_handler, - LPSPI2: exception::default_handler, - _reserved0: [Reserved::Vector; 2], - LPUART0_RXTX: exception::default_handler, - _reserved1: [Reserved::Vector; 1], - LPUART1_RXTX: exception::default_handler, - _reserved2: [Reserved::Vector; 1], - LPUART2_RXTX: exception::default_handler, - _reserved3: [Reserved::Vector; 3], - ADC0: exception::default_handler, - ADC1: exception::default_handler, - CMP0: exception::default_handler, - _reserved4: [Reserved::Vector; 2], - ERM_SINGLE_FAULT: exception::default_handler, - ERM_DOUBLE_FAULT: exception::default_handler, - RTC: exception::default_handler, - RTC_SECONDS: exception::default_handler, - LPIT0_CH0: exception::default_handler, - LPIT0_CH1: exception::default_handler, - LPIT0_CH2: exception::default_handler, - LPIT0_CH3: exception::default_handler, - PDB0: exception::default_handler, - _reserved5: [Reserved::Vector; 4], - SCG: exception::default_handler, - LPTMR0: exception::default_handler, - PORTA: exception::default_handler, - PORTB: exception::default_handler, - PORTC: exception::default_handler, - PORTD: exception::default_handler, - PORTE: exception::default_handler, - _reserved6: [Reserved::Vector; 4], - PDB1: exception::default_handler, - FLEXIO: exception::default_handler, - _reserved7: [Reserved::Vector; 8], - CAN0_ORED: exception::default_handler, - CAN0_ERROR: exception::default_handler, - CAN0_WAKE_UP: exception::default_handler, - CAN0_ORED_0_15_MB: exception::default_handler, - CAN0_ORED_16_31_MB: exception::default_handler, - _reserved8: [Reserved::Vector; 2], - CAN1_ORED: exception::default_handler, - CAN1_ERROR: exception::default_handler, - _reserved9: [Reserved::Vector; 1], - CAN1_ORED_0_15_MB: exception::default_handler, - _reserved10: [Reserved::Vector; 3], - CAN2_ORED: exception::default_handler, - CAN2_ERROR: exception::default_handler, - _reserved11: [Reserved::Vector; 1], - CAN2_ORED_0_15_MB: exception::default_handler, - _reserved12: [Reserved::Vector; 3], - FTM0_CH0_CH1: exception::default_handler, - FTM0_CH2_CH3: exception::default_handler, - FTM0_CH4_CH5: exception::default_handler, - FTM0_CH6_CH7: exception::default_handler, - FTM0_FAULT: exception::default_handler, - FTM0_OVF_RELOAD: exception::default_handler, - FTM1_CH0_CH1: exception::default_handler, - FTM1_CH2_CH3: exception::default_handler, - FTM1_CH4_CH5: exception::default_handler, - FTM1_CH6_CH7: exception::default_handler, - FTM1_FAULT: exception::default_handler, - FTM1_OVF_RELOAD: exception::default_handler, - FTM2_CH0_CH1: exception::default_handler, - FTM2_CH2_CH3: exception::default_handler, - FTM2_CH4_CH5: exception::default_handler, - FTM2_CH6_CH7: exception::default_handler, - FTM2_FAULT: exception::default_handler, - FTM2_OVF_RELOAD: exception::default_handler, - FTM3_CH0_CH1: exception::default_handler, - FTM3_CH2_CH3: exception::default_handler, - FTM3_CH4_CH5: exception::default_handler, - FTM3_CH6_CH7: exception::default_handler, - FTM3_FAULT: exception::default_handler, - FTM3_OVF_RELOAD: exception::default_handler, - }; + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA2() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA3() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA4() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA5() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA6() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA7() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA8() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA9() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA10() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA11() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA12() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA13() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA14() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA15() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn DMA_ERROR() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn MCM() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTFC() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn READ_COLLISION() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LVD_LVW() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTFC_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn WDOG_EWM() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn RCM() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPI2C0_MASTER() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPI2C0_SLAVE() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPSPI0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPSPI1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPSPI2() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPUART0_RXTX() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPUART1_RXTX() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPUART2_RXTX() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn ADC0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn ADC1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CMP0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn ERM_SINGLE_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn ERM_DOUBLE_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn RTC() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn RTC_SECONDS() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPIT0_CH0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPIT0_CH1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPIT0_CH2() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPIT0_CH3() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PDB0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn SCG() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn LPTMR0() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PORTA() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PORTB() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PORTC() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PORTD() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PORTE() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn PDB1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FLEXIO() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN0_ORED() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN0_ERROR() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN0_WAKE_UP() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN0_ORED_0_15_MB() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN0_ORED_16_31_MB() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN1_ORED() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN1_ERROR() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN1_ORED_0_15_MB() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN2_ORED() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN2_ERROR() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn CAN2_ORED_0_15_MB() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM0_CH0_CH1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM0_CH2_CH3() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM0_CH4_CH5() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM0_CH6_CH7() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM0_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM0_OVF_RELOAD() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM1_CH0_CH1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM1_CH2_CH3() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM1_CH4_CH5() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM1_CH6_CH7() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM1_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM1_OVF_RELOAD() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM2_CH0_CH1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM2_CH2_CH3() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM2_CH4_CH5() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM2_CH6_CH7() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM2_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM2_OVF_RELOAD() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM3_CH0_CH1() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM3_CH2_CH3() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM3_CH4_CH5() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM3_CH6_CH7() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM3_FAULT() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( non_snake_case ) ] + # [ allow ( private_no_mangle_fns ) ] + # [ cfg ( feature = "rt" ) ] + # [ linkage = "weak" ] + # [ naked ] + # [ no_mangle ] + extern "C" fn FTM3_OVF_RELOAD() { + unsafe { + asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" ); + ::core::intrinsics::unreachable() + } + } + # [ allow ( private_no_mangle_statics ) ] + # [ cfg ( feature = "rt" ) ] + # [ doc ( hidden ) ] + # [ link_section = ".vector_table.interrupts" ] + # [ no_mangle ] + # [ used ] + pub static INTERRUPTS: [Option; 123] = [Some(DMA0), + Some(DMA1), + Some(DMA2), + Some(DMA3), + Some(DMA4), + Some(DMA5), + Some(DMA6), + Some(DMA7), + Some(DMA8), + Some(DMA9), + Some(DMA10), + Some(DMA11), + Some(DMA12), + Some(DMA13), + Some(DMA14), + Some(DMA15), + Some(DMA_ERROR), + Some(MCM), + Some(FTFC), + Some(READ_COLLISION), + Some(LVD_LVW), + Some(FTFC_FAULT), + Some(WDOG_EWM), + Some(RCM), + Some(LPI2C0_MASTER), + Some(LPI2C0_SLAVE), + Some(LPSPI0), + Some(LPSPI1), + Some(LPSPI2), + None, + None, + Some(LPUART0_RXTX), + None, + Some(LPUART1_RXTX), + None, + Some(LPUART2_RXTX), + None, + None, + None, + Some(ADC0), + Some(ADC1), + Some(CMP0), + None, + None, + Some(ERM_SINGLE_FAULT), + Some(ERM_DOUBLE_FAULT), + Some(RTC), + Some(RTC_SECONDS), + Some(LPIT0_CH0), + Some(LPIT0_CH1), + Some(LPIT0_CH2), + Some(LPIT0_CH3), + Some(PDB0), + None, + None, + None, + None, + Some(SCG), + Some(LPTMR0), + Some(PORTA), + Some(PORTB), + Some(PORTC), + Some(PORTD), + Some(PORTE), + None, + None, + None, + None, + Some(PDB1), + Some(FLEXIO), + None, + None, + None, + None, + None, + None, + None, + None, + Some(CAN0_ORED), + Some(CAN0_ERROR), + Some(CAN0_WAKE_UP), + Some(CAN0_ORED_0_15_MB), + Some(CAN0_ORED_16_31_MB), + None, + None, + Some(CAN1_ORED), + Some(CAN1_ERROR), + None, + Some(CAN1_ORED_0_15_MB), + None, + None, + None, + Some(CAN2_ORED), + Some(CAN2_ERROR), + None, + Some(CAN2_ORED_0_15_MB), + None, + None, + None, + Some(FTM0_CH0_CH1), + Some(FTM0_CH2_CH3), + Some(FTM0_CH4_CH5), + Some(FTM0_CH6_CH7), + Some(FTM0_FAULT), + Some(FTM0_OVF_RELOAD), + Some(FTM1_CH0_CH1), + Some(FTM1_CH2_CH3), + Some(FTM1_CH4_CH5), + Some(FTM1_CH6_CH7), + Some(FTM1_FAULT), + Some(FTM1_OVF_RELOAD), + Some(FTM2_CH0_CH1), + Some(FTM2_CH2_CH3), + Some(FTM2_CH4_CH5), + Some(FTM2_CH6_CH7), + Some(FTM2_FAULT), + Some(FTM2_OVF_RELOAD), + Some(FTM3_CH0_CH1), + Some(FTM3_CH2_CH3), + Some(FTM3_CH4_CH5), + Some(FTM3_CH6_CH7), + Some(FTM3_FAULT), + Some(FTM3_OVF_RELOAD)]; # [ doc = r" Enumeration of all the interrupts" ] pub enum Interrupt { # [ doc = "0 - DMA0" ] @@ -1649,28 +1471,20 @@ pub mod interrupt { } } } + # [ cfg ( feature = "rt" ) ] + # [ macro_export ] + macro_rules ! interrupt { ( $ NAME : ident , $ path : path , locals : { $ ( $ lvar : ident : $ lty : ident = $ lval : expr ; ) * } ) => { # [ allow ( non_snake_case ) ] mod $ NAME { pub struct Locals { $ ( pub $ lvar : $ lty , ) * } } # [ allow ( non_snake_case ) ] # [ no_mangle ] pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; static mut LOCALS : self :: $ NAME :: Locals = self :: $ NAME :: Locals { $ ( $ lvar : $ lval , ) * } ; let f : fn ( & mut self :: $ NAME :: Locals ) = $ path ; f ( unsafe { & mut LOCALS } ) ; } } ; ( $ NAME : ident , $ path : path ) => { # [ allow ( non_snake_case ) ] # [ no_mangle ] pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; let f : fn ( ) = $ path ; f ( ) ; } } } } -pub use cortex_m::peripheral::Cpuid as CPUID; pub use cortex_m::peripheral::CPUID; -pub use cortex_m::peripheral::Dcb as DCB; pub use cortex_m::peripheral::DCB; -pub use cortex_m::peripheral::Dwt as DWT; pub use cortex_m::peripheral::DWT; -pub use cortex_m::peripheral::Fpb as FPB; pub use cortex_m::peripheral::FPB; -pub use cortex_m::peripheral::Fpu as FPU; pub use cortex_m::peripheral::FPU; -pub use cortex_m::peripheral::Itm as ITM; pub use cortex_m::peripheral::ITM; -pub use cortex_m::peripheral::Mpu as MPU; pub use cortex_m::peripheral::MPU; -pub use cortex_m::peripheral::Nvic as NVIC; pub use cortex_m::peripheral::NVIC; -pub use cortex_m::peripheral::Scb as SCB; pub use cortex_m::peripheral::SCB; -pub use cortex_m::peripheral::Syst as SYST; pub use cortex_m::peripheral::SYST; -pub use cortex_m::peripheral::Tpiu as TPIU; pub use cortex_m::peripheral::TPIU; # [ doc = "CSE_PRAM" ] pub const CSE_PRAM: Peripheral = unsafe { Peripheral::new(335548416) }; @@ -667454,3 +667268,206 @@ impl Deref for LMEM { &self.register_block } } +# [ doc = r" All the peripherals" ] +# [ allow ( non_snake_case ) ] +pub struct Peripherals<'a> { + # [ doc = "CPUID" ] + pub CPUID: &'a CPUID, + # [ doc = "DCB" ] + pub DCB: &'a DCB, + # [ doc = "DWT" ] + pub DWT: &'a DWT, + # [ doc = "FPB" ] + pub FPB: &'a FPB, + # [ doc = "FPU" ] + pub FPU: &'a FPU, + # [ doc = "ITM" ] + pub ITM: &'a ITM, + # [ doc = "MPU" ] + pub MPU: &'a MPU, + # [ doc = "NVIC" ] + pub NVIC: &'a NVIC, + # [ doc = "SCB" ] + pub SCB: &'a SCB, + # [ doc = "SYST" ] + pub SYST: &'a SYST, + # [ doc = "TPIU" ] + pub TPIU: &'a TPIU, + # [ doc = "CSE_PRAM" ] + pub CSE_PRAM: &'a CSE_PRAM, + # [ doc = "AIPS" ] + pub AIPS: &'a AIPS, + # [ doc = "MSCM" ] + pub MSCM: &'a MSCM, + # [ doc = "DMA" ] + pub DMA: &'a DMA, + # [ doc = "ERM" ] + pub ERM: &'a ERM, + # [ doc = "EIM" ] + pub EIM: &'a EIM, + # [ doc = "FTFC" ] + pub FTFC: &'a FTFC, + # [ doc = "DMAMUX" ] + pub DMAMUX: &'a DMAMUX, + # [ doc = "CAN0" ] + pub CAN0: &'a CAN0, + # [ doc = "CAN1" ] + pub CAN1: &'a CAN1, + # [ doc = "CAN2" ] + pub CAN2: &'a CAN2, + # [ doc = "FTM0" ] + pub FTM0: &'a FTM0, + # [ doc = "FTM1" ] + pub FTM1: &'a FTM1, + # [ doc = "FTM2" ] + pub FTM2: &'a FTM2, + # [ doc = "FTM3" ] + pub FTM3: &'a FTM3, + # [ doc = "ADC0" ] + pub ADC0: &'a ADC0, + # [ doc = "ADC1" ] + pub ADC1: &'a ADC1, + # [ doc = "LPSPI0" ] + pub LPSPI0: &'a LPSPI0, + # [ doc = "LPSPI1" ] + pub LPSPI1: &'a LPSPI1, + # [ doc = "LPSPI2" ] + pub LPSPI2: &'a LPSPI2, + # [ doc = "PDB0" ] + pub PDB0: &'a PDB0, + # [ doc = "PDB1" ] + pub PDB1: &'a PDB1, + # [ doc = "CRC" ] + pub CRC: &'a CRC, + # [ doc = "LPIT0" ] + pub LPIT0: &'a LPIT0, + # [ doc = "RTC" ] + pub RTC: &'a RTC, + # [ doc = "LPTMR0" ] + pub LPTMR0: &'a LPTMR0, + # [ doc = "SIM" ] + pub SIM: &'a SIM, + # [ doc = "PORTA" ] + pub PORTA: &'a PORTA, + # [ doc = "PORTB" ] + pub PORTB: &'a PORTB, + # [ doc = "PORTC" ] + pub PORTC: &'a PORTC, + # [ doc = "PORTD" ] + pub PORTD: &'a PORTD, + # [ doc = "PORTE" ] + pub PORTE: &'a PORTE, + # [ doc = "WDOG" ] + pub WDOG: &'a WDOG, + # [ doc = "FLEXIO" ] + pub FLEXIO: &'a FLEXIO, + # [ doc = "EWM" ] + pub EWM: &'a EWM, + # [ doc = "TRGMUX" ] + pub TRGMUX: &'a TRGMUX, + # [ doc = "SCG" ] + pub SCG: &'a SCG, + # [ doc = "PCC" ] + pub PCC: &'a PCC, + # [ doc = "LPI2C0" ] + pub LPI2C0: &'a LPI2C0, + # [ doc = "LPUART0" ] + pub LPUART0: &'a LPUART0, + # [ doc = "LPUART1" ] + pub LPUART1: &'a LPUART1, + # [ doc = "LPUART2" ] + pub LPUART2: &'a LPUART2, + # [ doc = "CMP0" ] + pub CMP0: &'a CMP0, + # [ doc = "PMC" ] + pub PMC: &'a PMC, + # [ doc = "SMC" ] + pub SMC: &'a SMC, + # [ doc = "RCM" ] + pub RCM: &'a RCM, + # [ doc = "PTA" ] + pub PTA: &'a PTA, + # [ doc = "PTB" ] + pub PTB: &'a PTB, + # [ doc = "PTC" ] + pub PTC: &'a PTC, + # [ doc = "PTD" ] + pub PTD: &'a PTD, + # [ doc = "PTE" ] + pub PTE: &'a PTE, + # [ doc = "MCM" ] + pub MCM: &'a MCM, + # [ doc = "LMEM" ] + pub LMEM: &'a LMEM, +} +impl<'a> Peripherals<'a> { + # [ doc = r" Grants access to all the peripherals" ] + pub unsafe fn all() -> Self { + Peripherals { + CPUID: &*CPUID.get(), + DCB: &*DCB.get(), + DWT: &*DWT.get(), + FPB: &*FPB.get(), + FPU: &*FPU.get(), + ITM: &*ITM.get(), + MPU: &*MPU.get(), + NVIC: &*NVIC.get(), + SCB: &*SCB.get(), + SYST: &*SYST.get(), + TPIU: &*TPIU.get(), + CSE_PRAM: &*CSE_PRAM.get(), + AIPS: &*AIPS.get(), + MSCM: &*MSCM.get(), + DMA: &*DMA.get(), + ERM: &*ERM.get(), + EIM: &*EIM.get(), + FTFC: &*FTFC.get(), + DMAMUX: &*DMAMUX.get(), + CAN0: &*CAN0.get(), + CAN1: &*CAN1.get(), + CAN2: &*CAN2.get(), + FTM0: &*FTM0.get(), + FTM1: &*FTM1.get(), + FTM2: &*FTM2.get(), + FTM3: &*FTM3.get(), + ADC0: &*ADC0.get(), + ADC1: &*ADC1.get(), + LPSPI0: &*LPSPI0.get(), + LPSPI1: &*LPSPI1.get(), + LPSPI2: &*LPSPI2.get(), + PDB0: &*PDB0.get(), + PDB1: &*PDB1.get(), + CRC: &*CRC.get(), + LPIT0: &*LPIT0.get(), + RTC: &*RTC.get(), + LPTMR0: &*LPTMR0.get(), + SIM: &*SIM.get(), + PORTA: &*PORTA.get(), + PORTB: &*PORTB.get(), + PORTC: &*PORTC.get(), + PORTD: &*PORTD.get(), + PORTE: &*PORTE.get(), + WDOG: &*WDOG.get(), + FLEXIO: &*FLEXIO.get(), + EWM: &*EWM.get(), + TRGMUX: &*TRGMUX.get(), + SCG: &*SCG.get(), + PCC: &*PCC.get(), + LPI2C0: &*LPI2C0.get(), + LPUART0: &*LPUART0.get(), + LPUART1: &*LPUART1.get(), + LPUART2: &*LPUART2.get(), + CMP0: &*CMP0.get(), + PMC: &*PMC.get(), + SMC: &*SMC.get(), + RCM: &*RCM.get(), + PTA: &*PTA.get(), + PTB: &*PTB.get(), + PTC: &*PTC.get(), + PTD: &*PTD.get(), + PTE: &*PTE.get(), + MCM: &*MCM.get(), + LMEM: &*LMEM.get(), + } + } +}