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28 KiB
HTML
591 lines
28 KiB
HTML
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<html>
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<head>
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<title>Paying It Forward: Documenting your Hardware</title>
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<meta name="description" content="A framework for easily creating beautiful presentations using HTML">
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<meta name="author" content="Sean "xobs" Cross">
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<![endif]-->
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<style>
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/*********************************************
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* ZOOM REVERSE TRANSITION (i.e. zoom out)
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*********************************************/
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.reveal .slides section[data-transition=zoomrev],
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.reveal.zoomrev .slides section:not([data-transition]) {
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</head>
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<body>
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<!-- Start of main presentation -->
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<div class="reveal">
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<div class="footer">
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<a class="url" href="https://p.xobs.io/lca20-pif/">p.xobs.io/lca20-pif</a>
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<span class="theme">Who’s Watching</span><span class="hashtag"> | #LCA2020</span><span class="twitter"> |
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@linuxconfau</span>
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</div>
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<div class="slides">
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<section data-background-image="css/theme/lca2019-title-bg-transparent.svg">
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<h2 style="background-color: transparent;">Paying it Forward: Documenting Your Hardware Project</h2>
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<h5 style="background-color: transparent;">Approaches to documenting a hardware description language using lxsocdoc</h5>
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<p align="right">
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<small>Sean Cross - <a href="https://xobs.io/">https://xobs.io/</a> - @xobs</small>
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</p>
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</section>
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<section>
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<h2>Undocumented Hardware = Bad</h2>
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<h4 class="fragment">(But so easy to do!)</h4>
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<aside class="notes">
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Undocumented hardware is bad. There are all sorts of quirks, and even if you have
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the source code, it can be very difficult to read. I'm the primary developer for
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the Fomu project, and this talk will cover some of the issues I've run into with
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respect to documentation. It is most directly related to the LiteX and Migen
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projects, but the concepts will carry over into any other Hardware Description
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Language you may use.
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The goal of this talk is to show how it's easy to document hardware with
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the right framework, and how it's easier to have a project that's documented
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than one that isn't.
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</aside>
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</section>
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<section>
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<h2>About Me</h2>
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<table>
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<tr>
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<td><img data-src="img/me.jpg"></td>
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<td><img data-src="img/fomu.png"></td>
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</tr>
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</table>
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<aside class="notes">
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My name is Sean Cross, also known as "xobs". I will be speaking later this week
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on the Betrusted project, but many know me as the main developer behind the Fomu
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project. Fomu is an FPGA that fits in your USB port. One of my goals with the
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Fomu project was to allow people to treat it as just a RISC-V CPU in their USB
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port, which means now we need to make documentation. This talk covers some of
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the problems I ran into while working on this project, and the solutions I came
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up with.
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</aside>
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</section>
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<section>
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<h2>Reference Manuals</h2>
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<img class="fragment" data-src="img/rm-example.png">
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<h6 class="fragment">Datasheet ≠ Reference Manual</h6>
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<aside class="notes">
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How many people here know what a reference manual is? These are documents that
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you hopefully get from the manufacutrer of a chip that tell you how to use it.
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These are the single most important part of developing a chip the normal way, as
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they give you all of the information on how to use a chip. They can include
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everything from which memory addresses to poke to cause a pin to become an output,
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or how to set up the video block to output data. Here is the first page from
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the reference manual for the i.MX6 used in the Novena. You'll note that "Chapter
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1: Introduction" starts on page 197 -- everything before it was a table of contents
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-- and is almost 6000 pages long. As an aside, reference manuals
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aren't datasheets -- datasheets tend to include electrical and operating
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information, and tend to be much shorter.
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</aside>
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</section>
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<section>
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<h2>Enterprise Documentation</h2>
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<table>
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<tr>
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<td>
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<img height="400" class="fragment" data-src="img/Microsoft_Office_Word.svg" type="image/svg+xml"/>
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</td>
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<td width="50%">
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<div class="fragment">
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<img data-src="img/Git-logo.svg" type="image/svg+xml"/>
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<img data-src="img/Travis_CI_Logo.svg" type="img/svg+xml"/>
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</div>
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</td>
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</tr>
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</table>
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<aside class="notes">
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So how is this monster of a document written? I've asked several documentation
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writers from professional chip vendors, and they say that they have a whole team
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of people using a very advanced piece of realtime typesetting software.
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Most enterprise documentation is written by a team of writers using Microsoft Word.
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We're open source developers, and we prefer to use our own tools such as Git and CI
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to create documentation for us. Because we're lazy. And prone to making mistakes.
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</aside>
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</section>
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<section>
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<h2>Talk Outline</h2>
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<ol>
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<li>How to write HDL Code</li>
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<li>Rationale behind <tt>lxsocdoc</tt></li>
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<li>Examples of <tt>lxsocdoc</tt></li>
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<li>Benefits of this approach</li>
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</ol>
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<aside class="notes">
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I'll briefly cover various methods of writing HDL code, then cover the rationale
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behind the approach we take with lxsocdoc, then give an example of how to use
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lxsocdoc and how you might apply it to your language. Finally, I'll cover the
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implications of having documented hardware and how this will help you pay it forward.
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</aside>
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</section>
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<section>
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<h2>Motivation</h2>
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<pre><code class="hljs cpp">// Hardware definitions of the SoC. Also is the main repo of
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// documentation for the programmer-centric view
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// of the hardware.
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/* Start of memory range for the UART peripheral */
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#define UART_OFFSET 0x10000000
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/* Offset of the data register for the debug UART. A write
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here will send the data out of the UART. A write when a
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send is going on will halt the processor until the send is
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completed. A read will receive any byte that was received
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by the UART since the last read, or 0xFFFFFFFF when none
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was. There is no receive buffer, so it's possible to miss
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data if you don't poll frequently enough.
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The debug UART is always configured as 8N1. */
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#define UART_DATA_REG 0x00</code></pre>
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<p><tt>mach_defines.h</tt>, Hackaday 2019 Con Badge</p>
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<aside class="notes">
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Verilog and VHDL are kind of the C or assembly of the FPGA world. They're universal,
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but somewhat unwieldy to use. You need to manually set up your address decoders,
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and documentation is very free-form. Common approaches today involve comments in
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the HDL and/or C header files. This works, but we can do better. We just need to
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describe the hardware better.
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</aside>
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</section>
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<section>
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<h2>About LiteX</h2>
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<ul>
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<li>Hardware Description Language embedded in Python</li>
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<ul>
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<li>Doesn't run Python in hardware!</li>
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</ul>
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<li>Emits Verilog (or Yosys netlists)</li>
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<li>Makes it easy to create a SoC</li>
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<li>Powers the LCA2020 video production setup</li>
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</ul>
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<aside class="notes">
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Fomu uses LiteX, which is related to Migen. This is a hardware description language
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written in Python. You write Python code and run the program, and it generates
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a design file -- either Verilog code, or a Yosys netlist. There are many other
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alternatives such as SpinalHDL or Chisel. By writing in Python as opposed to
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direct Verilog, we get a lot of nice primitives. The examples from this talk
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are taken from lxsocdoc and LiteX, but most higher-level hardware description
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languages can take similar approaches to documentation.
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</aside>
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</section>
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<section>
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<h2>LiteX Primitives</h2>
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<pre><code class="python" data-trim>class GPIOOut(Module, AutoCSR):
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def __init__(self, signal):
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self._out = CSRStorage(len(signal))
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self.comb += signal.eq(self._out.storage)</code></pre>
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<aside class="notes">
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In LiteX, two of the primitives used to expose hardware registers to the CPU softcore
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are CSRStorage and CSRStatus. Instead of manually wiring up a crossbar and decoding
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the addresses ourselves, we just need to write `self.regname = CSRStatus(8)`,
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and the build system will wire up 8 bits of read-only memory to the target CPU.
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Similarly, `self.othername = CSRStorage(8)` will give 8-bits of write-only memory.
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</aside>
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</section>
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<section>
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<h4>Case Study: SPI Bitbang Module</h4>
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<pre><code class="python" data-trim>self.bitbang = CSRStorage(4)
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If(self.bitbang.storage[3],
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dq.oe.eq(0)
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).Else(
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dq.oe.eq(1)
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),
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# CPOL=0/CPHA=0 or CPOL=1/CPHA=1 only.
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If(self.bitbang.storage[1],
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self.miso.status.eq(dq.i[1])
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),
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dq.o.eq(
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Cat(self.bitbang.storage[0], Replicate(1, spi_width-1))
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)</code></pre>
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<aside class="notes">
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This works well, but exposes a new problem: Documentation. As an example, I was
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working with the SPI Flash block in litex, and wanted to know how the bitbang
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driver worked. There wasn't any documentation except the source, which looked
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like this.
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You can kind of understand it, but it does take a lot of mental power to
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work through it. I started by creating aliases for the various elements
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in the storage array, but then I thought: There has to be a better way!
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</aside>
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</section>
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<section>
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<h2>Aside: Python Docstrings</h2>
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<pre><code class="python" data-trim>def _format_cmd(cmd, spi_width):
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"""
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`cmd` is the read instruction. Since everything is
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transmitted on all dq lines (cmd, adr and data), extend/
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interleave cmd to full pads.dq width even if dq1-dq3 are
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don't care during the command phase: For example, for
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N25Q128, 0xeb is the quad i/o fast read, and extended
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to 4 bits (dq1,dq2,dq3 high) is: 0xfffefeff
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"""
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c = 2**(8*spi_width)-1
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for b in range(8):
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if not (cmd>>b)%2:
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c &= ~(1<<(b*spi_width))
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return c</code></pre>
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<aside class="notes">
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As an aside, Python has something called Pydoc and Docstrings. These are
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comments that go at the top of functions and classes that let you describe
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what a Python object is and how to use it. This is almost what we want,
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except once the final SoC is generated we don't really care so much about
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things like constructor arguments or method properties. Documentation for
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the end user is different from documentation for the module developer.
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</aside>
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</section>
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<section>
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<h2>New Register Definition</h2>
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<pre><code class="python" data-trim>self.bitbang = CSRStorage(4, fields=[
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CSRField("mosi", description="Output value for MOSI..."
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CSRField("clk", description="Output value for SPI CLK..."
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CSRField("cs_n", description="Output value for SPI C..."
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CSRField("dir", description="Sets the dir...", values=[
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("0", "OUT", "SPI pins are all output"),
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("1", "IN", "SPI pins are all input"),
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])
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], description="""Bitbang controls for SPI output. Only
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standard 1x SPI is supported, and as a result all
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four wires are ganged together. This means that it
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is only possible to perform half-duplex operations,
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using this SPI core.""")</code></pre>
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<aside class="notes">
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This is when I hit upon the idea of `lxsocdoc`. The basic idea is that
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Python is really good at introspecting Python, so let's add a little bit
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more information to the CSR objects to make our life easier. And so, after
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working with the LiteX creator Florent, we refactored the bitbang
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definition to this.
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</aside>
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</section>
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<section>
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<h2>Refactored SPI Bitbang</h2>
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<pre><code class="python" data-trim>If(self.bitbang.fields.dir,
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dq.oe.eq(0)
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).Else(
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dq.oe.eq(1)
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),
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# CPOL=0/CPHA=0 or CPOL=1/CPHA=1 only.
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If(self.bitbang.fields.clk,
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self.miso.status.eq(dq.i[1])
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),
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dq.o.eq(
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Cat(self.bitbang.fields.mosi, Replicate(1, spi_width-1))
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)</code></pre>
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<aside class="notes">
|
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Now the actual bitbang logic looks like this.
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This is a little bit easier to understand -- no longer are we looking at indices
|
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in an array to determine what field does what. Instead we get actual named fields.
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But because Python can introspect Python very easily, this is just the beginning.
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</aside>
|
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</section>
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||
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<section>
|
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<h2>Generating a Manual</h2>
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<img data-src="img/lxspi_bitbang.png">
|
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<aside class="notes">
|
||
After the design is elaborated and the output file is generated, we can iterate
|
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through the resulting tree and pick out any CSR objects and using any additional
|
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information. We can actually generate a full reference manual, just like one you
|
||
would receive from a SoC Vendor.
|
||
|
||
For example, this is what the start of the Fomu SPI Flash documentation looks like:
|
||
[Register Listing for LXSPI]
|
||
|
||
This is already pretty useful. You can hand this file to someone and show them
|
||
how your design works. But the title of this talk is called "Paying it Forward",
|
||
and I can tell you from experience that having such a reference manual for yourself
|
||
while developing software for your own hardware is still invaluable. Hardware
|
||
designs are complex things, and not having to decode bitfield offsets in your
|
||
head or constantly referring to various sections of code to see how it's implemented
|
||
saves valuable time.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Interrupts</h2>
|
||
<img data-src="img/interrupts.png">
|
||
<aside class="notes">
|
||
We can even extract interrupt information, including which bits inside an
|
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interrupt register map to which event, and which interrupt number is assigned
|
||
to a given module.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Undocumented Fields</h2>
|
||
<img data-src="img/timer0-event.png">
|
||
<aside class="notes">
|
||
It turns out that there is enough information that we can extract that
|
||
even undocumented fields are somewhat useful. This is an undocumented
|
||
interrupt register, but lxsocdoc has pulled out the field names and
|
||
is giving useful documentation anyway.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>More Documentation: ModuleDoc</h2>
|
||
<img data-src="img/timer0-doc.png">
|
||
<aside class="notes">
|
||
So now we have register documentation. Can we do better? Of course we can.
|
||
SoC reference manuals are more than just register definitions. They also include
|
||
background information on protocols, as well as more elaboration on how the block
|
||
works. We can take a cue from CSRs themselves, and add module documentation
|
||
in a similar fashion.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Protocol Documentation</h2>
|
||
<img data-src="img/usb-wishbone.png">
|
||
<aside class="notes">
|
||
We can add additional documentation such as protocol waveforms. Here
|
||
we use WaveDrom to define the protocol of Wishbone-over-SPI. There
|
||
are multiple formats of the protocol depending on which version is
|
||
instantiated.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>SVD: Documentation for Machines</h2>
|
||
<table>
|
||
<tr>
|
||
<td>
|
||
<ul>
|
||
<li>XML description file</li>
|
||
<li>Interrupt numbers</li>
|
||
<li>Memory layout</li>
|
||
<li>Register definitions</li>
|
||
<li>Register fields</li>
|
||
</ul>
|
||
</td>
|
||
<td>
|
||
<img data-src="img/CMSIS_SVD_Schema_Gen.png">
|
||
<br/><small>Source: keil.com</small>
|
||
</td>
|
||
</tr>
|
||
</table>
|
||
<aside class="notes">
|
||
Having documentation for humans is great, but we can go one step further and
|
||
make documentation for computers. SVD is an XML format defined by ARM that
|
||
defines various aspects about a chip, including memory layout, interrupt map,
|
||
and register sets. SVD includes information such as default values and field
|
||
bits, all information we have thanks to the introspectability of Python.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>SVD2Rust: Generating Safe Accessors</h2>
|
||
<pre><code class="rust">fn init(&mut self) {
|
||
self.registers
|
||
.ctrl
|
||
.write(|w| w.exe().bit(true).curren().bit(true).rgbleden().bit(true));
|
||
self.write(LEDDEN | FR250 | QUICK_STOP, LedRegister::LEDDCR0);
|
||
|
||
// Set clock register to 12 MHz / 64 kHz - 1
|
||
self.write(((12_000_000u32 / 64_000u32) - 1) as u8, LedRegister::LEDDBR);
|
||
|
||
self.write(
|
||
BREATHE_ENABLE | BREATHE_MODE_FIXED | breathe_rate_ms(128),
|
||
LedRegister::LEDDBCRR,
|
||
);
|
||
}</code></pre>
|
||
<aside class="notes">
|
||
In addition to generating a reference manual for humans, we can generate an SVD
|
||
file that's usable in a wide variety of areas. For example, we can turn an SVD
|
||
file into a Rust Peripheral Access Crate (PAC) using `SVD2Rust`, giving us an
|
||
easy way to safely access all peripherals on a device.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Renode: Fancy Register Logging</h2>
|
||
<table width="100%">
|
||
<tr style="padding-right: 0px; padding-left: 0px;">
|
||
<td width="75%" style="padding-right: 0px; padding-left: 0px; text-align: center">
|
||
<img style="padding-right: 0px; padding-left: 0px;" width="100%" data-src="img/renode-debug.png"/>
|
||
</td>
|
||
<td style="padding-right: 0px; padding-left: 0px; text-align: center">
|
||
<img data-src="img/renode-ui-tall.png">
|
||
</td>
|
||
</tr>
|
||
</table>
|
||
<aside class="notes">
|
||
We can also import this SVD file into an emulator such as Renode, which will
|
||
print out fields and flags that get accessed, giving us greater visibility into
|
||
what a program is doing.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Benefits of Higher Level Languages</h2>
|
||
<ul>
|
||
<li>Greater code reuse</li>
|
||
<li>More hardware description</li>
|
||
<li>Better interoperability</li>
|
||
<li>Automatic document generation</li>
|
||
<li>Automatic SVD</li>
|
||
</ul>
|
||
<aside class="notes">
|
||
By using a higher level language, we are able to describe the hardware
|
||
in greater detail than if we used Verilog or VHDL. We can add additional
|
||
fields to our register definition fields to provide nice, human-readable
|
||
documentation. This also allows us to generate machine-readable formats
|
||
such as SVD, which opens up a whole world of software.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Documentation helps others</h2>
|
||
<h2 class="fragment">Documentation helps you</h2>
|
||
<aside class="notes">
|
||
Documenting your hardware is important because it is necessary for you to
|
||
write software that interfaces with it today, and it helps you work with
|
||
others when it comes time to share your design with the world. By
|
||
properly documenting various fields within your module, you make it easier
|
||
on yourself to interact with today, and you make it easier to let others
|
||
get up to speed in the future. By documenting your hardware, you're helping
|
||
to pay it forward.
|
||
</aside>
|
||
</section>
|
||
|
||
<section>
|
||
<h2>Thank you</h2>
|
||
<h3>Questions</h3>
|
||
</section>
|
||
</div>
|
||
</div> <!-- class="reveal" -->
|
||
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|
||
|
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<script src="lib/js/head.min.js"></script>
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<script src="js/reveal.js"></script>
|
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<script>
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var presenter = !!Reveal.getQueryHash().s;
|
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|
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// More info https://github.com/hakimel/reveal.js#configuration
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Reveal.initialize({
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controls: presenter ? false : true,
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progress: true,
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history: true,
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slideNumber: presenter ? null : 'c/t',
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// The "normal" size of the presentation, aspect ratio will be preserved
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// when the presentation is scaled to fit different resolutions. Can be
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// specified using percentage units.
|
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width: "100%",
|
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height: 700,
|
||
|
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// Factor of the display size that should remain empty around the content
|
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margin: 0.1,
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multiplex: {
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// More info https://github.com/hakimel/reveal.js#dependencies
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{ src: 'lib/js/classList.js', condition: function () { return !document.body.classList; } },
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{ src: 'lib/js/socket.io.js', async: true },
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</html>
|