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index: tabs -> spaces

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Tabs were causing formatting issues with <code> blocks, so just set the
entire file to indent using spaces.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2020-01-02 16:45:42 +08:00
parent 04d15f7970
commit c83c36f456
1 changed files with 381 additions and 358 deletions
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@ -175,7 +175,16 @@
</section>
<section>
<h2>About LiteX and lxsocdoc</h2>
<h2>About LiteX</h2>
<ol>
<li>Hardware Description Language embedded in Python</li>
<ol>
<li>Doesn't run Python in hardware!</li>
</ol>
<li>Emits Verilog (or Yosys netlists)</li>
<li>Makes it easy to create a SoC</li>
<li>Powers the LCA2020 video production setup</li>
</ol>
<aside class="notes">
Fomu uses LiteX, which is related to Migen. This is a hardware description language
written in Python. You write Python code and run the program, and it generates
@ -203,7 +212,7 @@
</section>
<section>
<h4>SPI Bitbang Module</h4>
<h4>Case Study: SPI Bitbang Module</h4>
<pre><code class="python" data-trim>self.bitbang = CSRStorage(4)
If(self.bitbang.storage[3],
dq.oe.eq(0)
@ -231,6 +240,20 @@ dq.o.eq(
<section>
<h2>Aside: Python Docstrings</h2>
<pre><code class="python" data-trim>def _format_cmd(cmd, spi_width):
"""
`cmd` is the read instruction. Since everything is
transmitted on all dq lines (cmd, adr and data), extend/
interleave cmd to full pads.dq width even if dq1-dq3 are
don't care during the command phase: For example, for
N25Q128, 0xeb is the quad i/o fast read, and extended
to 4 bits (dq1,dq2,dq3 high) is: 0xfffefeff
"""
c = 2**(8*spi_width)-1
for b in range(8):
if not (cmd>>b)%2:
c &= ~(1<<(b*spi_width))
return c</code></pre>
<aside class="notes">
As an aside, Python has something called Pydoc and Docstrings. These are
comments that go at the top of functions and classes that let you describe
@ -242,7 +265,7 @@ dq.o.eq(
</section>
<section>
<h4>New Register Definition</h4>
<h2>New Register Definition</h2>
<pre><code class="python" data-trim>self.bitbang = CSRStorage(4, fields=[
CSRField("mosi", description="Output value for MOSI..."
CSRField("clk", description="Output value for SPI CLK..."
@ -266,7 +289,7 @@ dq.o.eq(
</section>
<section>
<h4>Refactored SPI Bitbang</h4>
<h2>Refactored SPI Bitbang</h2>
<pre><code class="python" data-trim>If(self.bitbang.fields.dir,
dq.oe.eq(0)
).Else(