start adding xous-specific calls
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
parent
fc18060bd9
commit
8be17ff6f1
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@ -1,5 +1,3 @@
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use std::collections::HashMap;
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use crate::mmu::{AddressingMode, Mmu};
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const DEFAULT_MEMORY_BASE: u64 = 0x80000000;
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@ -55,6 +53,10 @@ pub const MIP_SEIP: u64 = 0x200;
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const MIP_STIP: u64 = 0x020;
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const MIP_SSIP: u64 = 0x002;
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pub trait EventHandler {
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fn handle_event(&mut self, cpu: &mut Cpu, args: [i64; 8]) -> [i64; 8];
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}
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/// Emulates a RISC-V CPU core
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pub struct Cpu {
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clock: u64,
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@ -71,9 +73,10 @@ pub struct Cpu {
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reservation: u64, // @TODO: Should support multiple address reservations
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is_reservation_set: bool,
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_dump_flag: bool,
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decode_cache: DecodeCache,
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// decode_cache: DecodeCache,
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unsigned_data_mask: u64,
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memory_base: u64,
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handler: Option<Box<dyn EventHandler>>,
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}
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#[derive(Clone)]
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@ -216,6 +219,7 @@ pub struct CpuBuilder {
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xlen: Xlen,
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memory_size: u64,
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memory_base: u64,
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handler: Option<Box<dyn EventHandler>>,
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}
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impl CpuBuilder {
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@ -224,6 +228,7 @@ impl CpuBuilder {
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xlen: Xlen::Bit64,
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memory_size: 0,
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memory_base: DEFAULT_MEMORY_BASE,
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handler: None,
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}
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}
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@ -237,10 +242,18 @@ impl CpuBuilder {
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self
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}
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pub fn handler(mut self, handler: Box<dyn EventHandler>) -> Self {
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self.handler = Some(handler);
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self
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}
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pub fn build(self) -> Cpu {
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let mut cpu = Cpu::new(self.memory_base);
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cpu.update_xlen(self.xlen.clone());
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cpu.mmu.init_memory(self.memory_size);
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if self.handler.is_some() {
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cpu.set_handler(self.handler);
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}
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cpu
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}
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}
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@ -276,9 +289,10 @@ impl Cpu {
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reservation: 0,
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is_reservation_set: false,
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_dump_flag: false,
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decode_cache: DecodeCache::new(),
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// decode_cache: DecodeCache::new(),
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unsigned_data_mask: 0xffffffffffffffff,
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memory_base,
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handler: None,
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}
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// let mut cpu = ;
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// cpu.x[0xb] = 0x1020; // I don't know why but Linux boot seems to require this initialization
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@ -286,6 +300,14 @@ impl Cpu {
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// cpu
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}
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/// Assigns an event handler to the CPU.
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///
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/// # Arguments
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/// * `handler` An object that implements the [`EventHandler`](trait.EventHandler.html) trait
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pub fn set_handler(&mut self, handler: Option<Box<dyn EventHandler>>) {
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self.handler = handler;
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}
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/// Updates Program Counter content
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///
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/// # Arguments
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@ -396,20 +418,20 @@ impl Cpu {
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(self.decode_raw(op)?.operation)(self, op, self.pc)
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}
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/// Decodes a word instruction data and returns a reference to
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/// [`Instruction`](struct.Instruction.html). Using [`DecodeCache`](struct.DecodeCache.html)
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/// so if cache hits this method returns the result very quickly.
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/// The result will be stored to cache.
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fn decode(&mut self, word: u32) -> Result<&Instruction, ()> {
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if let Some(index) = self.decode_cache.get(word) {
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return Ok(&INSTRUCTIONS[index]);
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}
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let Ok(index) = self.decode_and_get_instruction_index(word) else {
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return Err(());
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};
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self.decode_cache.insert(word, index);
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Ok(&INSTRUCTIONS[index])
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}
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// /// Decodes a word instruction data and returns a reference to
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// /// [`Instruction`](struct.Instruction.html). Using [`DecodeCache`](struct.DecodeCache.html)
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// /// so if cache hits this method returns the result very quickly.
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// /// The result will be stored to cache.
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// fn decode(&mut self, word: u32) -> Result<&Instruction, ()> {
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// if let Some(index) = self.decode_cache.get(word) {
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// return Ok(&INSTRUCTIONS[index]);
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// }
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// let Ok(index) = self.decode_and_get_instruction_index(word) else {
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// return Err(());
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// };
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// self.decode_cache.insert(word, index);
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// Ok(&INSTRUCTIONS[index])
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// }
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/// Decodes a word instruction data and returns a reference to
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/// [`Instruction`](struct.Instruction.html). Not Using [`DecodeCache`](struct.DecodeCache.html)
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@ -2426,6 +2448,19 @@ const INSTRUCTIONS: [Instruction; INSTRUCTION_NUM] = [
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data: 0x00000073,
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name: "ECALL",
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operation: |cpu, _word, address| {
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if let Some(mut handler) = cpu.handler.take() {
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let mut args = [0i64; 8];
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for (src, dest) in cpu.x[10..].iter().zip(args.iter_mut()) {
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*dest = *src;
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}
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let result = handler.handle_event(cpu, args);
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for (src, dest) in result.iter().zip(cpu.x[10..].iter_mut()) {
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*dest = *src;
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}
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cpu.handler = Some(handler);
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return Ok(())
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}
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let exception_type = match cpu.privilege_mode {
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PrivilegeMode::User => TrapType::EnvironmentCallFromUMode,
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PrivilegeMode::Supervisor => TrapType::EnvironmentCallFromSMode,
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@ -3580,190 +3615,190 @@ const INSTRUCTIONS: [Instruction; INSTRUCTION_NUM] = [
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},
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];
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/// The number of results [`DecodeCache`](struct.DecodeCache.html) holds.
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/// You need to carefully choose the number. Too small number causes
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/// bad cache hit ratio. Too large number causes memory consumption
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/// and host hardware CPU cache memory miss.
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const DECODE_CACHE_ENTRY_NUM: usize = 0x1000;
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// /// The number of results [`DecodeCache`](struct.DecodeCache.html) holds.
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// /// You need to carefully choose the number. Too small number causes
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// /// bad cache hit ratio. Too large number causes memory consumption
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// /// and host hardware CPU cache memory miss.
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// const DECODE_CACHE_ENTRY_NUM: usize = 0x1000;
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const INVALID_CACHE_ENTRY: usize = INSTRUCTION_NUM;
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const NULL_ENTRY: usize = DECODE_CACHE_ENTRY_NUM;
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// const INVALID_CACHE_ENTRY: usize = INSTRUCTION_NUM;
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// const NULL_ENTRY: usize = DECODE_CACHE_ENTRY_NUM;
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/// `DecodeCache` provides a cache system for instruction decoding.
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/// It holds the recent [`DECODE_CACHE_ENTRY_NUM`](constant.DECODE_CACHE_ENTRY_NUM.html)
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/// instruction decode results. If it has a cache (called "hit") for passed
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/// word data, it returns decoding result very quickly. Decoding is one of the
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/// slowest parts in CPU. This cache system improves the CPU processing speed
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/// by skipping decoding. Especially it should work well for loop. It is said
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/// that some loops in a program consume the majority of time then this cache
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/// system is expected to reduce the decoding time very well.
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///
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/// This cache system is based on LRU algorithm, and consists of a hash map and
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/// a linked list. Linked list is for LRU, front means recently used and back
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/// means least recently used. A content in hash map points to an entry in the
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/// linked list. This is the key to achieve computing in O(1).
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///
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// @TODO: Write performance benchmark test to confirm this cache actually
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// improves the speed.
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struct DecodeCache {
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/// Holds mappings from word instruction data to an index of `entries`
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/// pointing to the entry having the decoding result. Containing the word
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/// means cache hit.
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// hash_map: FnvHashMap::<u32, usize>,
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hash_map: HashMap<u32, usize>,
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// /// `DecodeCache` provides a cache system for instruction decoding.
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// /// It holds the recent [`DECODE_CACHE_ENTRY_NUM`](constant.DECODE_CACHE_ENTRY_NUM.html)
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// /// instruction decode results. If it has a cache (called "hit") for passed
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// /// word data, it returns decoding result very quickly. Decoding is one of the
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// /// slowest parts in CPU. This cache system improves the CPU processing speed
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// /// by skipping decoding. Especially it should work well for loop. It is said
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// /// that some loops in a program consume the majority of time then this cache
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// /// system is expected to reduce the decoding time very well.
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// ///
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// /// This cache system is based on LRU algorithm, and consists of a hash map and
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// /// a linked list. Linked list is for LRU, front means recently used and back
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// /// means least recently used. A content in hash map points to an entry in the
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// /// linked list. This is the key to achieve computing in O(1).
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// ///
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// // @TODO: Write performance benchmark test to confirm this cache actually
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// // improves the speed.
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// struct DecodeCache {
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// /// Holds mappings from word instruction data to an index of `entries`
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// /// pointing to the entry having the decoding result. Containing the word
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// /// means cache hit.
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// // hash_map: FnvHashMap::<u32, usize>,
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// hash_map: HashMap<u32, usize>,
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/// Holds the entries [`DecodeCacheEntry`](struct.DecodeCacheEntry.html)
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/// forming linked list.
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entries: Vec<DecodeCacheEntry>,
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// /// Holds the entries [`DecodeCacheEntry`](struct.DecodeCacheEntry.html)
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// /// forming linked list.
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// entries: Vec<DecodeCacheEntry>,
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/// An index of `entries` pointing to the head entry in the linked list
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front_index: usize,
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// /// An index of `entries` pointing to the head entry in the linked list
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// front_index: usize,
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/// An index of `entries` pointing to the tail entry in the linked list
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back_index: usize,
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// /// An index of `entries` pointing to the tail entry in the linked list
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// back_index: usize,
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/// Cache hit count for debugging purpose
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hit_count: u64,
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// /// Cache hit count for debugging purpose
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// hit_count: u64,
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/// Cache miss count for debugging purpose
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miss_count: u64,
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}
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// /// Cache miss count for debugging purpose
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// miss_count: u64,
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// }
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impl DecodeCache {
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/// Creates a new `DecodeCache`.
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fn new() -> Self {
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// Initialize linked list
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let mut entries = Vec::new();
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for i in 0..DECODE_CACHE_ENTRY_NUM {
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let next_index = match i == DECODE_CACHE_ENTRY_NUM - 1 {
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true => NULL_ENTRY,
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false => i + 1,
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};
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let prev_index = match i == 0 {
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true => NULL_ENTRY,
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false => i - 1,
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};
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entries.push(DecodeCacheEntry::new(next_index, prev_index));
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}
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// impl DecodeCache {
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// /// Creates a new `DecodeCache`.
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// fn new() -> Self {
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// // Initialize linked list
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// let mut entries = Vec::new();
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// for i in 0..DECODE_CACHE_ENTRY_NUM {
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// let next_index = match i == DECODE_CACHE_ENTRY_NUM - 1 {
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// true => NULL_ENTRY,
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// false => i + 1,
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// };
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// let prev_index = match i == 0 {
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// true => NULL_ENTRY,
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// false => i - 1,
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// };
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// entries.push(DecodeCacheEntry::new(next_index, prev_index));
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// }
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DecodeCache {
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// hash_map: FnvHashMap::default(),
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hash_map: HashMap::default(),
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entries,
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front_index: 0,
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back_index: DECODE_CACHE_ENTRY_NUM - 1,
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hit_count: 0,
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miss_count: 0,
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}
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}
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// DecodeCache {
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// // hash_map: FnvHashMap::default(),
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// hash_map: HashMap::default(),
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// entries,
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// front_index: 0,
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// back_index: DECODE_CACHE_ENTRY_NUM - 1,
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// hit_count: 0,
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// miss_count: 0,
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// }
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// }
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/// Gets the cached decoding result. If hits this method moves the
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/// cache entry to front of the linked list and returns an index of
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/// [`INSTRUCTIONS`](constant.INSTRUCTIONS.html).
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/// Otherwise returns `None`. This operation should compute in O(1) time.
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///
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/// # Arguments
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/// * `word` word instruction data
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fn get(&mut self, word: u32) -> Option<usize> {
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let result = match self.hash_map.get(&word) {
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Some(index) => {
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self.hit_count += 1;
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// Move the entry to front of the list unless it is at front.
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if self.front_index != *index {
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let next_index = self.entries[*index].next_index;
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let prev_index = self.entries[*index].prev_index;
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// /// Gets the cached decoding result. If hits this method moves the
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// /// cache entry to front of the linked list and returns an index of
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// /// [`INSTRUCTIONS`](constant.INSTRUCTIONS.html).
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// /// Otherwise returns `None`. This operation should compute in O(1) time.
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// ///
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// /// # Arguments
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// /// * `word` word instruction data
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// fn get(&mut self, word: u32) -> Option<usize> {
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// let result = match self.hash_map.get(&word) {
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// Some(index) => {
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// self.hit_count += 1;
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// // Move the entry to front of the list unless it is at front.
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// if self.front_index != *index {
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// let next_index = self.entries[*index].next_index;
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// let prev_index = self.entries[*index].prev_index;
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// Remove the entry from the list
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if self.back_index == *index {
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self.back_index = prev_index;
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} else {
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self.entries[next_index].prev_index = prev_index;
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}
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self.entries[prev_index].next_index = next_index;
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// // Remove the entry from the list
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// if self.back_index == *index {
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// self.back_index = prev_index;
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// } else {
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// self.entries[next_index].prev_index = prev_index;
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// }
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// self.entries[prev_index].next_index = next_index;
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// Push the entry to front
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self.entries[*index].prev_index = NULL_ENTRY;
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self.entries[*index].next_index = self.front_index;
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self.entries[self.front_index].prev_index = *index;
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self.front_index = *index;
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}
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Some(self.entries[*index].instruction_index)
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}
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None => {
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self.miss_count += 1;
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None
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}
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};
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//println!("Hit:{:X}, Miss:{:X}, Ratio:{}", self.hit_count, self.miss_count,
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// (self.hit_count as f64) / (self.hit_count + self.miss_count) as f64);
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result
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}
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// // Push the entry to front
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// self.entries[*index].prev_index = NULL_ENTRY;
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// self.entries[*index].next_index = self.front_index;
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// self.entries[self.front_index].prev_index = *index;
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// self.front_index = *index;
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// }
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// Some(self.entries[*index].instruction_index)
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// }
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// None => {
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// self.miss_count += 1;
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// None
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// }
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// };
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// //println!("Hit:{:X}, Miss:{:X}, Ratio:{}", self.hit_count, self.miss_count,
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// // (self.hit_count as f64) / (self.hit_count + self.miss_count) as f64);
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// result
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// }
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/// Inserts a new decode result to front of the linked list while removing
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/// the least recently used result from the list. This operation should
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/// compute in O(1) time.
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///
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/// # Arguments
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/// * `word`
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/// * `instruction_index`
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fn insert(&mut self, word: u32, instruction_index: usize) {
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let index = self.back_index;
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// /// Inserts a new decode result to front of the linked list while removing
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// /// the least recently used result from the list. This operation should
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// /// compute in O(1) time.
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// ///
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// /// # Arguments
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// /// * `word`
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// /// * `instruction_index`
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// fn insert(&mut self, word: u32, instruction_index: usize) {
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// let index = self.back_index;
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// Remove the least recently used entry. The entry resource
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// is reused as new entry.
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if self.entries[index].instruction_index != INVALID_CACHE_ENTRY {
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self.hash_map.remove(&self.entries[index].word);
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}
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self.back_index = self.entries[index].prev_index;
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self.entries[self.back_index].next_index = NULL_ENTRY;
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// // Remove the least recently used entry. The entry resource
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// // is reused as new entry.
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// if self.entries[index].instruction_index != INVALID_CACHE_ENTRY {
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// self.hash_map.remove(&self.entries[index].word);
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// }
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// self.back_index = self.entries[index].prev_index;
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// self.entries[self.back_index].next_index = NULL_ENTRY;
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// Push the new entry to front of the linked list
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self.hash_map.insert(word, index);
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self.entries[index].prev_index = NULL_ENTRY;
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self.entries[index].next_index = self.front_index;
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self.entries[index].word = word;
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self.entries[index].instruction_index = instruction_index;
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self.entries[self.front_index].prev_index = index;
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self.front_index = index;
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}
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}
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// // Push the new entry to front of the linked list
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// self.hash_map.insert(word, index);
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// self.entries[index].prev_index = NULL_ENTRY;
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// self.entries[index].next_index = self.front_index;
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// self.entries[index].word = word;
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// self.entries[index].instruction_index = instruction_index;
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// self.entries[self.front_index].prev_index = index;
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// self.front_index = index;
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// }
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// }
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/// An entry of linked list managed by [`DecodeCache`](struct.DecodeCache.html).
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/// An entry consists of a mapping from word instruction data to an index of
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/// [`INSTRUCTIONS`](constant.INSTRUCTIONS.html) and next/previous entry index
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||||
/// in the linked list.
|
||||
struct DecodeCacheEntry {
|
||||
/// Instruction word data
|
||||
word: u32,
|
||||
// /// An entry of linked list managed by [`DecodeCache`](struct.DecodeCache.html).
|
||||
// /// An entry consists of a mapping from word instruction data to an index of
|
||||
// /// [`INSTRUCTIONS`](constant.INSTRUCTIONS.html) and next/previous entry index
|
||||
// /// in the linked list.
|
||||
// struct DecodeCacheEntry {
|
||||
// /// Instruction word data
|
||||
// word: u32,
|
||||
|
||||
/// The result of decoding `word`. An index of [`INSTRUCTIONS`](constant.INSTRUCTIONS.html).
|
||||
instruction_index: usize,
|
||||
// /// The result of decoding `word`. An index of [`INSTRUCTIONS`](constant.INSTRUCTIONS.html).
|
||||
// instruction_index: usize,
|
||||
|
||||
/// Next entry index in the linked list. [`NULL_ENTRY`](constant.NULL_ENTRY.html)
|
||||
/// represents no next entry, meaning the entry is at tail.
|
||||
next_index: usize,
|
||||
// /// Next entry index in the linked list. [`NULL_ENTRY`](constant.NULL_ENTRY.html)
|
||||
// /// represents no next entry, meaning the entry is at tail.
|
||||
// next_index: usize,
|
||||
|
||||
/// Previous entry index in the linked list. [`NULL_ENTRY`](constant.NULL_ENTRY.html)
|
||||
/// represents no previous entry, meaning the entry is at head.
|
||||
prev_index: usize,
|
||||
}
|
||||
// /// Previous entry index in the linked list. [`NULL_ENTRY`](constant.NULL_ENTRY.html)
|
||||
// /// represents no previous entry, meaning the entry is at head.
|
||||
// prev_index: usize,
|
||||
// }
|
||||
|
||||
impl DecodeCacheEntry {
|
||||
/// Creates a new entry. Initial `instruction_index` is
|
||||
/// `INVALID_CACHE_ENTRY` meaning the entry is invalid.
|
||||
///
|
||||
/// # Arguments
|
||||
/// * `next_index`
|
||||
/// * `prev_index`
|
||||
fn new(next_index: usize, prev_index: usize) -> Self {
|
||||
DecodeCacheEntry {
|
||||
word: 0,
|
||||
instruction_index: INVALID_CACHE_ENTRY,
|
||||
next_index,
|
||||
prev_index,
|
||||
}
|
||||
}
|
||||
}
|
||||
// impl DecodeCacheEntry {
|
||||
// /// Creates a new entry. Initial `instruction_index` is
|
||||
// /// `INVALID_CACHE_ENTRY` meaning the entry is invalid.
|
||||
// ///
|
||||
// /// # Arguments
|
||||
// /// * `next_index`
|
||||
// /// * `prev_index`
|
||||
// fn new(next_index: usize, prev_index: usize) -> Self {
|
||||
// DecodeCacheEntry {
|
||||
// word: 0,
|
||||
// instruction_index: INVALID_CACHE_ENTRY,
|
||||
// next_index,
|
||||
// prev_index,
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
|
||||
#[cfg(test)]
|
||||
mod test_cpu {
|
||||
|
|
|
|||
|
|
@ -1,5 +1,7 @@
|
|||
use std::io::Read;
|
||||
|
||||
mod xous;
|
||||
|
||||
#[derive(Debug)]
|
||||
enum LoadError {
|
||||
IncorrectFormat,
|
||||
|
|
@ -359,6 +361,7 @@ fn main() {
|
|||
let mut cpu = riscv_cpu::CpuBuilder::new()
|
||||
.memory_size(16 * 1024 * 1024)
|
||||
.xlen(riscv_cpu::Xlen::Bit32)
|
||||
.handler(Box::new(xous::XousHandler {}))
|
||||
.build();
|
||||
|
||||
load_program_to_cpu(&mut cpu, &std_tests).expect("couldn't load std-tests");
|
||||
|
|
|
|||
|
|
@ -0,0 +1,76 @@
|
|||
use riscv_cpu::cpu::EventHandler;
|
||||
|
||||
pub struct XousHandler {}
|
||||
|
||||
#[derive(Debug)]
|
||||
enum Syscall {
|
||||
Unknown([i64; 8]),
|
||||
IncreaseHeap(
|
||||
i64, /* number of bytes to add */
|
||||
i64, /* memory flags */
|
||||
),
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
pub enum SyscallNumber {
|
||||
MapMemory = 2,
|
||||
Yield = 3,
|
||||
IncreaseHeap = 10,
|
||||
UpdateMemoryFlags = 12,
|
||||
ReceiveMessage = 15,
|
||||
SendMessage = 16,
|
||||
Connect = 17,
|
||||
CreateThread = 18,
|
||||
UnmapMemory = 19,
|
||||
ReturnMemory = 20,
|
||||
TerminateProcess = 22,
|
||||
TrySendMessage = 24,
|
||||
TryConnect = 25,
|
||||
GetThreadId = 32,
|
||||
JoinThread = 36,
|
||||
AdjustProcessLimit = 38,
|
||||
ReturnScalar = 40,
|
||||
Unknown = 0,
|
||||
}
|
||||
|
||||
impl From<[i64; 8]> for Syscall {
|
||||
fn from(value: [i64; 8]) -> Self {
|
||||
match value[0].into() {
|
||||
SyscallNumber::IncreaseHeap => Syscall::IncreaseHeap(value[1], value[2]),
|
||||
_ => Syscall::Unknown(value),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl From<i64> for SyscallNumber {
|
||||
fn from(value: i64) -> Self {
|
||||
match value {
|
||||
2 => SyscallNumber::MapMemory,
|
||||
3 => SyscallNumber::Yield,
|
||||
10 => SyscallNumber::IncreaseHeap,
|
||||
12 => SyscallNumber::UpdateMemoryFlags,
|
||||
15 => SyscallNumber::ReceiveMessage,
|
||||
16 => SyscallNumber::SendMessage,
|
||||
17 => SyscallNumber::Connect,
|
||||
18 => SyscallNumber::CreateThread,
|
||||
19 => SyscallNumber::UnmapMemory,
|
||||
20 => SyscallNumber::ReturnMemory,
|
||||
22 => SyscallNumber::TerminateProcess,
|
||||
24 => SyscallNumber::TrySendMessage,
|
||||
25 => SyscallNumber::TryConnect,
|
||||
32 => SyscallNumber::GetThreadId,
|
||||
36 => SyscallNumber::JoinThread,
|
||||
38 => SyscallNumber::AdjustProcessLimit,
|
||||
40 => SyscallNumber::ReturnScalar,
|
||||
_ => SyscallNumber::Unknown,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl EventHandler for XousHandler {
|
||||
fn handle_event(&mut self, cpu: &mut riscv_cpu::Cpu, args: [i64; 8]) -> [i64; 8] {
|
||||
let syscall: Syscall = args.into();
|
||||
println!("Syscall {:?} with args: {:?}", syscall, &args[1..]);
|
||||
[0; 8]
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue