lib: rename accessors to reflect register-or-field
Some accessors work on fields, whereas others work on the whole register. Rename the functions to reflect what works where. Signed-off-by: Sean Cross <sean@xobs.io>
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fe68f64446
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70
src/lib.rs
70
src/lib.rs
@ -19,6 +19,9 @@ pub struct Field {
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/// Offset of the first bit in this field
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/// Offset of the first bit in this field
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offset: usize,
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offset: usize,
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/// A copy of the register address that this field
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/// is a member of. Ideally this is optimized out by the
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/// compiler.
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register: Register,
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register: Register,
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}
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}
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@ -26,6 +29,7 @@ impl Field {
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/// Define a new CSR field with the given width at a specified
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/// Define a new CSR field with the given width at a specified
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/// offset from the start of the register.
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/// offset from the start of the register.
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pub const fn new(width: usize, offset: usize, register: Register) -> Field {
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pub const fn new(width: usize, offset: usize, register: Register) -> Field {
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// Asserts don't work in const fn yet.
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// assert!(width != 0, "field width cannot be 0");
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// assert!(width != 0, "field width cannot be 0");
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// assert!((width + offset) < 32, "field with and offset must fit within a 32-bit value");
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// assert!((width + offset) < 32, "field with and offset must fit within a 32-bit value");
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@ -84,14 +88,26 @@ where
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pub fn new(base: *mut T) -> Self {
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pub fn new(base: *mut T) -> Self {
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CSR { base }
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CSR { base }
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}
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}
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pub fn r(&mut self, field: Field) -> T {
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/// Read the contents of this register
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pub fn r(&mut self, reg: Register) -> T {
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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unsafe { usize_base.add(reg.offset).read_volatile() }
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.try_into()
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.unwrap_or_default()
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}
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/// Read a field from this CSR
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pub fn rf(&mut self, field: Field) -> T {
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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((unsafe { usize_base.add(field.register.offset).read_volatile() } >> field.offset)
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((unsafe { usize_base.add(field.register.offset).read_volatile() } >> field.offset)
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& field.mask)
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& field.mask)
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.try_into()
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.try_into()
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.unwrap_or_default()
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.unwrap_or_default()
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}
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}
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pub fn rw(&mut self, field: Field, value: T) {
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/// Read-modify-write a given field in this CSR
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pub fn rmwf(&mut self, field: Field, value: T) {
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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let value_as_usize: usize = value.try_into().unwrap_or_default() << field.offset;
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let value_as_usize: usize = value.try_into().unwrap_or_default() << field.offset;
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let previous =
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let previous =
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@ -102,7 +118,9 @@ where
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.write_volatile(previous | value_as_usize)
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.write_volatile(previous | value_as_usize)
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};
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};
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}
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}
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pub fn ow(&mut self, field: Field, value: T) {
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/// Write a given field without reading it first
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pub fn wf(&mut self, field: Field, value: T) {
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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let value_as_usize: usize = value.try_into().unwrap_or_default() << field.offset;
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let value_as_usize: usize = value.try_into().unwrap_or_default() << field.offset;
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unsafe {
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unsafe {
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@ -111,6 +129,17 @@ where
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.write_volatile(value_as_usize)
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.write_volatile(value_as_usize)
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};
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};
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}
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}
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/// Write the entire contents of a register without reading it first
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pub fn w(&mut self, reg: Register, value: T) {
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let usize_base: *mut usize = unsafe { core::mem::transmute(self.base) };
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let value_as_usize: usize = value.try_into().unwrap_or_default();
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unsafe {
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usize_base
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.add(reg.offset)
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.write_volatile(value_as_usize)
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};
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}
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}
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}
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#[cfg(test)]
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#[cfg(test)]
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@ -132,20 +161,41 @@ mod tests {
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#[test]
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#[test]
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fn compile_check() {
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fn compile_check() {
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use super::*;
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use super::*;
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let mut audio = CSR::new(0x1000_0000 as *mut u32);
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audio.r(pac::audio::RX_CTL_ENABLE);
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audio.rw(pac::audio::RX_CTL_RESET, 1);
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// Audio tests
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// The audio block is a pointer to *mut 32.
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let mut audio = CSR::new(0x1000_0000 as *mut u32);
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// Read the entire contents of the RX_CTL register
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audio.r(pac::audio::RX_CTL);
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// Or read just one field
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audio.rf(pac::audio::RX_CTL_ENABLE);
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// Do a read-modify-write of the specified field
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audio.rmwf(pac::audio::RX_CTL_RESET, 1);
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// UART tests
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// Create the UART register as a pointer to *mut u8
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let mut uart = CSR::new(0x1001_0000 as *mut u8);
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let mut uart = CSR::new(0x1001_0000 as *mut u8);
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uart.ow(pac::uart::RXTX_RXTX, b'a');
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assert_ne!(uart.r(pac::uart::TXFULL_TXFULL), 1);
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// Write the RXTX field of the RXTX register
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uart.wf(pac::uart::RXTX_RXTX, b'a');
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// Or you can write the whole UART register
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uart.w(pac::uart::RXTX, b'a');
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assert_ne!(uart.rf(pac::uart::TXFULL_TXFULL), 1);
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// Anomalies
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// This compiles but requires a cast since `audio` is a pointer to
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// This compiles but requires a cast since `audio` is a pointer to
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// u32, whereas `uart` is a pointer to u8.
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// u32, whereas `uart` is a pointer to u8.
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audio.ow(pac::uart::RXTX_RXTX, b'a' as _);
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audio.wf(pac::uart::RXTX_RXTX, b'a' as _);
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// This also compiles, despite the fact that the register offset is
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// This also compiles, despite the fact that the register offset is
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// mismatched and nonsensical
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// mismatched and nonsensical
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audio.ow(pac::uart::TXFULL_TXFULL, 1);
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audio.wf(pac::uart::TXFULL_TXFULL, 1);
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}
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}
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}
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}
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