282 lines
6.5 KiB
C
282 lines
6.5 KiB
C
#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <unistd.h>
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#include <stdint.h>
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#include <string.h>
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#include <fcntl.h>
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#include <errno.h>
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#include <sys/mman.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <time.h>
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static volatile uint32_t piModel = 1;
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static volatile uint32_t piPeriphBase = 0x20000000;
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static volatile uint32_t piBusAddr = 0x40000000;
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#define SYST_BASE (piPeriphBase + 0x003000)
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#define DMA_BASE (piPeriphBase + 0x007000)
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#define CLK_BASE (piPeriphBase + 0x101000)
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#define GPIO_BASE (piPeriphBase + 0x200000)
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#define UART0_BASE (piPeriphBase + 0x201000)
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#define PCM_BASE (piPeriphBase + 0x203000)
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#define SPI0_BASE (piPeriphBase + 0x204000)
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#define I2C0_BASE (piPeriphBase + 0x205000)
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#define PWM_BASE (piPeriphBase + 0x20C000)
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#define BSCS_BASE (piPeriphBase + 0x214000)
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#define UART1_BASE (piPeriphBase + 0x215000)
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#define I2C1_BASE (piPeriphBase + 0x804000)
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#define I2C2_BASE (piPeriphBase + 0x805000)
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#define DMA15_BASE (piPeriphBase + 0xE05000)
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#define DMA_LEN 0x1000 /* allow access to all channels */
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#define CLK_LEN 0xA8
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#define GPIO_LEN 0xB4
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#define SYST_LEN 0x1C
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#define PCM_LEN 0x24
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#define PWM_LEN 0x28
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#define I2C_LEN 0x1C
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#define GPSET0 7
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#define GPSET1 8
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#define GPCLR0 10
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#define GPCLR1 11
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#define GPLEV0 13
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#define GPLEV1 14
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#define GPPUD 37
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#define GPPUDCLK0 38
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#define GPPUDCLK1 39
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#define SYST_CS 0
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#define SYST_CLO 1
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#define SYST_CHI 2
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#define CLK_PASSWD (0x5A<<24)
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#define CLK_CTL_MASH(x)((x)<<9)
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#define CLK_CTL_BUSY (1 <<7)
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#define CLK_CTL_KILL (1 <<5)
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#define CLK_CTL_ENAB (1 <<4)
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#define CLK_CTL_SRC(x) ((x)<<0)
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#define CLK_SRCS 4
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#define CLK_CTL_SRC_OSC 1 /* 19.2 MHz */
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#define CLK_CTL_SRC_PLLC 5 /* 1000 MHz */
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#define CLK_CTL_SRC_PLLD 6 /* 500 MHz */
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#define CLK_CTL_SRC_HDMI 7 /* 216 MHz */
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#define CLK_DIV_DIVI(x) ((x)<<12)
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#define CLK_DIV_DIVF(x) ((x)<< 0)
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#define CLK_GP0_CTL 28
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#define CLK_GP0_DIV 29
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#define CLK_GP1_CTL 30
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#define CLK_GP1_DIV 31
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#define CLK_GP2_CTL 32
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#define CLK_GP2_DIV 33
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#define CLK_PCM_CTL 38
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#define CLK_PCM_DIV 39
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#define CLK_PWM_CTL 40
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#define CLK_PWM_DIV 41
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static volatile uint32_t *gpioReg = MAP_FAILED;
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static volatile uint32_t *systReg = MAP_FAILED;
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static volatile uint32_t *clkReg = MAP_FAILED;
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#define PI_BANK (gpio>>5)
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#define PI_BIT (1<<(gpio&0x1F))
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/* gpio modes. */
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#define PI_INPUT 0
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#define PI_OUTPUT 1
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#define PI_ALT0 4
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#define PI_ALT1 5
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#define PI_ALT2 6
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#define PI_ALT3 7
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#define PI_ALT4 3
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#define PI_ALT5 2
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void gpioSetMode(unsigned gpio, unsigned mode) {
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int reg, shift;
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reg = gpio/10;
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shift = (gpio%10) * 3;
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gpioReg[reg] = (gpioReg[reg] & ~(7<<shift)) | (mode<<shift);
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}
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int gpioGetMode(unsigned gpio) {
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int reg, shift;
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reg = gpio/10;
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shift = (gpio%10) * 3;
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return (*(gpioReg + reg) >> shift) & 7;
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}
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/* Values for pull-ups/downs off, pull-down and pull-up. */
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#define PI_PUD_OFF 0
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#define PI_PUD_DOWN 1
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#define PI_PUD_UP 2
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void gpioSetPullUpDown(unsigned gpio, unsigned pud) {
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*(gpioReg + GPPUD) = pud;
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usleep(20);
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*(gpioReg + GPPUDCLK0 + PI_BANK) = PI_BIT;
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usleep(20);
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*(gpioReg + GPPUD) = 0;
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*(gpioReg + GPPUDCLK0 + PI_BANK) = 0;
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}
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int gpioRead(unsigned gpio) {
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if ((*(gpioReg + GPLEV0 + PI_BANK) & PI_BIT) != 0) return 1;
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else return 0;
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}
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void gpioWrite(unsigned gpio, unsigned level) {
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if (level == 0) *(gpioReg + GPCLR0 + PI_BANK) = PI_BIT;
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else *(gpioReg + GPSET0 + PI_BANK) = PI_BIT;
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}
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void gpioTrigger(unsigned gpio, unsigned pulseLen, unsigned level) {
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if (level == 0) *(gpioReg + GPCLR0 + PI_BANK) = PI_BIT;
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else *(gpioReg + GPSET0 + PI_BANK) = PI_BIT;
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usleep(pulseLen);
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if (level != 0) *(gpioReg + GPCLR0 + PI_BANK) = PI_BIT;
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else *(gpioReg + GPSET0 + PI_BANK) = PI_BIT;
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}
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/* Bit (1<<x) will be set if gpio x is high. */
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uint32_t gpioReadBank1(void) { return (*(gpioReg + GPLEV0)); }
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uint32_t gpioReadBank2(void) { return (*(gpioReg + GPLEV1)); }
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/* To clear gpio x bit or in (1<<x). */
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void gpioClearBank1(uint32_t bits) { *(gpioReg + GPCLR0) = bits; }
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void gpioClearBank2(uint32_t bits) { *(gpioReg + GPCLR1) = bits; }
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/* To set gpio x bit or in (1<<x). */
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void gpioSetBank1(uint32_t bits) { *(gpioReg + GPSET0) = bits; }
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void gpioSetBank2(uint32_t bits) { *(gpioReg + GPSET1) = bits; }
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unsigned gpioHardwareRevision(void) {
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static unsigned rev = 0;
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FILE * filp;
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char buf[512];
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char term;
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int chars=4; /* number of chars in revision string */
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if (rev) return rev;
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piModel = 0;
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filp = fopen ("/proc/cpuinfo", "r");
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if (filp != NULL)
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{
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while (fgets(buf, sizeof(buf), filp) != NULL)
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{
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if (piModel == 0)
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{
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if (!strncasecmp("model name", buf, 10))
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{
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if (strstr (buf, "ARMv6") != NULL)
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{
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piModel = 1;
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chars = 4;
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piPeriphBase = 0x20000000;
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piBusAddr = 0x40000000;
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}
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else if (strstr (buf, "ARMv7") != NULL)
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{
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piModel = 2;
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chars = 6;
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piPeriphBase = 0x3F000000;
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piBusAddr = 0xC0000000;
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}
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}
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}
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if (!strncasecmp("revision", buf, 8))
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{
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if (sscanf(buf+strlen(buf)-(chars+1),
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"%x%c", &rev, &term) == 2)
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{
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if (term != '\n') rev = 0;
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}
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}
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}
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fclose(filp);
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}
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return rev;
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}
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/* Returns the number of microseconds after system boot. Wraps around
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after 1 hour 11 minutes 35 seconds.
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*/
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uint32_t gpioTick(void) {
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return systReg[SYST_CLO];
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}
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/* Map in registers. */
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static uint32_t *initMapMem(int fd, uint32_t addr, uint32_t len) {
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return (uint32_t *) mmap(0, len,
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PROT_READ|PROT_WRITE|PROT_EXEC,
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MAP_SHARED|MAP_LOCKED,
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fd, addr);
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}
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int gpioInitialise(void) {
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int fd;
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gpioHardwareRevision(); /* sets piModel, needed for peripherals address */
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fd = open("/dev/mem", O_RDWR | O_SYNC) ;
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if (fd < 0)
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{
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fprintf(stderr,
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"This program needs root privileges. Try using sudo\n");
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return -1;
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}
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gpioReg = initMapMem(fd, GPIO_BASE, GPIO_LEN);
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systReg = initMapMem(fd, SYST_BASE, SYST_LEN);
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clkReg = initMapMem(fd, CLK_BASE, CLK_LEN);
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close(fd);
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if ((gpioReg == MAP_FAILED) ||
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(systReg == MAP_FAILED) ||
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(clkReg == MAP_FAILED))
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{
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fprintf(stderr,
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"Bad, mmap failed\n");
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return -1;
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}
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return 0;
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}
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