Commit Graph

46 Commits

Author SHA1 Message Date
9506159380 fomu-flash: disable ICE40_DEBUG_PATCH
Since we've got ice40 working, we don't need to debug it anymore.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 14:49:11 +08:00
89af26047e ice40: rewrite matching heuristic to increase reliability
Instead of looping through a small window, figure out the various bit
positions and offsets.  Then, as we scan through, validate that we've
found the proper offsets.

This should get us to 100% reliability.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 14:48:05 +08:00
9876d92981 fpga: convert tabs to spaces
Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 13:10:19 +08:00
f4297532d0 fomu-flash: make DEBUG_ICE40_PATCH work better
Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 13:08:13 +08:00
4156a37d72 fomu-flash: convert tabs to spaces
Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 13:03:09 +08:00
f2ae56a13e ice40: convert tabs to spaces
Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 13:02:41 +08:00
61151b4618 fomu-flash: add debug hack to fix ice40 stuff
This will write data to a file, rather than to SPI.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-26 13:01:04 +08:00
d6bff65d0b Merge branch 'master' of github.com:im-tomu/fomu-flash 2019-02-25 22:17:38 +08:00
ea6c170023 ice40: lower fuzz size to improve patcher reliability
The fuzz size should be made smaller, because we're getting too many false positives.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-25 22:16:31 +08:00
d2b4ff089d ice40: convert from dos to unix line endings
Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-25 18:38:53 +08:00
fb21ad75e2
Merge pull request #3 from tari/hardware-spi
Document the requirement for hardware SPI
2019-02-25 17:11:10 +08:00
5e3ac61921
Merge branch 'master' into hardware-spi 2019-02-25 17:10:11 +08:00
7fb6e4bb7b README: mention the existence of the -l command
Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-25 13:56:22 +08:00
bcbc7319c1 fomu-flash: add -l (rom) option to load a rom
This can be used to quickly develop a bootloader, or other boot
rom for an ICE40.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-25 13:51:27 +08:00
4ca2218403 ice40: experimental rom patching support
We can now do away with the `iceunpack`/`icebram`/`icepack` dance and
simply patch files on the fly.  This should simplify development,
since you only need two files (the bitstream and the replacement rom),
rather than four files (the bitstream, the replacement rom, the
random contents, and the output file).

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-25 13:49:38 +08:00
Peter Marheine
eb328612b2 Document the requirement for hardware SPI
I spent a while fighting with my hardware before working this out- if
SPI is disabled in the kernel reads will return all 1s which is very
confusing and looks more like something is wired up wrong when it's
actually correct.
2019-02-25 14:56:02 +11:00
13464db5de fomu-flash: map F_RESET differently for original Pi
Pin 13, which we use as F_RESET, was originally routed to BCM Pin 21.
All other revisions of the board map it to BCM Pin 27.

Check for the original version of the board, and re-assign F_RESET as
necessary.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-02-11 10:27:37 +08:00
987ae9071a fomu-flash: fix pinspec to match hacker version silk
The silkscreen on the hacker version uses "S" for chip select and
"C" for clock.  Have the help screen and "-g" parameter use this
convention for arguments.

This fixes Github issue #2.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-01-14 09:28:29 +08:00
e3f110f267
Merge pull request #1 from osresearch/master
erase the security register pages before writing
2019-01-14 09:04:42 +08:00
Trammell hudson
20978ad4e5
erase the security register pages before writing 2019-01-13 20:01:51 -05:00
676bcb33a1 README: fix some typos
Signed-off-by: Sean Cross <sean@xobs.io>
2019-01-02 18:38:45 +08:00
fb72772b5a README: add pinout and connection instructions
Signed-off-by: Sean Cross <sean@xobs.io>
2019-01-02 18:37:25 +08:00
556fdb8e1b spi: set sr2 quirk by default
most chips, it seems, write sr2 just after sr1 instead of having
a separate command.  Set this quirk by default.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-19 00:01:58 -05:00
27dec515e7 enable capacity overriding
We have different-sized SPI flash chips, so when possible set the
capacity based on various id codes.

Also allow for manually overriding capacity with the -b option.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-19 00:00:25 -05:00
9b1b9b8a88 fomu-flash: implement -k security register stuff
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 23:03:38 -05:00
ff1f8583af spi: get security register stuff working
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 23:03:25 -05:00
c0c9f22748 spi: add the ability to read and write security
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 22:18:26 -05:00
70591122af fomu-flash: print out device strings as part of -i
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 22:09:57 -05:00
09f0db5ca7 spi: add strings to device id
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 22:09:49 -05:00
91b4a74dc8 spi: flush stdout
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:57:34 -05:00
f4ac6ea812 spi: handle qpi better for command handling
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:53:22 -05:00
af1dff1e28 spi: use quirks for reading from SR
Different chips handle reading from SR in different ways.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:52:58 -05:00
edd8824a74 spi: add quirks system
Not all SPI chips are the same.  Add a system to differentiate them.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:52:24 -05:00
fc6d6a575d spi: print out progress while writing
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:40:01 -05:00
6b6266c1de spi: issue "wake from reset" as part of spiReset()
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:38:31 -05:00
4e411774c0 spi: remove unused prototype
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:33:53 -05:00
f4d2c46eb3 fomu-flash: print out status registers as part of id
Print the contents of SR1, SR2, and SR3.  Not all chips have SR3,
so this may be 0xff.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-18 20:32:10 -05:00
fed97ce846 fomu-flash: add -i option to print id codes
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-29 04:27:29 -05:00
a9af9820be spi: add function to read various id codes
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-29 04:27:19 -05:00
cddbe4c90c fomu-flash: add spi speed flag
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-29 03:51:49 -05:00
3beccf1b03 documentation: add readme and license file
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-17 22:09:00 +08:00
a8de1b56dc fomu-flash: add the ability to specify more pins
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-17 22:07:10 +08:00
253e82b5cb fomu-flash: add offset parameter to -p
Add an offset parameter to -p.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-17 21:40:40 +08:00
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09fe20efda fomu-flash: first full commit
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2018-11-28 13:19:51 -05:00
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c2f21f1df1 rearrange pin definitions
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2018-11-28 11:02:49 -05:00
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23616a1c4b initial commit
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2018-11-28 10:52:27 -05:00