spi: add the ability to read and write security
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
parent
70591122af
commit
c0c9f22748
45
spi.c
45
spi.c
@ -41,6 +41,8 @@ struct ff_spi {
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} pins;
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} pins;
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};
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};
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static void spi_get_id(struct ff_spi *spi);
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static void spi_set_state(struct ff_spi *spi, enum spi_state state) {
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static void spi_set_state(struct ff_spi *spi, enum spi_state state) {
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if (spi->state == state)
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if (spi->state == state)
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return;
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return;
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@ -299,7 +301,7 @@ uint8_t spiCommandRx(struct ff_spi *spi) {
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return spiSingleRx(spi);
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return spiSingleRx(spi);
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}
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}
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uint8_t spiReadSr(struct ff_spi *spi, int sr) {
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uint8_t spiReadStatus(struct ff_spi *spi, uint8_t sr) {
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uint8_t val = 0xff;
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uint8_t val = 0xff;
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switch (sr) {
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switch (sr) {
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@ -332,7 +334,24 @@ uint8_t spiReadSr(struct ff_spi *spi, int sr) {
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return val;
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return val;
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}
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}
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void spiWriteSr(struct ff_spi *spi, int sr, uint8_t val) {
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void spiWriteSecurity(struct ff_spi *spi, uint8_t sr, uint8_t val) {
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spiBegin(spi);
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spiCommand(spi, 0x06);
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spiEnd(spi);
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spiBegin(spi);
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spiCommand(spi, 0x42);
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spiCommand(spi, 0x00);
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spiCommand(spi, sr);
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spiCommand(spi, 0x00);
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spiCommand(spi, val);
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spiEnd(spi);
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spi_get_id(spi);
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}
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void spiWriteStatus(struct ff_spi *spi, uint8_t sr, uint8_t val) {
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switch (sr) {
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switch (sr) {
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case 1:
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case 1:
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@ -355,7 +374,7 @@ void spiWriteSr(struct ff_spi *spi, int sr, uint8_t val) {
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case 2: {
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case 2: {
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uint8_t sr1 = 0x00;
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uint8_t sr1 = 0x00;
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if (spi->quirks & SQ_SR2_FROM_SR1)
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if (spi->quirks & SQ_SR2_FROM_SR1)
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sr1 = spiReadSr(spi, 1);
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sr1 = spiReadStatus(spi, 1);
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if (!(spi->quirks & SQ_SKIP_SR_WEL)) {
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if (!(spi->quirks & SQ_SKIP_SR_WEL)) {
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spiBegin(spi);
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spiBegin(spi);
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@ -476,6 +495,16 @@ static void spi_get_id(struct ff_spi *spi) {
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spi->id.serial[3] = spiCommandRx(spi);
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spi->id.serial[3] = spiCommandRx(spi);
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spiEnd(spi);
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spiEnd(spi);
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spiBegin(spi);
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spiCommand(spi, 0x48); // Read security registers
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spiCommand(spi, 0x00); // Dummy byte 1
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spiCommand(spi, 0x00); // Dummy byte 2
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spiCommand(spi, 0x00); // Dummy byte 3
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spi->id.security[0] = spiCommandRx(spi);
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spi->id.security[1] = spiCommandRx(spi);
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spi->id.security[2] = spiCommandRx(spi);
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spiEnd(spi);
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spi_decode_id(spi);
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spi_decode_id(spi);
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return;
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return;
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}
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}
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@ -515,7 +544,7 @@ int spiSetType(struct ff_spi *spi, enum spi_type type) {
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}
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}
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// Enable QE bit
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// Enable QE bit
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spiWriteSr(spi, 2, spiReadSr(spi, 2) | (1 << 1));
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spiWriteStatus(spi, 2, spiReadStatus(spi, 2) | (1 << 1));
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spi->type = type;
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spi->type = type;
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spi_set_state(spi, SS_QUAD_TX);
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spi_set_state(spi, SS_QUAD_TX);
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@ -523,7 +552,7 @@ int spiSetType(struct ff_spi *spi, enum spi_type type) {
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case ST_QPI:
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case ST_QPI:
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// Enable QE bit
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// Enable QE bit
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spiWriteSr(spi, 2, spiReadSr(spi, 2) | (1 << 1));
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spiWriteStatus(spi, 2, spiReadStatus(spi, 2) | (1 << 1));
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spiBegin(spi);
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spiBegin(spi);
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spiCommand(spi, 0x38); // Enter QPI Mode
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spiCommand(spi, 0x38); // Enter QPI Mode
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@ -573,10 +602,10 @@ int spiRead(struct ff_spi *spi, uint32_t addr, uint8_t *data, unsigned int count
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static int spi_wait_for_not_busy(struct ff_spi *spi) {
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static int spi_wait_for_not_busy(struct ff_spi *spi) {
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uint8_t sr1;
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uint8_t sr1;
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sr1 = spiReadSr(spi, 1);
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sr1 = spiReadStatus(spi, 1);
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do {
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do {
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sr1 = spiReadSr(spi, 1);
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sr1 = spiReadStatus(spi, 1);
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} while (sr1 & (1 << 0));
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} while (sr1 & (1 << 0));
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return 0;
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return 0;
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}
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}
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@ -643,7 +672,7 @@ int spiWrite(struct ff_spi *spi, uint32_t addr, const uint8_t *data, unsigned in
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spiCommand(spi, 0x06);
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spiCommand(spi, 0x06);
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spiEnd(spi);
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spiEnd(spi);
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uint8_t sr1 = spiReadSr(spi, 1);
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uint8_t sr1 = spiReadStatus(spi, 1);
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if (!(sr1 & (1 << 1)))
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if (!(sr1 & (1 << 1)))
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fprintf(stderr, "error: write-enable latch (WEL) not set, write will probably fail\n");
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fprintf(stderr, "error: write-enable latch (WEL) not set, write will probably fail\n");
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6
spi.h
6
spi.h
@ -42,6 +42,7 @@ struct spi_id {
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uint8_t memory_size; // Result from 0x9f
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uint8_t memory_size; // Result from 0x9f
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uint8_t signature; // Result from 0xab
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uint8_t signature; // Result from 0xab
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uint8_t serial[4]; // Result from 0x4b
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uint8_t serial[4]; // Result from 0x4b
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uint8_t security[3]; // Result from 0x48
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const char *manufacturer;
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const char *manufacturer;
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const char *model;
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const char *model;
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const char *capacity;
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const char *capacity;
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@ -62,8 +63,9 @@ void spiCommand(struct ff_spi *spi, uint8_t cmd);
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//uint8_t spiQuadRx(struct ff_spi *spi);
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//uint8_t spiQuadRx(struct ff_spi *spi);
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int spiTx(struct ff_spi *spi, uint8_t word);
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int spiTx(struct ff_spi *spi, uint8_t word);
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uint8_t spiRx(struct ff_spi *spi);
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uint8_t spiRx(struct ff_spi *spi);
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uint8_t spiReadSr(struct ff_spi *spi, int sr);
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uint8_t spiReadStatus(struct ff_spi *spi, uint8_t sr);
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void spiWriteSr(struct ff_spi *spi, int sr, uint8_t val);
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void spiWriteStatus(struct ff_spi *spi, uint8_t sr, uint8_t val);
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void spiWriteSecurity(struct ff_spi *spi, uint8_t sr, uint8_t val);
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int spiSetType(struct ff_spi *spi, enum spi_type type);
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int spiSetType(struct ff_spi *spi, enum spi_type type);
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int spiRead(struct ff_spi *spi, uint32_t addr, uint8_t *data, unsigned int count);
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int spiRead(struct ff_spi *spi, uint32_t addr, uint8_t *data, unsigned int count);
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