121 lines
2.3 KiB
ArmAsm
121 lines
2.3 KiB
ArmAsm
.text
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.align 2
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#ifndef __riscv64
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/* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines. */
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# define __udivdi3 __udivsi3
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# define __umoddi3 __umodsi3
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# define __divdi3 __divsi3
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# define __moddi3 __modsi3
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#else
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.globl __udivsi3
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__udivsi3:
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/* Compute __udivdi3(a0 << 32, a1 << 32); cast result to uint32_t. */
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sll a0, a0, 32
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sll a1, a1, 32
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move t0, ra
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jal __udivdi3
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sext.w a0, a0
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jr t0
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.globl __umodsi3
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__umodsi3:
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/* Compute __udivdi3((uint32_t)a0, (uint32_t)a1); cast a1 to uint32_t. */
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sll a0, a0, 32
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sll a1, a1, 32
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srl a0, a0, 32
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srl a1, a1, 32
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move t0, ra
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jal __udivdi3
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sext.w a0, a1
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jr t0
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.globl __modsi3
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__modsi3 = __moddi3
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.globl __divsi3
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__divsi3:
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/* Check for special case of INT_MIN/-1. Otherwise, fall into __divdi3. */
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li t0, -1
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beq a1, t0, .L20
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#endif
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.globl __divdi3
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__divdi3:
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bltz a0, .L10
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bltz a1, .L11
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/* Since the quotient is positive, fall into __udivdi3. */
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.globl __udivdi3
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__udivdi3:
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mv a2, a1
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mv a1, a0
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li a0, -1
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beqz a2, .L5
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li a3, 1
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bgeu a2, a1, .L2
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.L1:
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blez a2, .L2
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slli a2, a2, 1
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slli a3, a3, 1
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bgtu a1, a2, .L1
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.L2:
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li a0, 0
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.L3:
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bltu a1, a2, .L4
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sub a1, a1, a2
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or a0, a0, a3
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.L4:
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srli a3, a3, 1
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srli a2, a2, 1
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bnez a3, .L3
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.L5:
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ret
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.globl __umoddi3
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__umoddi3:
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/* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */
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move t0, ra
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jal __udivdi3
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move a0, a1
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jr t0
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/* Handle negative arguments to __divdi3. */
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.L10:
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neg a0, a0
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bgez a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */
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neg a1, a1
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j __divdi3 /* Compute __udivdi3(-a0, -a1). */
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.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */
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neg a1, a1
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.L12:
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move t0, ra
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jal __divdi3
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neg a0, a0
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jr t0
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.globl __moddi3
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__moddi3:
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move t0, ra
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bltz a1, .L31
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bltz a0, .L32
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.L30:
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jal __udivdi3 /* The dividend is not negative. */
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move a0, a1
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jr t0
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.L31:
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neg a1, a1
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bgez a0, .L30
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.L32:
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neg a0, a0
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jal __udivdi3 /* The dividend is hella negative. */
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neg a0, a1
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jr t0
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#ifdef __riscv64
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/* continuation of __divsi3 */
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.L20:
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sll t0, t0, 31
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bne a0, t0, __divdi3
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ret
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#endif |