From e8aaac5cfedc8e75a7612f26efaf2ff5ae13ac3d Mon Sep 17 00:00:00 2001 From: Sean Cross Date: Wed, 22 May 2019 15:02:00 +0800 Subject: [PATCH] sw: first software commit The software is untested, but it builds. Signed-off-by: Sean Cross --- .gitmodules | 14 +- {bin => hw/bin}/litex_read_verilog | 0 {bin => hw/bin}/litex_server | 0 {bin => hw/bin}/litex_sim | 0 {bin => hw/bin}/litex_simple | 0 {bin => hw/bin}/litex_term | 0 {bin => hw/bin}/mkmscimg | 0 {deps => hw/deps}/litedram | 0 {deps => hw/deps}/litescope | 0 {deps => hw/deps}/litex | 0 {deps => hw/deps}/lxsocsupport | 0 {deps => hw/deps}/migen | 0 {deps => hw/deps}/pyserial | 0 {deps => hw/deps}/valentyusb | 0 .../factory-bitstream.py | 52 +- lxbuildenv.py => hw/lxbuildenv.py | 0 hw/rtl/2-stage-1024-cache-debug.v | 3578 +++++++++++++++ hw/rtl/2-stage-1024-cache-debug.yaml | 5 + hw/rtl/2-stage-1024-cache.v | 3289 ++++++++++++++ hw/rtl/2-stage-1024-cache.yaml | 4 + hw/rtl/2-stage-2048-cache-debug.v | 3578 +++++++++++++++ hw/rtl/2-stage-2048-cache-debug.yaml | 5 + hw/rtl/2-stage-2048-cache.v | 3297 ++++++++++++++ hw/rtl/2-stage-2048-cache.yaml | 4 + hw/rtl/2-stage-512-cache-debug.v | 3769 ++++++++++++++++ hw/rtl/2-stage-512-cache-debug.yaml | 5 + hw/rtl/2-stage-no-cache-debug.v | 3499 +++++++++++++++ hw/rtl/2-stage-no-cache-debug.yaml | 1 + hw/rtl/4-stage-1024-cache-debug.v | 3965 +++++++++++++++++ hw/rtl/4-stage-1024-cache-debug.yaml | 5 + hw/rtl/4-stage-no-cache-debug.v | 3865 ++++++++++++++++ hw/rtl/4-stage-no-cache-debug.yaml | 1 + hw/rtl/5-stage-pipelined-no-cache-debug.v | 3902 ++++++++++++++++ hw/rtl/5-stage-pipelined-no-cache-debug.yaml | 1 + hw/rtl/spimemio.v | 579 +++ sw/Makefile | 131 + sw/include/fomu/csr.h | 903 ++++ sw/include/fomu/mem.h | 16 + sw/include/irq.h | 145 + sw/include/rgb.h | 10 + sw/include/riscv.h | 54 + sw/include/spi.h | 94 + sw/include/time.h | 16 + sw/include/usb-cdc.h | 162 + sw/include/usb-desc.h | 101 + sw/include/usb.h | 30 + sw/ld/linker.ld | 55 + sw/ld/output_format.ld | 1 + sw/ld/regions.ld | 4 + sw/src/crt0-vexriscv.S | 91 + sw/src/main.c | 46 + sw/src/rgb.c | 89 + sw/src/spi.c | 824 ++++ sw/src/time.c | 43 + sw/src/usb-desc.c | 220 + sw/src/usb-epfifo.c | 254 ++ sw/src/usb-setup.c | 114 + 57 files changed, 36778 insertions(+), 43 deletions(-) rename {bin => hw/bin}/litex_read_verilog (100%) rename {bin => hw/bin}/litex_server (100%) rename {bin => hw/bin}/litex_sim (100%) rename {bin => hw/bin}/litex_simple (100%) rename {bin => hw/bin}/litex_term (100%) rename {bin => hw/bin}/mkmscimg (100%) rename {deps => hw/deps}/litedram (100%) rename {deps => hw/deps}/litescope (100%) rename {deps => hw/deps}/litex (100%) rename {deps => hw/deps}/lxsocsupport (100%) rename {deps => hw/deps}/migen (100%) rename {deps => hw/deps}/pyserial (100%) rename {deps => hw/deps}/valentyusb (100%) rename factory-bitstream.py => hw/factory-bitstream.py (96%) rename lxbuildenv.py => hw/lxbuildenv.py (100%) create mode 100644 hw/rtl/2-stage-1024-cache-debug.v create mode 100644 hw/rtl/2-stage-1024-cache-debug.yaml create mode 100644 hw/rtl/2-stage-1024-cache.v create mode 100644 hw/rtl/2-stage-1024-cache.yaml create mode 100644 hw/rtl/2-stage-2048-cache-debug.v create mode 100644 hw/rtl/2-stage-2048-cache-debug.yaml create mode 100644 hw/rtl/2-stage-2048-cache.v create mode 100644 hw/rtl/2-stage-2048-cache.yaml create mode 100644 hw/rtl/2-stage-512-cache-debug.v create mode 100644 hw/rtl/2-stage-512-cache-debug.yaml create mode 100644 hw/rtl/2-stage-no-cache-debug.v create mode 100644 hw/rtl/2-stage-no-cache-debug.yaml create mode 100644 hw/rtl/4-stage-1024-cache-debug.v create mode 100644 hw/rtl/4-stage-1024-cache-debug.yaml create mode 100644 hw/rtl/4-stage-no-cache-debug.v create mode 100644 hw/rtl/4-stage-no-cache-debug.yaml create mode 100644 hw/rtl/5-stage-pipelined-no-cache-debug.v create mode 100644 hw/rtl/5-stage-pipelined-no-cache-debug.yaml create mode 100644 hw/rtl/spimemio.v create mode 100644 sw/Makefile create mode 100644 sw/include/fomu/csr.h create mode 100644 sw/include/fomu/mem.h create mode 100644 sw/include/irq.h create mode 100644 sw/include/rgb.h create mode 100644 sw/include/riscv.h create mode 100644 sw/include/spi.h create mode 100644 sw/include/time.h create mode 100644 sw/include/usb-cdc.h create mode 100644 sw/include/usb-desc.h create mode 100644 sw/include/usb.h create mode 100644 sw/ld/linker.ld create mode 100644 sw/ld/output_format.ld create mode 100644 sw/ld/regions.ld create mode 100644 sw/src/crt0-vexriscv.S create mode 100644 sw/src/main.c create mode 100644 sw/src/rgb.c create mode 100644 sw/src/spi.c create mode 100644 sw/src/time.c create mode 100644 sw/src/usb-desc.c create mode 100644 sw/src/usb-epfifo.c create mode 100644 sw/src/usb-setup.c diff --git a/.gitmodules b/.gitmodules index a17a6e4..e8feedf 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,21 +1,21 @@ [submodule "deps/migen"] - path = deps/migen + path = hw/deps/migen url = https://github.com/m-labs/migen.git [submodule "deps/litex"] - path = deps/litex + path = hw/deps/litex url = https://github.com/enjoy-digital/litex.git [submodule "deps/litescope"] - path = deps/litescope + path = hw/deps/litescope url = https://github.com/enjoy-digital/litescope.git [submodule "deps/pyserial"] - path = deps/pyserial + path = hw/deps/pyserial url = https://github.com/pyserial/pyserial.git [submodule "deps/litedram"] - path = deps/litedram + path = hw/deps/litedram url = https://github.com/enjoy-digital/litedram.git [submodule "deps/valentyusb"] - path = deps/valentyusb + path = hw/deps/valentyusb url = https://github.com/im-tomu/valentyusb.git [submodule "deps/lxsocsupport"] - path = deps/lxsocsupport + path = hw/deps/lxsocsupport url = https://github.com/xobs/lxsocsupport.git diff --git a/bin/litex_read_verilog b/hw/bin/litex_read_verilog similarity index 100% rename from bin/litex_read_verilog rename to hw/bin/litex_read_verilog diff --git a/bin/litex_server b/hw/bin/litex_server similarity index 100% rename from bin/litex_server rename to hw/bin/litex_server diff --git a/bin/litex_sim b/hw/bin/litex_sim similarity index 100% rename from bin/litex_sim rename to hw/bin/litex_sim diff --git a/bin/litex_simple b/hw/bin/litex_simple similarity index 100% rename from bin/litex_simple rename to hw/bin/litex_simple diff --git a/bin/litex_term b/hw/bin/litex_term similarity index 100% rename from bin/litex_term rename to hw/bin/litex_term diff --git a/bin/mkmscimg b/hw/bin/mkmscimg similarity index 100% rename from bin/mkmscimg rename to hw/bin/mkmscimg diff --git a/deps/litedram b/hw/deps/litedram similarity index 100% rename from deps/litedram rename to hw/deps/litedram diff --git a/deps/litescope b/hw/deps/litescope similarity index 100% rename from deps/litescope rename to hw/deps/litescope diff --git a/deps/litex b/hw/deps/litex similarity index 100% rename from deps/litex rename to hw/deps/litex diff --git a/deps/lxsocsupport b/hw/deps/lxsocsupport similarity index 100% rename from deps/lxsocsupport rename to hw/deps/lxsocsupport diff --git a/deps/migen b/hw/deps/migen similarity index 100% rename from deps/migen rename to hw/deps/migen diff --git a/deps/pyserial b/hw/deps/pyserial similarity index 100% rename from deps/pyserial rename to hw/deps/pyserial diff --git a/deps/valentyusb b/hw/deps/valentyusb similarity index 100% rename from deps/valentyusb rename to hw/deps/valentyusb diff --git a/factory-bitstream.py b/hw/factory-bitstream.py similarity index 96% rename from factory-bitstream.py rename to hw/factory-bitstream.py index 1fe9e2d..00d7613 100644 --- a/factory-bitstream.py +++ b/hw/factory-bitstream.py @@ -87,7 +87,8 @@ _io_evt = [ ), ("clk48", 0, Pins("44"), IOStandard("LVCMOS33")) ] -_io_dvt = [ + +_io_pvt = [ ("serial", 0, Subsignal("rx", Pins("C3")), Subsignal("tx", Pins("B3"), Misc("PULLUP")), @@ -125,6 +126,7 @@ _io_dvt = [ ), ("clk48", 0, Pins("F4"), IOStandard("LVCMOS33")) ] + _io_hacker = [ ("serial", 0, Subsignal("rx", Pins("C3")), @@ -197,7 +199,6 @@ class _CRG(Module): ] if use_pll: - # Divide clk48 down to clk12, to ensure they're synchronized. # By doing this, we avoid needing clock-domain crossing. clk12_counter = Signal(2) @@ -316,12 +317,12 @@ class Platform(LatticePlatform): def __init__(self, revision=None, toolchain="icestorm"): if revision == "evt": LatticePlatform.__init__(self, "ice40-up5k-sg48", _io_evt, _connectors, toolchain="icestorm") - elif revision == "dvt": - LatticePlatform.__init__(self, "ice40-up5k-uwg30", _io_dvt, _connectors, toolchain="icestorm") + elif revision == "pvt" or revision == "dvt": + LatticePlatform.__init__(self, "ice40-up5k-uwg30", _io_pvt, _connectors, toolchain="icestorm") elif revision == "hacker": LatticePlatform.__init__(self, "ice40-up5k-uwg30", _io_hacker, _connectors, toolchain="icestorm") else: - raise ValueError("Unrecognized reivsion: {}. Known values: evt, dvt, hacker".format(revision)) + raise ValueError("Unrecognized reivsion: {}. Known values: evt, dvt, pvt, hacker".format(revision)) def create_programmer(self): raise ValueError("programming is not supported") @@ -593,8 +594,14 @@ class Version(Module, AutoCSR): stderr=subprocess.PIPE) (git_stdout, _) = git_rev_cmd.communicate() if git_rev_cmd.wait() != 0: - print('unable to get git version') - return + git_rev_cmd = subprocess.Popen(["git", "rev-parse", "HEAD"], + stdout=subprocess.PIPE, + stderr=subprocess.PIPE) + (git_stdout, _) = git_rev_cmd.communicate() + if git_rev_cmd.wait() != 0: + print('WARNING: unable to get git version') + return (0, 0, 0, 0, 0, False) + return (0, 0, 0, makeint(git_stdout[0:8], 16), 0, False) raw_git_rev = git_stdout.decode().strip() dirty = False @@ -773,8 +780,6 @@ class BaseSoC(SoCCore): pulldown = TSTriple() self.specials += pulldown.get_tristate(usb_pads.pulldown) self.comb += pulldown.oe.eq(0) - # self.submodules.usb = epmem.MemInterface(usb_iobuf) - # self.submodules.usb = unififo.UsbUniFifo(usb_iobuf) # Add GPIO pads for the touch buttons self.submodules.touch = TouchPads(platform.request("touch")) @@ -784,7 +789,7 @@ class BaseSoC(SoCCore): # and the "-dffe_min_ce_use 4" flag prevents Yosys from generating a # Clock Enable signal for a LUT that has fewer than 4 flip-flops. # This increases density, and lets us use the FPGA more efficiently. - platform.toolchain.nextpnr_yosys_template[2] += " -relut -dffe_min_ce_use 5" + platform.toolchain.nextpnr_yosys_template[2] += " -relut -dffe_min_ce_use 4" if use_dsp: platform.toolchain.nextpnr_yosys_template[2] += " -dsp" @@ -813,7 +818,7 @@ def main(): help="where to have the CPU obtain its executable code from" ) parser.add_argument( - "--revision", choices=["dvt", "evt", "hacker"], required=True, + "--revision", choices=["pvt", "dvt", "evt", "hacker"], required=True, help="build foboot for a particular hardware revision" ) parser.add_argument( @@ -834,35 +839,10 @@ def main(): parser.add_argument( "--placer", choices=["sa", "heap"], help="which placer to use in nextpnr" ) - parser.add_argument( - "--export-random-rom-file", help="Generate a random ROM file and save it to a file" - ) args = parser.parse_args() output_dir = 'build' - if args.export_random_rom_file is not None: - size = 0x2000 - def xorshift32(x): - x = x ^ (x << 13) & 0xffffffff - x = x ^ (x >> 17) & 0xffffffff - x = x ^ (x << 5) & 0xffffffff - return x & 0xffffffff - - def get_rand(x): - out = 0 - for i in range(32): - x = xorshift32(x) - if (x & 1) == 1: - out = out | (1 << i) - return out & 0xffffffff - seed = 1 - with open(args.export_random_rom_file, "w", newline="\n") as output: - for d in range(int(size / 4)): - seed = get_rand(seed) - print("{:08x}".format(seed), file=output) - return 0 - compile_software = False if args.boot_source == "bios" and args.bios is None: compile_software = True diff --git a/lxbuildenv.py b/hw/lxbuildenv.py similarity index 100% rename from lxbuildenv.py rename to hw/lxbuildenv.py diff --git a/hw/rtl/2-stage-1024-cache-debug.v b/hw/rtl/2-stage-1024-cache-debug.v new file mode 100644 index 0000000..e9a2903 --- /dev/null +++ b/hw/rtl/2-stage-1024-cache-debug.v @@ -0,0 +1,3578 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 26/04/2019, 01:09:04 +// Component : VexRiscv + + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input io_cpu_fetch_dataBypassValid, + input [31:0] io_cpu_fetch_dataBypass, + output io_cpu_fetch_mmuBus_cmd_isValid, + output [31:0] io_cpu_fetch_mmuBus_cmd_virtualAddress, + output io_cpu_fetch_mmuBus_cmd_bypassTranslation, + input [31:0] io_cpu_fetch_mmuBus_rsp_physicalAddress, + input io_cpu_fetch_mmuBus_rsp_isIoAccess, + input io_cpu_fetch_mmuBus_rsp_allowRead, + input io_cpu_fetch_mmuBus_rsp_allowWrite, + input io_cpu_fetch_mmuBus_rsp_allowExecute, + input io_cpu_fetch_mmuBus_rsp_exception, + input io_cpu_fetch_mmuBus_rsp_refilling, + output io_cpu_fetch_mmuBus_end, + input io_cpu_fetch_mmuBus_busy, + output [31:0] io_cpu_fetch_physicalAddress, + output io_cpu_fetch_cacheMiss, + output io_cpu_fetch_error, + output io_cpu_fetch_mmuRefilling, + output io_cpu_fetch_mmuException, + input io_cpu_fetch_isUser, + output io_cpu_fetch_haltIt, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset); + reg [23:0] _zz_10_; + reg [31:0] _zz_11_; + wire _zz_12_; + wire _zz_13_; + wire [0:0] _zz_14_; + wire [0:0] _zz_15_; + wire [23:0] _zz_16_; + reg _zz_1_; + reg _zz_2_; + reg lineLoader_fire; + reg lineLoader_valid; + reg [31:0] lineLoader_address; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [5:0] lineLoader_flushCounter; + reg _zz_3_; + reg lineLoader_cmdSent; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + reg [2:0] lineLoader_wordIndex; + wire lineLoader_write_tag_0_valid; + wire [4:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [21:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [7:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire _zz_4_; + wire [4:0] _zz_5_; + wire _zz_6_; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [21:0] fetchStage_read_waysValues_0_tag_address; + wire [23:0] _zz_7_; + wire [7:0] _zz_8_; + wire _zz_9_; + wire [31:0] fetchStage_read_waysValues_0_data; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + reg [23:0] ways_0_tags [0:31]; + reg [31:0] ways_0_datas [0:255]; + assign _zz_12_ = (! lineLoader_flushCounter[5]); + assign _zz_13_ = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign _zz_14_ = _zz_7_[0 : 0]; + assign _zz_15_ = _zz_7_[1 : 1]; + assign _zz_16_ = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @ (posedge clk) begin + if(_zz_2_) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_16_; + end + end + + always @ (posedge clk) begin + if(_zz_6_) begin + _zz_10_ <= ways_0_tags[_zz_5_]; + end + end + + always @ (posedge clk) begin + if(_zz_1_) begin + ways_0_datas[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_9_) begin + _zz_11_ <= ways_0_datas[_zz_8_]; + end + end + + always @ (*) begin + _zz_1_ = 1'b0; + if(lineLoader_write_data_0_valid)begin + _zz_1_ = 1'b1; + end + end + + always @ (*) begin + _zz_2_ = 1'b0; + if(lineLoader_write_tag_0_valid)begin + _zz_2_ = 1'b1; + end + end + + assign io_cpu_fetch_haltIt = io_cpu_fetch_mmuBus_busy; + always @ (*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid)begin + if((lineLoader_wordIndex == (3'b111)))begin + lineLoader_fire = 1'b1; + end + end + end + + always @ (*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(_zz_12_)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if((! _zz_3_))begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush)begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],(5'b00000)}; + assign io_mem_cmd_payload_size = (3'b101); + always @ (*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(lineLoader_fire)begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign _zz_4_ = 1'b1; + assign lineLoader_write_tag_0_valid = ((_zz_4_ && lineLoader_fire) || (! lineLoader_flushCounter[5])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[5] ? lineLoader_address[9 : 5] : lineLoader_flushCounter[4 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[5]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 10]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && _zz_4_); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[9 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign _zz_5_ = io_cpu_prefetch_pc[9 : 5]; + assign _zz_6_ = (! io_cpu_fetch_isStuck); + assign _zz_7_ = _zz_10_; + assign fetchStage_read_waysValues_0_tag_valid = _zz_14_[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_15_[0]; + assign fetchStage_read_waysValues_0_tag_address = _zz_7_[23 : 2]; + assign _zz_8_ = io_cpu_prefetch_pc[9 : 2]; + assign _zz_9_ = (! io_cpu_fetch_isStuck); + assign fetchStage_read_waysValues_0_data = _zz_11_; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuBus_rsp_physicalAddress[31 : 10])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != (1'b0)); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_waysValues_0_data; + assign fetchStage_hit_word = fetchStage_hit_data[31 : 0]; + assign io_cpu_fetch_data = (io_cpu_fetch_dataBypassValid ? io_cpu_fetch_dataBypass : fetchStage_hit_word); + assign io_cpu_fetch_mmuBus_cmd_isValid = io_cpu_fetch_isValid; + assign io_cpu_fetch_mmuBus_cmd_virtualAddress = io_cpu_fetch_pc; + assign io_cpu_fetch_mmuBus_cmd_bypassTranslation = 1'b0; + assign io_cpu_fetch_mmuBus_end = ((! io_cpu_fetch_isStuck) || io_cpu_fetch_isRemoved); + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuBus_rsp_physicalAddress; + assign io_cpu_fetch_cacheMiss = (! fetchStage_hit_valid); + assign io_cpu_fetch_error = fetchStage_hit_error; + assign io_cpu_fetch_mmuRefilling = io_cpu_fetch_mmuBus_rsp_refilling; + assign io_cpu_fetch_mmuException = ((! io_cpu_fetch_mmuBus_rsp_refilling) && (io_cpu_fetch_mmuBus_rsp_exception || (! io_cpu_fetch_mmuBus_rsp_allowExecute))); + always @ (posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= (3'b000); + end else begin + if(lineLoader_fire)begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire)begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid)begin + lineLoader_valid <= 1'b1; + end + if(io_flush)begin + lineLoader_flushPending <= 1'b1; + end + if(_zz_13_)begin + lineLoader_flushPending <= 1'b0; + end + if((io_mem_cmd_valid && io_mem_cmd_ready))begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire)begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid)begin + lineLoader_wordIndex <= (lineLoader_wordIndex + (3'b001)); + if(io_mem_rsp_payload_error)begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + if(io_cpu_fill_valid)begin + lineLoader_address <= io_cpu_fill_payload; + end + if(_zz_12_)begin + lineLoader_flushCounter <= (lineLoader_flushCounter + (6'b000001)); + end + _zz_3_ <= lineLoader_flushCounter[5]; + if(_zz_13_)begin + lineLoader_flushCounter <= (6'b000000); + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + wire _zz_136_; + wire _zz_137_; + wire _zz_138_; + wire _zz_139_; + wire _zz_140_; + wire [31:0] _zz_141_; + wire _zz_142_; + wire _zz_143_; + wire _zz_144_; + wire _zz_145_; + wire _zz_146_; + wire _zz_147_; + wire _zz_148_; + wire _zz_149_; + wire _zz_150_; + wire _zz_151_; + wire [31:0] _zz_152_; + reg _zz_153_; + reg [31:0] _zz_154_; + reg [31:0] _zz_155_; + reg [31:0] _zz_156_; + reg [3:0] _zz_157_; + reg [31:0] _zz_158_; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_error; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire _zz_159_; + wire _zz_160_; + wire _zz_161_; + wire _zz_162_; + wire _zz_163_; + wire _zz_164_; + wire [1:0] _zz_165_; + wire _zz_166_; + wire _zz_167_; + wire _zz_168_; + wire _zz_169_; + wire [5:0] _zz_170_; + wire _zz_171_; + wire _zz_172_; + wire [1:0] _zz_173_; + wire _zz_174_; + wire [2:0] _zz_175_; + wire [2:0] _zz_176_; + wire [31:0] _zz_177_; + wire [2:0] _zz_178_; + wire [0:0] _zz_179_; + wire [0:0] _zz_180_; + wire [0:0] _zz_181_; + wire [0:0] _zz_182_; + wire [0:0] _zz_183_; + wire [0:0] _zz_184_; + wire [0:0] _zz_185_; + wire [0:0] _zz_186_; + wire [0:0] _zz_187_; + wire [0:0] _zz_188_; + wire [2:0] _zz_189_; + wire [4:0] _zz_190_; + wire [11:0] _zz_191_; + wire [11:0] _zz_192_; + wire [31:0] _zz_193_; + wire [31:0] _zz_194_; + wire [31:0] _zz_195_; + wire [31:0] _zz_196_; + wire [31:0] _zz_197_; + wire [31:0] _zz_198_; + wire [31:0] _zz_199_; + wire [31:0] _zz_200_; + wire [32:0] _zz_201_; + wire [19:0] _zz_202_; + wire [11:0] _zz_203_; + wire [11:0] _zz_204_; + wire [1:0] _zz_205_; + wire [1:0] _zz_206_; + wire [2:0] _zz_207_; + wire [0:0] _zz_208_; + wire [0:0] _zz_209_; + wire [0:0] _zz_210_; + wire [0:0] _zz_211_; + wire [30:0] _zz_212_; + wire [30:0] _zz_213_; + wire [30:0] _zz_214_; + wire [30:0] _zz_215_; + wire [0:0] _zz_216_; + wire [0:0] _zz_217_; + wire [0:0] _zz_218_; + wire [0:0] _zz_219_; + wire [0:0] _zz_220_; + wire [0:0] _zz_221_; + wire [26:0] _zz_222_; + wire [6:0] _zz_223_; + wire [1:0] _zz_224_; + wire [31:0] _zz_225_; + wire [31:0] _zz_226_; + wire [31:0] _zz_227_; + wire [1:0] _zz_228_; + wire [1:0] _zz_229_; + wire _zz_230_; + wire [0:0] _zz_231_; + wire [20:0] _zz_232_; + wire [31:0] _zz_233_; + wire [31:0] _zz_234_; + wire [31:0] _zz_235_; + wire [31:0] _zz_236_; + wire _zz_237_; + wire _zz_238_; + wire [1:0] _zz_239_; + wire [1:0] _zz_240_; + wire _zz_241_; + wire [0:0] _zz_242_; + wire [16:0] _zz_243_; + wire [31:0] _zz_244_; + wire [31:0] _zz_245_; + wire [31:0] _zz_246_; + wire [31:0] _zz_247_; + wire _zz_248_; + wire _zz_249_; + wire [0:0] _zz_250_; + wire [0:0] _zz_251_; + wire _zz_252_; + wire [0:0] _zz_253_; + wire [13:0] _zz_254_; + wire [31:0] _zz_255_; + wire _zz_256_; + wire _zz_257_; + wire [0:0] _zz_258_; + wire [0:0] _zz_259_; + wire _zz_260_; + wire [0:0] _zz_261_; + wire [10:0] _zz_262_; + wire [31:0] _zz_263_; + wire _zz_264_; + wire [0:0] _zz_265_; + wire [0:0] _zz_266_; + wire [0:0] _zz_267_; + wire [4:0] _zz_268_; + wire [1:0] _zz_269_; + wire [1:0] _zz_270_; + wire _zz_271_; + wire [0:0] _zz_272_; + wire [6:0] _zz_273_; + wire [31:0] _zz_274_; + wire [31:0] _zz_275_; + wire [31:0] _zz_276_; + wire [31:0] _zz_277_; + wire _zz_278_; + wire [0:0] _zz_279_; + wire [1:0] _zz_280_; + wire [31:0] _zz_281_; + wire [31:0] _zz_282_; + wire _zz_283_; + wire _zz_284_; + wire [1:0] _zz_285_; + wire [1:0] _zz_286_; + wire _zz_287_; + wire [0:0] _zz_288_; + wire [3:0] _zz_289_; + wire [31:0] _zz_290_; + wire [31:0] _zz_291_; + wire [31:0] _zz_292_; + wire [31:0] _zz_293_; + wire [31:0] _zz_294_; + wire [31:0] _zz_295_; + wire [31:0] _zz_296_; + wire [31:0] _zz_297_; + wire _zz_298_; + wire _zz_299_; + wire _zz_300_; + wire [1:0] _zz_301_; + wire [1:0] _zz_302_; + wire _zz_303_; + wire [0:0] _zz_304_; + wire [0:0] _zz_305_; + wire [31:0] _zz_306_; + wire [31:0] _zz_307_; + wire [31:0] _zz_308_; + wire [31:0] _zz_309_; + wire _zz_310_; + wire _zz_311_; + wire _zz_312_; + wire [0:0] _zz_313_; + wire [2:0] _zz_314_; + wire [31:0] _zz_315_; + wire [31:0] _zz_316_; + wire [31:0] _zz_317_; + wire _zz_318_; + wire [0:0] _zz_319_; + wire [12:0] _zz_320_; + wire [31:0] _zz_321_; + wire [31:0] _zz_322_; + wire [31:0] _zz_323_; + wire _zz_324_; + wire [0:0] _zz_325_; + wire [6:0] _zz_326_; + wire [31:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire _zz_330_; + wire [0:0] _zz_331_; + wire [0:0] _zz_332_; + wire decode_SRC_LESS_UNSIGNED; + wire decode_DO_EBREAK; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_1_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_2_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_3_; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_4_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_5_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_6_; + wire decode_MEMORY_ENABLE; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_7_; + wire `AluCtrlEnum_defaultEncoding_type _zz_8_; + wire `AluCtrlEnum_defaultEncoding_type _zz_9_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_10_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_11_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_12_; + wire decode_IS_CSR; + wire execute_REGFILE_WRITE_VALID; + wire decode_SRC2_FORCE_ZERO; + wire decode_CSR_WRITE_OPCODE; + wire decode_CSR_READ_OPCODE; + wire decode_MEMORY_STORE; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_13_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_14_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_15_; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_16_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_17_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_18_; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_19_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_20_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_21_; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_22_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire _zz_23_; + wire _zz_24_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_25_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_26_; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_27_; + wire _zz_28_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_29_; + wire _zz_30_; + wire [31:0] _zz_31_; + wire [31:0] _zz_32_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_33_; + wire [31:0] _zz_34_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_35_; + wire [31:0] _zz_36_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_37_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_38_; + wire [31:0] _zz_39_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_40_; + reg _zz_41_; + wire [31:0] _zz_42_; + wire [31:0] _zz_43_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire _zz_44_; + wire _zz_45_; + wire _zz_46_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_47_; + wire _zz_48_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_49_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_50_; + wire _zz_51_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_52_; + wire _zz_53_; + wire _zz_54_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_55_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_56_; + wire `AluCtrlEnum_defaultEncoding_type _zz_57_; + wire _zz_58_; + wire _zz_59_; + wire _zz_60_; + reg [31:0] decode_INSTRUCTION; + reg [31:0] _zz_61_; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire [31:0] execute_MEMORY_READ_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] _zz_62_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_63_; + wire [31:0] execute_RS2; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_64_; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected; + reg _zz_65_; + reg _zz_66_; + reg _zz_67_; + reg [31:0] _zz_68_; + wire [31:0] decode_PC; + wire [31:0] _zz_69_; + wire [31:0] _zz_70_; + wire [31:0] _zz_71_; + wire [31:0] execute_PC; + wire [31:0] execute_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_fetcherflushIt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_redoBranch_valid; + wire [31:0] IBusCachedPlugin_redoBranch_payload; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg IBusCachedPlugin_injectionPort_valid; + reg IBusCachedPlugin_injectionPort_ready; + wire [31:0] IBusCachedPlugin_injectionPort_payload; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [2:0] _zz_72_; + wire [2:0] _zz_73_; + wire _zz_74_; + wire _zz_75_; + wire IBusCachedPlugin_fetchPc_preOutput_valid; + wire IBusCachedPlugin_fetchPc_preOutput_ready; + wire [31:0] IBusCachedPlugin_fetchPc_preOutput_payload; + wire _zz_76_; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_inc; + reg IBusCachedPlugin_fetchPc_propagatePc; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + reg IBusCachedPlugin_fetchPc_samplePcNext; + reg _zz_77_; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_0_inputSample; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + reg IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_inputSample; + wire _zz_78_; + wire _zz_79_; + wire _zz_80_; + wire _zz_81_; + reg _zz_82_; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_decodeInput_valid; + wire IBusCachedPlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + reg IBusCachedPlugin_injector_decodeRemoved; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + reg IBusCachedPlugin_rsp_redoFetch; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + reg _zz_83_; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_84_; + reg [3:0] _zz_85_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] execute_DBusSimplePlugin_rspShifted; + wire _zz_86_; + reg [31:0] _zz_87_; + wire _zz_88_; + reg [31:0] _zz_89_; + reg [31:0] execute_DBusSimplePlugin_rspFormated; + wire [27:0] _zz_90_; + wire _zz_91_; + wire _zz_92_; + wire _zz_93_; + wire _zz_94_; + wire _zz_95_; + wire `AluCtrlEnum_defaultEncoding_type _zz_96_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_97_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_98_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_99_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_100_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_101_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_102_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_103_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire lastStageRegFileWrite_valid /* verilator public */ ; + wire [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + wire [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_104_; + reg [31:0] _zz_105_; + wire _zz_106_; + reg [19:0] _zz_107_; + wire _zz_108_; + reg [19:0] _zz_109_; + reg [31:0] _zz_110_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + reg [31:0] execute_LightShifterPlugin_shiftReg; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_111_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_112_; + reg _zz_113_; + reg _zz_114_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_115_; + reg [10:0] _zz_116_; + wire _zz_117_; + reg [19:0] _zz_118_; + wire _zz_119_; + reg [18:0] _zz_120_; + reg [31:0] _zz_121_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_122_; + wire _zz_123_; + wire [2:0] _zz_124_; + wire [2:0] _zz_125_; + wire _zz_126_; + wire _zz_127_; + wire [1:0] _zz_128_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_129_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_130_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_131_; + reg DebugPlugin_resetIt_regNext; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg decode_to_execute_MEMORY_STORE; + reg decode_to_execute_CSR_READ_OPCODE; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg [31:0] decode_to_execute_INSTRUCTION; + reg decode_to_execute_IS_CSR; + reg [31:0] decode_to_execute_PC; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg decode_to_execute_MEMORY_ENABLE; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg decode_to_execute_DO_EBREAK; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg [2:0] _zz_132_; + reg [31:0] IBusCachedPlugin_injectionPort_payload_regNext; + reg [2:0] _zz_133_; + reg _zz_134_; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_135_; + `ifndef SYNTHESIS + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_1__string; + reg [95:0] _zz_2__string; + reg [95:0] _zz_3__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_4__string; + reg [47:0] _zz_5__string; + reg [47:0] _zz_6__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_7__string; + reg [63:0] _zz_8__string; + reg [63:0] _zz_9__string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_10__string; + reg [39:0] _zz_11__string; + reg [39:0] _zz_12__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_13__string; + reg [31:0] _zz_14__string; + reg [31:0] _zz_15__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_16__string; + reg [71:0] _zz_17__string; + reg [71:0] _zz_18__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_19__string; + reg [23:0] _zz_20__string; + reg [23:0] _zz_21__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_25__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_27__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_29__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_33__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_35__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_38__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_40__string; + reg [23:0] _zz_47__string; + reg [31:0] _zz_49__string; + reg [47:0] _zz_50__string; + reg [39:0] _zz_52__string; + reg [95:0] _zz_55__string; + reg [71:0] _zz_56__string; + reg [63:0] _zz_57__string; + reg [63:0] _zz_96__string; + reg [71:0] _zz_97__string; + reg [95:0] _zz_98__string; + reg [39:0] _zz_99__string; + reg [47:0] _zz_100__string; + reg [31:0] _zz_101__string; + reg [23:0] _zz_102__string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_159_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_160_ = (! execute_arbitration_isStuckByOthers); + assign _zz_161_ = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != (2'b00)); + assign _zz_162_ = ({CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}} != (3'b000)); + assign _zz_163_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_164_ = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_165_ = execute_INSTRUCTION[29 : 28]; + assign _zz_166_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_167_ = (1'b0 == 1'b0); + assign _zz_168_ = (DebugPlugin_stepIt && IBusCachedPlugin_incomingInstruction); + assign _zz_169_ = (IBusCachedPlugin_fetchPc_preOutput_valid && IBusCachedPlugin_fetchPc_preOutput_ready); + assign _zz_170_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_171_ = (iBus_cmd_valid || (_zz_133_ != (3'b000))); + assign _zz_172_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_173_ = execute_INSTRUCTION[13 : 12]; + assign _zz_174_ = execute_INSTRUCTION[13]; + assign _zz_175_ = (_zz_72_ - (3'b001)); + assign _zz_176_ = {IBusCachedPlugin_fetchPc_inc,(2'b00)}; + assign _zz_177_ = {29'd0, _zz_176_}; + assign _zz_178_ = (execute_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_179_ = _zz_90_[1 : 1]; + assign _zz_180_ = _zz_90_[3 : 3]; + assign _zz_181_ = _zz_90_[10 : 10]; + assign _zz_182_ = _zz_90_[11 : 11]; + assign _zz_183_ = _zz_90_[14 : 14]; + assign _zz_184_ = _zz_90_[19 : 19]; + assign _zz_185_ = _zz_90_[23 : 23]; + assign _zz_186_ = _zz_90_[25 : 25]; + assign _zz_187_ = _zz_90_[27 : 27]; + assign _zz_188_ = execute_SRC_LESS; + assign _zz_189_ = (3'b100); + assign _zz_190_ = execute_INSTRUCTION[19 : 15]; + assign _zz_191_ = execute_INSTRUCTION[31 : 20]; + assign _zz_192_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_193_ = ($signed(_zz_194_) + $signed(_zz_197_)); + assign _zz_194_ = ($signed(_zz_195_) + $signed(_zz_196_)); + assign _zz_195_ = execute_SRC1; + assign _zz_196_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_197_ = (execute_SRC_USE_SUB_LESS ? _zz_198_ : _zz_199_); + assign _zz_198_ = (32'b00000000000000000000000000000001); + assign _zz_199_ = (32'b00000000000000000000000000000000); + assign _zz_200_ = (_zz_201_ >>> 1); + assign _zz_201_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_202_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_203_ = execute_INSTRUCTION[31 : 20]; + assign _zz_204_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_205_ = (_zz_122_ & (~ _zz_206_)); + assign _zz_206_ = (_zz_122_ - (2'b01)); + assign _zz_207_ = (_zz_124_ - (3'b001)); + assign _zz_208_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_209_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_210_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_211_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_212_ = (decode_PC >>> 1); + assign _zz_213_ = (decode_PC >>> 1); + assign _zz_214_ = (decode_PC >>> 1); + assign _zz_215_ = (decode_PC >>> 1); + assign _zz_216_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_217_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_218_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_219_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_220_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_221_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_222_ = (iBus_cmd_payload_address >>> 5); + assign _zz_223_ = ({3'd0,_zz_135_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_224_ = {_zz_75_,_zz_74_}; + assign _zz_225_ = (32'b00000000000000000000000000010000); + assign _zz_226_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_227_ = (32'b00000000000000000000000000000000); + assign _zz_228_ = {((decode_INSTRUCTION & _zz_233_) == (32'b00000000000000000001000001010000)),((decode_INSTRUCTION & _zz_234_) == (32'b00000000000000000010000001010000))}; + assign _zz_229_ = (2'b00); + assign _zz_230_ = ({_zz_95_,(_zz_235_ == _zz_236_)} != (2'b00)); + assign _zz_231_ = ({_zz_95_,_zz_237_} != (2'b00)); + assign _zz_232_ = {(_zz_238_ != (1'b0)),{(_zz_239_ != _zz_240_),{_zz_241_,{_zz_242_,_zz_243_}}}}; + assign _zz_233_ = (32'b00000000000000000001000001010000); + assign _zz_234_ = (32'b00000000000000000010000001010000); + assign _zz_235_ = (decode_INSTRUCTION & (32'b00000000000000000000000001110000)); + assign _zz_236_ = (32'b00000000000000000000000000100000); + assign _zz_237_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000000000)); + assign _zz_238_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000000)) == (32'b00000000000000000000000000000000)); + assign _zz_239_ = {(_zz_244_ == _zz_245_),(_zz_246_ == _zz_247_)}; + assign _zz_240_ = (2'b00); + assign _zz_241_ = ({_zz_93_,_zz_248_} != (2'b00)); + assign _zz_242_ = (_zz_249_ != (1'b0)); + assign _zz_243_ = {(_zz_250_ != _zz_251_),{_zz_252_,{_zz_253_,_zz_254_}}}; + assign _zz_244_ = (decode_INSTRUCTION & (32'b00000000000000000000000001100100)); + assign _zz_245_ = (32'b00000000000000000000000000100100); + assign _zz_246_ = (decode_INSTRUCTION & (32'b00000000000000000011000001010100)); + assign _zz_247_ = (32'b00000000000000000001000000010000); + assign _zz_248_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000011100)) == (32'b00000000000000000000000000000100)); + assign _zz_249_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001011000)) == (32'b00000000000000000000000001000000)); + assign _zz_250_ = ((decode_INSTRUCTION & _zz_255_) == (32'b00000000000000000000000001010000)); + assign _zz_251_ = (1'b0); + assign _zz_252_ = ({_zz_94_,_zz_256_} != (2'b00)); + assign _zz_253_ = (_zz_257_ != (1'b0)); + assign _zz_254_ = {(_zz_258_ != _zz_259_),{_zz_260_,{_zz_261_,_zz_262_}}}; + assign _zz_255_ = (32'b00010000000000000011000001010000); + assign _zz_256_ = ((decode_INSTRUCTION & (32'b00010000010000000011000001010000)) == (32'b00010000000000000000000001010000)); + assign _zz_257_ = ((decode_INSTRUCTION & (32'b00000000000000000001000001001000)) == (32'b00000000000000000001000000001000)); + assign _zz_258_ = ((decode_INSTRUCTION & (32'b00000000000000000001000000000000)) == (32'b00000000000000000001000000000000)); + assign _zz_259_ = (1'b0); + assign _zz_260_ = (((decode_INSTRUCTION & _zz_263_) == (32'b00000000000000000010000000000000)) != (1'b0)); + assign _zz_261_ = ({_zz_264_,{_zz_265_,_zz_266_}} != (3'b000)); + assign _zz_262_ = {({_zz_267_,_zz_268_} != (6'b000000)),{(_zz_269_ != _zz_270_),{_zz_271_,{_zz_272_,_zz_273_}}}}; + assign _zz_263_ = (32'b00000000000000000011000000000000); + assign _zz_264_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000001000000)); + assign _zz_265_ = ((decode_INSTRUCTION & _zz_274_) == (32'b00000000000000000010000000010000)); + assign _zz_266_ = ((decode_INSTRUCTION & _zz_275_) == (32'b01000000000000000000000000110000)); + assign _zz_267_ = _zz_93_; + assign _zz_268_ = {(_zz_276_ == _zz_277_),{_zz_278_,{_zz_279_,_zz_280_}}}; + assign _zz_269_ = {(_zz_281_ == _zz_282_),_zz_91_}; + assign _zz_270_ = (2'b00); + assign _zz_271_ = ({_zz_283_,_zz_91_} != (2'b00)); + assign _zz_272_ = (_zz_284_ != (1'b0)); + assign _zz_273_ = {(_zz_285_ != _zz_286_),{_zz_287_,{_zz_288_,_zz_289_}}}; + assign _zz_274_ = (32'b00000000000000000010000000010100); + assign _zz_275_ = (32'b01000000000000000100000000110100); + assign _zz_276_ = (decode_INSTRUCTION & (32'b00000000000000000001000000010000)); + assign _zz_277_ = (32'b00000000000000000001000000010000); + assign _zz_278_ = ((decode_INSTRUCTION & (32'b00000000000000000010000000010000)) == (32'b00000000000000000010000000010000)); + assign _zz_279_ = _zz_92_; + assign _zz_280_ = {(_zz_290_ == _zz_291_),(_zz_292_ == _zz_293_)}; + assign _zz_281_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010100)); + assign _zz_282_ = (32'b00000000000000000000000000000100); + assign _zz_283_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000100)); + assign _zz_284_ = ((decode_INSTRUCTION & (32'b00000000000000000111000001010100)) == (32'b00000000000000000101000000010000)); + assign _zz_285_ = {(_zz_294_ == _zz_295_),(_zz_296_ == _zz_297_)}; + assign _zz_286_ = (2'b00); + assign _zz_287_ = ({_zz_298_,_zz_299_} != (2'b00)); + assign _zz_288_ = (_zz_300_ != (1'b0)); + assign _zz_289_ = {(_zz_301_ != _zz_302_),{_zz_303_,{_zz_304_,_zz_305_}}}; + assign _zz_290_ = (decode_INSTRUCTION & (32'b00000000000000000000000000001100)); + assign _zz_291_ = (32'b00000000000000000000000000000100); + assign _zz_292_ = (decode_INSTRUCTION & (32'b00000000000000000000000000101000)); + assign _zz_293_ = (32'b00000000000000000000000000000000); + assign _zz_294_ = (decode_INSTRUCTION & (32'b01000000000000000011000001010100)); + assign _zz_295_ = (32'b01000000000000000001000000010000); + assign _zz_296_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_297_ = (32'b00000000000000000001000000010000); + assign _zz_298_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000110000000010000)); + assign _zz_299_ = ((decode_INSTRUCTION & (32'b00000000000000000101000000010100)) == (32'b00000000000000000100000000010000)); + assign _zz_300_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000010000000010000)); + assign _zz_301_ = {(_zz_306_ == _zz_307_),(_zz_308_ == _zz_309_)}; + assign _zz_302_ = (2'b00); + assign _zz_303_ = ({_zz_310_,_zz_311_} != (2'b00)); + assign _zz_304_ = (_zz_312_ != (1'b0)); + assign _zz_305_ = ({_zz_313_,_zz_314_} != (4'b0000)); + assign _zz_306_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010000)); + assign _zz_307_ = (32'b00000000000000000010000000000000); + assign _zz_308_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000000)); + assign _zz_309_ = (32'b00000000000000000001000000000000); + assign _zz_310_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000110100)) == (32'b00000000000000000000000000100000)); + assign _zz_311_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100000)); + assign _zz_312_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000100000)); + assign _zz_313_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000000)); + assign _zz_314_ = {((decode_INSTRUCTION & (32'b00000000000000000000000000011000)) == (32'b00000000000000000000000000000000)),{((decode_INSTRUCTION & (32'b00000000000000000110000000000100)) == (32'b00000000000000000010000000000000)),((decode_INSTRUCTION & (32'b00000000000000000101000000000100)) == (32'b00000000000000000001000000000000))}}; + assign _zz_315_ = (32'b00000000000000000001000001111111); + assign _zz_316_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_317_ = (32'b00000000000000000010000001110011); + assign _zz_318_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_319_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_320_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_321_) == (32'b00000000000000000000000000000011)),{(_zz_322_ == _zz_323_),{_zz_324_,{_zz_325_,_zz_326_}}}}}}; + assign _zz_321_ = (32'b00000000000000000101000001011111); + assign _zz_322_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_323_ = (32'b00000000000000000000000001100011); + assign _zz_324_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_325_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_326_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_327_) == (32'b00000000000000000101000000110011)),{(_zz_328_ == _zz_329_),{_zz_330_,{_zz_331_,_zz_332_}}}}}}; + assign _zz_327_ = (32'b10111110000000000111000001111111); + assign _zz_328_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_329_ = (32'b00000000000000000000000000110011); + assign _zz_330_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_331_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_332_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("2-stage-1024-cache-debug.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_41_) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_103_) begin + _zz_154_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_103_) begin + _zz_155_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush(_zz_136_), + .io_cpu_prefetch_isValid(_zz_137_), + .io_cpu_prefetch_haltIt(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt), + .io_cpu_prefetch_pc(IBusCachedPlugin_iBusRsp_stages_0_input_payload), + .io_cpu_fetch_isValid(_zz_138_), + .io_cpu_fetch_isStuck(_zz_139_), + .io_cpu_fetch_isRemoved(_zz_140_), + .io_cpu_fetch_pc(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload), + .io_cpu_fetch_data(IBusCachedPlugin_cache_io_cpu_fetch_data), + .io_cpu_fetch_dataBypassValid(IBusCachedPlugin_s1_tightlyCoupledHit), + .io_cpu_fetch_dataBypass(_zz_141_), + .io_cpu_fetch_mmuBus_cmd_isValid(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid), + .io_cpu_fetch_mmuBus_cmd_virtualAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_cmd_bypassTranslation(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation), + .io_cpu_fetch_mmuBus_rsp_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_rsp_isIoAccess(_zz_142_), + .io_cpu_fetch_mmuBus_rsp_allowRead(_zz_143_), + .io_cpu_fetch_mmuBus_rsp_allowWrite(_zz_144_), + .io_cpu_fetch_mmuBus_rsp_allowExecute(_zz_145_), + .io_cpu_fetch_mmuBus_rsp_exception(_zz_146_), + .io_cpu_fetch_mmuBus_rsp_refilling(_zz_147_), + .io_cpu_fetch_mmuBus_end(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end), + .io_cpu_fetch_mmuBus_busy(_zz_148_), + .io_cpu_fetch_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_cpu_fetch_cacheMiss(IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss), + .io_cpu_fetch_error(IBusCachedPlugin_cache_io_cpu_fetch_error), + .io_cpu_fetch_mmuRefilling(IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling), + .io_cpu_fetch_mmuException(IBusCachedPlugin_cache_io_cpu_fetch_mmuException), + .io_cpu_fetch_isUser(_zz_149_), + .io_cpu_fetch_haltIt(IBusCachedPlugin_cache_io_cpu_fetch_haltIt), + .io_cpu_decode_isValid(_zz_150_), + .io_cpu_decode_isStuck(_zz_151_), + .io_cpu_decode_pc(_zz_152_), + .io_cpu_decode_physicalAddress(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_cpu_decode_data(IBusCachedPlugin_cache_io_cpu_decode_data), + .io_cpu_fill_valid(_zz_153_), + .io_cpu_fill_payload(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_mem_cmd_valid(IBusCachedPlugin_cache_io_mem_cmd_valid), + .io_mem_cmd_ready(iBus_cmd_ready), + .io_mem_cmd_payload_address(IBusCachedPlugin_cache_io_mem_cmd_payload_address), + .io_mem_cmd_payload_size(IBusCachedPlugin_cache_io_mem_cmd_payload_size), + .io_mem_rsp_valid(iBus_rsp_valid), + .io_mem_rsp_payload_data(iBus_rsp_payload_data), + .io_mem_rsp_payload_error(iBus_rsp_payload_error), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_224_) + 2'b00 : begin + _zz_156_ = BranchPlugin_jumpInterface_payload; + end + 2'b01 : begin + _zz_156_ = CsrPlugin_jumpInterface_payload; + end + default : begin + _zz_156_ = IBusCachedPlugin_redoBranch_payload; + end + endcase + end + + always @(*) begin + case(_zz_128_) + 2'b00 : begin + _zz_157_ = DBusSimplePlugin_memoryExceptionPort_payload_code; + _zz_158_ = DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + end + 2'b01 : begin + _zz_157_ = BranchPlugin_branchExceptionPort_payload_code; + _zz_158_ = BranchPlugin_branchExceptionPort_payload_badAddr; + end + default : begin + _zz_157_ = CsrPlugin_selfException_payload_code; + _zz_158_ = CsrPlugin_selfException_payload_badAddr; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_1_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_1__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_1__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_1__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_1__string = "URS1 "; + default : _zz_1__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_2_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_2__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_2__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_2__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_2__string = "URS1 "; + default : _zz_2__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_3_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_3__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_3__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_3__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_3__string = "URS1 "; + default : _zz_3__string = "????????????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_4_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_4__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_4__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_4__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_4__string = "EBREAK"; + default : _zz_4__string = "??????"; + endcase + end + always @(*) begin + case(_zz_5_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_5__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_5__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_5__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_5__string = "EBREAK"; + default : _zz_5__string = "??????"; + endcase + end + always @(*) begin + case(_zz_6_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_6__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_6__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_6__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_6__string = "EBREAK"; + default : _zz_6__string = "??????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_7_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_7__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_7__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_7__string = "BITWISE "; + default : _zz_7__string = "????????"; + endcase + end + always @(*) begin + case(_zz_8_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_8__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_8__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_8__string = "BITWISE "; + default : _zz_8__string = "????????"; + endcase + end + always @(*) begin + case(_zz_9_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_9__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_9__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_9__string = "BITWISE "; + default : _zz_9__string = "????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_10_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_10__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_10__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_10__string = "AND_1"; + default : _zz_10__string = "?????"; + endcase + end + always @(*) begin + case(_zz_11_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_11__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_11__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_11__string = "AND_1"; + default : _zz_11__string = "?????"; + endcase + end + always @(*) begin + case(_zz_12_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_12__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_12__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_12__string = "AND_1"; + default : _zz_12__string = "?????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_13_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_13__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_13__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_13__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_13__string = "JALR"; + default : _zz_13__string = "????"; + endcase + end + always @(*) begin + case(_zz_14_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_14__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_14__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_14__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_14__string = "JALR"; + default : _zz_14__string = "????"; + endcase + end + always @(*) begin + case(_zz_15_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_15__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_15__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_15__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_15__string = "JALR"; + default : _zz_15__string = "????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_16_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_16__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_16__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_16__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_16__string = "SRA_1 "; + default : _zz_16__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_17__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_17__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_17__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_17__string = "SRA_1 "; + default : _zz_17__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_18_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_18__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_18__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_18__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_18__string = "SRA_1 "; + default : _zz_18__string = "?????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_19_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_19__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_19__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_19__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_19__string = "PC "; + default : _zz_19__string = "???"; + endcase + end + always @(*) begin + case(_zz_20_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_20__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_20__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_20__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_20__string = "PC "; + default : _zz_20__string = "???"; + endcase + end + always @(*) begin + case(_zz_21_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_21__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_21__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_21__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_21__string = "PC "; + default : _zz_21__string = "???"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_25_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_25__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_25__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_25__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_25__string = "EBREAK"; + default : _zz_25__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_27_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_27__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_27__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_27__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_27__string = "JALR"; + default : _zz_27__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_29_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_29__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_29__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_29__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_29__string = "SRA_1 "; + default : _zz_29__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_33_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_33__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_33__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_33__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_33__string = "PC "; + default : _zz_33__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_35_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_35__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_35__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_35__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_35__string = "URS1 "; + default : _zz_35__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_38_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_38__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_38__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_38__string = "BITWISE "; + default : _zz_38__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_40_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_40__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_40__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_40__string = "AND_1"; + default : _zz_40__string = "?????"; + endcase + end + always @(*) begin + case(_zz_47_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_47__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_47__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_47__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_47__string = "PC "; + default : _zz_47__string = "???"; + endcase + end + always @(*) begin + case(_zz_49_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_49__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_49__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_49__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_49__string = "JALR"; + default : _zz_49__string = "????"; + endcase + end + always @(*) begin + case(_zz_50_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_50__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_50__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_50__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_50__string = "EBREAK"; + default : _zz_50__string = "??????"; + endcase + end + always @(*) begin + case(_zz_52_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_52__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_52__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_52__string = "AND_1"; + default : _zz_52__string = "?????"; + endcase + end + always @(*) begin + case(_zz_55_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_55__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_55__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_55__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_55__string = "URS1 "; + default : _zz_55__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_56_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_56__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_56__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_56__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_56__string = "SRA_1 "; + default : _zz_56__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_57_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_57__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_57__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_57__string = "BITWISE "; + default : _zz_57__string = "????????"; + endcase + end + always @(*) begin + case(_zz_96_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_96__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_96__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_96__string = "BITWISE "; + default : _zz_96__string = "????????"; + endcase + end + always @(*) begin + case(_zz_97_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_97__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_97__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_97__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_97__string = "SRA_1 "; + default : _zz_97__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_98_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_98__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_98__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_98__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_98__string = "URS1 "; + default : _zz_98__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_99_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_99__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_99__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_99__string = "AND_1"; + default : _zz_99__string = "?????"; + endcase + end + always @(*) begin + case(_zz_100_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_100__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_100__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_100__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_100__string = "EBREAK"; + default : _zz_100__string = "??????"; + endcase + end + always @(*) begin + case(_zz_101_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_101__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_101__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_101__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_101__string = "JALR"; + default : _zz_101__string = "????"; + endcase + end + always @(*) begin + case(_zz_102_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_102__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_102__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_102__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_102__string = "PC "; + default : _zz_102__string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + `endif + + assign decode_SRC_LESS_UNSIGNED = _zz_58_; + assign decode_DO_EBREAK = _zz_22_; + assign decode_SRC1_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_ENV_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_MEMORY_ENABLE = _zz_45_; + assign decode_ALU_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_ALU_BITWISE_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign decode_IS_CSR = _zz_46_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_SRC2_FORCE_ZERO = _zz_37_; + assign decode_CSR_WRITE_OPCODE = _zz_24_; + assign decode_CSR_READ_OPCODE = _zz_23_; + assign decode_MEMORY_STORE = _zz_59_; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_69_; + assign decode_BRANCH_CTRL = _zz_13_; + assign _zz_14_ = _zz_15_; + assign decode_SHIFT_CTRL = _zz_16_; + assign _zz_17_ = _zz_18_; + assign decode_SRC2_CTRL = _zz_19_; + assign _zz_20_ = _zz_21_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_44_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign execute_ENV_CTRL = _zz_25_; + assign execute_BRANCH_CALC = _zz_26_; + assign execute_BRANCH_DO = _zz_28_; + assign execute_RS1 = _zz_43_; + assign execute_BRANCH_CTRL = _zz_27_; + assign execute_SHIFT_CTRL = _zz_29_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign execute_SRC2_CTRL = _zz_33_; + assign execute_SRC1_CTRL = _zz_35_; + assign decode_SRC_USE_SUB_LESS = _zz_53_; + assign decode_SRC_ADD_ZERO = _zz_48_; + assign execute_SRC_ADD_SUB = _zz_32_; + assign execute_SRC_LESS = _zz_30_; + assign execute_ALU_CTRL = _zz_38_; + assign execute_SRC2 = _zz_34_; + assign execute_SRC1 = _zz_36_; + assign execute_ALU_BITWISE_CTRL = _zz_40_; + always @ (*) begin + _zz_41_ = 1'b0; + if(lastStageRegFileWrite_valid)begin + _zz_41_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_54_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_60_; + assign decode_INSTRUCTION_READY = 1'b1; + always @ (*) begin + decode_INSTRUCTION = _zz_70_; + if((_zz_132_ != (3'b000)))begin + decode_INSTRUCTION = IBusCachedPlugin_injectionPort_payload_regNext; + end + end + + always @ (*) begin + _zz_61_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_83_)))begin + execute_arbitration_haltItself = 1'b1; + end + if((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_MEMORY_STORE)) && ((! dBus_rsp_ready) || (! _zz_83_))))begin + execute_arbitration_haltItself = 1'b1; + end + if((execute_arbitration_isValid && execute_MEMORY_ENABLE))begin + _zz_61_ = execute_DBusSimplePlugin_rspFormated; + end + if(_zz_159_)begin + _zz_61_ = _zz_111_; + if(_zz_160_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_61_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_MEMORY_ADDRESS_LOW = _zz_63_; + assign execute_MEMORY_READ_DATA = _zz_62_; + assign execute_REGFILE_WRITE_DATA = _zz_39_; + assign execute_SRC_ADD = _zz_31_; + assign execute_RS2 = _zz_42_; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_64_; + assign decode_FLUSH_ALL = _zz_51_; + always @ (*) begin + IBusCachedPlugin_rsp_issueDetected = _zz_65_; + _zz_66_ = _zz_67_; + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'bxxxx); + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuException) && (! _zz_67_)))begin + _zz_66_ = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b1100); + end + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_error) && (! _zz_65_)))begin + IBusCachedPlugin_rsp_issueDetected = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b0001); + end + if(IBusCachedPlugin_fetcherHalt)begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + end + end + + always @ (*) begin + _zz_65_ = _zz_66_; + _zz_67_ = 1'b0; + IBusCachedPlugin_rsp_redoFetch = 1'b0; + _zz_153_ = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling)); + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling) && (! 1'b0)))begin + _zz_67_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss) && (! _zz_66_)))begin + _zz_65_ = 1'b1; + _zz_153_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + _zz_153_ = 1'b0; + end + end + + always @ (*) begin + _zz_68_ = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_redoBranch_valid)begin + _zz_68_ = IBusCachedPlugin_redoBranch_payload; + end + end + + assign decode_PC = _zz_71_; + assign execute_PC = decode_to_execute_PC; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusCachedPlugin_iBusRsp_decodeInput_valid && (! IBusCachedPlugin_injector_decodeRemoved)); + IBusCachedPlugin_injectionPort_ready = 1'b0; + case(_zz_132_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + IBusCachedPlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)) != (1'b0)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_161_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_haltByOther = 1'b0; + execute_arbitration_removeIt = 1'b0; + IBusCachedPlugin_fetcherHalt = 1'b0; + IBusCachedPlugin_fetcherflushIt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_162_)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode} != (2'b00)))begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_163_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + decode_arbitration_flushAll = 1'b1; + end + if(_zz_164_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + decode_arbitration_flushAll = 1'b1; + case(_zz_165_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(_zz_166_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_167_)begin + IBusCachedPlugin_fetcherflushIt = 1'b1; + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_168_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(_zz_166_)begin + if(_zz_167_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + assign lastStageInstruction = execute_INSTRUCTION; + assign lastStagePc = execute_PC; + assign lastStageIsValid = execute_arbitration_isValid; + assign lastStageIsFiring = execute_arbitration_isFiring; + always @ (*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid)begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_forceMachineWire = 1'b0; + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode)begin + CsrPlugin_allowException = 1'b0; + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_allowInterrupts = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,IBusCachedPlugin_redoBranch_valid}} != (3'b000)); + assign _zz_72_ = {IBusCachedPlugin_redoBranch_valid,{CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid}}; + assign _zz_73_ = (_zz_72_ & (~ _zz_175_)); + assign _zz_74_ = _zz_73_[1]; + assign _zz_75_ = _zz_73_[2]; + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_156_; + assign _zz_76_ = (! IBusCachedPlugin_fetcherHalt); + assign IBusCachedPlugin_fetchPc_output_valid = (IBusCachedPlugin_fetchPc_preOutput_valid && _zz_76_); + assign IBusCachedPlugin_fetchPc_preOutput_ready = (IBusCachedPlugin_fetchPc_output_ready && _zz_76_); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b0; + if((IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready))begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_177_); + IBusCachedPlugin_fetchPc_samplePcNext = 1'b0; + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + if(_zz_169_)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusCachedPlugin_fetchPc_preOutput_valid = _zz_77_; + assign IBusCachedPlugin_fetchPc_preOutput_payload = IBusCachedPlugin_fetchPc_pc; + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt)begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_78_ = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_78_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_78_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_fetch_haltIt)begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + if((IBusCachedPlugin_rsp_issueDetected || IBusCachedPlugin_rsp_iBusRspOutputHalt))begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + end + + assign _zz_79_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready && _zz_79_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && _zz_79_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_80_; + assign _zz_80_ = ((1'b0 && (! _zz_81_)) || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_81_ = _zz_82_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid = _zz_81_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload = IBusCachedPlugin_fetchPc_pcReg; + always @ (*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if((! IBusCachedPlugin_pcValids_0))begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_0; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_71_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_70_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_69_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @ (*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign _zz_137_ = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign _zz_140_ = (IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt); + assign _zz_141_ = (32'b00000000000000000000000000000000); + assign _zz_138_ = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign _zz_139_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_149_ = (CsrPlugin_privilege == (2'b00)); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload[31 : 2],(2'b00)}; + assign IBusCachedPlugin_redoBranch_valid = IBusCachedPlugin_rsp_redoFetch; + assign IBusCachedPlugin_redoBranch_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_decodeInput_valid = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready = IBusCachedPlugin_iBusRsp_decodeInput_ready; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_fetch_data; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_pc = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + assign _zz_145_ = 1'b1; + assign _zz_143_ = 1'b1; + assign _zz_144_ = 1'b1; + assign _zz_142_ = 1'b0; + assign _zz_146_ = 1'b0; + assign _zz_147_ = 1'b0; + assign _zz_148_ = 1'b0; + assign _zz_136_ = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_64_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_83_)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_84_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_84_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_84_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_84_; + assign _zz_63_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_85_ = (4'b0001); + end + 2'b01 : begin + _zz_85_ = (4'b0011); + end + default : begin + _zz_85_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_85_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_62_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(execute_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_178_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (1'b0 || (! execute_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = execute_REGFILE_WRITE_DATA; + always @ (*) begin + execute_DBusSimplePlugin_rspShifted = execute_MEMORY_READ_DATA; + case(execute_MEMORY_ADDRESS_LOW) + 2'b01 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + execute_DBusSimplePlugin_rspShifted[15 : 0] = execute_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_86_ = (execute_DBusSimplePlugin_rspShifted[7] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_87_[31] = _zz_86_; + _zz_87_[30] = _zz_86_; + _zz_87_[29] = _zz_86_; + _zz_87_[28] = _zz_86_; + _zz_87_[27] = _zz_86_; + _zz_87_[26] = _zz_86_; + _zz_87_[25] = _zz_86_; + _zz_87_[24] = _zz_86_; + _zz_87_[23] = _zz_86_; + _zz_87_[22] = _zz_86_; + _zz_87_[21] = _zz_86_; + _zz_87_[20] = _zz_86_; + _zz_87_[19] = _zz_86_; + _zz_87_[18] = _zz_86_; + _zz_87_[17] = _zz_86_; + _zz_87_[16] = _zz_86_; + _zz_87_[15] = _zz_86_; + _zz_87_[14] = _zz_86_; + _zz_87_[13] = _zz_86_; + _zz_87_[12] = _zz_86_; + _zz_87_[11] = _zz_86_; + _zz_87_[10] = _zz_86_; + _zz_87_[9] = _zz_86_; + _zz_87_[8] = _zz_86_; + _zz_87_[7 : 0] = execute_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_88_ = (execute_DBusSimplePlugin_rspShifted[15] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_89_[31] = _zz_88_; + _zz_89_[30] = _zz_88_; + _zz_89_[29] = _zz_88_; + _zz_89_[28] = _zz_88_; + _zz_89_[27] = _zz_88_; + _zz_89_[26] = _zz_88_; + _zz_89_[25] = _zz_88_; + _zz_89_[24] = _zz_88_; + _zz_89_[23] = _zz_88_; + _zz_89_[22] = _zz_88_; + _zz_89_[21] = _zz_88_; + _zz_89_[20] = _zz_88_; + _zz_89_[19] = _zz_88_; + _zz_89_[18] = _zz_88_; + _zz_89_[17] = _zz_88_; + _zz_89_[16] = _zz_88_; + _zz_89_[15 : 0] = execute_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_173_) + 2'b00 : begin + execute_DBusSimplePlugin_rspFormated = _zz_87_; + end + 2'b01 : begin + execute_DBusSimplePlugin_rspFormated = _zz_89_; + end + default : begin + execute_DBusSimplePlugin_rspFormated = execute_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_91_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_92_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_93_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_94_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_95_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_90_ = {(_zz_94_ != (1'b0)),{(((decode_INSTRUCTION & _zz_225_) == (32'b00000000000000000000000000010000)) != (1'b0)),{((_zz_226_ == _zz_227_) != (1'b0)),{(_zz_92_ != (1'b0)),{(_zz_228_ != _zz_229_),{_zz_230_,{_zz_231_,_zz_232_}}}}}}}; + assign _zz_60_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_315_) == (32'b00000000000000000001000001110011)),{(_zz_316_ == _zz_317_),{_zz_318_,{_zz_319_,_zz_320_}}}}}}} != (20'b00000000000000000000)); + assign _zz_59_ = _zz_179_[0]; + assign _zz_58_ = _zz_180_[0]; + assign _zz_96_ = _zz_90_[5 : 4]; + assign _zz_57_ = _zz_96_; + assign _zz_97_ = _zz_90_[7 : 6]; + assign _zz_56_ = _zz_97_; + assign _zz_98_ = _zz_90_[9 : 8]; + assign _zz_55_ = _zz_98_; + assign _zz_54_ = _zz_181_[0]; + assign _zz_53_ = _zz_182_[0]; + assign _zz_99_ = _zz_90_[13 : 12]; + assign _zz_52_ = _zz_99_; + assign _zz_51_ = _zz_183_[0]; + assign _zz_100_ = _zz_90_[16 : 15]; + assign _zz_50_ = _zz_100_; + assign _zz_101_ = _zz_90_[18 : 17]; + assign _zz_49_ = _zz_101_; + assign _zz_48_ = _zz_184_[0]; + assign _zz_102_ = _zz_90_[22 : 21]; + assign _zz_47_ = _zz_102_; + assign _zz_46_ = _zz_185_[0]; + assign _zz_45_ = _zz_186_[0]; + assign _zz_44_ = _zz_187_[0]; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_103_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_154_; + assign execute_RegFilePlugin_rs2Data = _zz_155_; + assign _zz_43_ = execute_RegFilePlugin_rs1Data; + assign _zz_42_ = execute_RegFilePlugin_rs2Data; + assign lastStageRegFileWrite_valid = (execute_REGFILE_WRITE_VALID && execute_arbitration_isFiring); + assign lastStageRegFileWrite_payload_address = execute_INSTRUCTION[11 : 7]; + assign lastStageRegFileWrite_payload_data = _zz_61_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_104_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_104_ = {31'd0, _zz_188_}; + end + default : begin + _zz_104_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_39_ = _zz_104_; + assign _zz_37_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_105_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_105_ = {29'd0, _zz_189_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_105_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_105_ = {27'd0, _zz_190_}; + end + endcase + end + + assign _zz_36_ = _zz_105_; + assign _zz_106_ = _zz_191_[11]; + always @ (*) begin + _zz_107_[19] = _zz_106_; + _zz_107_[18] = _zz_106_; + _zz_107_[17] = _zz_106_; + _zz_107_[16] = _zz_106_; + _zz_107_[15] = _zz_106_; + _zz_107_[14] = _zz_106_; + _zz_107_[13] = _zz_106_; + _zz_107_[12] = _zz_106_; + _zz_107_[11] = _zz_106_; + _zz_107_[10] = _zz_106_; + _zz_107_[9] = _zz_106_; + _zz_107_[8] = _zz_106_; + _zz_107_[7] = _zz_106_; + _zz_107_[6] = _zz_106_; + _zz_107_[5] = _zz_106_; + _zz_107_[4] = _zz_106_; + _zz_107_[3] = _zz_106_; + _zz_107_[2] = _zz_106_; + _zz_107_[1] = _zz_106_; + _zz_107_[0] = _zz_106_; + end + + assign _zz_108_ = _zz_192_[11]; + always @ (*) begin + _zz_109_[19] = _zz_108_; + _zz_109_[18] = _zz_108_; + _zz_109_[17] = _zz_108_; + _zz_109_[16] = _zz_108_; + _zz_109_[15] = _zz_108_; + _zz_109_[14] = _zz_108_; + _zz_109_[13] = _zz_108_; + _zz_109_[12] = _zz_108_; + _zz_109_[11] = _zz_108_; + _zz_109_[10] = _zz_108_; + _zz_109_[9] = _zz_108_; + _zz_109_[8] = _zz_108_; + _zz_109_[7] = _zz_108_; + _zz_109_[6] = _zz_108_; + _zz_109_[5] = _zz_108_; + _zz_109_[4] = _zz_108_; + _zz_109_[3] = _zz_108_; + _zz_109_[2] = _zz_108_; + _zz_109_[1] = _zz_108_; + _zz_109_[0] = _zz_108_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_110_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_110_ = {_zz_107_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_110_ = {_zz_109_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_110_ = execute_PC; + end + endcase + end + + assign _zz_34_ = _zz_110_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_193_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_32_ = execute_SrcPlugin_addSub; + assign _zz_31_ = execute_SrcPlugin_addSub; + assign _zz_30_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_shiftReg : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_111_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_111_ = _zz_200_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_112_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_112_ == (3'b000))) begin + _zz_113_ = execute_BranchPlugin_eq; + end else if((_zz_112_ == (3'b001))) begin + _zz_113_ = (! execute_BranchPlugin_eq); + end else if((((_zz_112_ & (3'b101)) == (3'b101)))) begin + _zz_113_ = (! execute_SRC_LESS); + end else begin + _zz_113_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_114_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_114_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_114_ = 1'b1; + end + default : begin + _zz_114_ = _zz_113_; + end + endcase + end + + assign _zz_28_ = _zz_114_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_115_ = _zz_202_[19]; + always @ (*) begin + _zz_116_[10] = _zz_115_; + _zz_116_[9] = _zz_115_; + _zz_116_[8] = _zz_115_; + _zz_116_[7] = _zz_115_; + _zz_116_[6] = _zz_115_; + _zz_116_[5] = _zz_115_; + _zz_116_[4] = _zz_115_; + _zz_116_[3] = _zz_115_; + _zz_116_[2] = _zz_115_; + _zz_116_[1] = _zz_115_; + _zz_116_[0] = _zz_115_; + end + + assign _zz_117_ = _zz_203_[11]; + always @ (*) begin + _zz_118_[19] = _zz_117_; + _zz_118_[18] = _zz_117_; + _zz_118_[17] = _zz_117_; + _zz_118_[16] = _zz_117_; + _zz_118_[15] = _zz_117_; + _zz_118_[14] = _zz_117_; + _zz_118_[13] = _zz_117_; + _zz_118_[12] = _zz_117_; + _zz_118_[11] = _zz_117_; + _zz_118_[10] = _zz_117_; + _zz_118_[9] = _zz_117_; + _zz_118_[8] = _zz_117_; + _zz_118_[7] = _zz_117_; + _zz_118_[6] = _zz_117_; + _zz_118_[5] = _zz_117_; + _zz_118_[4] = _zz_117_; + _zz_118_[3] = _zz_117_; + _zz_118_[2] = _zz_117_; + _zz_118_[1] = _zz_117_; + _zz_118_[0] = _zz_117_; + end + + assign _zz_119_ = _zz_204_[11]; + always @ (*) begin + _zz_120_[18] = _zz_119_; + _zz_120_[17] = _zz_119_; + _zz_120_[16] = _zz_119_; + _zz_120_[15] = _zz_119_; + _zz_120_[14] = _zz_119_; + _zz_120_[13] = _zz_119_; + _zz_120_[12] = _zz_119_; + _zz_120_[11] = _zz_119_; + _zz_120_[10] = _zz_119_; + _zz_120_[9] = _zz_119_; + _zz_120_[8] = _zz_119_; + _zz_120_[7] = _zz_119_; + _zz_120_[6] = _zz_119_; + _zz_120_[5] = _zz_119_; + _zz_120_[4] = _zz_119_; + _zz_120_[3] = _zz_119_; + _zz_120_[2] = _zz_119_; + _zz_120_[1] = _zz_119_; + _zz_120_[0] = _zz_119_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_121_ = {{_zz_116_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_121_ = {_zz_118_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_121_ = {{_zz_120_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_121_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_26_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + BranchPlugin_branchExceptionPort_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && BranchPlugin_jumpInterface_payload[1]); + if(1'b0)begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = (4'b0000); + assign BranchPlugin_branchExceptionPort_payload_badAddr = BranchPlugin_jumpInterface_payload; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_122_ = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_123_ = _zz_205_[0]; + assign _zz_124_ = {CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}}; + assign _zz_125_ = (_zz_124_ & (~ _zz_207_)); + assign _zz_126_ = _zz_125_[1]; + assign _zz_127_ = _zz_125_[2]; + assign _zz_128_ = {_zz_127_,_zz_126_}; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_161_)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! (execute_arbitration_isValid != (1'b0))) && IBusCachedPlugin_pcValids_1); + if((CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute != (1'b0)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_24_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_23_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = 1'b0; + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_129_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_130_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_174_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_130_ = (_zz_129_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_130_ != (32'b00000000000000000000000000000000)); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + IBusCachedPlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_170_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + IBusCachedPlugin_injectionPort_valid = 1'b1; + debug_bus_cmd_ready = IBusCachedPlugin_injectionPort_ready; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_131_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign IBusCachedPlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign _zz_22_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_212_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_213_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_214_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_215_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_21_ = decode_SRC2_CTRL; + assign _zz_19_ = _zz_47_; + assign _zz_33_ = decode_to_execute_SRC2_CTRL; + assign _zz_18_ = decode_SHIFT_CTRL; + assign _zz_16_ = _zz_56_; + assign _zz_29_ = decode_to_execute_SHIFT_CTRL; + assign _zz_15_ = decode_BRANCH_CTRL; + assign _zz_13_ = _zz_49_; + assign _zz_27_ = decode_to_execute_BRANCH_CTRL; + assign _zz_12_ = decode_ALU_BITWISE_CTRL; + assign _zz_10_ = _zz_52_; + assign _zz_40_ = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_9_ = decode_ALU_CTRL; + assign _zz_7_ = _zz_57_; + assign _zz_38_ = decode_to_execute_ALU_CTRL; + assign _zz_6_ = decode_ENV_CTRL; + assign _zz_4_ = _zz_50_; + assign _zz_25_ = decode_to_execute_ENV_CTRL; + assign _zz_3_ = decode_SRC1_CTRL; + assign _zz_1_ = _zz_55_; + assign _zz_35_ = decode_to_execute_SRC1_CTRL; + assign decode_arbitration_isFlushed = ({execute_arbitration_flushAll,decode_arbitration_flushAll} != (2'b00)); + assign execute_arbitration_isFlushed = (execute_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (1'b0 || execute_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || 1'b0); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign iBusWishbone_ADR = {_zz_222_,_zz_133_}; + assign iBusWishbone_CTI = ((_zz_133_ == (3'b111)) ? (3'b111) : (3'b010)); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + always @ (*) begin + iBusWishbone_CYC = 1'b0; + iBusWishbone_STB = 1'b0; + if(_zz_171_)begin + iBusWishbone_CYC = 1'b1; + iBusWishbone_STB = 1'b1; + end + end + + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_134_; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_135_ = (4'b0001); + end + 2'b01 : begin + _zz_135_ = (4'b0011); + end + default : begin + _zz_135_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_223_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_77_ <= 1'b0; + _zz_82_ <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + _zz_83_ <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_129_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + _zz_132_ <= (3'b000); + _zz_133_ <= (3'b000); + _zz_134_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(_zz_169_)begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_samplePcNext)begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + _zz_77_ <= 1'b1; + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + _zz_82_ <= 1'b0; + end + if(_zz_80_)begin + _zz_82_ <= IBusCachedPlugin_iBusRsp_stages_0_output_valid; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + end + if((dBus_cmd_valid && dBus_cmd_ready))begin + _zz_83_ <= 1'b1; + end + if((! execute_arbitration_isStuck))begin + _zz_83_ <= 1'b0; + end + if(_zz_159_)begin + if(_zz_160_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_163_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_164_)begin + case(_zz_165_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + case(_zz_132_) + 3'b000 : begin + if(IBusCachedPlugin_injectionPort_valid)begin + _zz_132_ <= (3'b001); + end + end + 3'b001 : begin + _zz_132_ <= (3'b010); + end + 3'b010 : begin + _zz_132_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_132_ <= (3'b100); + end + end + 3'b100 : begin + _zz_132_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_129_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_216_[0]; + CsrPlugin_mstatus_MIE <= _zz_217_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_219_[0]; + CsrPlugin_mie_MTIE <= _zz_220_[0]; + CsrPlugin_mie_MSIE <= _zz_221_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(_zz_171_)begin + if(iBusWishbone_ACK)begin + _zz_133_ <= (_zz_133_ + (3'b001)); + end + end + _zz_134_ <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(_zz_172_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if((! execute_arbitration_isStuckByOthers))begin + execute_LightShifterPlugin_shiftReg <= _zz_61_; + end + if(_zz_159_)begin + if(_zz_160_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(execute_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(_zz_161_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_123_ ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_123_ ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_162_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= _zz_157_; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= _zz_158_; + end + if(_zz_163_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= execute_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_20_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_17_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_14_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_68_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(((! execute_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_execute)))begin + decode_to_execute_PC <= decode_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_2_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_218_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(_zz_172_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({execute_arbitration_isValid,decode_arbitration_isValid} != (2'b00)) || IBusCachedPlugin_incomingInstruction); + if(execute_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_61_; + end + _zz_131_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_170_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_166_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + end else begin + if((DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)))begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid)begin + case(_zz_170_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_godmode <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_208_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_209_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_210_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_211_[0]; + end + end + default : begin + end + endcase + end + if(_zz_166_)begin + if(_zz_167_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_168_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + IBusCachedPlugin_injectionPort_payload_regNext <= IBusCachedPlugin_injectionPort_payload; + end + +endmodule + diff --git a/hw/rtl/2-stage-1024-cache-debug.yaml b/hw/rtl/2-stage-1024-cache-debug.yaml new file mode 100644 index 0000000..5864b0c --- /dev/null +++ b/hw/rtl/2-stage-1024-cache-debug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 1024} + kind: cached diff --git a/hw/rtl/2-stage-1024-cache.v b/hw/rtl/2-stage-1024-cache.v new file mode 100644 index 0000000..669e3a6 --- /dev/null +++ b/hw/rtl/2-stage-1024-cache.v @@ -0,0 +1,3289 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 25/04/2019, 15:31:44 +// Component : VexRiscv + + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input io_cpu_fetch_dataBypassValid, + input [31:0] io_cpu_fetch_dataBypass, + output io_cpu_fetch_mmuBus_cmd_isValid, + output [31:0] io_cpu_fetch_mmuBus_cmd_virtualAddress, + output io_cpu_fetch_mmuBus_cmd_bypassTranslation, + input [31:0] io_cpu_fetch_mmuBus_rsp_physicalAddress, + input io_cpu_fetch_mmuBus_rsp_isIoAccess, + input io_cpu_fetch_mmuBus_rsp_allowRead, + input io_cpu_fetch_mmuBus_rsp_allowWrite, + input io_cpu_fetch_mmuBus_rsp_allowExecute, + input io_cpu_fetch_mmuBus_rsp_exception, + input io_cpu_fetch_mmuBus_rsp_refilling, + output io_cpu_fetch_mmuBus_end, + input io_cpu_fetch_mmuBus_busy, + output [31:0] io_cpu_fetch_physicalAddress, + output io_cpu_fetch_cacheMiss, + output io_cpu_fetch_error, + output io_cpu_fetch_mmuRefilling, + output io_cpu_fetch_mmuException, + input io_cpu_fetch_isUser, + output io_cpu_fetch_haltIt, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset); + reg [23:0] _zz_10_; + reg [31:0] _zz_11_; + wire _zz_12_; + wire _zz_13_; + wire [0:0] _zz_14_; + wire [0:0] _zz_15_; + wire [23:0] _zz_16_; + reg _zz_1_; + reg _zz_2_; + reg lineLoader_fire; + reg lineLoader_valid; + reg [31:0] lineLoader_address; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [5:0] lineLoader_flushCounter; + reg _zz_3_; + reg lineLoader_cmdSent; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + reg [2:0] lineLoader_wordIndex; + wire lineLoader_write_tag_0_valid; + wire [4:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [21:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [7:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire _zz_4_; + wire [4:0] _zz_5_; + wire _zz_6_; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [21:0] fetchStage_read_waysValues_0_tag_address; + wire [23:0] _zz_7_; + wire [7:0] _zz_8_; + wire _zz_9_; + wire [31:0] fetchStage_read_waysValues_0_data; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + reg [23:0] ways_0_tags [0:31]; + reg [31:0] ways_0_datas [0:255]; + assign _zz_12_ = (! lineLoader_flushCounter[5]); + assign _zz_13_ = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign _zz_14_ = _zz_7_[0 : 0]; + assign _zz_15_ = _zz_7_[1 : 1]; + assign _zz_16_ = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @ (posedge clk) begin + if(_zz_2_) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_16_; + end + end + + always @ (posedge clk) begin + if(_zz_6_) begin + _zz_10_ <= ways_0_tags[_zz_5_]; + end + end + + always @ (posedge clk) begin + if(_zz_1_) begin + ways_0_datas[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_9_) begin + _zz_11_ <= ways_0_datas[_zz_8_]; + end + end + + always @ (*) begin + _zz_1_ = 1'b0; + if(lineLoader_write_data_0_valid)begin + _zz_1_ = 1'b1; + end + end + + always @ (*) begin + _zz_2_ = 1'b0; + if(lineLoader_write_tag_0_valid)begin + _zz_2_ = 1'b1; + end + end + + assign io_cpu_fetch_haltIt = io_cpu_fetch_mmuBus_busy; + always @ (*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid)begin + if((lineLoader_wordIndex == (3'b111)))begin + lineLoader_fire = 1'b1; + end + end + end + + always @ (*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(_zz_12_)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if((! _zz_3_))begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush)begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],(5'b00000)}; + assign io_mem_cmd_payload_size = (3'b101); + always @ (*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(lineLoader_fire)begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign _zz_4_ = 1'b1; + assign lineLoader_write_tag_0_valid = ((_zz_4_ && lineLoader_fire) || (! lineLoader_flushCounter[5])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[5] ? lineLoader_address[9 : 5] : lineLoader_flushCounter[4 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[5]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 10]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && _zz_4_); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[9 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign _zz_5_ = io_cpu_prefetch_pc[9 : 5]; + assign _zz_6_ = (! io_cpu_fetch_isStuck); + assign _zz_7_ = _zz_10_; + assign fetchStage_read_waysValues_0_tag_valid = _zz_14_[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_15_[0]; + assign fetchStage_read_waysValues_0_tag_address = _zz_7_[23 : 2]; + assign _zz_8_ = io_cpu_prefetch_pc[9 : 2]; + assign _zz_9_ = (! io_cpu_fetch_isStuck); + assign fetchStage_read_waysValues_0_data = _zz_11_; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuBus_rsp_physicalAddress[31 : 10])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != (1'b0)); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_waysValues_0_data; + assign fetchStage_hit_word = fetchStage_hit_data[31 : 0]; + assign io_cpu_fetch_data = (io_cpu_fetch_dataBypassValid ? io_cpu_fetch_dataBypass : fetchStage_hit_word); + assign io_cpu_fetch_mmuBus_cmd_isValid = io_cpu_fetch_isValid; + assign io_cpu_fetch_mmuBus_cmd_virtualAddress = io_cpu_fetch_pc; + assign io_cpu_fetch_mmuBus_cmd_bypassTranslation = 1'b0; + assign io_cpu_fetch_mmuBus_end = ((! io_cpu_fetch_isStuck) || io_cpu_fetch_isRemoved); + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuBus_rsp_physicalAddress; + assign io_cpu_fetch_cacheMiss = (! fetchStage_hit_valid); + assign io_cpu_fetch_error = fetchStage_hit_error; + assign io_cpu_fetch_mmuRefilling = io_cpu_fetch_mmuBus_rsp_refilling; + assign io_cpu_fetch_mmuException = ((! io_cpu_fetch_mmuBus_rsp_refilling) && (io_cpu_fetch_mmuBus_rsp_exception || (! io_cpu_fetch_mmuBus_rsp_allowExecute))); + always @ (posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= (3'b000); + end else begin + if(lineLoader_fire)begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire)begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid)begin + lineLoader_valid <= 1'b1; + end + if(io_flush)begin + lineLoader_flushPending <= 1'b1; + end + if(_zz_13_)begin + lineLoader_flushPending <= 1'b0; + end + if((io_mem_cmd_valid && io_mem_cmd_ready))begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire)begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid)begin + lineLoader_wordIndex <= (lineLoader_wordIndex + (3'b001)); + if(io_mem_rsp_payload_error)begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + if(io_cpu_fill_valid)begin + lineLoader_address <= io_cpu_fill_payload; + end + if(_zz_12_)begin + lineLoader_flushCounter <= (lineLoader_flushCounter + (6'b000001)); + end + _zz_3_ <= lineLoader_flushCounter[5]; + if(_zz_13_)begin + lineLoader_flushCounter <= (6'b000000); + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset); + wire _zz_130_; + wire _zz_131_; + wire _zz_132_; + wire _zz_133_; + wire _zz_134_; + wire [31:0] _zz_135_; + wire _zz_136_; + wire _zz_137_; + wire _zz_138_; + wire _zz_139_; + wire _zz_140_; + wire _zz_141_; + wire _zz_142_; + wire _zz_143_; + wire _zz_144_; + wire _zz_145_; + wire [31:0] _zz_146_; + reg _zz_147_; + reg [31:0] _zz_148_; + reg [31:0] _zz_149_; + reg [31:0] _zz_150_; + reg [3:0] _zz_151_; + reg [31:0] _zz_152_; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_error; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire _zz_153_; + wire _zz_154_; + wire _zz_155_; + wire _zz_156_; + wire _zz_157_; + wire _zz_158_; + wire [1:0] _zz_159_; + wire _zz_160_; + wire _zz_161_; + wire _zz_162_; + wire [1:0] _zz_163_; + wire _zz_164_; + wire [2:0] _zz_165_; + wire [2:0] _zz_166_; + wire [31:0] _zz_167_; + wire [2:0] _zz_168_; + wire [0:0] _zz_169_; + wire [0:0] _zz_170_; + wire [0:0] _zz_171_; + wire [0:0] _zz_172_; + wire [0:0] _zz_173_; + wire [0:0] _zz_174_; + wire [0:0] _zz_175_; + wire [0:0] _zz_176_; + wire [0:0] _zz_177_; + wire [2:0] _zz_178_; + wire [4:0] _zz_179_; + wire [11:0] _zz_180_; + wire [11:0] _zz_181_; + wire [31:0] _zz_182_; + wire [31:0] _zz_183_; + wire [31:0] _zz_184_; + wire [31:0] _zz_185_; + wire [31:0] _zz_186_; + wire [31:0] _zz_187_; + wire [31:0] _zz_188_; + wire [31:0] _zz_189_; + wire [32:0] _zz_190_; + wire [19:0] _zz_191_; + wire [11:0] _zz_192_; + wire [11:0] _zz_193_; + wire [1:0] _zz_194_; + wire [1:0] _zz_195_; + wire [2:0] _zz_196_; + wire [0:0] _zz_197_; + wire [0:0] _zz_198_; + wire [0:0] _zz_199_; + wire [0:0] _zz_200_; + wire [0:0] _zz_201_; + wire [0:0] _zz_202_; + wire [26:0] _zz_203_; + wire [6:0] _zz_204_; + wire [1:0] _zz_205_; + wire _zz_206_; + wire _zz_207_; + wire [0:0] _zz_208_; + wire [4:0] _zz_209_; + wire [0:0] _zz_210_; + wire [0:0] _zz_211_; + wire _zz_212_; + wire [0:0] _zz_213_; + wire [20:0] _zz_214_; + wire [31:0] _zz_215_; + wire [31:0] _zz_216_; + wire _zz_217_; + wire [0:0] _zz_218_; + wire [1:0] _zz_219_; + wire [31:0] _zz_220_; + wire [31:0] _zz_221_; + wire [31:0] _zz_222_; + wire [0:0] _zz_223_; + wire [1:0] _zz_224_; + wire [1:0] _zz_225_; + wire [1:0] _zz_226_; + wire _zz_227_; + wire [0:0] _zz_228_; + wire [17:0] _zz_229_; + wire [31:0] _zz_230_; + wire _zz_231_; + wire _zz_232_; + wire [31:0] _zz_233_; + wire [31:0] _zz_234_; + wire _zz_235_; + wire _zz_236_; + wire _zz_237_; + wire _zz_238_; + wire _zz_239_; + wire [0:0] _zz_240_; + wire [0:0] _zz_241_; + wire _zz_242_; + wire [0:0] _zz_243_; + wire [15:0] _zz_244_; + wire [31:0] _zz_245_; + wire [31:0] _zz_246_; + wire [31:0] _zz_247_; + wire [31:0] _zz_248_; + wire [31:0] _zz_249_; + wire [31:0] _zz_250_; + wire [31:0] _zz_251_; + wire [31:0] _zz_252_; + wire [31:0] _zz_253_; + wire [0:0] _zz_254_; + wire [0:0] _zz_255_; + wire [1:0] _zz_256_; + wire [1:0] _zz_257_; + wire _zz_258_; + wire [0:0] _zz_259_; + wire [13:0] _zz_260_; + wire [31:0] _zz_261_; + wire [31:0] _zz_262_; + wire [31:0] _zz_263_; + wire _zz_264_; + wire [0:0] _zz_265_; + wire [1:0] _zz_266_; + wire [0:0] _zz_267_; + wire [0:0] _zz_268_; + wire [1:0] _zz_269_; + wire [1:0] _zz_270_; + wire _zz_271_; + wire [0:0] _zz_272_; + wire [10:0] _zz_273_; + wire [31:0] _zz_274_; + wire [31:0] _zz_275_; + wire [31:0] _zz_276_; + wire _zz_277_; + wire _zz_278_; + wire [31:0] _zz_279_; + wire [31:0] _zz_280_; + wire [31:0] _zz_281_; + wire [31:0] _zz_282_; + wire _zz_283_; + wire _zz_284_; + wire [0:0] _zz_285_; + wire [0:0] _zz_286_; + wire _zz_287_; + wire [0:0] _zz_288_; + wire [8:0] _zz_289_; + wire [31:0] _zz_290_; + wire _zz_291_; + wire _zz_292_; + wire [0:0] _zz_293_; + wire [0:0] _zz_294_; + wire [0:0] _zz_295_; + wire [0:0] _zz_296_; + wire _zz_297_; + wire [0:0] _zz_298_; + wire [5:0] _zz_299_; + wire [31:0] _zz_300_; + wire [31:0] _zz_301_; + wire [31:0] _zz_302_; + wire [31:0] _zz_303_; + wire [31:0] _zz_304_; + wire [0:0] _zz_305_; + wire [0:0] _zz_306_; + wire [1:0] _zz_307_; + wire [1:0] _zz_308_; + wire _zz_309_; + wire [0:0] _zz_310_; + wire [2:0] _zz_311_; + wire [31:0] _zz_312_; + wire [31:0] _zz_313_; + wire _zz_314_; + wire _zz_315_; + wire _zz_316_; + wire [0:0] _zz_317_; + wire [0:0] _zz_318_; + wire [1:0] _zz_319_; + wire [1:0] _zz_320_; + wire [31:0] _zz_321_; + wire [31:0] _zz_322_; + wire [31:0] _zz_323_; + wire _zz_324_; + wire [0:0] _zz_325_; + wire [12:0] _zz_326_; + wire [31:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire _zz_330_; + wire [0:0] _zz_331_; + wire [6:0] _zz_332_; + wire [31:0] _zz_333_; + wire [31:0] _zz_334_; + wire [31:0] _zz_335_; + wire _zz_336_; + wire [0:0] _zz_337_; + wire [0:0] _zz_338_; + wire decode_CSR_WRITE_OPCODE; + wire decode_SRC_LESS_UNSIGNED; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_1_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_2_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_3_; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_4_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_5_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_6_; + wire decode_IS_CSR; + wire decode_MEMORY_ENABLE; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_7_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_8_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_9_; + wire decode_CSR_READ_OPCODE; + wire execute_REGFILE_WRITE_VALID; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_10_; + wire `AluCtrlEnum_defaultEncoding_type _zz_11_; + wire `AluCtrlEnum_defaultEncoding_type _zz_12_; + wire decode_SRC2_FORCE_ZERO; + wire decode_MEMORY_STORE; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_13_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_14_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_15_; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_16_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_17_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_18_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_19_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_20_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_21_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire _zz_22_; + wire _zz_23_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_24_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_25_; + wire [31:0] execute_PC; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_26_; + wire _zz_27_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_28_; + wire _zz_29_; + wire [31:0] _zz_30_; + wire [31:0] _zz_31_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_32_; + wire [31:0] _zz_33_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_34_; + wire [31:0] _zz_35_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_36_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_37_; + wire [31:0] _zz_38_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_39_; + reg _zz_40_; + wire [31:0] _zz_41_; + wire [31:0] _zz_42_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire _zz_43_; + wire _zz_44_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_45_; + wire _zz_46_; + wire _zz_47_; + wire _zz_48_; + wire _zz_49_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_50_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_51_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_52_; + wire `AluCtrlEnum_defaultEncoding_type _zz_53_; + wire _zz_54_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_55_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_56_; + wire _zz_57_; + wire _zz_58_; + reg [31:0] _zz_59_; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire [31:0] execute_MEMORY_READ_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] _zz_60_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_61_; + wire [31:0] execute_RS2; + wire [31:0] execute_INSTRUCTION; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_62_; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected; + reg _zz_63_; + reg _zz_64_; + reg _zz_65_; + reg [31:0] _zz_66_; + wire [31:0] _zz_67_; + wire [31:0] _zz_68_; + wire [31:0] _zz_69_; + wire [31:0] decode_PC /* verilator public */ ; + wire [31:0] decode_INSTRUCTION /* verilator public */ ; + wire decode_arbitration_haltItself /* verilator public */ ; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll /* verilator public */ ; + wire decode_arbitration_isValid /* verilator public */ ; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + wire execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg IBusCachedPlugin_fetcherHalt; + wire IBusCachedPlugin_fetcherflushIt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_redoBranch_valid; + wire [31:0] IBusCachedPlugin_redoBranch_payload; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [2:0] _zz_70_; + wire [2:0] _zz_71_; + wire _zz_72_; + wire _zz_73_; + wire IBusCachedPlugin_fetchPc_preOutput_valid; + wire IBusCachedPlugin_fetchPc_preOutput_ready; + wire [31:0] IBusCachedPlugin_fetchPc_preOutput_payload; + wire _zz_74_; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_inc; + reg IBusCachedPlugin_fetchPc_propagatePc; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + reg IBusCachedPlugin_fetchPc_samplePcNext; + reg _zz_75_; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_0_inputSample; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + reg IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_inputSample; + wire _zz_76_; + wire _zz_77_; + wire _zz_78_; + wire _zz_79_; + reg _zz_80_; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_decodeInput_valid; + wire IBusCachedPlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + reg IBusCachedPlugin_injector_decodeRemoved; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + reg IBusCachedPlugin_rsp_redoFetch; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + reg execute_DBusSimplePlugin_cmdSent; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_81_; + reg [3:0] _zz_82_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] execute_DBusSimplePlugin_rspShifted; + wire _zz_83_; + reg [31:0] _zz_84_; + wire _zz_85_; + reg [31:0] _zz_86_; + reg [31:0] execute_DBusSimplePlugin_rspFormated; + wire [26:0] _zz_87_; + wire _zz_88_; + wire _zz_89_; + wire _zz_90_; + wire _zz_91_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_92_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_93_; + wire `AluCtrlEnum_defaultEncoding_type _zz_94_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_95_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_96_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_97_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_98_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_99_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire execute_RegFilePlugin_regFileWrite_valid /* verilator public */ ; + wire [4:0] execute_RegFilePlugin_regFileWrite_payload_address /* verilator public */ ; + wire [31:0] execute_RegFilePlugin_regFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_100_; + reg [31:0] _zz_101_; + wire _zz_102_; + reg [19:0] _zz_103_; + wire _zz_104_; + reg [19:0] _zz_105_; + reg [31:0] _zz_106_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + reg [31:0] execute_LightShifterPlugin_shiftReg; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_107_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_108_; + reg _zz_109_; + reg _zz_110_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_111_; + reg [10:0] _zz_112_; + wire _zz_113_; + reg [19:0] _zz_114_; + wire _zz_115_; + reg [18:0] _zz_116_; + reg [31:0] _zz_117_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_118_; + wire _zz_119_; + wire [2:0] _zz_120_; + wire [2:0] _zz_121_; + wire _zz_122_; + wire _zz_123_; + wire [1:0] _zz_124_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_125_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_126_; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg decode_to_execute_MEMORY_STORE; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg decode_to_execute_CSR_READ_OPCODE; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg decode_to_execute_MEMORY_ENABLE; + reg decode_to_execute_IS_CSR; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg [31:0] decode_to_execute_PC; + reg [31:0] decode_to_execute_INSTRUCTION; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg [2:0] _zz_127_; + reg _zz_128_; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_129_; + `ifndef SYNTHESIS + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_1__string; + reg [47:0] _zz_2__string; + reg [47:0] _zz_3__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_4__string; + reg [23:0] _zz_5__string; + reg [23:0] _zz_6__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_7__string; + reg [95:0] _zz_8__string; + reg [95:0] _zz_9__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_10__string; + reg [63:0] _zz_11__string; + reg [63:0] _zz_12__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_13__string; + reg [31:0] _zz_14__string; + reg [31:0] _zz_15__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_16__string; + reg [71:0] _zz_17__string; + reg [71:0] _zz_18__string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_19__string; + reg [39:0] _zz_20__string; + reg [39:0] _zz_21__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_24__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_26__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_28__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_32__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_34__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_37__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_39__string; + reg [39:0] _zz_45__string; + reg [95:0] _zz_50__string; + reg [31:0] _zz_51__string; + reg [47:0] _zz_52__string; + reg [63:0] _zz_53__string; + reg [23:0] _zz_55__string; + reg [71:0] _zz_56__string; + reg [71:0] _zz_92__string; + reg [23:0] _zz_93__string; + reg [63:0] _zz_94__string; + reg [47:0] _zz_95__string; + reg [31:0] _zz_96__string; + reg [95:0] _zz_97__string; + reg [39:0] _zz_98__string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_153_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_154_ = (! execute_arbitration_isStuckByOthers); + assign _zz_155_ = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != (2'b00)); + assign _zz_156_ = ({CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}} != (3'b000)); + assign _zz_157_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_158_ = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_159_ = execute_INSTRUCTION[29 : 28]; + assign _zz_160_ = (IBusCachedPlugin_fetchPc_preOutput_valid && IBusCachedPlugin_fetchPc_preOutput_ready); + assign _zz_161_ = (iBus_cmd_valid || (_zz_127_ != (3'b000))); + assign _zz_162_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_163_ = execute_INSTRUCTION[13 : 12]; + assign _zz_164_ = execute_INSTRUCTION[13]; + assign _zz_165_ = (_zz_70_ - (3'b001)); + assign _zz_166_ = {IBusCachedPlugin_fetchPc_inc,(2'b00)}; + assign _zz_167_ = {29'd0, _zz_166_}; + assign _zz_168_ = (execute_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_169_ = _zz_87_[0 : 0]; + assign _zz_170_ = _zz_87_[7 : 7]; + assign _zz_171_ = _zz_87_[18 : 18]; + assign _zz_172_ = _zz_87_[19 : 19]; + assign _zz_173_ = _zz_87_[20 : 20]; + assign _zz_174_ = _zz_87_[21 : 21]; + assign _zz_175_ = _zz_87_[24 : 24]; + assign _zz_176_ = _zz_87_[25 : 25]; + assign _zz_177_ = execute_SRC_LESS; + assign _zz_178_ = (3'b100); + assign _zz_179_ = execute_INSTRUCTION[19 : 15]; + assign _zz_180_ = execute_INSTRUCTION[31 : 20]; + assign _zz_181_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_182_ = ($signed(_zz_183_) + $signed(_zz_186_)); + assign _zz_183_ = ($signed(_zz_184_) + $signed(_zz_185_)); + assign _zz_184_ = execute_SRC1; + assign _zz_185_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_186_ = (execute_SRC_USE_SUB_LESS ? _zz_187_ : _zz_188_); + assign _zz_187_ = (32'b00000000000000000000000000000001); + assign _zz_188_ = (32'b00000000000000000000000000000000); + assign _zz_189_ = (_zz_190_ >>> 1); + assign _zz_190_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_191_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_192_ = execute_INSTRUCTION[31 : 20]; + assign _zz_193_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_194_ = (_zz_118_ & (~ _zz_195_)); + assign _zz_195_ = (_zz_118_ - (2'b01)); + assign _zz_196_ = (_zz_120_ - (3'b001)); + assign _zz_197_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_198_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_199_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_200_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_201_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_202_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_203_ = (iBus_cmd_payload_address >>> 5); + assign _zz_204_ = ({3'd0,_zz_129_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_205_ = {_zz_73_,_zz_72_}; + assign _zz_206_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100100)); + assign _zz_207_ = ((decode_INSTRUCTION & (32'b00000000000000000011000001010100)) == (32'b00000000000000000001000000010000)); + assign _zz_208_ = _zz_89_; + assign _zz_209_ = {(_zz_215_ == _zz_216_),{_zz_217_,{_zz_218_,_zz_219_}}}; + assign _zz_210_ = ((decode_INSTRUCTION & _zz_220_) == (32'b00000000000000000001000000000000)); + assign _zz_211_ = (1'b0); + assign _zz_212_ = ((_zz_221_ == _zz_222_) != (1'b0)); + assign _zz_213_ = ({_zz_223_,_zz_224_} != (3'b000)); + assign _zz_214_ = {(_zz_225_ != _zz_226_),{_zz_227_,{_zz_228_,_zz_229_}}}; + assign _zz_215_ = (decode_INSTRUCTION & (32'b00000000000000000001000000010000)); + assign _zz_216_ = (32'b00000000000000000001000000010000); + assign _zz_217_ = ((decode_INSTRUCTION & _zz_230_) == (32'b00000000000000000010000000010000)); + assign _zz_218_ = _zz_91_; + assign _zz_219_ = {_zz_231_,_zz_232_}; + assign _zz_220_ = (32'b00000000000000000001000000000000); + assign _zz_221_ = (decode_INSTRUCTION & (32'b00000000000000000011000000000000)); + assign _zz_222_ = (32'b00000000000000000010000000000000); + assign _zz_223_ = (_zz_233_ == _zz_234_); + assign _zz_224_ = {_zz_235_,_zz_236_}; + assign _zz_225_ = {_zz_237_,_zz_238_}; + assign _zz_226_ = (2'b00); + assign _zz_227_ = (_zz_239_ != (1'b0)); + assign _zz_228_ = (_zz_240_ != _zz_241_); + assign _zz_229_ = {_zz_242_,{_zz_243_,_zz_244_}}; + assign _zz_230_ = (32'b00000000000000000010000000010000); + assign _zz_231_ = ((decode_INSTRUCTION & _zz_245_) == (32'b00000000000000000000000000000100)); + assign _zz_232_ = ((decode_INSTRUCTION & _zz_246_) == (32'b00000000000000000000000000000000)); + assign _zz_233_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_234_ = (32'b00000000000000000000000001000000); + assign _zz_235_ = ((decode_INSTRUCTION & _zz_247_) == (32'b00000000000000000010000000010000)); + assign _zz_236_ = ((decode_INSTRUCTION & _zz_248_) == (32'b01000000000000000000000000110000)); + assign _zz_237_ = ((decode_INSTRUCTION & _zz_249_) == (32'b00000000000000000010000000000000)); + assign _zz_238_ = ((decode_INSTRUCTION & _zz_250_) == (32'b00000000000000000001000000000000)); + assign _zz_239_ = ((decode_INSTRUCTION & _zz_251_) == (32'b00000000000000000000000000100000)); + assign _zz_240_ = (_zz_252_ == _zz_253_); + assign _zz_241_ = (1'b0); + assign _zz_242_ = ({_zz_254_,_zz_255_} != (2'b00)); + assign _zz_243_ = (_zz_256_ != _zz_257_); + assign _zz_244_ = {_zz_258_,{_zz_259_,_zz_260_}}; + assign _zz_245_ = (32'b00000000000000000000000000001100); + assign _zz_246_ = (32'b00000000000000000000000000101000); + assign _zz_247_ = (32'b00000000000000000010000000010100); + assign _zz_248_ = (32'b01000000000000000100000000110100); + assign _zz_249_ = (32'b00000000000000000010000000010000); + assign _zz_250_ = (32'b00000000000000000101000000000000); + assign _zz_251_ = (32'b00000000000000000000000000100000); + assign _zz_252_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_253_ = (32'b00000000000000000000000000000000); + assign _zz_254_ = ((decode_INSTRUCTION & _zz_261_) == (32'b00000000000000000000000000000100)); + assign _zz_255_ = _zz_90_; + assign _zz_256_ = {(_zz_262_ == _zz_263_),_zz_90_}; + assign _zz_257_ = (2'b00); + assign _zz_258_ = ({_zz_264_,{_zz_265_,_zz_266_}} != (4'b0000)); + assign _zz_259_ = ({_zz_267_,_zz_268_} != (2'b00)); + assign _zz_260_ = {(_zz_269_ != _zz_270_),{_zz_271_,{_zz_272_,_zz_273_}}}; + assign _zz_261_ = (32'b00000000000000000000000000010100); + assign _zz_262_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_263_ = (32'b00000000000000000000000000000100); + assign _zz_264_ = ((decode_INSTRUCTION & _zz_274_) == (32'b00000000000000000000000000000000)); + assign _zz_265_ = (_zz_275_ == _zz_276_); + assign _zz_266_ = {_zz_277_,_zz_278_}; + assign _zz_267_ = (_zz_279_ == _zz_280_); + assign _zz_268_ = (_zz_281_ == _zz_282_); + assign _zz_269_ = {_zz_89_,_zz_283_}; + assign _zz_270_ = (2'b00); + assign _zz_271_ = (_zz_284_ != (1'b0)); + assign _zz_272_ = (_zz_285_ != _zz_286_); + assign _zz_273_ = {_zz_287_,{_zz_288_,_zz_289_}}; + assign _zz_274_ = (32'b00000000000000000000000001000100); + assign _zz_275_ = (decode_INSTRUCTION & (32'b00000000000000000000000000011000)); + assign _zz_276_ = (32'b00000000000000000000000000000000); + assign _zz_277_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000000100)) == (32'b00000000000000000010000000000000)); + assign _zz_278_ = ((decode_INSTRUCTION & (32'b00000000000000000101000000000100)) == (32'b00000000000000000001000000000000)); + assign _zz_279_ = (decode_INSTRUCTION & (32'b00000000000000000000000000110100)); + assign _zz_280_ = (32'b00000000000000000000000000100000); + assign _zz_281_ = (decode_INSTRUCTION & (32'b00000000000000000000000001100100)); + assign _zz_282_ = (32'b00000000000000000000000000100000); + assign _zz_283_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000011100)) == (32'b00000000000000000000000000000100)); + assign _zz_284_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001011000)) == (32'b00000000000000000000000001000000)); + assign _zz_285_ = ((decode_INSTRUCTION & _zz_290_) == (32'b00000000000000000000000001010000)); + assign _zz_286_ = (1'b0); + assign _zz_287_ = ({_zz_291_,_zz_292_} != (2'b00)); + assign _zz_288_ = ({_zz_293_,_zz_294_} != (2'b00)); + assign _zz_289_ = {(_zz_295_ != _zz_296_),{_zz_297_,{_zz_298_,_zz_299_}}}; + assign _zz_290_ = (32'b00010000000000000011000001010000); + assign _zz_291_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_292_ = ((decode_INSTRUCTION & (32'b00010000010000000011000001010000)) == (32'b00010000000000000000000001010000)); + assign _zz_293_ = ((decode_INSTRUCTION & _zz_300_) == (32'b00000000000000000110000000010000)); + assign _zz_294_ = ((decode_INSTRUCTION & _zz_301_) == (32'b00000000000000000100000000010000)); + assign _zz_295_ = ((decode_INSTRUCTION & _zz_302_) == (32'b00000000000000000010000000010000)); + assign _zz_296_ = (1'b0); + assign _zz_297_ = ((_zz_303_ == _zz_304_) != (1'b0)); + assign _zz_298_ = ({_zz_305_,_zz_306_} != (2'b00)); + assign _zz_299_ = {(_zz_307_ != _zz_308_),{_zz_309_,{_zz_310_,_zz_311_}}}; + assign _zz_300_ = (32'b00000000000000000110000000010100); + assign _zz_301_ = (32'b00000000000000000101000000010100); + assign _zz_302_ = (32'b00000000000000000110000000010100); + assign _zz_303_ = (decode_INSTRUCTION & (32'b00000000000000000001000001001000)); + assign _zz_304_ = (32'b00000000000000000001000000001000); + assign _zz_305_ = _zz_88_; + assign _zz_306_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001110000)) == (32'b00000000000000000000000000100000)); + assign _zz_307_ = {_zz_88_,((decode_INSTRUCTION & _zz_312_) == (32'b00000000000000000000000000000000))}; + assign _zz_308_ = (2'b00); + assign _zz_309_ = (((decode_INSTRUCTION & _zz_313_) == (32'b00000000000000000101000000010000)) != (1'b0)); + assign _zz_310_ = ({_zz_314_,_zz_315_} != (2'b00)); + assign _zz_311_ = {(_zz_316_ != (1'b0)),{(_zz_317_ != _zz_318_),(_zz_319_ != _zz_320_)}}; + assign _zz_312_ = (32'b00000000000000000000000000100000); + assign _zz_313_ = (32'b00000000000000000111000001010100); + assign _zz_314_ = ((decode_INSTRUCTION & (32'b01000000000000000011000001010100)) == (32'b01000000000000000001000000010000)); + assign _zz_315_ = ((decode_INSTRUCTION & (32'b00000000000000000111000001010100)) == (32'b00000000000000000001000000010000)); + assign _zz_316_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000010000)) == (32'b00000000000000000000000000010000)); + assign _zz_317_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000000)) == (32'b00000000000000000000000000000000)); + assign _zz_318_ = (1'b0); + assign _zz_319_ = {((decode_INSTRUCTION & (32'b00000000000000000001000001010000)) == (32'b00000000000000000001000001010000)),((decode_INSTRUCTION & (32'b00000000000000000010000001010000)) == (32'b00000000000000000010000001010000))}; + assign _zz_320_ = (2'b00); + assign _zz_321_ = (32'b00000000000000000001000001111111); + assign _zz_322_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_323_ = (32'b00000000000000000010000001110011); + assign _zz_324_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_325_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_326_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_327_) == (32'b00000000000000000000000000000011)),{(_zz_328_ == _zz_329_),{_zz_330_,{_zz_331_,_zz_332_}}}}}}; + assign _zz_327_ = (32'b00000000000000000101000001011111); + assign _zz_328_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_329_ = (32'b00000000000000000000000001100011); + assign _zz_330_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_331_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_332_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_333_) == (32'b00000000000000000101000000110011)),{(_zz_334_ == _zz_335_),{_zz_336_,{_zz_337_,_zz_338_}}}}}}; + assign _zz_333_ = (32'b10111110000000000111000001111111); + assign _zz_334_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_335_ = (32'b00000000000000000000000000110011); + assign _zz_336_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_337_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_338_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("2-stage-1024-cache.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_40_) begin + RegFilePlugin_regFile[execute_RegFilePlugin_regFileWrite_payload_address] <= execute_RegFilePlugin_regFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_99_) begin + _zz_148_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_99_) begin + _zz_149_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush(_zz_130_), + .io_cpu_prefetch_isValid(_zz_131_), + .io_cpu_prefetch_haltIt(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt), + .io_cpu_prefetch_pc(IBusCachedPlugin_iBusRsp_stages_0_input_payload), + .io_cpu_fetch_isValid(_zz_132_), + .io_cpu_fetch_isStuck(_zz_133_), + .io_cpu_fetch_isRemoved(_zz_134_), + .io_cpu_fetch_pc(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload), + .io_cpu_fetch_data(IBusCachedPlugin_cache_io_cpu_fetch_data), + .io_cpu_fetch_dataBypassValid(IBusCachedPlugin_s1_tightlyCoupledHit), + .io_cpu_fetch_dataBypass(_zz_135_), + .io_cpu_fetch_mmuBus_cmd_isValid(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid), + .io_cpu_fetch_mmuBus_cmd_virtualAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_cmd_bypassTranslation(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation), + .io_cpu_fetch_mmuBus_rsp_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_rsp_isIoAccess(_zz_136_), + .io_cpu_fetch_mmuBus_rsp_allowRead(_zz_137_), + .io_cpu_fetch_mmuBus_rsp_allowWrite(_zz_138_), + .io_cpu_fetch_mmuBus_rsp_allowExecute(_zz_139_), + .io_cpu_fetch_mmuBus_rsp_exception(_zz_140_), + .io_cpu_fetch_mmuBus_rsp_refilling(_zz_141_), + .io_cpu_fetch_mmuBus_end(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end), + .io_cpu_fetch_mmuBus_busy(_zz_142_), + .io_cpu_fetch_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_cpu_fetch_cacheMiss(IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss), + .io_cpu_fetch_error(IBusCachedPlugin_cache_io_cpu_fetch_error), + .io_cpu_fetch_mmuRefilling(IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling), + .io_cpu_fetch_mmuException(IBusCachedPlugin_cache_io_cpu_fetch_mmuException), + .io_cpu_fetch_isUser(_zz_143_), + .io_cpu_fetch_haltIt(IBusCachedPlugin_cache_io_cpu_fetch_haltIt), + .io_cpu_decode_isValid(_zz_144_), + .io_cpu_decode_isStuck(_zz_145_), + .io_cpu_decode_pc(_zz_146_), + .io_cpu_decode_physicalAddress(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_cpu_decode_data(IBusCachedPlugin_cache_io_cpu_decode_data), + .io_cpu_fill_valid(_zz_147_), + .io_cpu_fill_payload(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_mem_cmd_valid(IBusCachedPlugin_cache_io_mem_cmd_valid), + .io_mem_cmd_ready(iBus_cmd_ready), + .io_mem_cmd_payload_address(IBusCachedPlugin_cache_io_mem_cmd_payload_address), + .io_mem_cmd_payload_size(IBusCachedPlugin_cache_io_mem_cmd_payload_size), + .io_mem_rsp_valid(iBus_rsp_valid), + .io_mem_rsp_payload_data(iBus_rsp_payload_data), + .io_mem_rsp_payload_error(iBus_rsp_payload_error), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_205_) + 2'b00 : begin + _zz_150_ = BranchPlugin_jumpInterface_payload; + end + 2'b01 : begin + _zz_150_ = CsrPlugin_jumpInterface_payload; + end + default : begin + _zz_150_ = IBusCachedPlugin_redoBranch_payload; + end + endcase + end + + always @(*) begin + case(_zz_124_) + 2'b00 : begin + _zz_151_ = DBusSimplePlugin_memoryExceptionPort_payload_code; + _zz_152_ = DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + end + 2'b01 : begin + _zz_151_ = BranchPlugin_branchExceptionPort_payload_code; + _zz_152_ = BranchPlugin_branchExceptionPort_payload_badAddr; + end + default : begin + _zz_151_ = CsrPlugin_selfException_payload_code; + _zz_152_ = CsrPlugin_selfException_payload_badAddr; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_1_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_1__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_1__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_1__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_1__string = "EBREAK"; + default : _zz_1__string = "??????"; + endcase + end + always @(*) begin + case(_zz_2_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_2__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_2__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_2__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_2__string = "EBREAK"; + default : _zz_2__string = "??????"; + endcase + end + always @(*) begin + case(_zz_3_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_3__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_3__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_3__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_3__string = "EBREAK"; + default : _zz_3__string = "??????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_4_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_4__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_4__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_4__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_4__string = "PC "; + default : _zz_4__string = "???"; + endcase + end + always @(*) begin + case(_zz_5_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_5__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_5__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_5__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_5__string = "PC "; + default : _zz_5__string = "???"; + endcase + end + always @(*) begin + case(_zz_6_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_6__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_6__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_6__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_6__string = "PC "; + default : _zz_6__string = "???"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_7_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_7__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_7__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_7__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_7__string = "URS1 "; + default : _zz_7__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_8_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_8__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_8__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_8__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_8__string = "URS1 "; + default : _zz_8__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_9_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_9__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_9__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_9__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_9__string = "URS1 "; + default : _zz_9__string = "????????????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_10_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_10__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_10__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_10__string = "BITWISE "; + default : _zz_10__string = "????????"; + endcase + end + always @(*) begin + case(_zz_11_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_11__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_11__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_11__string = "BITWISE "; + default : _zz_11__string = "????????"; + endcase + end + always @(*) begin + case(_zz_12_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_12__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_12__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_12__string = "BITWISE "; + default : _zz_12__string = "????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_13_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_13__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_13__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_13__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_13__string = "JALR"; + default : _zz_13__string = "????"; + endcase + end + always @(*) begin + case(_zz_14_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_14__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_14__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_14__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_14__string = "JALR"; + default : _zz_14__string = "????"; + endcase + end + always @(*) begin + case(_zz_15_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_15__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_15__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_15__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_15__string = "JALR"; + default : _zz_15__string = "????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_16_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_16__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_16__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_16__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_16__string = "SRA_1 "; + default : _zz_16__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_17__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_17__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_17__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_17__string = "SRA_1 "; + default : _zz_17__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_18_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_18__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_18__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_18__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_18__string = "SRA_1 "; + default : _zz_18__string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_19_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_19__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_19__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_19__string = "AND_1"; + default : _zz_19__string = "?????"; + endcase + end + always @(*) begin + case(_zz_20_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_20__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_20__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_20__string = "AND_1"; + default : _zz_20__string = "?????"; + endcase + end + always @(*) begin + case(_zz_21_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_21__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_21__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_21__string = "AND_1"; + default : _zz_21__string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_24_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_24__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_24__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_24__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_24__string = "EBREAK"; + default : _zz_24__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_26_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_26__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_26__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_26__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_26__string = "JALR"; + default : _zz_26__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_28_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_28__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_28__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_28__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_28__string = "SRA_1 "; + default : _zz_28__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_32_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_32__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_32__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_32__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_32__string = "PC "; + default : _zz_32__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_34_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_34__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_34__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_34__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_34__string = "URS1 "; + default : _zz_34__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_37_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_37__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_37__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_37__string = "BITWISE "; + default : _zz_37__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_39_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_39__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_39__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_39__string = "AND_1"; + default : _zz_39__string = "?????"; + endcase + end + always @(*) begin + case(_zz_45_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_45__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_45__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_45__string = "AND_1"; + default : _zz_45__string = "?????"; + endcase + end + always @(*) begin + case(_zz_50_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_50__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_50__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_50__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_50__string = "URS1 "; + default : _zz_50__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_51_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_51__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_51__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_51__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_51__string = "JALR"; + default : _zz_51__string = "????"; + endcase + end + always @(*) begin + case(_zz_52_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_52__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_52__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_52__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_52__string = "EBREAK"; + default : _zz_52__string = "??????"; + endcase + end + always @(*) begin + case(_zz_53_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_53__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_53__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_53__string = "BITWISE "; + default : _zz_53__string = "????????"; + endcase + end + always @(*) begin + case(_zz_55_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_55__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_55__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_55__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_55__string = "PC "; + default : _zz_55__string = "???"; + endcase + end + always @(*) begin + case(_zz_56_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_56__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_56__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_56__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_56__string = "SRA_1 "; + default : _zz_56__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_92_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_92__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_92__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_92__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_92__string = "SRA_1 "; + default : _zz_92__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_93_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_93__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_93__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_93__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_93__string = "PC "; + default : _zz_93__string = "???"; + endcase + end + always @(*) begin + case(_zz_94_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_94__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_94__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_94__string = "BITWISE "; + default : _zz_94__string = "????????"; + endcase + end + always @(*) begin + case(_zz_95_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_95__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_95__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_95__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_95__string = "EBREAK"; + default : _zz_95__string = "??????"; + endcase + end + always @(*) begin + case(_zz_96_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_96__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_96__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_96__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_96__string = "JALR"; + default : _zz_96__string = "????"; + endcase + end + always @(*) begin + case(_zz_97_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_97__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_97__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_97__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_97__string = "URS1 "; + default : _zz_97__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_98_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_98__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_98__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_98__string = "AND_1"; + default : _zz_98__string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + `endif + + assign decode_CSR_WRITE_OPCODE = _zz_23_; + assign decode_SRC_LESS_UNSIGNED = _zz_47_; + assign decode_ENV_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_67_; + assign decode_SRC2_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_IS_CSR = _zz_57_; + assign decode_MEMORY_ENABLE = _zz_49_; + assign decode_SRC1_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_CSR_READ_OPCODE = _zz_22_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_ALU_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign decode_SRC2_FORCE_ZERO = _zz_36_; + assign decode_MEMORY_STORE = _zz_48_; + assign decode_BRANCH_CTRL = _zz_13_; + assign _zz_14_ = _zz_15_; + assign decode_SHIFT_CTRL = _zz_16_; + assign _zz_17_ = _zz_18_; + assign decode_ALU_BITWISE_CTRL = _zz_19_; + assign _zz_20_ = _zz_21_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign execute_ENV_CTRL = _zz_24_; + assign execute_BRANCH_CALC = _zz_25_; + assign execute_BRANCH_DO = _zz_27_; + assign execute_PC = decode_to_execute_PC; + assign execute_RS1 = _zz_42_; + assign execute_BRANCH_CTRL = _zz_26_; + assign execute_SHIFT_CTRL = _zz_28_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign execute_SRC2_CTRL = _zz_32_; + assign execute_SRC1_CTRL = _zz_34_; + assign decode_SRC_USE_SUB_LESS = _zz_46_; + assign decode_SRC_ADD_ZERO = _zz_43_; + assign execute_SRC_ADD_SUB = _zz_31_; + assign execute_SRC_LESS = _zz_29_; + assign execute_ALU_CTRL = _zz_37_; + assign execute_SRC2 = _zz_33_; + assign execute_SRC1 = _zz_35_; + assign execute_ALU_BITWISE_CTRL = _zz_39_; + always @ (*) begin + _zz_40_ = 1'b0; + if(execute_RegFilePlugin_regFileWrite_valid)begin + _zz_40_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_44_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_58_; + assign decode_INSTRUCTION_READY = 1'b1; + always @ (*) begin + _zz_59_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! execute_DBusSimplePlugin_cmdSent)))begin + execute_arbitration_haltItself = 1'b1; + end + if((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_MEMORY_STORE)) && (! dBus_rsp_ready)))begin + execute_arbitration_haltItself = 1'b1; + end + if((execute_arbitration_isValid && execute_MEMORY_ENABLE))begin + _zz_59_ = execute_DBusSimplePlugin_rspFormated; + end + if(_zz_153_)begin + _zz_59_ = _zz_107_; + if(_zz_154_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_59_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_MEMORY_ADDRESS_LOW = _zz_61_; + assign execute_MEMORY_READ_DATA = _zz_60_; + assign execute_REGFILE_WRITE_DATA = _zz_38_; + assign execute_SRC_ADD = _zz_30_; + assign execute_RS2 = _zz_41_; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_62_; + assign decode_FLUSH_ALL = _zz_54_; + always @ (*) begin + IBusCachedPlugin_rsp_issueDetected = _zz_63_; + _zz_64_ = _zz_65_; + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'bxxxx); + if(((_zz_132_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuException) && (! _zz_65_)))begin + _zz_64_ = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b1100); + end + if(((_zz_132_ && IBusCachedPlugin_cache_io_cpu_fetch_error) && (! _zz_63_)))begin + IBusCachedPlugin_rsp_issueDetected = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b0001); + end + if(IBusCachedPlugin_fetcherHalt)begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + end + end + + always @ (*) begin + _zz_63_ = _zz_64_; + _zz_65_ = 1'b0; + IBusCachedPlugin_rsp_redoFetch = 1'b0; + _zz_147_ = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling)); + if(((_zz_132_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling) && (! 1'b0)))begin + _zz_65_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(((_zz_132_ && IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss) && (! _zz_64_)))begin + _zz_63_ = 1'b1; + _zz_147_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + _zz_147_ = 1'b0; + end + end + + always @ (*) begin + _zz_66_ = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_redoBranch_valid)begin + _zz_66_ = IBusCachedPlugin_redoBranch_payload; + end + end + + assign decode_PC = _zz_69_; + assign decode_INSTRUCTION = _zz_68_; + assign decode_arbitration_haltItself = 1'b0; + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)) != (1'b0)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_155_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_removeIt = 1'b0; + IBusCachedPlugin_fetcherHalt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_156_)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode} != (2'b00)))begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_157_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + decode_arbitration_flushAll = 1'b1; + end + if(_zz_158_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + decode_arbitration_flushAll = 1'b1; + case(_zz_159_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_haltByOther = 1'b0; + assign execute_arbitration_flushAll = 1'b0; + assign IBusCachedPlugin_fetcherflushIt = 1'b0; + always @ (*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid)begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,IBusCachedPlugin_redoBranch_valid}} != (3'b000)); + assign _zz_70_ = {IBusCachedPlugin_redoBranch_valid,{CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid}}; + assign _zz_71_ = (_zz_70_ & (~ _zz_165_)); + assign _zz_72_ = _zz_71_[1]; + assign _zz_73_ = _zz_71_[2]; + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_150_; + assign _zz_74_ = (! IBusCachedPlugin_fetcherHalt); + assign IBusCachedPlugin_fetchPc_output_valid = (IBusCachedPlugin_fetchPc_preOutput_valid && _zz_74_); + assign IBusCachedPlugin_fetchPc_preOutput_ready = (IBusCachedPlugin_fetchPc_output_ready && _zz_74_); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b0; + if((IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready))begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_167_); + IBusCachedPlugin_fetchPc_samplePcNext = 1'b0; + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + if(_zz_160_)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusCachedPlugin_fetchPc_preOutput_valid = _zz_75_; + assign IBusCachedPlugin_fetchPc_preOutput_payload = IBusCachedPlugin_fetchPc_pc; + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt)begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_76_ = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_76_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_76_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_fetch_haltIt)begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + if((IBusCachedPlugin_rsp_issueDetected || IBusCachedPlugin_rsp_iBusRspOutputHalt))begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + end + + assign _zz_77_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready && _zz_77_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && _zz_77_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_78_; + assign _zz_78_ = ((1'b0 && (! _zz_79_)) || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_79_ = _zz_80_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid = _zz_79_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload = IBusCachedPlugin_fetchPc_pcReg; + always @ (*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if((! IBusCachedPlugin_pcValids_0))begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_0; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = (IBusCachedPlugin_iBusRsp_decodeInput_valid && (! IBusCachedPlugin_injector_decodeRemoved)); + assign _zz_69_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_68_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_67_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @ (*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign _zz_131_ = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign _zz_134_ = (IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt); + assign _zz_135_ = (32'b00000000000000000000000000000000); + assign _zz_132_ = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign _zz_133_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_143_ = (CsrPlugin_privilege == (2'b00)); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload[31 : 2],(2'b00)}; + assign IBusCachedPlugin_redoBranch_valid = IBusCachedPlugin_rsp_redoFetch; + assign IBusCachedPlugin_redoBranch_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_decodeInput_valid = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready = IBusCachedPlugin_iBusRsp_decodeInput_ready; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_fetch_data; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_pc = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + assign _zz_139_ = 1'b1; + assign _zz_137_ = 1'b1; + assign _zz_138_ = 1'b1; + assign _zz_136_ = 1'b0; + assign _zz_140_ = 1'b0; + assign _zz_141_ = 1'b0; + assign _zz_142_ = 1'b0; + assign _zz_130_ = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_62_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! execute_DBusSimplePlugin_cmdSent)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_81_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_81_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_81_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_81_; + assign _zz_61_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_82_ = (4'b0001); + end + 2'b01 : begin + _zz_82_ = (4'b0011); + end + default : begin + _zz_82_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_82_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_60_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(execute_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_168_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (1'b0 || (! execute_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = execute_REGFILE_WRITE_DATA; + always @ (*) begin + execute_DBusSimplePlugin_rspShifted = execute_MEMORY_READ_DATA; + case(execute_MEMORY_ADDRESS_LOW) + 2'b01 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + execute_DBusSimplePlugin_rspShifted[15 : 0] = execute_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_83_ = (execute_DBusSimplePlugin_rspShifted[7] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_84_[31] = _zz_83_; + _zz_84_[30] = _zz_83_; + _zz_84_[29] = _zz_83_; + _zz_84_[28] = _zz_83_; + _zz_84_[27] = _zz_83_; + _zz_84_[26] = _zz_83_; + _zz_84_[25] = _zz_83_; + _zz_84_[24] = _zz_83_; + _zz_84_[23] = _zz_83_; + _zz_84_[22] = _zz_83_; + _zz_84_[21] = _zz_83_; + _zz_84_[20] = _zz_83_; + _zz_84_[19] = _zz_83_; + _zz_84_[18] = _zz_83_; + _zz_84_[17] = _zz_83_; + _zz_84_[16] = _zz_83_; + _zz_84_[15] = _zz_83_; + _zz_84_[14] = _zz_83_; + _zz_84_[13] = _zz_83_; + _zz_84_[12] = _zz_83_; + _zz_84_[11] = _zz_83_; + _zz_84_[10] = _zz_83_; + _zz_84_[9] = _zz_83_; + _zz_84_[8] = _zz_83_; + _zz_84_[7 : 0] = execute_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_85_ = (execute_DBusSimplePlugin_rspShifted[15] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_86_[31] = _zz_85_; + _zz_86_[30] = _zz_85_; + _zz_86_[29] = _zz_85_; + _zz_86_[28] = _zz_85_; + _zz_86_[27] = _zz_85_; + _zz_86_[26] = _zz_85_; + _zz_86_[25] = _zz_85_; + _zz_86_[24] = _zz_85_; + _zz_86_[23] = _zz_85_; + _zz_86_[22] = _zz_85_; + _zz_86_[21] = _zz_85_; + _zz_86_[20] = _zz_85_; + _zz_86_[19] = _zz_85_; + _zz_86_[18] = _zz_85_; + _zz_86_[17] = _zz_85_; + _zz_86_[16] = _zz_85_; + _zz_86_[15 : 0] = execute_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_163_) + 2'b00 : begin + execute_DBusSimplePlugin_rspFormated = _zz_84_; + end + 2'b01 : begin + execute_DBusSimplePlugin_rspFormated = _zz_86_; + end + default : begin + execute_DBusSimplePlugin_rspFormated = execute_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_88_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_89_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_90_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_91_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_87_ = {(_zz_91_ != (1'b0)),{({_zz_206_,_zz_207_} != (2'b00)),{({_zz_208_,_zz_209_} != (6'b000000)),{(_zz_210_ != _zz_211_),{_zz_212_,{_zz_213_,_zz_214_}}}}}}; + assign _zz_58_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_321_) == (32'b00000000000000000001000001110011)),{(_zz_322_ == _zz_323_),{_zz_324_,{_zz_325_,_zz_326_}}}}}}} != (20'b00000000000000000000)); + assign _zz_57_ = _zz_169_[0]; + assign _zz_92_ = _zz_87_[4 : 3]; + assign _zz_56_ = _zz_92_; + assign _zz_93_ = _zz_87_[6 : 5]; + assign _zz_55_ = _zz_93_; + assign _zz_54_ = _zz_170_[0]; + assign _zz_94_ = _zz_87_[9 : 8]; + assign _zz_53_ = _zz_94_; + assign _zz_95_ = _zz_87_[11 : 10]; + assign _zz_52_ = _zz_95_; + assign _zz_96_ = _zz_87_[13 : 12]; + assign _zz_51_ = _zz_96_; + assign _zz_97_ = _zz_87_[17 : 16]; + assign _zz_50_ = _zz_97_; + assign _zz_49_ = _zz_171_[0]; + assign _zz_48_ = _zz_172_[0]; + assign _zz_47_ = _zz_173_[0]; + assign _zz_46_ = _zz_174_[0]; + assign _zz_98_ = _zz_87_[23 : 22]; + assign _zz_45_ = _zz_98_; + assign _zz_44_ = _zz_175_[0]; + assign _zz_43_ = _zz_176_[0]; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_99_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_148_; + assign execute_RegFilePlugin_rs2Data = _zz_149_; + assign _zz_42_ = execute_RegFilePlugin_rs1Data; + assign _zz_41_ = execute_RegFilePlugin_rs2Data; + assign execute_RegFilePlugin_regFileWrite_valid = (execute_REGFILE_WRITE_VALID && execute_arbitration_isFiring); + assign execute_RegFilePlugin_regFileWrite_payload_address = execute_INSTRUCTION[11 : 7]; + assign execute_RegFilePlugin_regFileWrite_payload_data = _zz_59_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_100_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_100_ = {31'd0, _zz_177_}; + end + default : begin + _zz_100_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_38_ = _zz_100_; + assign _zz_36_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_101_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_101_ = {29'd0, _zz_178_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_101_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_101_ = {27'd0, _zz_179_}; + end + endcase + end + + assign _zz_35_ = _zz_101_; + assign _zz_102_ = _zz_180_[11]; + always @ (*) begin + _zz_103_[19] = _zz_102_; + _zz_103_[18] = _zz_102_; + _zz_103_[17] = _zz_102_; + _zz_103_[16] = _zz_102_; + _zz_103_[15] = _zz_102_; + _zz_103_[14] = _zz_102_; + _zz_103_[13] = _zz_102_; + _zz_103_[12] = _zz_102_; + _zz_103_[11] = _zz_102_; + _zz_103_[10] = _zz_102_; + _zz_103_[9] = _zz_102_; + _zz_103_[8] = _zz_102_; + _zz_103_[7] = _zz_102_; + _zz_103_[6] = _zz_102_; + _zz_103_[5] = _zz_102_; + _zz_103_[4] = _zz_102_; + _zz_103_[3] = _zz_102_; + _zz_103_[2] = _zz_102_; + _zz_103_[1] = _zz_102_; + _zz_103_[0] = _zz_102_; + end + + assign _zz_104_ = _zz_181_[11]; + always @ (*) begin + _zz_105_[19] = _zz_104_; + _zz_105_[18] = _zz_104_; + _zz_105_[17] = _zz_104_; + _zz_105_[16] = _zz_104_; + _zz_105_[15] = _zz_104_; + _zz_105_[14] = _zz_104_; + _zz_105_[13] = _zz_104_; + _zz_105_[12] = _zz_104_; + _zz_105_[11] = _zz_104_; + _zz_105_[10] = _zz_104_; + _zz_105_[9] = _zz_104_; + _zz_105_[8] = _zz_104_; + _zz_105_[7] = _zz_104_; + _zz_105_[6] = _zz_104_; + _zz_105_[5] = _zz_104_; + _zz_105_[4] = _zz_104_; + _zz_105_[3] = _zz_104_; + _zz_105_[2] = _zz_104_; + _zz_105_[1] = _zz_104_; + _zz_105_[0] = _zz_104_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_106_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_106_ = {_zz_103_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_106_ = {_zz_105_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_106_ = execute_PC; + end + endcase + end + + assign _zz_33_ = _zz_106_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_182_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_31_ = execute_SrcPlugin_addSub; + assign _zz_30_ = execute_SrcPlugin_addSub; + assign _zz_29_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_shiftReg : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_107_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_107_ = _zz_189_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_108_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_108_ == (3'b000))) begin + _zz_109_ = execute_BranchPlugin_eq; + end else if((_zz_108_ == (3'b001))) begin + _zz_109_ = (! execute_BranchPlugin_eq); + end else if((((_zz_108_ & (3'b101)) == (3'b101)))) begin + _zz_109_ = (! execute_SRC_LESS); + end else begin + _zz_109_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_110_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_110_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_110_ = 1'b1; + end + default : begin + _zz_110_ = _zz_109_; + end + endcase + end + + assign _zz_27_ = _zz_110_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_111_ = _zz_191_[19]; + always @ (*) begin + _zz_112_[10] = _zz_111_; + _zz_112_[9] = _zz_111_; + _zz_112_[8] = _zz_111_; + _zz_112_[7] = _zz_111_; + _zz_112_[6] = _zz_111_; + _zz_112_[5] = _zz_111_; + _zz_112_[4] = _zz_111_; + _zz_112_[3] = _zz_111_; + _zz_112_[2] = _zz_111_; + _zz_112_[1] = _zz_111_; + _zz_112_[0] = _zz_111_; + end + + assign _zz_113_ = _zz_192_[11]; + always @ (*) begin + _zz_114_[19] = _zz_113_; + _zz_114_[18] = _zz_113_; + _zz_114_[17] = _zz_113_; + _zz_114_[16] = _zz_113_; + _zz_114_[15] = _zz_113_; + _zz_114_[14] = _zz_113_; + _zz_114_[13] = _zz_113_; + _zz_114_[12] = _zz_113_; + _zz_114_[11] = _zz_113_; + _zz_114_[10] = _zz_113_; + _zz_114_[9] = _zz_113_; + _zz_114_[8] = _zz_113_; + _zz_114_[7] = _zz_113_; + _zz_114_[6] = _zz_113_; + _zz_114_[5] = _zz_113_; + _zz_114_[4] = _zz_113_; + _zz_114_[3] = _zz_113_; + _zz_114_[2] = _zz_113_; + _zz_114_[1] = _zz_113_; + _zz_114_[0] = _zz_113_; + end + + assign _zz_115_ = _zz_193_[11]; + always @ (*) begin + _zz_116_[18] = _zz_115_; + _zz_116_[17] = _zz_115_; + _zz_116_[16] = _zz_115_; + _zz_116_[15] = _zz_115_; + _zz_116_[14] = _zz_115_; + _zz_116_[13] = _zz_115_; + _zz_116_[12] = _zz_115_; + _zz_116_[11] = _zz_115_; + _zz_116_[10] = _zz_115_; + _zz_116_[9] = _zz_115_; + _zz_116_[8] = _zz_115_; + _zz_116_[7] = _zz_115_; + _zz_116_[6] = _zz_115_; + _zz_116_[5] = _zz_115_; + _zz_116_[4] = _zz_115_; + _zz_116_[3] = _zz_115_; + _zz_116_[2] = _zz_115_; + _zz_116_[1] = _zz_115_; + _zz_116_[0] = _zz_115_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_117_ = {{_zz_112_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_117_ = {_zz_114_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_117_ = {{_zz_116_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_117_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_25_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + BranchPlugin_branchExceptionPort_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && BranchPlugin_jumpInterface_payload[1]); + if(1'b0)begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = (4'b0000); + assign BranchPlugin_branchExceptionPort_payload_badAddr = BranchPlugin_jumpInterface_payload; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_118_ = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_119_ = _zz_194_[0]; + assign _zz_120_ = {CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}}; + assign _zz_121_ = (_zz_120_ & (~ _zz_196_)); + assign _zz_122_ = _zz_121_[1]; + assign _zz_123_ = _zz_121_[2]; + assign _zz_124_ = {_zz_123_,_zz_122_}; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_155_)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! (execute_arbitration_isValid != (1'b0))) && IBusCachedPlugin_pcValids_1); + if((CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute != (1'b0)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_23_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_22_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = 1'b0; + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_125_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_126_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_164_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_126_ = (_zz_125_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_126_ != (32'b00000000000000000000000000000000)); + assign _zz_21_ = decode_ALU_BITWISE_CTRL; + assign _zz_19_ = _zz_45_; + assign _zz_39_ = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_18_ = decode_SHIFT_CTRL; + assign _zz_16_ = _zz_56_; + assign _zz_28_ = decode_to_execute_SHIFT_CTRL; + assign _zz_15_ = decode_BRANCH_CTRL; + assign _zz_13_ = _zz_51_; + assign _zz_26_ = decode_to_execute_BRANCH_CTRL; + assign _zz_12_ = decode_ALU_CTRL; + assign _zz_10_ = _zz_53_; + assign _zz_37_ = decode_to_execute_ALU_CTRL; + assign _zz_9_ = decode_SRC1_CTRL; + assign _zz_7_ = _zz_50_; + assign _zz_34_ = decode_to_execute_SRC1_CTRL; + assign _zz_6_ = decode_SRC2_CTRL; + assign _zz_4_ = _zz_55_; + assign _zz_32_ = decode_to_execute_SRC2_CTRL; + assign _zz_3_ = decode_ENV_CTRL; + assign _zz_1_ = _zz_52_; + assign _zz_24_ = decode_to_execute_ENV_CTRL; + assign decode_arbitration_isFlushed = ({execute_arbitration_flushAll,decode_arbitration_flushAll} != (2'b00)); + assign execute_arbitration_isFlushed = (execute_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (1'b0 || execute_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || 1'b0); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign iBusWishbone_ADR = {_zz_203_,_zz_127_}; + assign iBusWishbone_CTI = ((_zz_127_ == (3'b111)) ? (3'b111) : (3'b010)); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + always @ (*) begin + iBusWishbone_CYC = 1'b0; + iBusWishbone_STB = 1'b0; + if(_zz_161_)begin + iBusWishbone_CYC = 1'b1; + iBusWishbone_STB = 1'b1; + end + end + + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_128_; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_129_ = (4'b0001); + end + 2'b01 : begin + _zz_129_ = (4'b0011); + end + default : begin + _zz_129_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_204_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_75_ <= 1'b0; + _zz_80_ <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + execute_DBusSimplePlugin_cmdSent <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_125_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + _zz_127_ <= (3'b000); + _zz_128_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(_zz_160_)begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_samplePcNext)begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + _zz_75_ <= 1'b1; + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + _zz_80_ <= 1'b0; + end + if(_zz_78_)begin + _zz_80_ <= IBusCachedPlugin_iBusRsp_stages_0_output_valid; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + end + if((dBus_cmd_valid && dBus_cmd_ready))begin + execute_DBusSimplePlugin_cmdSent <= 1'b1; + end + if((! execute_arbitration_isStuck))begin + execute_DBusSimplePlugin_cmdSent <= 1'b0; + end + if(_zz_153_)begin + if(_zz_154_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_157_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_158_)begin + case(_zz_159_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_125_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_197_[0]; + CsrPlugin_mstatus_MIE <= _zz_198_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_200_[0]; + CsrPlugin_mie_MTIE <= _zz_201_[0]; + CsrPlugin_mie_MSIE <= _zz_202_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(_zz_161_)begin + if(iBusWishbone_ACK)begin + _zz_127_ <= (_zz_127_ + (3'b001)); + end + end + _zz_128_ <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(_zz_162_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if((! execute_arbitration_isStuckByOthers))begin + execute_LightShifterPlugin_shiftReg <= _zz_59_; + end + if(_zz_153_)begin + if(_zz_154_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(execute_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(_zz_155_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_119_ ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_119_ ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_156_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= _zz_151_; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= _zz_152_; + end + if(_zz_157_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= execute_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_20_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_17_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_14_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_5_; + end + if(((! execute_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_execute)))begin + decode_to_execute_PC <= decode_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_66_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_2_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_199_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(_zz_162_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + +endmodule + diff --git a/hw/rtl/2-stage-1024-cache.yaml b/hw/rtl/2-stage-1024-cache.yaml new file mode 100644 index 0000000..6a862d2 --- /dev/null +++ b/hw/rtl/2-stage-1024-cache.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 1024} + kind: cached diff --git a/hw/rtl/2-stage-2048-cache-debug.v b/hw/rtl/2-stage-2048-cache-debug.v new file mode 100644 index 0000000..d10a773 --- /dev/null +++ b/hw/rtl/2-stage-2048-cache-debug.v @@ -0,0 +1,3578 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 26/04/2019, 01:10:02 +// Component : VexRiscv + + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input io_cpu_fetch_dataBypassValid, + input [31:0] io_cpu_fetch_dataBypass, + output io_cpu_fetch_mmuBus_cmd_isValid, + output [31:0] io_cpu_fetch_mmuBus_cmd_virtualAddress, + output io_cpu_fetch_mmuBus_cmd_bypassTranslation, + input [31:0] io_cpu_fetch_mmuBus_rsp_physicalAddress, + input io_cpu_fetch_mmuBus_rsp_isIoAccess, + input io_cpu_fetch_mmuBus_rsp_allowRead, + input io_cpu_fetch_mmuBus_rsp_allowWrite, + input io_cpu_fetch_mmuBus_rsp_allowExecute, + input io_cpu_fetch_mmuBus_rsp_exception, + input io_cpu_fetch_mmuBus_rsp_refilling, + output io_cpu_fetch_mmuBus_end, + input io_cpu_fetch_mmuBus_busy, + output [31:0] io_cpu_fetch_physicalAddress, + output io_cpu_fetch_cacheMiss, + output io_cpu_fetch_error, + output io_cpu_fetch_mmuRefilling, + output io_cpu_fetch_mmuException, + input io_cpu_fetch_isUser, + output io_cpu_fetch_haltIt, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset); + reg [22:0] _zz_10_; + reg [31:0] _zz_11_; + wire _zz_12_; + wire _zz_13_; + wire [0:0] _zz_14_; + wire [0:0] _zz_15_; + wire [22:0] _zz_16_; + reg _zz_1_; + reg _zz_2_; + reg lineLoader_fire; + reg lineLoader_valid; + reg [31:0] lineLoader_address; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + reg _zz_3_; + reg lineLoader_cmdSent; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + reg [2:0] lineLoader_wordIndex; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire _zz_4_; + wire [5:0] _zz_5_; + wire _zz_6_; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_7_; + wire [8:0] _zz_8_; + wire _zz_9_; + wire [31:0] fetchStage_read_waysValues_0_data; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + reg [22:0] ways_0_tags [0:63]; + reg [31:0] ways_0_datas [0:511]; + assign _zz_12_ = (! lineLoader_flushCounter[6]); + assign _zz_13_ = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign _zz_14_ = _zz_7_[0 : 0]; + assign _zz_15_ = _zz_7_[1 : 1]; + assign _zz_16_ = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @ (posedge clk) begin + if(_zz_2_) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_16_; + end + end + + always @ (posedge clk) begin + if(_zz_6_) begin + _zz_10_ <= ways_0_tags[_zz_5_]; + end + end + + always @ (posedge clk) begin + if(_zz_1_) begin + ways_0_datas[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_9_) begin + _zz_11_ <= ways_0_datas[_zz_8_]; + end + end + + always @ (*) begin + _zz_1_ = 1'b0; + if(lineLoader_write_data_0_valid)begin + _zz_1_ = 1'b1; + end + end + + always @ (*) begin + _zz_2_ = 1'b0; + if(lineLoader_write_tag_0_valid)begin + _zz_2_ = 1'b1; + end + end + + assign io_cpu_fetch_haltIt = io_cpu_fetch_mmuBus_busy; + always @ (*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid)begin + if((lineLoader_wordIndex == (3'b111)))begin + lineLoader_fire = 1'b1; + end + end + end + + always @ (*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(_zz_12_)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if((! _zz_3_))begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush)begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],(5'b00000)}; + assign io_mem_cmd_payload_size = (3'b101); + always @ (*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(lineLoader_fire)begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign _zz_4_ = 1'b1; + assign lineLoader_write_tag_0_valid = ((_zz_4_ && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && _zz_4_); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign _zz_5_ = io_cpu_prefetch_pc[10 : 5]; + assign _zz_6_ = (! io_cpu_fetch_isStuck); + assign _zz_7_ = _zz_10_; + assign fetchStage_read_waysValues_0_tag_valid = _zz_14_[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_15_[0]; + assign fetchStage_read_waysValues_0_tag_address = _zz_7_[22 : 2]; + assign _zz_8_ = io_cpu_prefetch_pc[10 : 2]; + assign _zz_9_ = (! io_cpu_fetch_isStuck); + assign fetchStage_read_waysValues_0_data = _zz_11_; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuBus_rsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != (1'b0)); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_waysValues_0_data; + assign fetchStage_hit_word = fetchStage_hit_data[31 : 0]; + assign io_cpu_fetch_data = (io_cpu_fetch_dataBypassValid ? io_cpu_fetch_dataBypass : fetchStage_hit_word); + assign io_cpu_fetch_mmuBus_cmd_isValid = io_cpu_fetch_isValid; + assign io_cpu_fetch_mmuBus_cmd_virtualAddress = io_cpu_fetch_pc; + assign io_cpu_fetch_mmuBus_cmd_bypassTranslation = 1'b0; + assign io_cpu_fetch_mmuBus_end = ((! io_cpu_fetch_isStuck) || io_cpu_fetch_isRemoved); + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuBus_rsp_physicalAddress; + assign io_cpu_fetch_cacheMiss = (! fetchStage_hit_valid); + assign io_cpu_fetch_error = fetchStage_hit_error; + assign io_cpu_fetch_mmuRefilling = io_cpu_fetch_mmuBus_rsp_refilling; + assign io_cpu_fetch_mmuException = ((! io_cpu_fetch_mmuBus_rsp_refilling) && (io_cpu_fetch_mmuBus_rsp_exception || (! io_cpu_fetch_mmuBus_rsp_allowExecute))); + always @ (posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= (3'b000); + end else begin + if(lineLoader_fire)begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire)begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid)begin + lineLoader_valid <= 1'b1; + end + if(io_flush)begin + lineLoader_flushPending <= 1'b1; + end + if(_zz_13_)begin + lineLoader_flushPending <= 1'b0; + end + if((io_mem_cmd_valid && io_mem_cmd_ready))begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire)begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid)begin + lineLoader_wordIndex <= (lineLoader_wordIndex + (3'b001)); + if(io_mem_rsp_payload_error)begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + if(io_cpu_fill_valid)begin + lineLoader_address <= io_cpu_fill_payload; + end + if(_zz_12_)begin + lineLoader_flushCounter <= (lineLoader_flushCounter + (7'b0000001)); + end + _zz_3_ <= lineLoader_flushCounter[6]; + if(_zz_13_)begin + lineLoader_flushCounter <= (7'b0000000); + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + wire _zz_136_; + wire _zz_137_; + wire _zz_138_; + wire _zz_139_; + wire _zz_140_; + wire [31:0] _zz_141_; + wire _zz_142_; + wire _zz_143_; + wire _zz_144_; + wire _zz_145_; + wire _zz_146_; + wire _zz_147_; + wire _zz_148_; + wire _zz_149_; + wire _zz_150_; + wire _zz_151_; + wire [31:0] _zz_152_; + reg _zz_153_; + reg [31:0] _zz_154_; + reg [31:0] _zz_155_; + reg [31:0] _zz_156_; + reg [3:0] _zz_157_; + reg [31:0] _zz_158_; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_error; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire _zz_159_; + wire _zz_160_; + wire _zz_161_; + wire _zz_162_; + wire _zz_163_; + wire _zz_164_; + wire [1:0] _zz_165_; + wire _zz_166_; + wire _zz_167_; + wire _zz_168_; + wire _zz_169_; + wire [5:0] _zz_170_; + wire _zz_171_; + wire _zz_172_; + wire [1:0] _zz_173_; + wire _zz_174_; + wire [2:0] _zz_175_; + wire [2:0] _zz_176_; + wire [31:0] _zz_177_; + wire [2:0] _zz_178_; + wire [0:0] _zz_179_; + wire [0:0] _zz_180_; + wire [0:0] _zz_181_; + wire [0:0] _zz_182_; + wire [0:0] _zz_183_; + wire [0:0] _zz_184_; + wire [0:0] _zz_185_; + wire [0:0] _zz_186_; + wire [0:0] _zz_187_; + wire [0:0] _zz_188_; + wire [2:0] _zz_189_; + wire [4:0] _zz_190_; + wire [11:0] _zz_191_; + wire [11:0] _zz_192_; + wire [31:0] _zz_193_; + wire [31:0] _zz_194_; + wire [31:0] _zz_195_; + wire [31:0] _zz_196_; + wire [31:0] _zz_197_; + wire [31:0] _zz_198_; + wire [31:0] _zz_199_; + wire [31:0] _zz_200_; + wire [32:0] _zz_201_; + wire [19:0] _zz_202_; + wire [11:0] _zz_203_; + wire [11:0] _zz_204_; + wire [1:0] _zz_205_; + wire [1:0] _zz_206_; + wire [2:0] _zz_207_; + wire [0:0] _zz_208_; + wire [0:0] _zz_209_; + wire [0:0] _zz_210_; + wire [0:0] _zz_211_; + wire [30:0] _zz_212_; + wire [30:0] _zz_213_; + wire [30:0] _zz_214_; + wire [30:0] _zz_215_; + wire [0:0] _zz_216_; + wire [0:0] _zz_217_; + wire [0:0] _zz_218_; + wire [0:0] _zz_219_; + wire [0:0] _zz_220_; + wire [0:0] _zz_221_; + wire [26:0] _zz_222_; + wire [6:0] _zz_223_; + wire [1:0] _zz_224_; + wire [31:0] _zz_225_; + wire [31:0] _zz_226_; + wire [31:0] _zz_227_; + wire [1:0] _zz_228_; + wire [1:0] _zz_229_; + wire _zz_230_; + wire [0:0] _zz_231_; + wire [20:0] _zz_232_; + wire [31:0] _zz_233_; + wire [31:0] _zz_234_; + wire [31:0] _zz_235_; + wire [31:0] _zz_236_; + wire _zz_237_; + wire _zz_238_; + wire [1:0] _zz_239_; + wire [1:0] _zz_240_; + wire _zz_241_; + wire [0:0] _zz_242_; + wire [16:0] _zz_243_; + wire [31:0] _zz_244_; + wire [31:0] _zz_245_; + wire [31:0] _zz_246_; + wire [31:0] _zz_247_; + wire _zz_248_; + wire _zz_249_; + wire [0:0] _zz_250_; + wire [0:0] _zz_251_; + wire _zz_252_; + wire [0:0] _zz_253_; + wire [13:0] _zz_254_; + wire [31:0] _zz_255_; + wire _zz_256_; + wire _zz_257_; + wire [0:0] _zz_258_; + wire [0:0] _zz_259_; + wire _zz_260_; + wire [0:0] _zz_261_; + wire [10:0] _zz_262_; + wire [31:0] _zz_263_; + wire _zz_264_; + wire [0:0] _zz_265_; + wire [0:0] _zz_266_; + wire [0:0] _zz_267_; + wire [4:0] _zz_268_; + wire [1:0] _zz_269_; + wire [1:0] _zz_270_; + wire _zz_271_; + wire [0:0] _zz_272_; + wire [6:0] _zz_273_; + wire [31:0] _zz_274_; + wire [31:0] _zz_275_; + wire [31:0] _zz_276_; + wire [31:0] _zz_277_; + wire _zz_278_; + wire [0:0] _zz_279_; + wire [1:0] _zz_280_; + wire [31:0] _zz_281_; + wire [31:0] _zz_282_; + wire _zz_283_; + wire _zz_284_; + wire [1:0] _zz_285_; + wire [1:0] _zz_286_; + wire _zz_287_; + wire [0:0] _zz_288_; + wire [3:0] _zz_289_; + wire [31:0] _zz_290_; + wire [31:0] _zz_291_; + wire [31:0] _zz_292_; + wire [31:0] _zz_293_; + wire [31:0] _zz_294_; + wire [31:0] _zz_295_; + wire [31:0] _zz_296_; + wire [31:0] _zz_297_; + wire _zz_298_; + wire _zz_299_; + wire _zz_300_; + wire [1:0] _zz_301_; + wire [1:0] _zz_302_; + wire _zz_303_; + wire [0:0] _zz_304_; + wire [0:0] _zz_305_; + wire [31:0] _zz_306_; + wire [31:0] _zz_307_; + wire [31:0] _zz_308_; + wire [31:0] _zz_309_; + wire _zz_310_; + wire _zz_311_; + wire _zz_312_; + wire [0:0] _zz_313_; + wire [2:0] _zz_314_; + wire [31:0] _zz_315_; + wire [31:0] _zz_316_; + wire [31:0] _zz_317_; + wire _zz_318_; + wire [0:0] _zz_319_; + wire [12:0] _zz_320_; + wire [31:0] _zz_321_; + wire [31:0] _zz_322_; + wire [31:0] _zz_323_; + wire _zz_324_; + wire [0:0] _zz_325_; + wire [6:0] _zz_326_; + wire [31:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire _zz_330_; + wire [0:0] _zz_331_; + wire [0:0] _zz_332_; + wire decode_SRC_LESS_UNSIGNED; + wire decode_DO_EBREAK; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_1_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_2_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_3_; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_4_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_5_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_6_; + wire decode_MEMORY_ENABLE; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_7_; + wire `AluCtrlEnum_defaultEncoding_type _zz_8_; + wire `AluCtrlEnum_defaultEncoding_type _zz_9_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_10_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_11_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_12_; + wire decode_IS_CSR; + wire execute_REGFILE_WRITE_VALID; + wire decode_SRC2_FORCE_ZERO; + wire decode_CSR_WRITE_OPCODE; + wire decode_CSR_READ_OPCODE; + wire decode_MEMORY_STORE; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_13_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_14_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_15_; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_16_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_17_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_18_; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_19_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_20_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_21_; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_22_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire _zz_23_; + wire _zz_24_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_25_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_26_; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_27_; + wire _zz_28_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_29_; + wire _zz_30_; + wire [31:0] _zz_31_; + wire [31:0] _zz_32_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_33_; + wire [31:0] _zz_34_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_35_; + wire [31:0] _zz_36_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_37_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_38_; + wire [31:0] _zz_39_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_40_; + reg _zz_41_; + wire [31:0] _zz_42_; + wire [31:0] _zz_43_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire _zz_44_; + wire _zz_45_; + wire _zz_46_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_47_; + wire _zz_48_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_49_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_50_; + wire _zz_51_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_52_; + wire _zz_53_; + wire _zz_54_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_55_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_56_; + wire `AluCtrlEnum_defaultEncoding_type _zz_57_; + wire _zz_58_; + wire _zz_59_; + wire _zz_60_; + reg [31:0] decode_INSTRUCTION; + reg [31:0] _zz_61_; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire [31:0] execute_MEMORY_READ_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] _zz_62_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_63_; + wire [31:0] execute_RS2; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_64_; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected; + reg _zz_65_; + reg _zz_66_; + reg _zz_67_; + reg [31:0] _zz_68_; + wire [31:0] decode_PC; + wire [31:0] _zz_69_; + wire [31:0] _zz_70_; + wire [31:0] _zz_71_; + wire [31:0] execute_PC; + wire [31:0] execute_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_fetcherflushIt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_redoBranch_valid; + wire [31:0] IBusCachedPlugin_redoBranch_payload; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg IBusCachedPlugin_injectionPort_valid; + reg IBusCachedPlugin_injectionPort_ready; + wire [31:0] IBusCachedPlugin_injectionPort_payload; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [2:0] _zz_72_; + wire [2:0] _zz_73_; + wire _zz_74_; + wire _zz_75_; + wire IBusCachedPlugin_fetchPc_preOutput_valid; + wire IBusCachedPlugin_fetchPc_preOutput_ready; + wire [31:0] IBusCachedPlugin_fetchPc_preOutput_payload; + wire _zz_76_; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_inc; + reg IBusCachedPlugin_fetchPc_propagatePc; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + reg IBusCachedPlugin_fetchPc_samplePcNext; + reg _zz_77_; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_0_inputSample; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + reg IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_inputSample; + wire _zz_78_; + wire _zz_79_; + wire _zz_80_; + wire _zz_81_; + reg _zz_82_; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_decodeInput_valid; + wire IBusCachedPlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + reg IBusCachedPlugin_injector_decodeRemoved; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + reg IBusCachedPlugin_rsp_redoFetch; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + reg _zz_83_; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_84_; + reg [3:0] _zz_85_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] execute_DBusSimplePlugin_rspShifted; + wire _zz_86_; + reg [31:0] _zz_87_; + wire _zz_88_; + reg [31:0] _zz_89_; + reg [31:0] execute_DBusSimplePlugin_rspFormated; + wire [27:0] _zz_90_; + wire _zz_91_; + wire _zz_92_; + wire _zz_93_; + wire _zz_94_; + wire _zz_95_; + wire `AluCtrlEnum_defaultEncoding_type _zz_96_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_97_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_98_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_99_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_100_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_101_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_102_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_103_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire lastStageRegFileWrite_valid /* verilator public */ ; + wire [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + wire [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_104_; + reg [31:0] _zz_105_; + wire _zz_106_; + reg [19:0] _zz_107_; + wire _zz_108_; + reg [19:0] _zz_109_; + reg [31:0] _zz_110_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + reg [31:0] execute_LightShifterPlugin_shiftReg; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_111_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_112_; + reg _zz_113_; + reg _zz_114_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_115_; + reg [10:0] _zz_116_; + wire _zz_117_; + reg [19:0] _zz_118_; + wire _zz_119_; + reg [18:0] _zz_120_; + reg [31:0] _zz_121_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_122_; + wire _zz_123_; + wire [2:0] _zz_124_; + wire [2:0] _zz_125_; + wire _zz_126_; + wire _zz_127_; + wire [1:0] _zz_128_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_129_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_130_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_131_; + reg DebugPlugin_resetIt_regNext; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg decode_to_execute_MEMORY_STORE; + reg decode_to_execute_CSR_READ_OPCODE; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg [31:0] decode_to_execute_INSTRUCTION; + reg decode_to_execute_IS_CSR; + reg [31:0] decode_to_execute_PC; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg decode_to_execute_MEMORY_ENABLE; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg decode_to_execute_DO_EBREAK; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg [2:0] _zz_132_; + reg [31:0] IBusCachedPlugin_injectionPort_payload_regNext; + reg [2:0] _zz_133_; + reg _zz_134_; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_135_; + `ifndef SYNTHESIS + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_1__string; + reg [95:0] _zz_2__string; + reg [95:0] _zz_3__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_4__string; + reg [47:0] _zz_5__string; + reg [47:0] _zz_6__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_7__string; + reg [63:0] _zz_8__string; + reg [63:0] _zz_9__string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_10__string; + reg [39:0] _zz_11__string; + reg [39:0] _zz_12__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_13__string; + reg [31:0] _zz_14__string; + reg [31:0] _zz_15__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_16__string; + reg [71:0] _zz_17__string; + reg [71:0] _zz_18__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_19__string; + reg [23:0] _zz_20__string; + reg [23:0] _zz_21__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_25__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_27__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_29__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_33__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_35__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_38__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_40__string; + reg [23:0] _zz_47__string; + reg [31:0] _zz_49__string; + reg [47:0] _zz_50__string; + reg [39:0] _zz_52__string; + reg [95:0] _zz_55__string; + reg [71:0] _zz_56__string; + reg [63:0] _zz_57__string; + reg [63:0] _zz_96__string; + reg [71:0] _zz_97__string; + reg [95:0] _zz_98__string; + reg [39:0] _zz_99__string; + reg [47:0] _zz_100__string; + reg [31:0] _zz_101__string; + reg [23:0] _zz_102__string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_159_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_160_ = (! execute_arbitration_isStuckByOthers); + assign _zz_161_ = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != (2'b00)); + assign _zz_162_ = ({CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}} != (3'b000)); + assign _zz_163_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_164_ = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_165_ = execute_INSTRUCTION[29 : 28]; + assign _zz_166_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_167_ = (1'b0 == 1'b0); + assign _zz_168_ = (DebugPlugin_stepIt && IBusCachedPlugin_incomingInstruction); + assign _zz_169_ = (IBusCachedPlugin_fetchPc_preOutput_valid && IBusCachedPlugin_fetchPc_preOutput_ready); + assign _zz_170_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_171_ = (iBus_cmd_valid || (_zz_133_ != (3'b000))); + assign _zz_172_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_173_ = execute_INSTRUCTION[13 : 12]; + assign _zz_174_ = execute_INSTRUCTION[13]; + assign _zz_175_ = (_zz_72_ - (3'b001)); + assign _zz_176_ = {IBusCachedPlugin_fetchPc_inc,(2'b00)}; + assign _zz_177_ = {29'd0, _zz_176_}; + assign _zz_178_ = (execute_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_179_ = _zz_90_[1 : 1]; + assign _zz_180_ = _zz_90_[3 : 3]; + assign _zz_181_ = _zz_90_[10 : 10]; + assign _zz_182_ = _zz_90_[11 : 11]; + assign _zz_183_ = _zz_90_[14 : 14]; + assign _zz_184_ = _zz_90_[19 : 19]; + assign _zz_185_ = _zz_90_[23 : 23]; + assign _zz_186_ = _zz_90_[25 : 25]; + assign _zz_187_ = _zz_90_[27 : 27]; + assign _zz_188_ = execute_SRC_LESS; + assign _zz_189_ = (3'b100); + assign _zz_190_ = execute_INSTRUCTION[19 : 15]; + assign _zz_191_ = execute_INSTRUCTION[31 : 20]; + assign _zz_192_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_193_ = ($signed(_zz_194_) + $signed(_zz_197_)); + assign _zz_194_ = ($signed(_zz_195_) + $signed(_zz_196_)); + assign _zz_195_ = execute_SRC1; + assign _zz_196_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_197_ = (execute_SRC_USE_SUB_LESS ? _zz_198_ : _zz_199_); + assign _zz_198_ = (32'b00000000000000000000000000000001); + assign _zz_199_ = (32'b00000000000000000000000000000000); + assign _zz_200_ = (_zz_201_ >>> 1); + assign _zz_201_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_202_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_203_ = execute_INSTRUCTION[31 : 20]; + assign _zz_204_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_205_ = (_zz_122_ & (~ _zz_206_)); + assign _zz_206_ = (_zz_122_ - (2'b01)); + assign _zz_207_ = (_zz_124_ - (3'b001)); + assign _zz_208_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_209_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_210_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_211_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_212_ = (decode_PC >>> 1); + assign _zz_213_ = (decode_PC >>> 1); + assign _zz_214_ = (decode_PC >>> 1); + assign _zz_215_ = (decode_PC >>> 1); + assign _zz_216_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_217_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_218_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_219_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_220_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_221_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_222_ = (iBus_cmd_payload_address >>> 5); + assign _zz_223_ = ({3'd0,_zz_135_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_224_ = {_zz_75_,_zz_74_}; + assign _zz_225_ = (32'b00000000000000000000000000010000); + assign _zz_226_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_227_ = (32'b00000000000000000000000000000000); + assign _zz_228_ = {((decode_INSTRUCTION & _zz_233_) == (32'b00000000000000000001000001010000)),((decode_INSTRUCTION & _zz_234_) == (32'b00000000000000000010000001010000))}; + assign _zz_229_ = (2'b00); + assign _zz_230_ = ({_zz_95_,(_zz_235_ == _zz_236_)} != (2'b00)); + assign _zz_231_ = ({_zz_95_,_zz_237_} != (2'b00)); + assign _zz_232_ = {(_zz_238_ != (1'b0)),{(_zz_239_ != _zz_240_),{_zz_241_,{_zz_242_,_zz_243_}}}}; + assign _zz_233_ = (32'b00000000000000000001000001010000); + assign _zz_234_ = (32'b00000000000000000010000001010000); + assign _zz_235_ = (decode_INSTRUCTION & (32'b00000000000000000000000001110000)); + assign _zz_236_ = (32'b00000000000000000000000000100000); + assign _zz_237_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000000000)); + assign _zz_238_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000000)) == (32'b00000000000000000000000000000000)); + assign _zz_239_ = {(_zz_244_ == _zz_245_),(_zz_246_ == _zz_247_)}; + assign _zz_240_ = (2'b00); + assign _zz_241_ = ({_zz_93_,_zz_248_} != (2'b00)); + assign _zz_242_ = (_zz_249_ != (1'b0)); + assign _zz_243_ = {(_zz_250_ != _zz_251_),{_zz_252_,{_zz_253_,_zz_254_}}}; + assign _zz_244_ = (decode_INSTRUCTION & (32'b00000000000000000000000001100100)); + assign _zz_245_ = (32'b00000000000000000000000000100100); + assign _zz_246_ = (decode_INSTRUCTION & (32'b00000000000000000011000001010100)); + assign _zz_247_ = (32'b00000000000000000001000000010000); + assign _zz_248_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000011100)) == (32'b00000000000000000000000000000100)); + assign _zz_249_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001011000)) == (32'b00000000000000000000000001000000)); + assign _zz_250_ = ((decode_INSTRUCTION & _zz_255_) == (32'b00000000000000000000000001010000)); + assign _zz_251_ = (1'b0); + assign _zz_252_ = ({_zz_94_,_zz_256_} != (2'b00)); + assign _zz_253_ = (_zz_257_ != (1'b0)); + assign _zz_254_ = {(_zz_258_ != _zz_259_),{_zz_260_,{_zz_261_,_zz_262_}}}; + assign _zz_255_ = (32'b00010000000000000011000001010000); + assign _zz_256_ = ((decode_INSTRUCTION & (32'b00010000010000000011000001010000)) == (32'b00010000000000000000000001010000)); + assign _zz_257_ = ((decode_INSTRUCTION & (32'b00000000000000000001000001001000)) == (32'b00000000000000000001000000001000)); + assign _zz_258_ = ((decode_INSTRUCTION & (32'b00000000000000000001000000000000)) == (32'b00000000000000000001000000000000)); + assign _zz_259_ = (1'b0); + assign _zz_260_ = (((decode_INSTRUCTION & _zz_263_) == (32'b00000000000000000010000000000000)) != (1'b0)); + assign _zz_261_ = ({_zz_264_,{_zz_265_,_zz_266_}} != (3'b000)); + assign _zz_262_ = {({_zz_267_,_zz_268_} != (6'b000000)),{(_zz_269_ != _zz_270_),{_zz_271_,{_zz_272_,_zz_273_}}}}; + assign _zz_263_ = (32'b00000000000000000011000000000000); + assign _zz_264_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000001000000)); + assign _zz_265_ = ((decode_INSTRUCTION & _zz_274_) == (32'b00000000000000000010000000010000)); + assign _zz_266_ = ((decode_INSTRUCTION & _zz_275_) == (32'b01000000000000000000000000110000)); + assign _zz_267_ = _zz_93_; + assign _zz_268_ = {(_zz_276_ == _zz_277_),{_zz_278_,{_zz_279_,_zz_280_}}}; + assign _zz_269_ = {(_zz_281_ == _zz_282_),_zz_91_}; + assign _zz_270_ = (2'b00); + assign _zz_271_ = ({_zz_283_,_zz_91_} != (2'b00)); + assign _zz_272_ = (_zz_284_ != (1'b0)); + assign _zz_273_ = {(_zz_285_ != _zz_286_),{_zz_287_,{_zz_288_,_zz_289_}}}; + assign _zz_274_ = (32'b00000000000000000010000000010100); + assign _zz_275_ = (32'b01000000000000000100000000110100); + assign _zz_276_ = (decode_INSTRUCTION & (32'b00000000000000000001000000010000)); + assign _zz_277_ = (32'b00000000000000000001000000010000); + assign _zz_278_ = ((decode_INSTRUCTION & (32'b00000000000000000010000000010000)) == (32'b00000000000000000010000000010000)); + assign _zz_279_ = _zz_92_; + assign _zz_280_ = {(_zz_290_ == _zz_291_),(_zz_292_ == _zz_293_)}; + assign _zz_281_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010100)); + assign _zz_282_ = (32'b00000000000000000000000000000100); + assign _zz_283_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000100)); + assign _zz_284_ = ((decode_INSTRUCTION & (32'b00000000000000000111000001010100)) == (32'b00000000000000000101000000010000)); + assign _zz_285_ = {(_zz_294_ == _zz_295_),(_zz_296_ == _zz_297_)}; + assign _zz_286_ = (2'b00); + assign _zz_287_ = ({_zz_298_,_zz_299_} != (2'b00)); + assign _zz_288_ = (_zz_300_ != (1'b0)); + assign _zz_289_ = {(_zz_301_ != _zz_302_),{_zz_303_,{_zz_304_,_zz_305_}}}; + assign _zz_290_ = (decode_INSTRUCTION & (32'b00000000000000000000000000001100)); + assign _zz_291_ = (32'b00000000000000000000000000000100); + assign _zz_292_ = (decode_INSTRUCTION & (32'b00000000000000000000000000101000)); + assign _zz_293_ = (32'b00000000000000000000000000000000); + assign _zz_294_ = (decode_INSTRUCTION & (32'b01000000000000000011000001010100)); + assign _zz_295_ = (32'b01000000000000000001000000010000); + assign _zz_296_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_297_ = (32'b00000000000000000001000000010000); + assign _zz_298_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000110000000010000)); + assign _zz_299_ = ((decode_INSTRUCTION & (32'b00000000000000000101000000010100)) == (32'b00000000000000000100000000010000)); + assign _zz_300_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000010000000010000)); + assign _zz_301_ = {(_zz_306_ == _zz_307_),(_zz_308_ == _zz_309_)}; + assign _zz_302_ = (2'b00); + assign _zz_303_ = ({_zz_310_,_zz_311_} != (2'b00)); + assign _zz_304_ = (_zz_312_ != (1'b0)); + assign _zz_305_ = ({_zz_313_,_zz_314_} != (4'b0000)); + assign _zz_306_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010000)); + assign _zz_307_ = (32'b00000000000000000010000000000000); + assign _zz_308_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000000)); + assign _zz_309_ = (32'b00000000000000000001000000000000); + assign _zz_310_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000110100)) == (32'b00000000000000000000000000100000)); + assign _zz_311_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100000)); + assign _zz_312_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000100000)); + assign _zz_313_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000000)); + assign _zz_314_ = {((decode_INSTRUCTION & (32'b00000000000000000000000000011000)) == (32'b00000000000000000000000000000000)),{((decode_INSTRUCTION & (32'b00000000000000000110000000000100)) == (32'b00000000000000000010000000000000)),((decode_INSTRUCTION & (32'b00000000000000000101000000000100)) == (32'b00000000000000000001000000000000))}}; + assign _zz_315_ = (32'b00000000000000000001000001111111); + assign _zz_316_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_317_ = (32'b00000000000000000010000001110011); + assign _zz_318_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_319_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_320_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_321_) == (32'b00000000000000000000000000000011)),{(_zz_322_ == _zz_323_),{_zz_324_,{_zz_325_,_zz_326_}}}}}}; + assign _zz_321_ = (32'b00000000000000000101000001011111); + assign _zz_322_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_323_ = (32'b00000000000000000000000001100011); + assign _zz_324_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_325_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_326_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_327_) == (32'b00000000000000000101000000110011)),{(_zz_328_ == _zz_329_),{_zz_330_,{_zz_331_,_zz_332_}}}}}}; + assign _zz_327_ = (32'b10111110000000000111000001111111); + assign _zz_328_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_329_ = (32'b00000000000000000000000000110011); + assign _zz_330_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_331_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_332_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("2-stage-2048-cache-debug.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_41_) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_103_) begin + _zz_154_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_103_) begin + _zz_155_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush(_zz_136_), + .io_cpu_prefetch_isValid(_zz_137_), + .io_cpu_prefetch_haltIt(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt), + .io_cpu_prefetch_pc(IBusCachedPlugin_iBusRsp_stages_0_input_payload), + .io_cpu_fetch_isValid(_zz_138_), + .io_cpu_fetch_isStuck(_zz_139_), + .io_cpu_fetch_isRemoved(_zz_140_), + .io_cpu_fetch_pc(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload), + .io_cpu_fetch_data(IBusCachedPlugin_cache_io_cpu_fetch_data), + .io_cpu_fetch_dataBypassValid(IBusCachedPlugin_s1_tightlyCoupledHit), + .io_cpu_fetch_dataBypass(_zz_141_), + .io_cpu_fetch_mmuBus_cmd_isValid(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid), + .io_cpu_fetch_mmuBus_cmd_virtualAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_cmd_bypassTranslation(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation), + .io_cpu_fetch_mmuBus_rsp_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_rsp_isIoAccess(_zz_142_), + .io_cpu_fetch_mmuBus_rsp_allowRead(_zz_143_), + .io_cpu_fetch_mmuBus_rsp_allowWrite(_zz_144_), + .io_cpu_fetch_mmuBus_rsp_allowExecute(_zz_145_), + .io_cpu_fetch_mmuBus_rsp_exception(_zz_146_), + .io_cpu_fetch_mmuBus_rsp_refilling(_zz_147_), + .io_cpu_fetch_mmuBus_end(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end), + .io_cpu_fetch_mmuBus_busy(_zz_148_), + .io_cpu_fetch_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_cpu_fetch_cacheMiss(IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss), + .io_cpu_fetch_error(IBusCachedPlugin_cache_io_cpu_fetch_error), + .io_cpu_fetch_mmuRefilling(IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling), + .io_cpu_fetch_mmuException(IBusCachedPlugin_cache_io_cpu_fetch_mmuException), + .io_cpu_fetch_isUser(_zz_149_), + .io_cpu_fetch_haltIt(IBusCachedPlugin_cache_io_cpu_fetch_haltIt), + .io_cpu_decode_isValid(_zz_150_), + .io_cpu_decode_isStuck(_zz_151_), + .io_cpu_decode_pc(_zz_152_), + .io_cpu_decode_physicalAddress(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_cpu_decode_data(IBusCachedPlugin_cache_io_cpu_decode_data), + .io_cpu_fill_valid(_zz_153_), + .io_cpu_fill_payload(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_mem_cmd_valid(IBusCachedPlugin_cache_io_mem_cmd_valid), + .io_mem_cmd_ready(iBus_cmd_ready), + .io_mem_cmd_payload_address(IBusCachedPlugin_cache_io_mem_cmd_payload_address), + .io_mem_cmd_payload_size(IBusCachedPlugin_cache_io_mem_cmd_payload_size), + .io_mem_rsp_valid(iBus_rsp_valid), + .io_mem_rsp_payload_data(iBus_rsp_payload_data), + .io_mem_rsp_payload_error(iBus_rsp_payload_error), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_224_) + 2'b00 : begin + _zz_156_ = BranchPlugin_jumpInterface_payload; + end + 2'b01 : begin + _zz_156_ = CsrPlugin_jumpInterface_payload; + end + default : begin + _zz_156_ = IBusCachedPlugin_redoBranch_payload; + end + endcase + end + + always @(*) begin + case(_zz_128_) + 2'b00 : begin + _zz_157_ = DBusSimplePlugin_memoryExceptionPort_payload_code; + _zz_158_ = DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + end + 2'b01 : begin + _zz_157_ = BranchPlugin_branchExceptionPort_payload_code; + _zz_158_ = BranchPlugin_branchExceptionPort_payload_badAddr; + end + default : begin + _zz_157_ = CsrPlugin_selfException_payload_code; + _zz_158_ = CsrPlugin_selfException_payload_badAddr; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_1_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_1__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_1__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_1__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_1__string = "URS1 "; + default : _zz_1__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_2_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_2__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_2__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_2__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_2__string = "URS1 "; + default : _zz_2__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_3_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_3__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_3__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_3__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_3__string = "URS1 "; + default : _zz_3__string = "????????????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_4_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_4__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_4__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_4__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_4__string = "EBREAK"; + default : _zz_4__string = "??????"; + endcase + end + always @(*) begin + case(_zz_5_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_5__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_5__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_5__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_5__string = "EBREAK"; + default : _zz_5__string = "??????"; + endcase + end + always @(*) begin + case(_zz_6_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_6__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_6__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_6__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_6__string = "EBREAK"; + default : _zz_6__string = "??????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_7_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_7__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_7__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_7__string = "BITWISE "; + default : _zz_7__string = "????????"; + endcase + end + always @(*) begin + case(_zz_8_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_8__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_8__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_8__string = "BITWISE "; + default : _zz_8__string = "????????"; + endcase + end + always @(*) begin + case(_zz_9_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_9__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_9__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_9__string = "BITWISE "; + default : _zz_9__string = "????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_10_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_10__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_10__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_10__string = "AND_1"; + default : _zz_10__string = "?????"; + endcase + end + always @(*) begin + case(_zz_11_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_11__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_11__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_11__string = "AND_1"; + default : _zz_11__string = "?????"; + endcase + end + always @(*) begin + case(_zz_12_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_12__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_12__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_12__string = "AND_1"; + default : _zz_12__string = "?????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_13_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_13__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_13__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_13__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_13__string = "JALR"; + default : _zz_13__string = "????"; + endcase + end + always @(*) begin + case(_zz_14_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_14__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_14__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_14__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_14__string = "JALR"; + default : _zz_14__string = "????"; + endcase + end + always @(*) begin + case(_zz_15_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_15__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_15__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_15__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_15__string = "JALR"; + default : _zz_15__string = "????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_16_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_16__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_16__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_16__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_16__string = "SRA_1 "; + default : _zz_16__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_17__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_17__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_17__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_17__string = "SRA_1 "; + default : _zz_17__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_18_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_18__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_18__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_18__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_18__string = "SRA_1 "; + default : _zz_18__string = "?????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_19_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_19__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_19__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_19__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_19__string = "PC "; + default : _zz_19__string = "???"; + endcase + end + always @(*) begin + case(_zz_20_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_20__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_20__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_20__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_20__string = "PC "; + default : _zz_20__string = "???"; + endcase + end + always @(*) begin + case(_zz_21_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_21__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_21__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_21__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_21__string = "PC "; + default : _zz_21__string = "???"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_25_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_25__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_25__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_25__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_25__string = "EBREAK"; + default : _zz_25__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_27_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_27__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_27__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_27__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_27__string = "JALR"; + default : _zz_27__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_29_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_29__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_29__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_29__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_29__string = "SRA_1 "; + default : _zz_29__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_33_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_33__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_33__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_33__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_33__string = "PC "; + default : _zz_33__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_35_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_35__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_35__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_35__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_35__string = "URS1 "; + default : _zz_35__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_38_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_38__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_38__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_38__string = "BITWISE "; + default : _zz_38__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_40_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_40__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_40__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_40__string = "AND_1"; + default : _zz_40__string = "?????"; + endcase + end + always @(*) begin + case(_zz_47_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_47__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_47__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_47__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_47__string = "PC "; + default : _zz_47__string = "???"; + endcase + end + always @(*) begin + case(_zz_49_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_49__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_49__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_49__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_49__string = "JALR"; + default : _zz_49__string = "????"; + endcase + end + always @(*) begin + case(_zz_50_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_50__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_50__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_50__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_50__string = "EBREAK"; + default : _zz_50__string = "??????"; + endcase + end + always @(*) begin + case(_zz_52_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_52__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_52__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_52__string = "AND_1"; + default : _zz_52__string = "?????"; + endcase + end + always @(*) begin + case(_zz_55_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_55__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_55__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_55__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_55__string = "URS1 "; + default : _zz_55__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_56_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_56__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_56__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_56__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_56__string = "SRA_1 "; + default : _zz_56__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_57_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_57__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_57__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_57__string = "BITWISE "; + default : _zz_57__string = "????????"; + endcase + end + always @(*) begin + case(_zz_96_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_96__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_96__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_96__string = "BITWISE "; + default : _zz_96__string = "????????"; + endcase + end + always @(*) begin + case(_zz_97_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_97__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_97__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_97__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_97__string = "SRA_1 "; + default : _zz_97__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_98_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_98__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_98__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_98__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_98__string = "URS1 "; + default : _zz_98__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_99_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_99__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_99__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_99__string = "AND_1"; + default : _zz_99__string = "?????"; + endcase + end + always @(*) begin + case(_zz_100_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_100__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_100__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_100__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_100__string = "EBREAK"; + default : _zz_100__string = "??????"; + endcase + end + always @(*) begin + case(_zz_101_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_101__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_101__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_101__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_101__string = "JALR"; + default : _zz_101__string = "????"; + endcase + end + always @(*) begin + case(_zz_102_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_102__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_102__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_102__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_102__string = "PC "; + default : _zz_102__string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + `endif + + assign decode_SRC_LESS_UNSIGNED = _zz_58_; + assign decode_DO_EBREAK = _zz_22_; + assign decode_SRC1_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_ENV_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_MEMORY_ENABLE = _zz_45_; + assign decode_ALU_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_ALU_BITWISE_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign decode_IS_CSR = _zz_46_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_SRC2_FORCE_ZERO = _zz_37_; + assign decode_CSR_WRITE_OPCODE = _zz_24_; + assign decode_CSR_READ_OPCODE = _zz_23_; + assign decode_MEMORY_STORE = _zz_59_; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_69_; + assign decode_BRANCH_CTRL = _zz_13_; + assign _zz_14_ = _zz_15_; + assign decode_SHIFT_CTRL = _zz_16_; + assign _zz_17_ = _zz_18_; + assign decode_SRC2_CTRL = _zz_19_; + assign _zz_20_ = _zz_21_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_44_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign execute_ENV_CTRL = _zz_25_; + assign execute_BRANCH_CALC = _zz_26_; + assign execute_BRANCH_DO = _zz_28_; + assign execute_RS1 = _zz_43_; + assign execute_BRANCH_CTRL = _zz_27_; + assign execute_SHIFT_CTRL = _zz_29_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign execute_SRC2_CTRL = _zz_33_; + assign execute_SRC1_CTRL = _zz_35_; + assign decode_SRC_USE_SUB_LESS = _zz_53_; + assign decode_SRC_ADD_ZERO = _zz_48_; + assign execute_SRC_ADD_SUB = _zz_32_; + assign execute_SRC_LESS = _zz_30_; + assign execute_ALU_CTRL = _zz_38_; + assign execute_SRC2 = _zz_34_; + assign execute_SRC1 = _zz_36_; + assign execute_ALU_BITWISE_CTRL = _zz_40_; + always @ (*) begin + _zz_41_ = 1'b0; + if(lastStageRegFileWrite_valid)begin + _zz_41_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_54_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_60_; + assign decode_INSTRUCTION_READY = 1'b1; + always @ (*) begin + decode_INSTRUCTION = _zz_70_; + if((_zz_132_ != (3'b000)))begin + decode_INSTRUCTION = IBusCachedPlugin_injectionPort_payload_regNext; + end + end + + always @ (*) begin + _zz_61_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_83_)))begin + execute_arbitration_haltItself = 1'b1; + end + if((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_MEMORY_STORE)) && ((! dBus_rsp_ready) || (! _zz_83_))))begin + execute_arbitration_haltItself = 1'b1; + end + if((execute_arbitration_isValid && execute_MEMORY_ENABLE))begin + _zz_61_ = execute_DBusSimplePlugin_rspFormated; + end + if(_zz_159_)begin + _zz_61_ = _zz_111_; + if(_zz_160_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_61_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_MEMORY_ADDRESS_LOW = _zz_63_; + assign execute_MEMORY_READ_DATA = _zz_62_; + assign execute_REGFILE_WRITE_DATA = _zz_39_; + assign execute_SRC_ADD = _zz_31_; + assign execute_RS2 = _zz_42_; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_64_; + assign decode_FLUSH_ALL = _zz_51_; + always @ (*) begin + IBusCachedPlugin_rsp_issueDetected = _zz_65_; + _zz_66_ = _zz_67_; + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'bxxxx); + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuException) && (! _zz_67_)))begin + _zz_66_ = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b1100); + end + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_error) && (! _zz_65_)))begin + IBusCachedPlugin_rsp_issueDetected = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b0001); + end + if(IBusCachedPlugin_fetcherHalt)begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + end + end + + always @ (*) begin + _zz_65_ = _zz_66_; + _zz_67_ = 1'b0; + IBusCachedPlugin_rsp_redoFetch = 1'b0; + _zz_153_ = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling)); + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling) && (! 1'b0)))begin + _zz_67_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(((_zz_138_ && IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss) && (! _zz_66_)))begin + _zz_65_ = 1'b1; + _zz_153_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + _zz_153_ = 1'b0; + end + end + + always @ (*) begin + _zz_68_ = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_redoBranch_valid)begin + _zz_68_ = IBusCachedPlugin_redoBranch_payload; + end + end + + assign decode_PC = _zz_71_; + assign execute_PC = decode_to_execute_PC; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusCachedPlugin_iBusRsp_decodeInput_valid && (! IBusCachedPlugin_injector_decodeRemoved)); + IBusCachedPlugin_injectionPort_ready = 1'b0; + case(_zz_132_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + IBusCachedPlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)) != (1'b0)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_161_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_haltByOther = 1'b0; + execute_arbitration_removeIt = 1'b0; + IBusCachedPlugin_fetcherHalt = 1'b0; + IBusCachedPlugin_fetcherflushIt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_162_)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode} != (2'b00)))begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_163_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + decode_arbitration_flushAll = 1'b1; + end + if(_zz_164_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + decode_arbitration_flushAll = 1'b1; + case(_zz_165_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(_zz_166_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_167_)begin + IBusCachedPlugin_fetcherflushIt = 1'b1; + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_168_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(_zz_166_)begin + if(_zz_167_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + assign lastStageInstruction = execute_INSTRUCTION; + assign lastStagePc = execute_PC; + assign lastStageIsValid = execute_arbitration_isValid; + assign lastStageIsFiring = execute_arbitration_isFiring; + always @ (*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid)begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_forceMachineWire = 1'b0; + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode)begin + CsrPlugin_allowException = 1'b0; + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_allowInterrupts = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,IBusCachedPlugin_redoBranch_valid}} != (3'b000)); + assign _zz_72_ = {IBusCachedPlugin_redoBranch_valid,{CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid}}; + assign _zz_73_ = (_zz_72_ & (~ _zz_175_)); + assign _zz_74_ = _zz_73_[1]; + assign _zz_75_ = _zz_73_[2]; + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_156_; + assign _zz_76_ = (! IBusCachedPlugin_fetcherHalt); + assign IBusCachedPlugin_fetchPc_output_valid = (IBusCachedPlugin_fetchPc_preOutput_valid && _zz_76_); + assign IBusCachedPlugin_fetchPc_preOutput_ready = (IBusCachedPlugin_fetchPc_output_ready && _zz_76_); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b0; + if((IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready))begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_177_); + IBusCachedPlugin_fetchPc_samplePcNext = 1'b0; + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + if(_zz_169_)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusCachedPlugin_fetchPc_preOutput_valid = _zz_77_; + assign IBusCachedPlugin_fetchPc_preOutput_payload = IBusCachedPlugin_fetchPc_pc; + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt)begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_78_ = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_78_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_78_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_fetch_haltIt)begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + if((IBusCachedPlugin_rsp_issueDetected || IBusCachedPlugin_rsp_iBusRspOutputHalt))begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + end + + assign _zz_79_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready && _zz_79_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && _zz_79_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_80_; + assign _zz_80_ = ((1'b0 && (! _zz_81_)) || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_81_ = _zz_82_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid = _zz_81_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload = IBusCachedPlugin_fetchPc_pcReg; + always @ (*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if((! IBusCachedPlugin_pcValids_0))begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_0; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_71_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_70_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_69_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @ (*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign _zz_137_ = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign _zz_140_ = (IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt); + assign _zz_141_ = (32'b00000000000000000000000000000000); + assign _zz_138_ = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign _zz_139_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_149_ = (CsrPlugin_privilege == (2'b00)); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload[31 : 2],(2'b00)}; + assign IBusCachedPlugin_redoBranch_valid = IBusCachedPlugin_rsp_redoFetch; + assign IBusCachedPlugin_redoBranch_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_decodeInput_valid = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready = IBusCachedPlugin_iBusRsp_decodeInput_ready; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_fetch_data; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_pc = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + assign _zz_145_ = 1'b1; + assign _zz_143_ = 1'b1; + assign _zz_144_ = 1'b1; + assign _zz_142_ = 1'b0; + assign _zz_146_ = 1'b0; + assign _zz_147_ = 1'b0; + assign _zz_148_ = 1'b0; + assign _zz_136_ = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_64_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_83_)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_84_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_84_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_84_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_84_; + assign _zz_63_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_85_ = (4'b0001); + end + 2'b01 : begin + _zz_85_ = (4'b0011); + end + default : begin + _zz_85_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_85_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_62_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(execute_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_178_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (1'b0 || (! execute_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = execute_REGFILE_WRITE_DATA; + always @ (*) begin + execute_DBusSimplePlugin_rspShifted = execute_MEMORY_READ_DATA; + case(execute_MEMORY_ADDRESS_LOW) + 2'b01 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + execute_DBusSimplePlugin_rspShifted[15 : 0] = execute_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_86_ = (execute_DBusSimplePlugin_rspShifted[7] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_87_[31] = _zz_86_; + _zz_87_[30] = _zz_86_; + _zz_87_[29] = _zz_86_; + _zz_87_[28] = _zz_86_; + _zz_87_[27] = _zz_86_; + _zz_87_[26] = _zz_86_; + _zz_87_[25] = _zz_86_; + _zz_87_[24] = _zz_86_; + _zz_87_[23] = _zz_86_; + _zz_87_[22] = _zz_86_; + _zz_87_[21] = _zz_86_; + _zz_87_[20] = _zz_86_; + _zz_87_[19] = _zz_86_; + _zz_87_[18] = _zz_86_; + _zz_87_[17] = _zz_86_; + _zz_87_[16] = _zz_86_; + _zz_87_[15] = _zz_86_; + _zz_87_[14] = _zz_86_; + _zz_87_[13] = _zz_86_; + _zz_87_[12] = _zz_86_; + _zz_87_[11] = _zz_86_; + _zz_87_[10] = _zz_86_; + _zz_87_[9] = _zz_86_; + _zz_87_[8] = _zz_86_; + _zz_87_[7 : 0] = execute_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_88_ = (execute_DBusSimplePlugin_rspShifted[15] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_89_[31] = _zz_88_; + _zz_89_[30] = _zz_88_; + _zz_89_[29] = _zz_88_; + _zz_89_[28] = _zz_88_; + _zz_89_[27] = _zz_88_; + _zz_89_[26] = _zz_88_; + _zz_89_[25] = _zz_88_; + _zz_89_[24] = _zz_88_; + _zz_89_[23] = _zz_88_; + _zz_89_[22] = _zz_88_; + _zz_89_[21] = _zz_88_; + _zz_89_[20] = _zz_88_; + _zz_89_[19] = _zz_88_; + _zz_89_[18] = _zz_88_; + _zz_89_[17] = _zz_88_; + _zz_89_[16] = _zz_88_; + _zz_89_[15 : 0] = execute_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_173_) + 2'b00 : begin + execute_DBusSimplePlugin_rspFormated = _zz_87_; + end + 2'b01 : begin + execute_DBusSimplePlugin_rspFormated = _zz_89_; + end + default : begin + execute_DBusSimplePlugin_rspFormated = execute_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_91_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_92_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_93_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_94_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_95_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_90_ = {(_zz_94_ != (1'b0)),{(((decode_INSTRUCTION & _zz_225_) == (32'b00000000000000000000000000010000)) != (1'b0)),{((_zz_226_ == _zz_227_) != (1'b0)),{(_zz_92_ != (1'b0)),{(_zz_228_ != _zz_229_),{_zz_230_,{_zz_231_,_zz_232_}}}}}}}; + assign _zz_60_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_315_) == (32'b00000000000000000001000001110011)),{(_zz_316_ == _zz_317_),{_zz_318_,{_zz_319_,_zz_320_}}}}}}} != (20'b00000000000000000000)); + assign _zz_59_ = _zz_179_[0]; + assign _zz_58_ = _zz_180_[0]; + assign _zz_96_ = _zz_90_[5 : 4]; + assign _zz_57_ = _zz_96_; + assign _zz_97_ = _zz_90_[7 : 6]; + assign _zz_56_ = _zz_97_; + assign _zz_98_ = _zz_90_[9 : 8]; + assign _zz_55_ = _zz_98_; + assign _zz_54_ = _zz_181_[0]; + assign _zz_53_ = _zz_182_[0]; + assign _zz_99_ = _zz_90_[13 : 12]; + assign _zz_52_ = _zz_99_; + assign _zz_51_ = _zz_183_[0]; + assign _zz_100_ = _zz_90_[16 : 15]; + assign _zz_50_ = _zz_100_; + assign _zz_101_ = _zz_90_[18 : 17]; + assign _zz_49_ = _zz_101_; + assign _zz_48_ = _zz_184_[0]; + assign _zz_102_ = _zz_90_[22 : 21]; + assign _zz_47_ = _zz_102_; + assign _zz_46_ = _zz_185_[0]; + assign _zz_45_ = _zz_186_[0]; + assign _zz_44_ = _zz_187_[0]; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_103_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_154_; + assign execute_RegFilePlugin_rs2Data = _zz_155_; + assign _zz_43_ = execute_RegFilePlugin_rs1Data; + assign _zz_42_ = execute_RegFilePlugin_rs2Data; + assign lastStageRegFileWrite_valid = (execute_REGFILE_WRITE_VALID && execute_arbitration_isFiring); + assign lastStageRegFileWrite_payload_address = execute_INSTRUCTION[11 : 7]; + assign lastStageRegFileWrite_payload_data = _zz_61_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_104_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_104_ = {31'd0, _zz_188_}; + end + default : begin + _zz_104_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_39_ = _zz_104_; + assign _zz_37_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_105_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_105_ = {29'd0, _zz_189_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_105_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_105_ = {27'd0, _zz_190_}; + end + endcase + end + + assign _zz_36_ = _zz_105_; + assign _zz_106_ = _zz_191_[11]; + always @ (*) begin + _zz_107_[19] = _zz_106_; + _zz_107_[18] = _zz_106_; + _zz_107_[17] = _zz_106_; + _zz_107_[16] = _zz_106_; + _zz_107_[15] = _zz_106_; + _zz_107_[14] = _zz_106_; + _zz_107_[13] = _zz_106_; + _zz_107_[12] = _zz_106_; + _zz_107_[11] = _zz_106_; + _zz_107_[10] = _zz_106_; + _zz_107_[9] = _zz_106_; + _zz_107_[8] = _zz_106_; + _zz_107_[7] = _zz_106_; + _zz_107_[6] = _zz_106_; + _zz_107_[5] = _zz_106_; + _zz_107_[4] = _zz_106_; + _zz_107_[3] = _zz_106_; + _zz_107_[2] = _zz_106_; + _zz_107_[1] = _zz_106_; + _zz_107_[0] = _zz_106_; + end + + assign _zz_108_ = _zz_192_[11]; + always @ (*) begin + _zz_109_[19] = _zz_108_; + _zz_109_[18] = _zz_108_; + _zz_109_[17] = _zz_108_; + _zz_109_[16] = _zz_108_; + _zz_109_[15] = _zz_108_; + _zz_109_[14] = _zz_108_; + _zz_109_[13] = _zz_108_; + _zz_109_[12] = _zz_108_; + _zz_109_[11] = _zz_108_; + _zz_109_[10] = _zz_108_; + _zz_109_[9] = _zz_108_; + _zz_109_[8] = _zz_108_; + _zz_109_[7] = _zz_108_; + _zz_109_[6] = _zz_108_; + _zz_109_[5] = _zz_108_; + _zz_109_[4] = _zz_108_; + _zz_109_[3] = _zz_108_; + _zz_109_[2] = _zz_108_; + _zz_109_[1] = _zz_108_; + _zz_109_[0] = _zz_108_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_110_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_110_ = {_zz_107_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_110_ = {_zz_109_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_110_ = execute_PC; + end + endcase + end + + assign _zz_34_ = _zz_110_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_193_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_32_ = execute_SrcPlugin_addSub; + assign _zz_31_ = execute_SrcPlugin_addSub; + assign _zz_30_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_shiftReg : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_111_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_111_ = _zz_200_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_112_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_112_ == (3'b000))) begin + _zz_113_ = execute_BranchPlugin_eq; + end else if((_zz_112_ == (3'b001))) begin + _zz_113_ = (! execute_BranchPlugin_eq); + end else if((((_zz_112_ & (3'b101)) == (3'b101)))) begin + _zz_113_ = (! execute_SRC_LESS); + end else begin + _zz_113_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_114_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_114_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_114_ = 1'b1; + end + default : begin + _zz_114_ = _zz_113_; + end + endcase + end + + assign _zz_28_ = _zz_114_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_115_ = _zz_202_[19]; + always @ (*) begin + _zz_116_[10] = _zz_115_; + _zz_116_[9] = _zz_115_; + _zz_116_[8] = _zz_115_; + _zz_116_[7] = _zz_115_; + _zz_116_[6] = _zz_115_; + _zz_116_[5] = _zz_115_; + _zz_116_[4] = _zz_115_; + _zz_116_[3] = _zz_115_; + _zz_116_[2] = _zz_115_; + _zz_116_[1] = _zz_115_; + _zz_116_[0] = _zz_115_; + end + + assign _zz_117_ = _zz_203_[11]; + always @ (*) begin + _zz_118_[19] = _zz_117_; + _zz_118_[18] = _zz_117_; + _zz_118_[17] = _zz_117_; + _zz_118_[16] = _zz_117_; + _zz_118_[15] = _zz_117_; + _zz_118_[14] = _zz_117_; + _zz_118_[13] = _zz_117_; + _zz_118_[12] = _zz_117_; + _zz_118_[11] = _zz_117_; + _zz_118_[10] = _zz_117_; + _zz_118_[9] = _zz_117_; + _zz_118_[8] = _zz_117_; + _zz_118_[7] = _zz_117_; + _zz_118_[6] = _zz_117_; + _zz_118_[5] = _zz_117_; + _zz_118_[4] = _zz_117_; + _zz_118_[3] = _zz_117_; + _zz_118_[2] = _zz_117_; + _zz_118_[1] = _zz_117_; + _zz_118_[0] = _zz_117_; + end + + assign _zz_119_ = _zz_204_[11]; + always @ (*) begin + _zz_120_[18] = _zz_119_; + _zz_120_[17] = _zz_119_; + _zz_120_[16] = _zz_119_; + _zz_120_[15] = _zz_119_; + _zz_120_[14] = _zz_119_; + _zz_120_[13] = _zz_119_; + _zz_120_[12] = _zz_119_; + _zz_120_[11] = _zz_119_; + _zz_120_[10] = _zz_119_; + _zz_120_[9] = _zz_119_; + _zz_120_[8] = _zz_119_; + _zz_120_[7] = _zz_119_; + _zz_120_[6] = _zz_119_; + _zz_120_[5] = _zz_119_; + _zz_120_[4] = _zz_119_; + _zz_120_[3] = _zz_119_; + _zz_120_[2] = _zz_119_; + _zz_120_[1] = _zz_119_; + _zz_120_[0] = _zz_119_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_121_ = {{_zz_116_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_121_ = {_zz_118_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_121_ = {{_zz_120_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_121_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_26_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + BranchPlugin_branchExceptionPort_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && BranchPlugin_jumpInterface_payload[1]); + if(1'b0)begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = (4'b0000); + assign BranchPlugin_branchExceptionPort_payload_badAddr = BranchPlugin_jumpInterface_payload; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_122_ = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_123_ = _zz_205_[0]; + assign _zz_124_ = {CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}}; + assign _zz_125_ = (_zz_124_ & (~ _zz_207_)); + assign _zz_126_ = _zz_125_[1]; + assign _zz_127_ = _zz_125_[2]; + assign _zz_128_ = {_zz_127_,_zz_126_}; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_161_)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! (execute_arbitration_isValid != (1'b0))) && IBusCachedPlugin_pcValids_1); + if((CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute != (1'b0)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_24_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_23_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = 1'b0; + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_129_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_130_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_174_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_130_ = (_zz_129_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_130_ != (32'b00000000000000000000000000000000)); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + IBusCachedPlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_170_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + IBusCachedPlugin_injectionPort_valid = 1'b1; + debug_bus_cmd_ready = IBusCachedPlugin_injectionPort_ready; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_131_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign IBusCachedPlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign _zz_22_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_212_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_213_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_214_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_215_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_21_ = decode_SRC2_CTRL; + assign _zz_19_ = _zz_47_; + assign _zz_33_ = decode_to_execute_SRC2_CTRL; + assign _zz_18_ = decode_SHIFT_CTRL; + assign _zz_16_ = _zz_56_; + assign _zz_29_ = decode_to_execute_SHIFT_CTRL; + assign _zz_15_ = decode_BRANCH_CTRL; + assign _zz_13_ = _zz_49_; + assign _zz_27_ = decode_to_execute_BRANCH_CTRL; + assign _zz_12_ = decode_ALU_BITWISE_CTRL; + assign _zz_10_ = _zz_52_; + assign _zz_40_ = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_9_ = decode_ALU_CTRL; + assign _zz_7_ = _zz_57_; + assign _zz_38_ = decode_to_execute_ALU_CTRL; + assign _zz_6_ = decode_ENV_CTRL; + assign _zz_4_ = _zz_50_; + assign _zz_25_ = decode_to_execute_ENV_CTRL; + assign _zz_3_ = decode_SRC1_CTRL; + assign _zz_1_ = _zz_55_; + assign _zz_35_ = decode_to_execute_SRC1_CTRL; + assign decode_arbitration_isFlushed = ({execute_arbitration_flushAll,decode_arbitration_flushAll} != (2'b00)); + assign execute_arbitration_isFlushed = (execute_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (1'b0 || execute_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || 1'b0); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign iBusWishbone_ADR = {_zz_222_,_zz_133_}; + assign iBusWishbone_CTI = ((_zz_133_ == (3'b111)) ? (3'b111) : (3'b010)); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + always @ (*) begin + iBusWishbone_CYC = 1'b0; + iBusWishbone_STB = 1'b0; + if(_zz_171_)begin + iBusWishbone_CYC = 1'b1; + iBusWishbone_STB = 1'b1; + end + end + + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_134_; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_135_ = (4'b0001); + end + 2'b01 : begin + _zz_135_ = (4'b0011); + end + default : begin + _zz_135_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_223_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_77_ <= 1'b0; + _zz_82_ <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + _zz_83_ <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_129_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + _zz_132_ <= (3'b000); + _zz_133_ <= (3'b000); + _zz_134_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(_zz_169_)begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_samplePcNext)begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + _zz_77_ <= 1'b1; + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + _zz_82_ <= 1'b0; + end + if(_zz_80_)begin + _zz_82_ <= IBusCachedPlugin_iBusRsp_stages_0_output_valid; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + end + if((dBus_cmd_valid && dBus_cmd_ready))begin + _zz_83_ <= 1'b1; + end + if((! execute_arbitration_isStuck))begin + _zz_83_ <= 1'b0; + end + if(_zz_159_)begin + if(_zz_160_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_163_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_164_)begin + case(_zz_165_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + case(_zz_132_) + 3'b000 : begin + if(IBusCachedPlugin_injectionPort_valid)begin + _zz_132_ <= (3'b001); + end + end + 3'b001 : begin + _zz_132_ <= (3'b010); + end + 3'b010 : begin + _zz_132_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_132_ <= (3'b100); + end + end + 3'b100 : begin + _zz_132_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_129_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_216_[0]; + CsrPlugin_mstatus_MIE <= _zz_217_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_219_[0]; + CsrPlugin_mie_MTIE <= _zz_220_[0]; + CsrPlugin_mie_MSIE <= _zz_221_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(_zz_171_)begin + if(iBusWishbone_ACK)begin + _zz_133_ <= (_zz_133_ + (3'b001)); + end + end + _zz_134_ <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(_zz_172_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if((! execute_arbitration_isStuckByOthers))begin + execute_LightShifterPlugin_shiftReg <= _zz_61_; + end + if(_zz_159_)begin + if(_zz_160_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(execute_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(_zz_161_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_123_ ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_123_ ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_162_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= _zz_157_; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= _zz_158_; + end + if(_zz_163_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= execute_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_20_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_17_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_14_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_68_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(((! execute_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_execute)))begin + decode_to_execute_PC <= decode_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_2_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_218_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(_zz_172_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({execute_arbitration_isValid,decode_arbitration_isValid} != (2'b00)) || IBusCachedPlugin_incomingInstruction); + if(execute_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_61_; + end + _zz_131_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_170_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_166_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + end else begin + if((DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)))begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid)begin + case(_zz_170_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_godmode <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_208_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_209_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_210_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_211_[0]; + end + end + default : begin + end + endcase + end + if(_zz_166_)begin + if(_zz_167_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_168_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + IBusCachedPlugin_injectionPort_payload_regNext <= IBusCachedPlugin_injectionPort_payload; + end + +endmodule + diff --git a/hw/rtl/2-stage-2048-cache-debug.yaml b/hw/rtl/2-stage-2048-cache-debug.yaml new file mode 100644 index 0000000..db67c22 --- /dev/null +++ b/hw/rtl/2-stage-2048-cache-debug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/hw/rtl/2-stage-2048-cache.v b/hw/rtl/2-stage-2048-cache.v new file mode 100644 index 0000000..c849572 --- /dev/null +++ b/hw/rtl/2-stage-2048-cache.v @@ -0,0 +1,3297 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 26/04/2019, 01:10:32 +// Component : VexRiscv + + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input io_cpu_fetch_dataBypassValid, + input [31:0] io_cpu_fetch_dataBypass, + output io_cpu_fetch_mmuBus_cmd_isValid, + output [31:0] io_cpu_fetch_mmuBus_cmd_virtualAddress, + output io_cpu_fetch_mmuBus_cmd_bypassTranslation, + input [31:0] io_cpu_fetch_mmuBus_rsp_physicalAddress, + input io_cpu_fetch_mmuBus_rsp_isIoAccess, + input io_cpu_fetch_mmuBus_rsp_allowRead, + input io_cpu_fetch_mmuBus_rsp_allowWrite, + input io_cpu_fetch_mmuBus_rsp_allowExecute, + input io_cpu_fetch_mmuBus_rsp_exception, + input io_cpu_fetch_mmuBus_rsp_refilling, + output io_cpu_fetch_mmuBus_end, + input io_cpu_fetch_mmuBus_busy, + output [31:0] io_cpu_fetch_physicalAddress, + output io_cpu_fetch_cacheMiss, + output io_cpu_fetch_error, + output io_cpu_fetch_mmuRefilling, + output io_cpu_fetch_mmuException, + input io_cpu_fetch_isUser, + output io_cpu_fetch_haltIt, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset); + reg [22:0] _zz_10_; + reg [31:0] _zz_11_; + wire _zz_12_; + wire _zz_13_; + wire [0:0] _zz_14_; + wire [0:0] _zz_15_; + wire [22:0] _zz_16_; + reg _zz_1_; + reg _zz_2_; + reg lineLoader_fire; + reg lineLoader_valid; + reg [31:0] lineLoader_address; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + reg _zz_3_; + reg lineLoader_cmdSent; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + reg [2:0] lineLoader_wordIndex; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire _zz_4_; + wire [5:0] _zz_5_; + wire _zz_6_; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_7_; + wire [8:0] _zz_8_; + wire _zz_9_; + wire [31:0] fetchStage_read_waysValues_0_data; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + reg [22:0] ways_0_tags [0:63]; + reg [31:0] ways_0_datas [0:511]; + assign _zz_12_ = (! lineLoader_flushCounter[6]); + assign _zz_13_ = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign _zz_14_ = _zz_7_[0 : 0]; + assign _zz_15_ = _zz_7_[1 : 1]; + assign _zz_16_ = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @ (posedge clk) begin + if(_zz_2_) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_16_; + end + end + + always @ (posedge clk) begin + if(_zz_6_) begin + _zz_10_ <= ways_0_tags[_zz_5_]; + end + end + + always @ (posedge clk) begin + if(_zz_1_) begin + ways_0_datas[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_9_) begin + _zz_11_ <= ways_0_datas[_zz_8_]; + end + end + + always @ (*) begin + _zz_1_ = 1'b0; + if(lineLoader_write_data_0_valid)begin + _zz_1_ = 1'b1; + end + end + + always @ (*) begin + _zz_2_ = 1'b0; + if(lineLoader_write_tag_0_valid)begin + _zz_2_ = 1'b1; + end + end + + assign io_cpu_fetch_haltIt = io_cpu_fetch_mmuBus_busy; + always @ (*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid)begin + if((lineLoader_wordIndex == (3'b111)))begin + lineLoader_fire = 1'b1; + end + end + end + + always @ (*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(_zz_12_)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if((! _zz_3_))begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush)begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],(5'b00000)}; + assign io_mem_cmd_payload_size = (3'b101); + always @ (*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(lineLoader_fire)begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign _zz_4_ = 1'b1; + assign lineLoader_write_tag_0_valid = ((_zz_4_ && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && _zz_4_); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign _zz_5_ = io_cpu_prefetch_pc[10 : 5]; + assign _zz_6_ = (! io_cpu_fetch_isStuck); + assign _zz_7_ = _zz_10_; + assign fetchStage_read_waysValues_0_tag_valid = _zz_14_[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_15_[0]; + assign fetchStage_read_waysValues_0_tag_address = _zz_7_[22 : 2]; + assign _zz_8_ = io_cpu_prefetch_pc[10 : 2]; + assign _zz_9_ = (! io_cpu_fetch_isStuck); + assign fetchStage_read_waysValues_0_data = _zz_11_; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuBus_rsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != (1'b0)); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_waysValues_0_data; + assign fetchStage_hit_word = fetchStage_hit_data[31 : 0]; + assign io_cpu_fetch_data = (io_cpu_fetch_dataBypassValid ? io_cpu_fetch_dataBypass : fetchStage_hit_word); + assign io_cpu_fetch_mmuBus_cmd_isValid = io_cpu_fetch_isValid; + assign io_cpu_fetch_mmuBus_cmd_virtualAddress = io_cpu_fetch_pc; + assign io_cpu_fetch_mmuBus_cmd_bypassTranslation = 1'b0; + assign io_cpu_fetch_mmuBus_end = ((! io_cpu_fetch_isStuck) || io_cpu_fetch_isRemoved); + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuBus_rsp_physicalAddress; + assign io_cpu_fetch_cacheMiss = (! fetchStage_hit_valid); + assign io_cpu_fetch_error = fetchStage_hit_error; + assign io_cpu_fetch_mmuRefilling = io_cpu_fetch_mmuBus_rsp_refilling; + assign io_cpu_fetch_mmuException = ((! io_cpu_fetch_mmuBus_rsp_refilling) && (io_cpu_fetch_mmuBus_rsp_exception || (! io_cpu_fetch_mmuBus_rsp_allowExecute))); + always @ (posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= (3'b000); + end else begin + if(lineLoader_fire)begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire)begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid)begin + lineLoader_valid <= 1'b1; + end + if(io_flush)begin + lineLoader_flushPending <= 1'b1; + end + if(_zz_13_)begin + lineLoader_flushPending <= 1'b0; + end + if((io_mem_cmd_valid && io_mem_cmd_ready))begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire)begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid)begin + lineLoader_wordIndex <= (lineLoader_wordIndex + (3'b001)); + if(io_mem_rsp_payload_error)begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + if(io_cpu_fill_valid)begin + lineLoader_address <= io_cpu_fill_payload; + end + if(_zz_12_)begin + lineLoader_flushCounter <= (lineLoader_flushCounter + (7'b0000001)); + end + _zz_3_ <= lineLoader_flushCounter[6]; + if(_zz_13_)begin + lineLoader_flushCounter <= (7'b0000000); + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset); + wire _zz_131_; + wire _zz_132_; + wire _zz_133_; + wire _zz_134_; + wire _zz_135_; + wire [31:0] _zz_136_; + wire _zz_137_; + wire _zz_138_; + wire _zz_139_; + wire _zz_140_; + wire _zz_141_; + wire _zz_142_; + wire _zz_143_; + wire _zz_144_; + wire _zz_145_; + wire _zz_146_; + wire [31:0] _zz_147_; + reg _zz_148_; + reg [31:0] _zz_149_; + reg [31:0] _zz_150_; + reg [31:0] _zz_151_; + reg [3:0] _zz_152_; + reg [31:0] _zz_153_; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_error; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire _zz_154_; + wire _zz_155_; + wire _zz_156_; + wire _zz_157_; + wire _zz_158_; + wire _zz_159_; + wire [1:0] _zz_160_; + wire _zz_161_; + wire _zz_162_; + wire _zz_163_; + wire [1:0] _zz_164_; + wire _zz_165_; + wire [2:0] _zz_166_; + wire [2:0] _zz_167_; + wire [31:0] _zz_168_; + wire [2:0] _zz_169_; + wire [0:0] _zz_170_; + wire [0:0] _zz_171_; + wire [0:0] _zz_172_; + wire [0:0] _zz_173_; + wire [0:0] _zz_174_; + wire [0:0] _zz_175_; + wire [0:0] _zz_176_; + wire [0:0] _zz_177_; + wire [0:0] _zz_178_; + wire [2:0] _zz_179_; + wire [4:0] _zz_180_; + wire [11:0] _zz_181_; + wire [11:0] _zz_182_; + wire [31:0] _zz_183_; + wire [31:0] _zz_184_; + wire [31:0] _zz_185_; + wire [31:0] _zz_186_; + wire [31:0] _zz_187_; + wire [31:0] _zz_188_; + wire [31:0] _zz_189_; + wire [31:0] _zz_190_; + wire [32:0] _zz_191_; + wire [19:0] _zz_192_; + wire [11:0] _zz_193_; + wire [11:0] _zz_194_; + wire [1:0] _zz_195_; + wire [1:0] _zz_196_; + wire [2:0] _zz_197_; + wire [0:0] _zz_198_; + wire [0:0] _zz_199_; + wire [0:0] _zz_200_; + wire [0:0] _zz_201_; + wire [0:0] _zz_202_; + wire [0:0] _zz_203_; + wire [26:0] _zz_204_; + wire [6:0] _zz_205_; + wire [1:0] _zz_206_; + wire [31:0] _zz_207_; + wire [31:0] _zz_208_; + wire _zz_209_; + wire _zz_210_; + wire [31:0] _zz_211_; + wire [31:0] _zz_212_; + wire [0:0] _zz_213_; + wire [0:0] _zz_214_; + wire [0:0] _zz_215_; + wire [0:0] _zz_216_; + wire _zz_217_; + wire [0:0] _zz_218_; + wire [20:0] _zz_219_; + wire [31:0] _zz_220_; + wire [31:0] _zz_221_; + wire [31:0] _zz_222_; + wire [31:0] _zz_223_; + wire [0:0] _zz_224_; + wire [2:0] _zz_225_; + wire [0:0] _zz_226_; + wire [0:0] _zz_227_; + wire _zz_228_; + wire [0:0] _zz_229_; + wire [17:0] _zz_230_; + wire [31:0] _zz_231_; + wire [31:0] _zz_232_; + wire [31:0] _zz_233_; + wire _zz_234_; + wire _zz_235_; + wire [31:0] _zz_236_; + wire _zz_237_; + wire _zz_238_; + wire [0:0] _zz_239_; + wire [4:0] _zz_240_; + wire [1:0] _zz_241_; + wire [1:0] _zz_242_; + wire _zz_243_; + wire [0:0] _zz_244_; + wire [14:0] _zz_245_; + wire [31:0] _zz_246_; + wire [31:0] _zz_247_; + wire [31:0] _zz_248_; + wire [31:0] _zz_249_; + wire _zz_250_; + wire [0:0] _zz_251_; + wire [2:0] _zz_252_; + wire _zz_253_; + wire _zz_254_; + wire _zz_255_; + wire [0:0] _zz_256_; + wire [0:0] _zz_257_; + wire _zz_258_; + wire [0:0] _zz_259_; + wire [12:0] _zz_260_; + wire [31:0] _zz_261_; + wire [31:0] _zz_262_; + wire [31:0] _zz_263_; + wire [0:0] _zz_264_; + wire [0:0] _zz_265_; + wire [31:0] _zz_266_; + wire [31:0] _zz_267_; + wire [31:0] _zz_268_; + wire [31:0] _zz_269_; + wire [31:0] _zz_270_; + wire [0:0] _zz_271_; + wire [0:0] _zz_272_; + wire [0:0] _zz_273_; + wire [0:0] _zz_274_; + wire _zz_275_; + wire [0:0] _zz_276_; + wire [10:0] _zz_277_; + wire [31:0] _zz_278_; + wire [31:0] _zz_279_; + wire [31:0] _zz_280_; + wire [31:0] _zz_281_; + wire [31:0] _zz_282_; + wire [31:0] _zz_283_; + wire [31:0] _zz_284_; + wire [0:0] _zz_285_; + wire [0:0] _zz_286_; + wire [0:0] _zz_287_; + wire [0:0] _zz_288_; + wire _zz_289_; + wire [0:0] _zz_290_; + wire [7:0] _zz_291_; + wire [31:0] _zz_292_; + wire [31:0] _zz_293_; + wire [31:0] _zz_294_; + wire _zz_295_; + wire _zz_296_; + wire [1:0] _zz_297_; + wire [1:0] _zz_298_; + wire _zz_299_; + wire [0:0] _zz_300_; + wire [4:0] _zz_301_; + wire [31:0] _zz_302_; + wire [31:0] _zz_303_; + wire _zz_304_; + wire [0:0] _zz_305_; + wire [0:0] _zz_306_; + wire [1:0] _zz_307_; + wire [1:0] _zz_308_; + wire _zz_309_; + wire [0:0] _zz_310_; + wire [1:0] _zz_311_; + wire [31:0] _zz_312_; + wire [31:0] _zz_313_; + wire [31:0] _zz_314_; + wire [31:0] _zz_315_; + wire _zz_316_; + wire _zz_317_; + wire [1:0] _zz_318_; + wire [1:0] _zz_319_; + wire [0:0] _zz_320_; + wire [0:0] _zz_321_; + wire [31:0] _zz_322_; + wire [31:0] _zz_323_; + wire [31:0] _zz_324_; + wire _zz_325_; + wire [0:0] _zz_326_; + wire [12:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire [31:0] _zz_330_; + wire _zz_331_; + wire [0:0] _zz_332_; + wire [6:0] _zz_333_; + wire [31:0] _zz_334_; + wire [31:0] _zz_335_; + wire [31:0] _zz_336_; + wire _zz_337_; + wire [0:0] _zz_338_; + wire [0:0] _zz_339_; + wire decode_IS_CSR; + wire execute_REGFILE_WRITE_VALID; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_1_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_2_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_3_; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_4_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_5_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_6_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_7_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_8_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_9_; + wire decode_CSR_WRITE_OPCODE; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_10_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_11_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_12_; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_13_; + wire `AluCtrlEnum_defaultEncoding_type _zz_14_; + wire `AluCtrlEnum_defaultEncoding_type _zz_15_; + wire decode_MEMORY_STORE; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_16_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_17_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_18_; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_19_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_20_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_21_; + wire decode_SRC2_FORCE_ZERO; + wire decode_CSR_READ_OPCODE; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_ENABLE; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire _zz_22_; + wire _zz_23_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_24_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_25_; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_26_; + wire _zz_27_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_28_; + wire _zz_29_; + wire [31:0] _zz_30_; + wire [31:0] _zz_31_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_32_; + wire [31:0] _zz_33_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_34_; + wire [31:0] _zz_35_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_36_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_37_; + wire [31:0] _zz_38_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_39_; + reg _zz_40_; + wire [31:0] _zz_41_; + wire [31:0] _zz_42_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire _zz_43_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_44_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_45_; + wire _zz_46_; + wire _zz_47_; + wire _zz_48_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_49_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_50_; + wire _zz_51_; + wire _zz_52_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_53_; + wire _zz_54_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_55_; + wire _zz_56_; + wire `AluCtrlEnum_defaultEncoding_type _zz_57_; + wire _zz_58_; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_59_; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire [31:0] execute_MEMORY_READ_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] _zz_60_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_61_; + wire [31:0] execute_RS2; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_62_; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected; + reg _zz_63_; + reg _zz_64_; + reg _zz_65_; + reg [31:0] _zz_66_; + wire [31:0] decode_PC; + wire [31:0] _zz_67_; + wire [31:0] _zz_68_; + wire [31:0] _zz_69_; + wire [31:0] execute_PC; + wire [31:0] execute_INSTRUCTION; + wire decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + wire execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + wire IBusCachedPlugin_fetcherflushIt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_redoBranch_valid; + wire [31:0] IBusCachedPlugin_redoBranch_payload; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [2:0] _zz_70_; + wire [2:0] _zz_71_; + wire _zz_72_; + wire _zz_73_; + wire IBusCachedPlugin_fetchPc_preOutput_valid; + wire IBusCachedPlugin_fetchPc_preOutput_ready; + wire [31:0] IBusCachedPlugin_fetchPc_preOutput_payload; + wire _zz_74_; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_inc; + reg IBusCachedPlugin_fetchPc_propagatePc; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + reg IBusCachedPlugin_fetchPc_samplePcNext; + reg _zz_75_; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_0_inputSample; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + reg IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_inputSample; + wire _zz_76_; + wire _zz_77_; + wire _zz_78_; + wire _zz_79_; + reg _zz_80_; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_decodeInput_valid; + wire IBusCachedPlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + reg IBusCachedPlugin_injector_decodeRemoved; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + reg IBusCachedPlugin_rsp_redoFetch; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + reg _zz_81_; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_82_; + reg [3:0] _zz_83_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] execute_DBusSimplePlugin_rspShifted; + wire _zz_84_; + reg [31:0] _zz_85_; + wire _zz_86_; + reg [31:0] _zz_87_; + reg [31:0] execute_DBusSimplePlugin_rspFormated; + wire [26:0] _zz_88_; + wire _zz_89_; + wire _zz_90_; + wire _zz_91_; + wire _zz_92_; + wire `AluCtrlEnum_defaultEncoding_type _zz_93_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_94_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_95_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_96_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_97_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_98_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_99_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_100_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire lastStageRegFileWrite_valid /* verilator public */ ; + wire [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + wire [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_101_; + reg [31:0] _zz_102_; + wire _zz_103_; + reg [19:0] _zz_104_; + wire _zz_105_; + reg [19:0] _zz_106_; + reg [31:0] _zz_107_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + reg [31:0] execute_LightShifterPlugin_shiftReg; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_108_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_109_; + reg _zz_110_; + reg _zz_111_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_112_; + reg [10:0] _zz_113_; + wire _zz_114_; + reg [19:0] _zz_115_; + wire _zz_116_; + reg [18:0] _zz_117_; + reg [31:0] _zz_118_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_119_; + wire _zz_120_; + wire [2:0] _zz_121_; + wire [2:0] _zz_122_; + wire _zz_123_; + wire _zz_124_; + wire [1:0] _zz_125_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_126_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_127_; + reg decode_to_execute_MEMORY_ENABLE; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg decode_to_execute_CSR_READ_OPCODE; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg [31:0] decode_to_execute_INSTRUCTION; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg decode_to_execute_MEMORY_STORE; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg [31:0] decode_to_execute_PC; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg decode_to_execute_IS_CSR; + reg [2:0] _zz_128_; + reg _zz_129_; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_130_; + `ifndef SYNTHESIS + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_1__string; + reg [71:0] _zz_2__string; + reg [71:0] _zz_3__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_4__string; + reg [95:0] _zz_5__string; + reg [95:0] _zz_6__string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_7__string; + reg [39:0] _zz_8__string; + reg [39:0] _zz_9__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_10__string; + reg [23:0] _zz_11__string; + reg [23:0] _zz_12__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_13__string; + reg [63:0] _zz_14__string; + reg [63:0] _zz_15__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_16__string; + reg [31:0] _zz_17__string; + reg [31:0] _zz_18__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_19__string; + reg [47:0] _zz_20__string; + reg [47:0] _zz_21__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_24__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_26__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_28__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_32__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_34__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_37__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_39__string; + reg [31:0] _zz_44__string; + reg [71:0] _zz_45__string; + reg [47:0] _zz_49__string; + reg [39:0] _zz_50__string; + reg [95:0] _zz_53__string; + reg [23:0] _zz_55__string; + reg [63:0] _zz_57__string; + reg [63:0] _zz_93__string; + reg [23:0] _zz_94__string; + reg [95:0] _zz_95__string; + reg [39:0] _zz_96__string; + reg [47:0] _zz_97__string; + reg [71:0] _zz_98__string; + reg [31:0] _zz_99__string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_154_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_155_ = (! execute_arbitration_isStuckByOthers); + assign _zz_156_ = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != (2'b00)); + assign _zz_157_ = ({CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}} != (3'b000)); + assign _zz_158_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_159_ = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_160_ = execute_INSTRUCTION[29 : 28]; + assign _zz_161_ = (IBusCachedPlugin_fetchPc_preOutput_valid && IBusCachedPlugin_fetchPc_preOutput_ready); + assign _zz_162_ = (iBus_cmd_valid || (_zz_128_ != (3'b000))); + assign _zz_163_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_164_ = execute_INSTRUCTION[13 : 12]; + assign _zz_165_ = execute_INSTRUCTION[13]; + assign _zz_166_ = (_zz_70_ - (3'b001)); + assign _zz_167_ = {IBusCachedPlugin_fetchPc_inc,(2'b00)}; + assign _zz_168_ = {29'd0, _zz_167_}; + assign _zz_169_ = (execute_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_170_ = _zz_88_[2 : 2]; + assign _zz_171_ = _zz_88_[5 : 5]; + assign _zz_172_ = _zz_88_[10 : 10]; + assign _zz_173_ = _zz_88_[11 : 11]; + assign _zz_174_ = _zz_88_[16 : 16]; + assign _zz_175_ = _zz_88_[17 : 17]; + assign _zz_176_ = _zz_88_[18 : 18]; + assign _zz_177_ = _zz_88_[26 : 26]; + assign _zz_178_ = execute_SRC_LESS; + assign _zz_179_ = (3'b100); + assign _zz_180_ = execute_INSTRUCTION[19 : 15]; + assign _zz_181_ = execute_INSTRUCTION[31 : 20]; + assign _zz_182_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_183_ = ($signed(_zz_184_) + $signed(_zz_187_)); + assign _zz_184_ = ($signed(_zz_185_) + $signed(_zz_186_)); + assign _zz_185_ = execute_SRC1; + assign _zz_186_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_187_ = (execute_SRC_USE_SUB_LESS ? _zz_188_ : _zz_189_); + assign _zz_188_ = (32'b00000000000000000000000000000001); + assign _zz_189_ = (32'b00000000000000000000000000000000); + assign _zz_190_ = (_zz_191_ >>> 1); + assign _zz_191_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_192_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_193_ = execute_INSTRUCTION[31 : 20]; + assign _zz_194_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_195_ = (_zz_119_ & (~ _zz_196_)); + assign _zz_196_ = (_zz_119_ - (2'b01)); + assign _zz_197_ = (_zz_121_ - (3'b001)); + assign _zz_198_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_199_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_200_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_201_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_202_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_203_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_204_ = (iBus_cmd_payload_address >>> 5); + assign _zz_205_ = ({3'd0,_zz_130_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_206_ = {_zz_73_,_zz_72_}; + assign _zz_207_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_208_ = (32'b00000000000000000000000001000000); + assign _zz_209_ = ((decode_INSTRUCTION & (32'b00000000000000000010000000010100)) == (32'b00000000000000000010000000010000)); + assign _zz_210_ = ((decode_INSTRUCTION & (32'b01000000000000000100000000110100)) == (32'b01000000000000000000000000110000)); + assign _zz_211_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010000)); + assign _zz_212_ = (32'b00000000000000000000000000010000); + assign _zz_213_ = _zz_92_; + assign _zz_214_ = ((decode_INSTRUCTION & _zz_220_) == (32'b00000000000000000000000000000100)); + assign _zz_215_ = ((decode_INSTRUCTION & _zz_221_) == (32'b00000000000000000000000001000000)); + assign _zz_216_ = (1'b0); + assign _zz_217_ = ((_zz_222_ == _zz_223_) != (1'b0)); + assign _zz_218_ = ({_zz_224_,_zz_225_} != (4'b0000)); + assign _zz_219_ = {(_zz_226_ != _zz_227_),{_zz_228_,{_zz_229_,_zz_230_}}}; + assign _zz_220_ = (32'b00000000000000000000000000011100); + assign _zz_221_ = (32'b00000000000000000000000001011000); + assign _zz_222_ = (decode_INSTRUCTION & (32'b00000000000000000000000000000000)); + assign _zz_223_ = (32'b00000000000000000000000000000000); + assign _zz_224_ = ((decode_INSTRUCTION & _zz_231_) == (32'b00000000000000000000000000000000)); + assign _zz_225_ = {(_zz_232_ == _zz_233_),{_zz_234_,_zz_235_}}; + assign _zz_226_ = ((decode_INSTRUCTION & _zz_236_) == (32'b00000000000000000101000000010000)); + assign _zz_227_ = (1'b0); + assign _zz_228_ = ({_zz_237_,_zz_238_} != (2'b00)); + assign _zz_229_ = ({_zz_239_,_zz_240_} != (6'b000000)); + assign _zz_230_ = {(_zz_241_ != _zz_242_),{_zz_243_,{_zz_244_,_zz_245_}}}; + assign _zz_231_ = (32'b00000000000000000000000001000100); + assign _zz_232_ = (decode_INSTRUCTION & (32'b00000000000000000000000000011000)); + assign _zz_233_ = (32'b00000000000000000000000000000000); + assign _zz_234_ = ((decode_INSTRUCTION & _zz_246_) == (32'b00000000000000000010000000000000)); + assign _zz_235_ = ((decode_INSTRUCTION & _zz_247_) == (32'b00000000000000000001000000000000)); + assign _zz_236_ = (32'b00000000000000000111000001010100); + assign _zz_237_ = ((decode_INSTRUCTION & _zz_248_) == (32'b01000000000000000001000000010000)); + assign _zz_238_ = ((decode_INSTRUCTION & _zz_249_) == (32'b00000000000000000001000000010000)); + assign _zz_239_ = _zz_92_; + assign _zz_240_ = {_zz_250_,{_zz_251_,_zz_252_}}; + assign _zz_241_ = {_zz_253_,_zz_254_}; + assign _zz_242_ = (2'b00); + assign _zz_243_ = (_zz_255_ != (1'b0)); + assign _zz_244_ = (_zz_256_ != _zz_257_); + assign _zz_245_ = {_zz_258_,{_zz_259_,_zz_260_}}; + assign _zz_246_ = (32'b00000000000000000110000000000100); + assign _zz_247_ = (32'b00000000000000000101000000000100); + assign _zz_248_ = (32'b01000000000000000011000001010100); + assign _zz_249_ = (32'b00000000000000000111000001010100); + assign _zz_250_ = ((decode_INSTRUCTION & _zz_261_) == (32'b00000000000000000001000000010000)); + assign _zz_251_ = (_zz_262_ == _zz_263_); + assign _zz_252_ = {_zz_91_,{_zz_264_,_zz_265_}}; + assign _zz_253_ = ((decode_INSTRUCTION & _zz_266_) == (32'b00000000000000000001000001010000)); + assign _zz_254_ = ((decode_INSTRUCTION & _zz_267_) == (32'b00000000000000000010000001010000)); + assign _zz_255_ = ((decode_INSTRUCTION & _zz_268_) == (32'b00000000000000000001000000001000)); + assign _zz_256_ = (_zz_269_ == _zz_270_); + assign _zz_257_ = (1'b0); + assign _zz_258_ = ({_zz_271_,_zz_272_} != (2'b00)); + assign _zz_259_ = (_zz_273_ != _zz_274_); + assign _zz_260_ = {_zz_275_,{_zz_276_,_zz_277_}}; + assign _zz_261_ = (32'b00000000000000000001000000010000); + assign _zz_262_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010000)); + assign _zz_263_ = (32'b00000000000000000010000000010000); + assign _zz_264_ = ((decode_INSTRUCTION & _zz_278_) == (32'b00000000000000000000000000000100)); + assign _zz_265_ = ((decode_INSTRUCTION & _zz_279_) == (32'b00000000000000000000000000000000)); + assign _zz_266_ = (32'b00000000000000000001000001010000); + assign _zz_267_ = (32'b00000000000000000010000001010000); + assign _zz_268_ = (32'b00000000000000000001000001001000); + assign _zz_269_ = (decode_INSTRUCTION & (32'b00010000000000000011000001010000)); + assign _zz_270_ = (32'b00000000000000000000000001010000); + assign _zz_271_ = ((decode_INSTRUCTION & _zz_280_) == (32'b00000000000100000000000001010000)); + assign _zz_272_ = ((decode_INSTRUCTION & _zz_281_) == (32'b00010000000000000000000001010000)); + assign _zz_273_ = ((decode_INSTRUCTION & _zz_282_) == (32'b00000000000000000001000000000000)); + assign _zz_274_ = (1'b0); + assign _zz_275_ = ((_zz_283_ == _zz_284_) != (1'b0)); + assign _zz_276_ = ({_zz_285_,_zz_286_} != (2'b00)); + assign _zz_277_ = {(_zz_287_ != _zz_288_),{_zz_289_,{_zz_290_,_zz_291_}}}; + assign _zz_278_ = (32'b00000000000000000000000000001100); + assign _zz_279_ = (32'b00000000000000000000000000101000); + assign _zz_280_ = (32'b00010000000100000011000001010000); + assign _zz_281_ = (32'b00010000010000000011000001010000); + assign _zz_282_ = (32'b00000000000000000001000000000000); + assign _zz_283_ = (decode_INSTRUCTION & (32'b00000000000000000011000000000000)); + assign _zz_284_ = (32'b00000000000000000010000000000000); + assign _zz_285_ = ((decode_INSTRUCTION & _zz_292_) == (32'b00000000000000000010000000000000)); + assign _zz_286_ = ((decode_INSTRUCTION & _zz_293_) == (32'b00000000000000000001000000000000)); + assign _zz_287_ = ((decode_INSTRUCTION & _zz_294_) == (32'b00000000000000000000000000000000)); + assign _zz_288_ = (1'b0); + assign _zz_289_ = ({_zz_295_,_zz_296_} != (2'b00)); + assign _zz_290_ = (_zz_91_ != (1'b0)); + assign _zz_291_ = {(_zz_297_ != _zz_298_),{_zz_299_,{_zz_300_,_zz_301_}}}; + assign _zz_292_ = (32'b00000000000000000010000000010000); + assign _zz_293_ = (32'b00000000000000000101000000000000); + assign _zz_294_ = (32'b00000000000000000000000001011000); + assign _zz_295_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000110100)) == (32'b00000000000000000000000000100000)); + assign _zz_296_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100000)); + assign _zz_297_ = {(_zz_302_ == _zz_303_),_zz_90_}; + assign _zz_298_ = (2'b00); + assign _zz_299_ = ({_zz_304_,_zz_90_} != (2'b00)); + assign _zz_300_ = ({_zz_305_,_zz_306_} != (2'b00)); + assign _zz_301_ = {(_zz_307_ != _zz_308_),{_zz_309_,{_zz_310_,_zz_311_}}}; + assign _zz_302_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010100)); + assign _zz_303_ = (32'b00000000000000000000000000000100); + assign _zz_304_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000100)); + assign _zz_305_ = ((decode_INSTRUCTION & _zz_312_) == (32'b00000000000000000000000000100100)); + assign _zz_306_ = ((decode_INSTRUCTION & _zz_313_) == (32'b00000000000000000001000000010000)); + assign _zz_307_ = {_zz_89_,(_zz_314_ == _zz_315_)}; + assign _zz_308_ = (2'b00); + assign _zz_309_ = ({_zz_89_,_zz_316_} != (2'b00)); + assign _zz_310_ = (_zz_317_ != (1'b0)); + assign _zz_311_ = {(_zz_318_ != _zz_319_),(_zz_320_ != _zz_321_)}; + assign _zz_312_ = (32'b00000000000000000000000001100100); + assign _zz_313_ = (32'b00000000000000000011000001010100); + assign _zz_314_ = (decode_INSTRUCTION & (32'b00000000000000000000000001110000)); + assign _zz_315_ = (32'b00000000000000000000000000100000); + assign _zz_316_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000000000)); + assign _zz_317_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000100000)); + assign _zz_318_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000110000000010000)),((decode_INSTRUCTION & (32'b00000000000000000101000000010100)) == (32'b00000000000000000100000000010000))}; + assign _zz_319_ = (2'b00); + assign _zz_320_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000010000000010000)); + assign _zz_321_ = (1'b0); + assign _zz_322_ = (32'b00000000000000000001000001111111); + assign _zz_323_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_324_ = (32'b00000000000000000010000001110011); + assign _zz_325_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_326_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_327_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_328_) == (32'b00000000000000000000000000000011)),{(_zz_329_ == _zz_330_),{_zz_331_,{_zz_332_,_zz_333_}}}}}}; + assign _zz_328_ = (32'b00000000000000000101000001011111); + assign _zz_329_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_330_ = (32'b00000000000000000000000001100011); + assign _zz_331_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_332_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_333_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_334_) == (32'b00000000000000000101000000110011)),{(_zz_335_ == _zz_336_),{_zz_337_,{_zz_338_,_zz_339_}}}}}}; + assign _zz_334_ = (32'b10111110000000000111000001111111); + assign _zz_335_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_336_ = (32'b00000000000000000000000000110011); + assign _zz_337_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_338_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_339_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("2-stage-2048-cache.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_40_) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_100_) begin + _zz_149_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_100_) begin + _zz_150_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush(_zz_131_), + .io_cpu_prefetch_isValid(_zz_132_), + .io_cpu_prefetch_haltIt(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt), + .io_cpu_prefetch_pc(IBusCachedPlugin_iBusRsp_stages_0_input_payload), + .io_cpu_fetch_isValid(_zz_133_), + .io_cpu_fetch_isStuck(_zz_134_), + .io_cpu_fetch_isRemoved(_zz_135_), + .io_cpu_fetch_pc(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload), + .io_cpu_fetch_data(IBusCachedPlugin_cache_io_cpu_fetch_data), + .io_cpu_fetch_dataBypassValid(IBusCachedPlugin_s1_tightlyCoupledHit), + .io_cpu_fetch_dataBypass(_zz_136_), + .io_cpu_fetch_mmuBus_cmd_isValid(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid), + .io_cpu_fetch_mmuBus_cmd_virtualAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_cmd_bypassTranslation(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation), + .io_cpu_fetch_mmuBus_rsp_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_rsp_isIoAccess(_zz_137_), + .io_cpu_fetch_mmuBus_rsp_allowRead(_zz_138_), + .io_cpu_fetch_mmuBus_rsp_allowWrite(_zz_139_), + .io_cpu_fetch_mmuBus_rsp_allowExecute(_zz_140_), + .io_cpu_fetch_mmuBus_rsp_exception(_zz_141_), + .io_cpu_fetch_mmuBus_rsp_refilling(_zz_142_), + .io_cpu_fetch_mmuBus_end(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end), + .io_cpu_fetch_mmuBus_busy(_zz_143_), + .io_cpu_fetch_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_cpu_fetch_cacheMiss(IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss), + .io_cpu_fetch_error(IBusCachedPlugin_cache_io_cpu_fetch_error), + .io_cpu_fetch_mmuRefilling(IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling), + .io_cpu_fetch_mmuException(IBusCachedPlugin_cache_io_cpu_fetch_mmuException), + .io_cpu_fetch_isUser(_zz_144_), + .io_cpu_fetch_haltIt(IBusCachedPlugin_cache_io_cpu_fetch_haltIt), + .io_cpu_decode_isValid(_zz_145_), + .io_cpu_decode_isStuck(_zz_146_), + .io_cpu_decode_pc(_zz_147_), + .io_cpu_decode_physicalAddress(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_cpu_decode_data(IBusCachedPlugin_cache_io_cpu_decode_data), + .io_cpu_fill_valid(_zz_148_), + .io_cpu_fill_payload(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_mem_cmd_valid(IBusCachedPlugin_cache_io_mem_cmd_valid), + .io_mem_cmd_ready(iBus_cmd_ready), + .io_mem_cmd_payload_address(IBusCachedPlugin_cache_io_mem_cmd_payload_address), + .io_mem_cmd_payload_size(IBusCachedPlugin_cache_io_mem_cmd_payload_size), + .io_mem_rsp_valid(iBus_rsp_valid), + .io_mem_rsp_payload_data(iBus_rsp_payload_data), + .io_mem_rsp_payload_error(iBus_rsp_payload_error), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_206_) + 2'b00 : begin + _zz_151_ = BranchPlugin_jumpInterface_payload; + end + 2'b01 : begin + _zz_151_ = CsrPlugin_jumpInterface_payload; + end + default : begin + _zz_151_ = IBusCachedPlugin_redoBranch_payload; + end + endcase + end + + always @(*) begin + case(_zz_125_) + 2'b00 : begin + _zz_152_ = DBusSimplePlugin_memoryExceptionPort_payload_code; + _zz_153_ = DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + end + 2'b01 : begin + _zz_152_ = BranchPlugin_branchExceptionPort_payload_code; + _zz_153_ = BranchPlugin_branchExceptionPort_payload_badAddr; + end + default : begin + _zz_152_ = CsrPlugin_selfException_payload_code; + _zz_153_ = CsrPlugin_selfException_payload_badAddr; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_1_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_1__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_1__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_1__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_1__string = "SRA_1 "; + default : _zz_1__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_2_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_2__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_2__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_2__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_2__string = "SRA_1 "; + default : _zz_2__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_3_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_3__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_3__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_3__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_3__string = "SRA_1 "; + default : _zz_3__string = "?????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_4_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_4__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_4__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_4__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_4__string = "URS1 "; + default : _zz_4__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_5_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_5__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_5__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_5__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_5__string = "URS1 "; + default : _zz_5__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_6_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_6__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_6__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_6__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_6__string = "URS1 "; + default : _zz_6__string = "????????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_7_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_7__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_7__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_7__string = "AND_1"; + default : _zz_7__string = "?????"; + endcase + end + always @(*) begin + case(_zz_8_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_8__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_8__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_8__string = "AND_1"; + default : _zz_8__string = "?????"; + endcase + end + always @(*) begin + case(_zz_9_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_9__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_9__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_9__string = "AND_1"; + default : _zz_9__string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_10_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_10__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_10__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_10__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_10__string = "PC "; + default : _zz_10__string = "???"; + endcase + end + always @(*) begin + case(_zz_11_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_11__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_11__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_11__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_11__string = "PC "; + default : _zz_11__string = "???"; + endcase + end + always @(*) begin + case(_zz_12_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_12__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_12__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_12__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_12__string = "PC "; + default : _zz_12__string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_13_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_13__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_13__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_13__string = "BITWISE "; + default : _zz_13__string = "????????"; + endcase + end + always @(*) begin + case(_zz_14_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_14__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_14__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_14__string = "BITWISE "; + default : _zz_14__string = "????????"; + endcase + end + always @(*) begin + case(_zz_15_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_15__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_15__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_15__string = "BITWISE "; + default : _zz_15__string = "????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_16_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_16__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_16__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_16__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_16__string = "JALR"; + default : _zz_16__string = "????"; + endcase + end + always @(*) begin + case(_zz_17_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_17__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_17__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_17__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_17__string = "JALR"; + default : _zz_17__string = "????"; + endcase + end + always @(*) begin + case(_zz_18_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_18__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_18__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_18__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_18__string = "JALR"; + default : _zz_18__string = "????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_19_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_19__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_19__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_19__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_19__string = "EBREAK"; + default : _zz_19__string = "??????"; + endcase + end + always @(*) begin + case(_zz_20_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_20__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_20__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_20__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_20__string = "EBREAK"; + default : _zz_20__string = "??????"; + endcase + end + always @(*) begin + case(_zz_21_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_21__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_21__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_21__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_21__string = "EBREAK"; + default : _zz_21__string = "??????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_24_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_24__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_24__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_24__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_24__string = "EBREAK"; + default : _zz_24__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_26_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_26__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_26__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_26__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_26__string = "JALR"; + default : _zz_26__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_28_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_28__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_28__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_28__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_28__string = "SRA_1 "; + default : _zz_28__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_32_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_32__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_32__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_32__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_32__string = "PC "; + default : _zz_32__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_34_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_34__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_34__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_34__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_34__string = "URS1 "; + default : _zz_34__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_37_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_37__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_37__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_37__string = "BITWISE "; + default : _zz_37__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_39_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_39__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_39__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_39__string = "AND_1"; + default : _zz_39__string = "?????"; + endcase + end + always @(*) begin + case(_zz_44_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_44__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_44__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_44__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_44__string = "JALR"; + default : _zz_44__string = "????"; + endcase + end + always @(*) begin + case(_zz_45_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_45__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_45__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_45__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_45__string = "SRA_1 "; + default : _zz_45__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_49_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_49__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_49__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_49__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_49__string = "EBREAK"; + default : _zz_49__string = "??????"; + endcase + end + always @(*) begin + case(_zz_50_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_50__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_50__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_50__string = "AND_1"; + default : _zz_50__string = "?????"; + endcase + end + always @(*) begin + case(_zz_53_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_53__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_53__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_53__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_53__string = "URS1 "; + default : _zz_53__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_55_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_55__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_55__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_55__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_55__string = "PC "; + default : _zz_55__string = "???"; + endcase + end + always @(*) begin + case(_zz_57_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_57__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_57__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_57__string = "BITWISE "; + default : _zz_57__string = "????????"; + endcase + end + always @(*) begin + case(_zz_93_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_93__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_93__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_93__string = "BITWISE "; + default : _zz_93__string = "????????"; + endcase + end + always @(*) begin + case(_zz_94_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_94__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_94__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_94__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_94__string = "PC "; + default : _zz_94__string = "???"; + endcase + end + always @(*) begin + case(_zz_95_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_95__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_95__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_95__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_95__string = "URS1 "; + default : _zz_95__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_96_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_96__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_96__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_96__string = "AND_1"; + default : _zz_96__string = "?????"; + endcase + end + always @(*) begin + case(_zz_97_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_97__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_97__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_97__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_97__string = "EBREAK"; + default : _zz_97__string = "??????"; + endcase + end + always @(*) begin + case(_zz_98_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_98__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_98__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_98__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_98__string = "SRA_1 "; + default : _zz_98__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_99_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_99__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_99__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_99__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_99__string = "JALR"; + default : _zz_99__string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + `endif + + assign decode_IS_CSR = _zz_47_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_67_; + assign decode_SHIFT_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_SRC1_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_ALU_BITWISE_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_CSR_WRITE_OPCODE = _zz_23_; + assign decode_SRC2_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign decode_ALU_CTRL = _zz_13_; + assign _zz_14_ = _zz_15_; + assign decode_MEMORY_STORE = _zz_56_; + assign decode_BRANCH_CTRL = _zz_16_; + assign _zz_17_ = _zz_18_; + assign decode_ENV_CTRL = _zz_19_; + assign _zz_20_ = _zz_21_; + assign decode_SRC2_FORCE_ZERO = _zz_36_; + assign decode_CSR_READ_OPCODE = _zz_22_; + assign decode_SRC_LESS_UNSIGNED = _zz_51_; + assign decode_MEMORY_ENABLE = _zz_52_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign execute_ENV_CTRL = _zz_24_; + assign execute_BRANCH_CALC = _zz_25_; + assign execute_BRANCH_DO = _zz_27_; + assign execute_RS1 = _zz_42_; + assign execute_BRANCH_CTRL = _zz_26_; + assign execute_SHIFT_CTRL = _zz_28_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign execute_SRC2_CTRL = _zz_32_; + assign execute_SRC1_CTRL = _zz_34_; + assign decode_SRC_USE_SUB_LESS = _zz_43_; + assign decode_SRC_ADD_ZERO = _zz_54_; + assign execute_SRC_ADD_SUB = _zz_31_; + assign execute_SRC_LESS = _zz_29_; + assign execute_ALU_CTRL = _zz_37_; + assign execute_SRC2 = _zz_33_; + assign execute_SRC1 = _zz_35_; + assign execute_ALU_BITWISE_CTRL = _zz_39_; + always @ (*) begin + _zz_40_ = 1'b0; + if(lastStageRegFileWrite_valid)begin + _zz_40_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_46_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_58_; + assign decode_INSTRUCTION_READY = 1'b1; + assign decode_INSTRUCTION = _zz_68_; + always @ (*) begin + _zz_59_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_81_)))begin + execute_arbitration_haltItself = 1'b1; + end + if((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_MEMORY_STORE)) && ((! dBus_rsp_ready) || (! _zz_81_))))begin + execute_arbitration_haltItself = 1'b1; + end + if((execute_arbitration_isValid && execute_MEMORY_ENABLE))begin + _zz_59_ = execute_DBusSimplePlugin_rspFormated; + end + if(_zz_154_)begin + _zz_59_ = _zz_108_; + if(_zz_155_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_59_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_MEMORY_ADDRESS_LOW = _zz_61_; + assign execute_MEMORY_READ_DATA = _zz_60_; + assign execute_REGFILE_WRITE_DATA = _zz_38_; + assign execute_SRC_ADD = _zz_30_; + assign execute_RS2 = _zz_41_; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_62_; + assign decode_FLUSH_ALL = _zz_48_; + always @ (*) begin + IBusCachedPlugin_rsp_issueDetected = _zz_63_; + _zz_64_ = _zz_65_; + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'bxxxx); + if(((_zz_133_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuException) && (! _zz_65_)))begin + _zz_64_ = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b1100); + end + if(((_zz_133_ && IBusCachedPlugin_cache_io_cpu_fetch_error) && (! _zz_63_)))begin + IBusCachedPlugin_rsp_issueDetected = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b0001); + end + if(IBusCachedPlugin_fetcherHalt)begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + end + end + + always @ (*) begin + _zz_63_ = _zz_64_; + _zz_65_ = 1'b0; + IBusCachedPlugin_rsp_redoFetch = 1'b0; + _zz_148_ = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling)); + if(((_zz_133_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling) && (! 1'b0)))begin + _zz_65_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(((_zz_133_ && IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss) && (! _zz_64_)))begin + _zz_63_ = 1'b1; + _zz_148_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + _zz_148_ = 1'b0; + end + end + + always @ (*) begin + _zz_66_ = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_redoBranch_valid)begin + _zz_66_ = IBusCachedPlugin_redoBranch_payload; + end + end + + assign decode_PC = _zz_69_; + assign execute_PC = decode_to_execute_PC; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_arbitration_haltItself = 1'b0; + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)) != (1'b0)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_156_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_removeIt = 1'b0; + IBusCachedPlugin_fetcherHalt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_157_)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode} != (2'b00)))begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_158_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + decode_arbitration_flushAll = 1'b1; + end + if(_zz_159_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + decode_arbitration_flushAll = 1'b1; + case(_zz_160_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_haltByOther = 1'b0; + assign execute_arbitration_flushAll = 1'b0; + assign lastStageInstruction = execute_INSTRUCTION; + assign lastStagePc = execute_PC; + assign lastStageIsValid = execute_arbitration_isValid; + assign lastStageIsFiring = execute_arbitration_isFiring; + assign IBusCachedPlugin_fetcherflushIt = 1'b0; + always @ (*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid)begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,IBusCachedPlugin_redoBranch_valid}} != (3'b000)); + assign _zz_70_ = {IBusCachedPlugin_redoBranch_valid,{CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid}}; + assign _zz_71_ = (_zz_70_ & (~ _zz_166_)); + assign _zz_72_ = _zz_71_[1]; + assign _zz_73_ = _zz_71_[2]; + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_151_; + assign _zz_74_ = (! IBusCachedPlugin_fetcherHalt); + assign IBusCachedPlugin_fetchPc_output_valid = (IBusCachedPlugin_fetchPc_preOutput_valid && _zz_74_); + assign IBusCachedPlugin_fetchPc_preOutput_ready = (IBusCachedPlugin_fetchPc_output_ready && _zz_74_); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b0; + if((IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready))begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_168_); + IBusCachedPlugin_fetchPc_samplePcNext = 1'b0; + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + if(_zz_161_)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusCachedPlugin_fetchPc_preOutput_valid = _zz_75_; + assign IBusCachedPlugin_fetchPc_preOutput_payload = IBusCachedPlugin_fetchPc_pc; + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt)begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_76_ = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_76_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_76_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_fetch_haltIt)begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + if((IBusCachedPlugin_rsp_issueDetected || IBusCachedPlugin_rsp_iBusRspOutputHalt))begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + end + + assign _zz_77_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready && _zz_77_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && _zz_77_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_78_; + assign _zz_78_ = ((1'b0 && (! _zz_79_)) || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_79_ = _zz_80_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid = _zz_79_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload = IBusCachedPlugin_fetchPc_pcReg; + always @ (*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if((! IBusCachedPlugin_pcValids_0))begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_0; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = (IBusCachedPlugin_iBusRsp_decodeInput_valid && (! IBusCachedPlugin_injector_decodeRemoved)); + assign _zz_69_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_68_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_67_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @ (*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign _zz_132_ = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign _zz_135_ = (IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt); + assign _zz_136_ = (32'b00000000000000000000000000000000); + assign _zz_133_ = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign _zz_134_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_144_ = (CsrPlugin_privilege == (2'b00)); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload[31 : 2],(2'b00)}; + assign IBusCachedPlugin_redoBranch_valid = IBusCachedPlugin_rsp_redoFetch; + assign IBusCachedPlugin_redoBranch_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_decodeInput_valid = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready = IBusCachedPlugin_iBusRsp_decodeInput_ready; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_fetch_data; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_pc = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + assign _zz_140_ = 1'b1; + assign _zz_138_ = 1'b1; + assign _zz_139_ = 1'b1; + assign _zz_137_ = 1'b0; + assign _zz_141_ = 1'b0; + assign _zz_142_ = 1'b0; + assign _zz_143_ = 1'b0; + assign _zz_131_ = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_62_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_81_)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_82_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_82_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_82_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_82_; + assign _zz_61_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_83_ = (4'b0001); + end + 2'b01 : begin + _zz_83_ = (4'b0011); + end + default : begin + _zz_83_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_83_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_60_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(execute_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_169_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (1'b0 || (! execute_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = execute_REGFILE_WRITE_DATA; + always @ (*) begin + execute_DBusSimplePlugin_rspShifted = execute_MEMORY_READ_DATA; + case(execute_MEMORY_ADDRESS_LOW) + 2'b01 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + execute_DBusSimplePlugin_rspShifted[15 : 0] = execute_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_84_ = (execute_DBusSimplePlugin_rspShifted[7] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_85_[31] = _zz_84_; + _zz_85_[30] = _zz_84_; + _zz_85_[29] = _zz_84_; + _zz_85_[28] = _zz_84_; + _zz_85_[27] = _zz_84_; + _zz_85_[26] = _zz_84_; + _zz_85_[25] = _zz_84_; + _zz_85_[24] = _zz_84_; + _zz_85_[23] = _zz_84_; + _zz_85_[22] = _zz_84_; + _zz_85_[21] = _zz_84_; + _zz_85_[20] = _zz_84_; + _zz_85_[19] = _zz_84_; + _zz_85_[18] = _zz_84_; + _zz_85_[17] = _zz_84_; + _zz_85_[16] = _zz_84_; + _zz_85_[15] = _zz_84_; + _zz_85_[14] = _zz_84_; + _zz_85_[13] = _zz_84_; + _zz_85_[12] = _zz_84_; + _zz_85_[11] = _zz_84_; + _zz_85_[10] = _zz_84_; + _zz_85_[9] = _zz_84_; + _zz_85_[8] = _zz_84_; + _zz_85_[7 : 0] = execute_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_86_ = (execute_DBusSimplePlugin_rspShifted[15] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_87_[31] = _zz_86_; + _zz_87_[30] = _zz_86_; + _zz_87_[29] = _zz_86_; + _zz_87_[28] = _zz_86_; + _zz_87_[27] = _zz_86_; + _zz_87_[26] = _zz_86_; + _zz_87_[25] = _zz_86_; + _zz_87_[24] = _zz_86_; + _zz_87_[23] = _zz_86_; + _zz_87_[22] = _zz_86_; + _zz_87_[21] = _zz_86_; + _zz_87_[20] = _zz_86_; + _zz_87_[19] = _zz_86_; + _zz_87_[18] = _zz_86_; + _zz_87_[17] = _zz_86_; + _zz_87_[16] = _zz_86_; + _zz_87_[15 : 0] = execute_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_164_) + 2'b00 : begin + execute_DBusSimplePlugin_rspFormated = _zz_85_; + end + 2'b01 : begin + execute_DBusSimplePlugin_rspFormated = _zz_87_; + end + default : begin + execute_DBusSimplePlugin_rspFormated = execute_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_89_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_90_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_91_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_92_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_88_ = {({(_zz_207_ == _zz_208_),{_zz_209_,_zz_210_}} != (3'b000)),{((_zz_211_ == _zz_212_) != (1'b0)),{({_zz_213_,_zz_214_} != (2'b00)),{(_zz_215_ != _zz_216_),{_zz_217_,{_zz_218_,_zz_219_}}}}}}; + assign _zz_58_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_322_) == (32'b00000000000000000001000001110011)),{(_zz_323_ == _zz_324_),{_zz_325_,{_zz_326_,_zz_327_}}}}}}} != (20'b00000000000000000000)); + assign _zz_93_ = _zz_88_[1 : 0]; + assign _zz_57_ = _zz_93_; + assign _zz_56_ = _zz_170_[0]; + assign _zz_94_ = _zz_88_[4 : 3]; + assign _zz_55_ = _zz_94_; + assign _zz_54_ = _zz_171_[0]; + assign _zz_95_ = _zz_88_[7 : 6]; + assign _zz_53_ = _zz_95_; + assign _zz_52_ = _zz_172_[0]; + assign _zz_51_ = _zz_173_[0]; + assign _zz_96_ = _zz_88_[13 : 12]; + assign _zz_50_ = _zz_96_; + assign _zz_97_ = _zz_88_[15 : 14]; + assign _zz_49_ = _zz_97_; + assign _zz_48_ = _zz_174_[0]; + assign _zz_47_ = _zz_175_[0]; + assign _zz_46_ = _zz_176_[0]; + assign _zz_98_ = _zz_88_[20 : 19]; + assign _zz_45_ = _zz_98_; + assign _zz_99_ = _zz_88_[24 : 23]; + assign _zz_44_ = _zz_99_; + assign _zz_43_ = _zz_177_[0]; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_100_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_149_; + assign execute_RegFilePlugin_rs2Data = _zz_150_; + assign _zz_42_ = execute_RegFilePlugin_rs1Data; + assign _zz_41_ = execute_RegFilePlugin_rs2Data; + assign lastStageRegFileWrite_valid = (execute_REGFILE_WRITE_VALID && execute_arbitration_isFiring); + assign lastStageRegFileWrite_payload_address = execute_INSTRUCTION[11 : 7]; + assign lastStageRegFileWrite_payload_data = _zz_59_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_101_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_101_ = {31'd0, _zz_178_}; + end + default : begin + _zz_101_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_38_ = _zz_101_; + assign _zz_36_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_102_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_102_ = {29'd0, _zz_179_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_102_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_102_ = {27'd0, _zz_180_}; + end + endcase + end + + assign _zz_35_ = _zz_102_; + assign _zz_103_ = _zz_181_[11]; + always @ (*) begin + _zz_104_[19] = _zz_103_; + _zz_104_[18] = _zz_103_; + _zz_104_[17] = _zz_103_; + _zz_104_[16] = _zz_103_; + _zz_104_[15] = _zz_103_; + _zz_104_[14] = _zz_103_; + _zz_104_[13] = _zz_103_; + _zz_104_[12] = _zz_103_; + _zz_104_[11] = _zz_103_; + _zz_104_[10] = _zz_103_; + _zz_104_[9] = _zz_103_; + _zz_104_[8] = _zz_103_; + _zz_104_[7] = _zz_103_; + _zz_104_[6] = _zz_103_; + _zz_104_[5] = _zz_103_; + _zz_104_[4] = _zz_103_; + _zz_104_[3] = _zz_103_; + _zz_104_[2] = _zz_103_; + _zz_104_[1] = _zz_103_; + _zz_104_[0] = _zz_103_; + end + + assign _zz_105_ = _zz_182_[11]; + always @ (*) begin + _zz_106_[19] = _zz_105_; + _zz_106_[18] = _zz_105_; + _zz_106_[17] = _zz_105_; + _zz_106_[16] = _zz_105_; + _zz_106_[15] = _zz_105_; + _zz_106_[14] = _zz_105_; + _zz_106_[13] = _zz_105_; + _zz_106_[12] = _zz_105_; + _zz_106_[11] = _zz_105_; + _zz_106_[10] = _zz_105_; + _zz_106_[9] = _zz_105_; + _zz_106_[8] = _zz_105_; + _zz_106_[7] = _zz_105_; + _zz_106_[6] = _zz_105_; + _zz_106_[5] = _zz_105_; + _zz_106_[4] = _zz_105_; + _zz_106_[3] = _zz_105_; + _zz_106_[2] = _zz_105_; + _zz_106_[1] = _zz_105_; + _zz_106_[0] = _zz_105_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_107_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_107_ = {_zz_104_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_107_ = {_zz_106_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_107_ = execute_PC; + end + endcase + end + + assign _zz_33_ = _zz_107_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_183_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_31_ = execute_SrcPlugin_addSub; + assign _zz_30_ = execute_SrcPlugin_addSub; + assign _zz_29_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_shiftReg : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_108_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_108_ = _zz_190_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_109_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_109_ == (3'b000))) begin + _zz_110_ = execute_BranchPlugin_eq; + end else if((_zz_109_ == (3'b001))) begin + _zz_110_ = (! execute_BranchPlugin_eq); + end else if((((_zz_109_ & (3'b101)) == (3'b101)))) begin + _zz_110_ = (! execute_SRC_LESS); + end else begin + _zz_110_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_111_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_111_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_111_ = 1'b1; + end + default : begin + _zz_111_ = _zz_110_; + end + endcase + end + + assign _zz_27_ = _zz_111_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_112_ = _zz_192_[19]; + always @ (*) begin + _zz_113_[10] = _zz_112_; + _zz_113_[9] = _zz_112_; + _zz_113_[8] = _zz_112_; + _zz_113_[7] = _zz_112_; + _zz_113_[6] = _zz_112_; + _zz_113_[5] = _zz_112_; + _zz_113_[4] = _zz_112_; + _zz_113_[3] = _zz_112_; + _zz_113_[2] = _zz_112_; + _zz_113_[1] = _zz_112_; + _zz_113_[0] = _zz_112_; + end + + assign _zz_114_ = _zz_193_[11]; + always @ (*) begin + _zz_115_[19] = _zz_114_; + _zz_115_[18] = _zz_114_; + _zz_115_[17] = _zz_114_; + _zz_115_[16] = _zz_114_; + _zz_115_[15] = _zz_114_; + _zz_115_[14] = _zz_114_; + _zz_115_[13] = _zz_114_; + _zz_115_[12] = _zz_114_; + _zz_115_[11] = _zz_114_; + _zz_115_[10] = _zz_114_; + _zz_115_[9] = _zz_114_; + _zz_115_[8] = _zz_114_; + _zz_115_[7] = _zz_114_; + _zz_115_[6] = _zz_114_; + _zz_115_[5] = _zz_114_; + _zz_115_[4] = _zz_114_; + _zz_115_[3] = _zz_114_; + _zz_115_[2] = _zz_114_; + _zz_115_[1] = _zz_114_; + _zz_115_[0] = _zz_114_; + end + + assign _zz_116_ = _zz_194_[11]; + always @ (*) begin + _zz_117_[18] = _zz_116_; + _zz_117_[17] = _zz_116_; + _zz_117_[16] = _zz_116_; + _zz_117_[15] = _zz_116_; + _zz_117_[14] = _zz_116_; + _zz_117_[13] = _zz_116_; + _zz_117_[12] = _zz_116_; + _zz_117_[11] = _zz_116_; + _zz_117_[10] = _zz_116_; + _zz_117_[9] = _zz_116_; + _zz_117_[8] = _zz_116_; + _zz_117_[7] = _zz_116_; + _zz_117_[6] = _zz_116_; + _zz_117_[5] = _zz_116_; + _zz_117_[4] = _zz_116_; + _zz_117_[3] = _zz_116_; + _zz_117_[2] = _zz_116_; + _zz_117_[1] = _zz_116_; + _zz_117_[0] = _zz_116_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_118_ = {{_zz_113_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_118_ = {_zz_115_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_118_ = {{_zz_117_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_118_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_25_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + BranchPlugin_branchExceptionPort_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && BranchPlugin_jumpInterface_payload[1]); + if(1'b0)begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = (4'b0000); + assign BranchPlugin_branchExceptionPort_payload_badAddr = BranchPlugin_jumpInterface_payload; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_119_ = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_120_ = _zz_195_[0]; + assign _zz_121_ = {CsrPlugin_selfException_valid,{BranchPlugin_branchExceptionPort_valid,DBusSimplePlugin_memoryExceptionPort_valid}}; + assign _zz_122_ = (_zz_121_ & (~ _zz_197_)); + assign _zz_123_ = _zz_122_[1]; + assign _zz_124_ = _zz_122_[2]; + assign _zz_125_ = {_zz_124_,_zz_123_}; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_156_)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! (execute_arbitration_isValid != (1'b0))) && IBusCachedPlugin_pcValids_1); + if((CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute != (1'b0)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_23_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_22_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = 1'b0; + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_126_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_127_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_165_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_127_ = (_zz_126_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_127_ != (32'b00000000000000000000000000000000)); + assign _zz_21_ = decode_ENV_CTRL; + assign _zz_19_ = _zz_49_; + assign _zz_24_ = decode_to_execute_ENV_CTRL; + assign _zz_18_ = decode_BRANCH_CTRL; + assign _zz_16_ = _zz_44_; + assign _zz_26_ = decode_to_execute_BRANCH_CTRL; + assign _zz_15_ = decode_ALU_CTRL; + assign _zz_13_ = _zz_57_; + assign _zz_37_ = decode_to_execute_ALU_CTRL; + assign _zz_12_ = decode_SRC2_CTRL; + assign _zz_10_ = _zz_55_; + assign _zz_32_ = decode_to_execute_SRC2_CTRL; + assign _zz_9_ = decode_ALU_BITWISE_CTRL; + assign _zz_7_ = _zz_50_; + assign _zz_39_ = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_6_ = decode_SRC1_CTRL; + assign _zz_4_ = _zz_53_; + assign _zz_34_ = decode_to_execute_SRC1_CTRL; + assign _zz_3_ = decode_SHIFT_CTRL; + assign _zz_1_ = _zz_45_; + assign _zz_28_ = decode_to_execute_SHIFT_CTRL; + assign decode_arbitration_isFlushed = ({execute_arbitration_flushAll,decode_arbitration_flushAll} != (2'b00)); + assign execute_arbitration_isFlushed = (execute_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (1'b0 || execute_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || 1'b0); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign iBusWishbone_ADR = {_zz_204_,_zz_128_}; + assign iBusWishbone_CTI = ((_zz_128_ == (3'b111)) ? (3'b111) : (3'b010)); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + always @ (*) begin + iBusWishbone_CYC = 1'b0; + iBusWishbone_STB = 1'b0; + if(_zz_162_)begin + iBusWishbone_CYC = 1'b1; + iBusWishbone_STB = 1'b1; + end + end + + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_129_; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_130_ = (4'b0001); + end + 2'b01 : begin + _zz_130_ = (4'b0011); + end + default : begin + _zz_130_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_205_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_75_ <= 1'b0; + _zz_80_ <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + _zz_81_ <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_126_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + _zz_128_ <= (3'b000); + _zz_129_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(_zz_161_)begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_samplePcNext)begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + _zz_75_ <= 1'b1; + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + _zz_80_ <= 1'b0; + end + if(_zz_78_)begin + _zz_80_ <= IBusCachedPlugin_iBusRsp_stages_0_output_valid; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + end + if((dBus_cmd_valid && dBus_cmd_ready))begin + _zz_81_ <= 1'b1; + end + if((! execute_arbitration_isStuck))begin + _zz_81_ <= 1'b0; + end + if(_zz_154_)begin + if(_zz_155_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_158_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_159_)begin + case(_zz_160_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_126_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_198_[0]; + CsrPlugin_mstatus_MIE <= _zz_199_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_201_[0]; + CsrPlugin_mie_MTIE <= _zz_202_[0]; + CsrPlugin_mie_MSIE <= _zz_203_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(_zz_162_)begin + if(iBusWishbone_ACK)begin + _zz_128_ <= (_zz_128_ + (3'b001)); + end + end + _zz_129_ <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(_zz_163_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if((! execute_arbitration_isStuckByOthers))begin + execute_LightShifterPlugin_shiftReg <= _zz_59_; + end + if(_zz_154_)begin + if(_zz_155_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(execute_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(_zz_156_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_120_ ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_120_ ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_157_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= _zz_152_; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= _zz_153_; + end + if(_zz_158_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= execute_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_20_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_17_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_14_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_2_; + end + if(((! execute_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_execute)))begin + decode_to_execute_PC <= decode_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_66_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_200_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(_zz_163_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + +endmodule + diff --git a/hw/rtl/2-stage-2048-cache.yaml b/hw/rtl/2-stage-2048-cache.yaml new file mode 100644 index 0000000..b55f8e5 --- /dev/null +++ b/hw/rtl/2-stage-2048-cache.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/hw/rtl/2-stage-512-cache-debug.v b/hw/rtl/2-stage-512-cache-debug.v new file mode 100644 index 0000000..2576298 --- /dev/null +++ b/hw/rtl/2-stage-512-cache-debug.v @@ -0,0 +1,3769 @@ +// Generator : SpinalHDL v1.3.2 git head : 41815ceafff4e72c2e3a3e1ff7e9ada5202a0d26 +// Date : 11/04/2019, 06:14:01 +// Component : VexRiscv + + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 +`define AluBitwiseCtrlEnum_defaultEncoding_SRC1 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +module InstructionCache ( + input io_flush_cmd_valid, + output io_flush_cmd_ready, + output io_flush_rsp, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input io_cpu_fetch_dataBypassValid, + input [31:0] io_cpu_fetch_dataBypass, + output io_cpu_fetch_mmuBus_cmd_isValid, + output [31:0] io_cpu_fetch_mmuBus_cmd_virtualAddress, + output io_cpu_fetch_mmuBus_cmd_bypassTranslation, + input [31:0] io_cpu_fetch_mmuBus_rsp_physicalAddress, + input io_cpu_fetch_mmuBus_rsp_isIoAccess, + input io_cpu_fetch_mmuBus_rsp_allowRead, + input io_cpu_fetch_mmuBus_rsp_allowWrite, + input io_cpu_fetch_mmuBus_rsp_allowExecute, + input io_cpu_fetch_mmuBus_rsp_allowUser, + input io_cpu_fetch_mmuBus_rsp_miss, + input io_cpu_fetch_mmuBus_rsp_hit, + output io_cpu_fetch_mmuBus_end, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuMiss, + output io_cpu_decode_illegalAccess, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset); + reg [24:0] _zz_12_; + reg [31:0] _zz_13_; + wire _zz_14_; + wire [0:0] _zz_15_; + wire [0:0] _zz_16_; + wire [24:0] _zz_17_; + reg _zz_1_; + reg _zz_2_; + reg lineLoader_fire; + reg lineLoader_valid; + reg [31:0] lineLoader_address; + reg lineLoader_hadError; + reg [4:0] lineLoader_flushCounter; + reg _zz_3_; + reg lineLoader_flushFromInterface; + wire _zz_4_; + reg _zz_4__regNext; + reg lineLoader_cmdSent; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + reg [2:0] lineLoader_wordIndex; + wire lineLoader_write_tag_0_valid; + wire [3:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [22:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [6:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire _zz_5_; + wire [3:0] _zz_6_; + wire _zz_7_; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [22:0] fetchStage_read_waysValues_0_tag_address; + wire [24:0] _zz_8_; + wire [6:0] _zz_9_; + wire _zz_10_; + wire [31:0] fetchStage_read_waysValues_0_data; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_allowUser; + reg decodeStage_mmuRsp_miss; + reg decodeStage_mmuRsp_hit; + reg decodeStage_hit_tags_0_valid; + reg decodeStage_hit_tags_0_error; + reg [22:0] decodeStage_hit_tags_0_address; + wire decodeStage_hit_hits_0; + wire decodeStage_hit_valid; + wire decodeStage_hit_error; + reg [31:0] _zz_11_; + wire [31:0] decodeStage_hit_data; + reg [31:0] decodeStage_hit_word; + reg io_cpu_fetch_dataBypassValid_regNextWhen; + reg [31:0] io_cpu_fetch_dataBypass_regNextWhen; + reg [24:0] ways_0_tags [0:15]; + reg [31:0] ways_0_datas [0:127]; + assign _zz_14_ = (! lineLoader_flushCounter[4]); + assign _zz_15_ = _zz_8_[0 : 0]; + assign _zz_16_ = _zz_8_[1 : 1]; + assign _zz_17_ = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @ (posedge clk) begin + if(_zz_2_) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_17_; + end + end + + always @ (posedge clk) begin + if(_zz_7_) begin + _zz_12_ <= ways_0_tags[_zz_6_]; + end + end + + always @ (posedge clk) begin + if(_zz_1_) begin + ways_0_datas[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_10_) begin + _zz_13_ <= ways_0_datas[_zz_9_]; + end + end + + always @ (*) begin + _zz_1_ = 1'b0; + if(lineLoader_write_data_0_valid)begin + _zz_1_ = 1'b1; + end + end + + always @ (*) begin + _zz_2_ = 1'b0; + if(lineLoader_write_tag_0_valid)begin + _zz_2_ = 1'b1; + end + end + + always @ (*) begin + io_cpu_prefetch_haltIt = 1'b0; + if(lineLoader_valid)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(_zz_14_)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if((! _zz_3_))begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush_cmd_valid)begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + always @ (*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid)begin + if((lineLoader_wordIndex == (3'b111)))begin + lineLoader_fire = 1'b1; + end + end + end + + assign io_flush_cmd_ready = (! (lineLoader_valid || io_cpu_fetch_isValid)); + assign _zz_4_ = lineLoader_flushCounter[4]; + assign io_flush_rsp = ((_zz_4_ && (! _zz_4__regNext)) && lineLoader_flushFromInterface); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],(5'b00000)}; + assign io_mem_cmd_payload_size = (3'b101); + always @ (*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(lineLoader_fire)begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign _zz_5_ = 1'b1; + assign lineLoader_write_tag_0_valid = ((_zz_5_ && lineLoader_fire) || (! lineLoader_flushCounter[4])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[4] ? lineLoader_address[8 : 5] : lineLoader_flushCounter[3 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[4]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 9]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && _zz_5_); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[8 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign _zz_6_ = io_cpu_prefetch_pc[8 : 5]; + assign _zz_7_ = (! io_cpu_fetch_isStuck); + assign _zz_8_ = _zz_12_; + assign fetchStage_read_waysValues_0_tag_valid = _zz_15_[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_16_[0]; + assign fetchStage_read_waysValues_0_tag_address = _zz_8_[24 : 2]; + assign _zz_9_ = io_cpu_prefetch_pc[8 : 2]; + assign _zz_10_ = (! io_cpu_fetch_isStuck); + assign fetchStage_read_waysValues_0_data = _zz_13_; + assign io_cpu_fetch_data = (io_cpu_fetch_dataBypassValid ? io_cpu_fetch_dataBypass : fetchStage_read_waysValues_0_data[31 : 0]); + assign io_cpu_fetch_mmuBus_cmd_isValid = io_cpu_fetch_isValid; + assign io_cpu_fetch_mmuBus_cmd_virtualAddress = io_cpu_fetch_pc; + assign io_cpu_fetch_mmuBus_cmd_bypassTranslation = 1'b0; + assign io_cpu_fetch_mmuBus_end = ((! io_cpu_fetch_isStuck) || io_cpu_fetch_isRemoved); + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuBus_rsp_physicalAddress; + assign decodeStage_hit_hits_0 = (decodeStage_hit_tags_0_valid && (decodeStage_hit_tags_0_address == decodeStage_mmuRsp_physicalAddress[31 : 9])); + assign decodeStage_hit_valid = (decodeStage_hit_hits_0 != (1'b0)); + assign decodeStage_hit_error = decodeStage_hit_tags_0_error; + assign decodeStage_hit_data = _zz_11_; + always @ (*) begin + decodeStage_hit_word = decodeStage_hit_data[31 : 0]; + if(io_cpu_fetch_dataBypassValid_regNextWhen)begin + decodeStage_hit_word = io_cpu_fetch_dataBypass_regNextWhen; + end + end + + assign io_cpu_decode_data = decodeStage_hit_word; + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = decodeStage_hit_error; + assign io_cpu_decode_mmuMiss = decodeStage_mmuRsp_miss; + assign io_cpu_decode_illegalAccess = ((! decodeStage_mmuRsp_allowExecute) || (io_cpu_decode_isUser && (! decodeStage_mmuRsp_allowUser))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @ (posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushCounter <= (5'b00000); + lineLoader_flushFromInterface <= 1'b0; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= (3'b000); + end else begin + if(lineLoader_fire)begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire)begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid)begin + lineLoader_valid <= 1'b1; + end + if(_zz_14_)begin + lineLoader_flushCounter <= (lineLoader_flushCounter + (5'b00001)); + end + if(io_flush_cmd_valid)begin + if(io_flush_cmd_ready)begin + lineLoader_flushCounter <= (5'b00000); + lineLoader_flushFromInterface <= 1'b1; + end + end + if((io_mem_cmd_valid && io_mem_cmd_ready))begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire)begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid)begin + lineLoader_wordIndex <= (lineLoader_wordIndex + (3'b001)); + if(io_mem_rsp_payload_error)begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + if(io_cpu_fill_valid)begin + lineLoader_address <= io_cpu_fill_payload; + end + _zz_3_ <= lineLoader_flushCounter[4]; + _zz_4__regNext <= _zz_4_; + if((! io_cpu_decode_isStuck))begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuBus_rsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuBus_rsp_isIoAccess; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuBus_rsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuBus_rsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuBus_rsp_allowExecute; + decodeStage_mmuRsp_allowUser <= io_cpu_fetch_mmuBus_rsp_allowUser; + decodeStage_mmuRsp_miss <= io_cpu_fetch_mmuBus_rsp_miss; + decodeStage_mmuRsp_hit <= io_cpu_fetch_mmuBus_rsp_hit; + end + if((! io_cpu_decode_isStuck))begin + decodeStage_hit_tags_0_valid <= fetchStage_read_waysValues_0_tag_valid; + decodeStage_hit_tags_0_error <= fetchStage_read_waysValues_0_tag_error; + decodeStage_hit_tags_0_address <= fetchStage_read_waysValues_0_tag_address; + end + if((! io_cpu_decode_isStuck))begin + _zz_11_ <= fetchStage_read_waysValues_0_data; + end + if((! io_cpu_decode_isStuck))begin + io_cpu_fetch_dataBypassValid_regNextWhen <= io_cpu_fetch_dataBypassValid; + end + end + + always @ (posedge clk) begin + if((! io_cpu_decode_isStuck))begin + io_cpu_fetch_dataBypass_regNextWhen <= io_cpu_fetch_dataBypass; + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + reg _zz_169_; + wire _zz_170_; + wire _zz_171_; + wire _zz_172_; + wire _zz_173_; + wire [31:0] _zz_174_; + wire _zz_175_; + wire _zz_176_; + wire _zz_177_; + wire _zz_178_; + wire _zz_179_; + wire _zz_180_; + wire _zz_181_; + wire _zz_182_; + wire _zz_183_; + wire _zz_184_; + reg [31:0] _zz_185_; + reg [31:0] _zz_186_; + reg [31:0] _zz_187_; + reg [3:0] _zz_188_; + reg [31:0] _zz_189_; + wire IBusCachedPlugin_cache_io_flush_cmd_ready; + wire IBusCachedPlugin_cache_io_flush_rsp; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuMiss; + wire IBusCachedPlugin_cache_io_cpu_decode_illegalAccess; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire _zz_190_; + wire _zz_191_; + wire _zz_192_; + wire _zz_193_; + wire _zz_194_; + wire _zz_195_; + wire _zz_196_; + wire _zz_197_; + wire [5:0] _zz_198_; + wire _zz_199_; + wire _zz_200_; + wire [1:0] _zz_201_; + wire [1:0] _zz_202_; + wire _zz_203_; + wire [3:0] _zz_204_; + wire [2:0] _zz_205_; + wire [31:0] _zz_206_; + wire [11:0] _zz_207_; + wire [31:0] _zz_208_; + wire [19:0] _zz_209_; + wire [11:0] _zz_210_; + wire [0:0] _zz_211_; + wire [0:0] _zz_212_; + wire [0:0] _zz_213_; + wire [0:0] _zz_214_; + wire [0:0] _zz_215_; + wire [0:0] _zz_216_; + wire [0:0] _zz_217_; + wire [0:0] _zz_218_; + wire [2:0] _zz_219_; + wire [4:0] _zz_220_; + wire [11:0] _zz_221_; + wire [11:0] _zz_222_; + wire [31:0] _zz_223_; + wire [31:0] _zz_224_; + wire [31:0] _zz_225_; + wire [31:0] _zz_226_; + wire [1:0] _zz_227_; + wire [31:0] _zz_228_; + wire [1:0] _zz_229_; + wire [1:0] _zz_230_; + wire [31:0] _zz_231_; + wire [32:0] _zz_232_; + wire [11:0] _zz_233_; + wire [19:0] _zz_234_; + wire [11:0] _zz_235_; + wire [31:0] _zz_236_; + wire [31:0] _zz_237_; + wire [31:0] _zz_238_; + wire [11:0] _zz_239_; + wire [19:0] _zz_240_; + wire [11:0] _zz_241_; + wire [2:0] _zz_242_; + wire [2:0] _zz_243_; + wire [2:0] _zz_244_; + wire [3:0] _zz_245_; + wire [0:0] _zz_246_; + wire [0:0] _zz_247_; + wire [0:0] _zz_248_; + wire [0:0] _zz_249_; + wire [30:0] _zz_250_; + wire [30:0] _zz_251_; + wire [30:0] _zz_252_; + wire [30:0] _zz_253_; + wire [0:0] _zz_254_; + wire [0:0] _zz_255_; + wire [0:0] _zz_256_; + wire [0:0] _zz_257_; + wire [0:0] _zz_258_; + wire [0:0] _zz_259_; + wire [26:0] _zz_260_; + wire [6:0] _zz_261_; + wire [1:0] _zz_262_; + wire [0:0] _zz_263_; + wire [7:0] _zz_264_; + wire _zz_265_; + wire [0:0] _zz_266_; + wire [0:0] _zz_267_; + wire [31:0] _zz_268_; + wire [31:0] _zz_269_; + wire [31:0] _zz_270_; + wire [31:0] _zz_271_; + wire [0:0] _zz_272_; + wire [0:0] _zz_273_; + wire [2:0] _zz_274_; + wire [2:0] _zz_275_; + wire _zz_276_; + wire [0:0] _zz_277_; + wire [19:0] _zz_278_; + wire [31:0] _zz_279_; + wire _zz_280_; + wire _zz_281_; + wire [0:0] _zz_282_; + wire [3:0] _zz_283_; + wire _zz_284_; + wire [2:0] _zz_285_; + wire [2:0] _zz_286_; + wire _zz_287_; + wire [0:0] _zz_288_; + wire [16:0] _zz_289_; + wire [31:0] _zz_290_; + wire [31:0] _zz_291_; + wire [31:0] _zz_292_; + wire [31:0] _zz_293_; + wire _zz_294_; + wire [0:0] _zz_295_; + wire [1:0] _zz_296_; + wire [31:0] _zz_297_; + wire _zz_298_; + wire [0:0] _zz_299_; + wire [0:0] _zz_300_; + wire [0:0] _zz_301_; + wire [0:0] _zz_302_; + wire [0:0] _zz_303_; + wire [0:0] _zz_304_; + wire _zz_305_; + wire [0:0] _zz_306_; + wire [14:0] _zz_307_; + wire [31:0] _zz_308_; + wire _zz_309_; + wire _zz_310_; + wire [31:0] _zz_311_; + wire [31:0] _zz_312_; + wire [31:0] _zz_313_; + wire [31:0] _zz_314_; + wire [31:0] _zz_315_; + wire [31:0] _zz_316_; + wire [31:0] _zz_317_; + wire [31:0] _zz_318_; + wire [31:0] _zz_319_; + wire [0:0] _zz_320_; + wire [0:0] _zz_321_; + wire [1:0] _zz_322_; + wire [1:0] _zz_323_; + wire _zz_324_; + wire [0:0] _zz_325_; + wire [12:0] _zz_326_; + wire [31:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire [31:0] _zz_330_; + wire [31:0] _zz_331_; + wire [0:0] _zz_332_; + wire [0:0] _zz_333_; + wire [0:0] _zz_334_; + wire [0:0] _zz_335_; + wire _zz_336_; + wire [0:0] _zz_337_; + wire [9:0] _zz_338_; + wire [31:0] _zz_339_; + wire _zz_340_; + wire _zz_341_; + wire [0:0] _zz_342_; + wire [0:0] _zz_343_; + wire [3:0] _zz_344_; + wire [3:0] _zz_345_; + wire _zz_346_; + wire [0:0] _zz_347_; + wire [5:0] _zz_348_; + wire [31:0] _zz_349_; + wire [31:0] _zz_350_; + wire [31:0] _zz_351_; + wire [31:0] _zz_352_; + wire _zz_353_; + wire [0:0] _zz_354_; + wire [0:0] _zz_355_; + wire _zz_356_; + wire [0:0] _zz_357_; + wire [0:0] _zz_358_; + wire [2:0] _zz_359_; + wire [2:0] _zz_360_; + wire _zz_361_; + wire [0:0] _zz_362_; + wire [2:0] _zz_363_; + wire [31:0] _zz_364_; + wire [31:0] _zz_365_; + wire [31:0] _zz_366_; + wire [31:0] _zz_367_; + wire [31:0] _zz_368_; + wire [31:0] _zz_369_; + wire [31:0] _zz_370_; + wire [31:0] _zz_371_; + wire _zz_372_; + wire [0:0] _zz_373_; + wire [0:0] _zz_374_; + wire _zz_375_; + wire [1:0] _zz_376_; + wire [1:0] _zz_377_; + wire _zz_378_; + wire [0:0] _zz_379_; + wire [0:0] _zz_380_; + wire [31:0] _zz_381_; + wire [31:0] _zz_382_; + wire [31:0] _zz_383_; + wire [31:0] _zz_384_; + wire [31:0] _zz_385_; + wire [31:0] _zz_386_; + wire [31:0] _zz_387_; + wire [31:0] _zz_388_; + wire _zz_389_; + wire _zz_390_; + wire _zz_391_; + wire _zz_392_; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire decode_SRC_LESS_UNSIGNED; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_1_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_2_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_3_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_4_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_5_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_6_; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_CSR_WRITE_OPCODE; + wire execute_REGFILE_WRITE_VALID; + wire decode_DO_EBREAK; + wire decode_IS_CSR; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_7_; + wire `AluCtrlEnum_defaultEncoding_type _zz_8_; + wire `AluCtrlEnum_defaultEncoding_type _zz_9_; + wire decode_CSR_READ_OPCODE; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_10_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_11_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_12_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_13_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_14_; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_15_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_16_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_17_; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_18_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_19_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_20_; + wire decode_SRC_USE_SUB_LESS; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_21_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire _zz_22_; + wire _zz_23_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_24_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_25_; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + wire _zz_26_; + wire [31:0] execute_RS1; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_27_; + wire _zz_28_; + wire _zz_29_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_30_; + wire _zz_31_; + wire [31:0] _zz_32_; + wire [31:0] _zz_33_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_34_; + wire [31:0] _zz_35_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_36_; + wire [31:0] _zz_37_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_38_; + wire [31:0] _zz_39_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_40_; + reg _zz_41_; + wire [31:0] _zz_42_; + wire [31:0] _zz_43_; + reg decode_REGFILE_WRITE_VALID; + wire _zz_44_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_45_; + wire _zz_46_; + wire _zz_47_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_48_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_49_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_50_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_51_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_52_; + wire `AluCtrlEnum_defaultEncoding_type _zz_53_; + wire _zz_54_; + wire _zz_55_; + wire _zz_56_; + wire _zz_57_; + reg [31:0] _zz_58_; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire [31:0] execute_MEMORY_READ_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] _zz_59_; + wire [1:0] _zz_60_; + wire [31:0] execute_RS2; + wire [31:0] execute_SRC_ADD; + wire [31:0] execute_INSTRUCTION; + wire execute_ALIGNEMENT_FAULT; + wire execute_MEMORY_ENABLE; + wire _zz_61_; + wire execute_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_62_; + reg [31:0] _zz_63_; + wire [31:0] _zz_64_; + wire [31:0] _zz_65_; + wire [31:0] _zz_66_; + wire [31:0] decode_PC /* verilator public */ ; + reg [31:0] decode_INSTRUCTION /* verilator public */ ; + reg decode_arbitration_haltItself /* verilator public */ ; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll /* verilator public */ ; + wire decode_arbitration_redoIt; + reg decode_arbitration_isValid /* verilator public */ ; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + wire execute_arbitration_redoIt; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg _zz_67_; + reg _zz_68_; + reg _zz_69_; + wire _zz_70_; + wire [31:0] _zz_71_; + wire _zz_72_; + wire _zz_73_; + wire [31:0] _zz_74_; + wire [31:0] _zz_75_; + reg _zz_76_; + wire _zz_77_; + reg _zz_78_; + reg _zz_79_; + reg [31:0] _zz_80_; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg _zz_81_; + reg [3:0] _zz_82_; + reg _zz_83_; + reg _zz_84_; + reg _zz_85_; + reg _zz_86_; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_87_; + wire [3:0] _zz_88_; + wire _zz_89_; + wire _zz_90_; + wire _zz_91_; + wire IBusCachedPlugin_fetchPc_preOutput_valid; + wire IBusCachedPlugin_fetchPc_preOutput_ready; + wire [31:0] IBusCachedPlugin_fetchPc_preOutput_payload; + wire _zz_92_; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_inc; + reg IBusCachedPlugin_fetchPc_propagatePc; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + reg IBusCachedPlugin_fetchPc_samplePcNext; + reg _zz_93_; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_0_inputSample; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_inputSample; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + reg IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_inputSample; + wire _zz_94_; + wire _zz_95_; + wire _zz_96_; + wire _zz_97_; + wire _zz_98_; + reg _zz_99_; + wire _zz_100_; + reg _zz_101_; + reg [31:0] _zz_102_; + wire IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_decodeInput_valid; + wire IBusCachedPlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + reg IBusCachedPlugin_injector_decodeRemoved; + wire _zz_103_; + reg [18:0] _zz_104_; + wire _zz_105_; + reg [10:0] _zz_106_; + wire _zz_107_; + reg [18:0] _zz_108_; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + reg IBusCachedPlugin_rsp_redoFetch; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + reg execute_DBusSimplePlugin_cmdSent; + reg [31:0] _zz_109_; + reg [3:0] _zz_110_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] execute_DBusSimplePlugin_rspShifted; + wire _zz_111_; + reg [31:0] _zz_112_; + wire _zz_113_; + reg [31:0] _zz_114_; + reg [31:0] execute_DBusSimplePlugin_rspFormated; + wire [25:0] _zz_115_; + wire _zz_116_; + wire _zz_117_; + wire _zz_118_; + wire _zz_119_; + wire _zz_120_; + wire `AluCtrlEnum_defaultEncoding_type _zz_121_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_122_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_123_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_124_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_125_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_126_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_127_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_128_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire execute_RegFilePlugin_regFileWrite_valid /* verilator public */ ; + wire [4:0] execute_RegFilePlugin_regFileWrite_payload_address /* verilator public */ ; + wire [31:0] execute_RegFilePlugin_regFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_129_; + reg [31:0] _zz_130_; + wire _zz_131_; + reg [19:0] _zz_132_; + wire _zz_133_; + reg [19:0] _zz_134_; + reg [31:0] _zz_135_; + wire [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + reg [31:0] execute_LightShifterPlugin_shiftReg; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_136_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_137_; + reg _zz_138_; + reg _zz_139_; + wire _zz_140_; + reg [19:0] _zz_141_; + wire _zz_142_; + reg [10:0] _zz_143_; + wire _zz_144_; + reg [18:0] _zz_145_; + reg _zz_146_; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_147_; + reg [19:0] _zz_148_; + wire _zz_149_; + reg [10:0] _zz_150_; + wire _zz_151_; + reg [18:0] _zz_152_; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire [31:0] CsrPlugin_medeleg; + wire [31:0] CsrPlugin_mideleg; + wire _zz_153_; + wire _zz_154_; + wire _zz_155_; + wire CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + wire CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire execute_exception_agregat_valid; + wire [3:0] execute_exception_agregat_payload_code; + wire [31:0] execute_exception_agregat_payload_badAddr; + wire [2:0] _zz_156_; + wire [2:0] _zz_157_; + wire _zz_158_; + wire _zz_159_; + wire [1:0] _zz_160_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + wire [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_161_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_162_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipActive; + reg DebugPlugin_isPipActive_regNext; + wire DebugPlugin_isPipBusy; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_163_; + reg DebugPlugin_resetIt_regNext; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg decode_to_execute_CSR_READ_OPCODE; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg decode_to_execute_FLUSH_ALL; + reg decode_to_execute_MEMORY_ENABLE; + reg [31:0] decode_to_execute_INSTRUCTION; + reg decode_to_execute_IS_CSR; + reg decode_to_execute_DO_EBREAK; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg [31:0] decode_to_execute_PC; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg [2:0] _zz_164_; + reg [31:0] _zz_165_; + reg [2:0] _zz_166_; + reg _zz_167_; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_168_; + `ifndef SYNTHESIS + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_1__string; + reg [47:0] _zz_2__string; + reg [47:0] _zz_3__string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_4__string; + reg [39:0] _zz_5__string; + reg [39:0] _zz_6__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_7__string; + reg [63:0] _zz_8__string; + reg [63:0] _zz_9__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_10__string; + reg [71:0] _zz_11__string; + reg [71:0] _zz_12__string; + reg [31:0] _zz_13__string; + reg [31:0] _zz_14__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_15__string; + reg [95:0] _zz_16__string; + reg [95:0] _zz_17__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_18__string; + reg [23:0] _zz_19__string; + reg [23:0] _zz_20__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_24__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_27__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_30__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_34__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_36__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_38__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_40__string; + reg [39:0] _zz_45__string; + reg [31:0] _zz_48__string; + reg [95:0] _zz_49__string; + reg [47:0] _zz_50__string; + reg [71:0] _zz_51__string; + reg [23:0] _zz_52__string; + reg [63:0] _zz_53__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_62__string; + reg [63:0] _zz_121__string; + reg [23:0] _zz_122__string; + reg [71:0] _zz_123__string; + reg [47:0] _zz_124__string; + reg [95:0] _zz_125__string; + reg [31:0] _zz_126__string; + reg [39:0] _zz_127__string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_190_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_191_ = (! execute_arbitration_isStuckByOthers); + assign _zz_192_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_193_ = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_194_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_195_ = (1'b0 == 1'b0); + assign _zz_196_ = (DebugPlugin_stepIt && _zz_69_); + assign _zz_197_ = (IBusCachedPlugin_fetchPc_preOutput_valid && IBusCachedPlugin_fetchPc_preOutput_ready); + assign _zz_198_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_199_ = (iBus_cmd_valid || (_zz_166_ != (3'b000))); + assign _zz_200_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_201_ = execute_INSTRUCTION[13 : 12]; + assign _zz_202_ = execute_INSTRUCTION[29 : 28]; + assign _zz_203_ = execute_INSTRUCTION[13]; + assign _zz_204_ = (_zz_87_ - (4'b0001)); + assign _zz_205_ = {IBusCachedPlugin_fetchPc_inc,(2'b00)}; + assign _zz_206_ = {29'd0, _zz_205_}; + assign _zz_207_ = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_208_ = {{_zz_104_,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz_209_ = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz_210_ = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_211_ = _zz_115_[0 : 0]; + assign _zz_212_ = _zz_115_[1 : 1]; + assign _zz_213_ = _zz_115_[2 : 2]; + assign _zz_214_ = _zz_115_[3 : 3]; + assign _zz_215_ = _zz_115_[19 : 19]; + assign _zz_216_ = _zz_115_[21 : 21]; + assign _zz_217_ = _zz_115_[25 : 25]; + assign _zz_218_ = execute_SRC_LESS; + assign _zz_219_ = (3'b100); + assign _zz_220_ = execute_INSTRUCTION[19 : 15]; + assign _zz_221_ = execute_INSTRUCTION[31 : 20]; + assign _zz_222_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_223_ = ($signed(_zz_224_) + $signed(_zz_228_)); + assign _zz_224_ = ($signed(_zz_225_) + $signed(_zz_226_)); + assign _zz_225_ = execute_SRC1; + assign _zz_226_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_227_ = (execute_SRC_USE_SUB_LESS ? _zz_229_ : _zz_230_); + assign _zz_228_ = {{30{_zz_227_[1]}}, _zz_227_}; + assign _zz_229_ = (2'b01); + assign _zz_230_ = (2'b00); + assign _zz_231_ = (_zz_232_ >>> 1); + assign _zz_232_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_233_ = execute_INSTRUCTION[31 : 20]; + assign _zz_234_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_235_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_236_ = {_zz_141_,execute_INSTRUCTION[31 : 20]}; + assign _zz_237_ = {{_zz_143_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz_238_ = {{_zz_145_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz_239_ = execute_INSTRUCTION[31 : 20]; + assign _zz_240_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_241_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_242_ = (3'b100); + assign _zz_243_ = (_zz_156_ - (3'b001)); + assign _zz_244_ = (execute_INSTRUCTION[5] ? (3'b110) : (3'b100)); + assign _zz_245_ = {1'd0, _zz_244_}; + assign _zz_246_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_247_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_248_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_249_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_250_ = (decode_PC >>> 1); + assign _zz_251_ = (decode_PC >>> 1); + assign _zz_252_ = (decode_PC >>> 1); + assign _zz_253_ = (decode_PC >>> 1); + assign _zz_254_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_255_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_256_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_257_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_258_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_259_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_260_ = (iBus_cmd_payload_address >>> 5); + assign _zz_261_ = ({3'd0,_zz_168_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_262_ = {_zz_91_,_zz_90_}; + assign _zz_263_ = decode_INSTRUCTION[31]; + assign _zz_264_ = decode_INSTRUCTION[19 : 12]; + assign _zz_265_ = decode_INSTRUCTION[20]; + assign _zz_266_ = decode_INSTRUCTION[31]; + assign _zz_267_ = decode_INSTRUCTION[7]; + assign _zz_268_ = (decode_INSTRUCTION & (32'b00000000000000000001000001010000)); + assign _zz_269_ = (32'b00000000000000000001000001010000); + assign _zz_270_ = (decode_INSTRUCTION & (32'b00000000000000000010000001010000)); + assign _zz_271_ = (32'b00000000000000000010000001010000); + assign _zz_272_ = ((decode_INSTRUCTION & _zz_279_) == (32'b00000000000000000001000000000000)); + assign _zz_273_ = _zz_117_; + assign _zz_274_ = {_zz_117_,{_zz_280_,_zz_281_}}; + assign _zz_275_ = (3'b000); + assign _zz_276_ = ({_zz_119_,{_zz_282_,_zz_283_}} != (6'b000000)); + assign _zz_277_ = (_zz_284_ != (1'b0)); + assign _zz_278_ = {(_zz_285_ != _zz_286_),{_zz_287_,{_zz_288_,_zz_289_}}}; + assign _zz_279_ = (32'b00000000000000000001000000000000); + assign _zz_280_ = ((decode_INSTRUCTION & _zz_290_) == (32'b00000000000000000001000000000000)); + assign _zz_281_ = ((decode_INSTRUCTION & _zz_291_) == (32'b00000000000000000010000000000000)); + assign _zz_282_ = (_zz_292_ == _zz_293_); + assign _zz_283_ = {_zz_294_,{_zz_295_,_zz_296_}}; + assign _zz_284_ = ((decode_INSTRUCTION & _zz_297_) == (32'b00000000000000000000000000010000)); + assign _zz_285_ = {_zz_298_,{_zz_299_,_zz_300_}}; + assign _zz_286_ = (3'b000); + assign _zz_287_ = ({_zz_301_,_zz_302_} != (2'b00)); + assign _zz_288_ = (_zz_303_ != _zz_304_); + assign _zz_289_ = {_zz_305_,{_zz_306_,_zz_307_}}; + assign _zz_290_ = (32'b00000000000000000011000000000000); + assign _zz_291_ = (32'b00000000000000000011000000000000); + assign _zz_292_ = (decode_INSTRUCTION & (32'b00000000000000000001000000010000)); + assign _zz_293_ = (32'b00000000000000000001000000010000); + assign _zz_294_ = ((decode_INSTRUCTION & _zz_308_) == (32'b00000000000000000010000000010000)); + assign _zz_295_ = _zz_120_; + assign _zz_296_ = {_zz_309_,_zz_310_}; + assign _zz_297_ = (32'b00000000000000000000000000010000); + assign _zz_298_ = ((decode_INSTRUCTION & _zz_311_) == (32'b00000000000000000000000001000000)); + assign _zz_299_ = (_zz_312_ == _zz_313_); + assign _zz_300_ = (_zz_314_ == _zz_315_); + assign _zz_301_ = _zz_119_; + assign _zz_302_ = (_zz_316_ == _zz_317_); + assign _zz_303_ = (_zz_318_ == _zz_319_); + assign _zz_304_ = (1'b0); + assign _zz_305_ = ({_zz_320_,_zz_321_} != (2'b00)); + assign _zz_306_ = (_zz_322_ != _zz_323_); + assign _zz_307_ = {_zz_324_,{_zz_325_,_zz_326_}}; + assign _zz_308_ = (32'b00000000000000000010000000010000); + assign _zz_309_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000101000)) == (32'b00000000000000000000000000000000)); + assign _zz_310_ = ((decode_INSTRUCTION & (32'b00000000000000000101000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_311_ = (32'b00000000000000000000000001000100); + assign _zz_312_ = (decode_INSTRUCTION & (32'b01000000000000000000000000110000)); + assign _zz_313_ = (32'b01000000000000000000000000110000); + assign _zz_314_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010100)); + assign _zz_315_ = (32'b00000000000000000010000000010000); + assign _zz_316_ = (decode_INSTRUCTION & (32'b00000000000000000101000000010100)); + assign _zz_317_ = (32'b00000000000000000000000000000100); + assign _zz_318_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_319_ = (32'b00000000000000000000000001000000); + assign _zz_320_ = ((decode_INSTRUCTION & _zz_327_) == (32'b00000000000000000000000000000100)); + assign _zz_321_ = _zz_118_; + assign _zz_322_ = {(_zz_328_ == _zz_329_),_zz_118_}; + assign _zz_323_ = (2'b00); + assign _zz_324_ = ((_zz_330_ == _zz_331_) != (1'b0)); + assign _zz_325_ = ({_zz_332_,_zz_333_} != (2'b00)); + assign _zz_326_ = {(_zz_334_ != _zz_335_),{_zz_336_,{_zz_337_,_zz_338_}}}; + assign _zz_327_ = (32'b00000000000000000000000000010100); + assign _zz_328_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_329_ = (32'b00000000000000000000000000000100); + assign _zz_330_ = (decode_INSTRUCTION & (32'b00010000000000000011000001010000)); + assign _zz_331_ = (32'b00000000000000000000000001010000); + assign _zz_332_ = _zz_116_; + assign _zz_333_ = ((decode_INSTRUCTION & (32'b00010000010000000011000001010000)) == (32'b00010000000000000000000001010000)); + assign _zz_334_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000000)) == (32'b00000000000000000000000000000000)); + assign _zz_335_ = (1'b0); + assign _zz_336_ = (((decode_INSTRUCTION & _zz_339_) == (32'b00000000000000000101000000010000)) != (1'b0)); + assign _zz_337_ = ({_zz_340_,_zz_341_} != (2'b00)); + assign _zz_338_ = {({_zz_342_,_zz_343_} != (2'b00)),{(_zz_344_ != _zz_345_),{_zz_346_,{_zz_347_,_zz_348_}}}}; + assign _zz_339_ = (32'b00000000000000000111000001010100); + assign _zz_340_ = ((decode_INSTRUCTION & (32'b01000000000000000011000001010100)) == (32'b01000000000000000001000000010000)); + assign _zz_341_ = ((decode_INSTRUCTION & (32'b00000000000000000111000001010100)) == (32'b00000000000000000001000000010000)); + assign _zz_342_ = ((decode_INSTRUCTION & _zz_349_) == (32'b00000000000000000000000000100000)); + assign _zz_343_ = ((decode_INSTRUCTION & _zz_350_) == (32'b00000000000000000000000000100000)); + assign _zz_344_ = {(_zz_351_ == _zz_352_),{_zz_353_,{_zz_354_,_zz_355_}}}; + assign _zz_345_ = (4'b0000); + assign _zz_346_ = ({_zz_117_,_zz_356_} != (2'b00)); + assign _zz_347_ = ({_zz_357_,_zz_358_} != (2'b00)); + assign _zz_348_ = {(_zz_359_ != _zz_360_),{_zz_361_,{_zz_362_,_zz_363_}}}; + assign _zz_349_ = (32'b00000000000000000000000000110100); + assign _zz_350_ = (32'b00000000000000000000000001100100); + assign _zz_351_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_352_ = (32'b00000000000000000000000000000000); + assign _zz_353_ = ((decode_INSTRUCTION & _zz_364_) == (32'b00000000000000000000000000000000)); + assign _zz_354_ = (_zz_365_ == _zz_366_); + assign _zz_355_ = (_zz_367_ == _zz_368_); + assign _zz_356_ = ((decode_INSTRUCTION & _zz_369_) == (32'b00000000000000000000000000100000)); + assign _zz_357_ = _zz_117_; + assign _zz_358_ = (_zz_370_ == _zz_371_); + assign _zz_359_ = {_zz_372_,{_zz_373_,_zz_374_}}; + assign _zz_360_ = (3'b000); + assign _zz_361_ = (_zz_375_ != (1'b0)); + assign _zz_362_ = (_zz_376_ != _zz_377_); + assign _zz_363_ = {_zz_378_,{_zz_379_,_zz_380_}}; + assign _zz_364_ = (32'b00000000000000000000000000011000); + assign _zz_365_ = (decode_INSTRUCTION & (32'b00000000000000000110000000000100)); + assign _zz_366_ = (32'b00000000000000000010000000000000); + assign _zz_367_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000100)); + assign _zz_368_ = (32'b00000000000000000001000000000000); + assign _zz_369_ = (32'b00000000000000000000000001110000); + assign _zz_370_ = (decode_INSTRUCTION & (32'b00000000000000000000000000100000)); + assign _zz_371_ = (32'b00000000000000000000000000000000); + assign _zz_372_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100100)); + assign _zz_373_ = ((decode_INSTRUCTION & _zz_381_) == (32'b00000000000000000100000000010000)); + assign _zz_374_ = ((decode_INSTRUCTION & _zz_382_) == (32'b00000000000000000001000000010000)); + assign _zz_375_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000010000000010000)); + assign _zz_376_ = {(_zz_383_ == _zz_384_),(_zz_385_ == _zz_386_)}; + assign _zz_377_ = (2'b00); + assign _zz_378_ = ((_zz_387_ == _zz_388_) != (1'b0)); + assign _zz_379_ = (_zz_116_ != (1'b0)); + assign _zz_380_ = (_zz_389_ != (1'b0)); + assign _zz_381_ = (32'b00000000000000000100000000010100); + assign _zz_382_ = (32'b00000000000000000011000000010100); + assign _zz_383_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010000)); + assign _zz_384_ = (32'b00000000000000000010000000000000); + assign _zz_385_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000000)); + assign _zz_386_ = (32'b00000000000000000001000000000000); + assign _zz_387_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_388_ = (32'b00000000000000000000000000000000); + assign _zz_389_ = ((decode_INSTRUCTION & (32'b00000000000000000001000001001000)) == (32'b00000000000000000000000000001000)); + assign _zz_390_ = execute_INSTRUCTION[31]; + assign _zz_391_ = execute_INSTRUCTION[31]; + assign _zz_392_ = execute_INSTRUCTION[7]; + always @ (posedge clk) begin + if(_zz_41_) begin + RegFilePlugin_regFile[execute_RegFilePlugin_regFileWrite_payload_address] <= execute_RegFilePlugin_regFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_128_) begin + _zz_185_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_128_) begin + _zz_186_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush_cmd_valid(_zz_169_), + .io_flush_cmd_ready(IBusCachedPlugin_cache_io_flush_cmd_ready), + .io_flush_rsp(IBusCachedPlugin_cache_io_flush_rsp), + .io_cpu_prefetch_isValid(_zz_170_), + .io_cpu_prefetch_haltIt(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt), + .io_cpu_prefetch_pc(IBusCachedPlugin_iBusRsp_stages_0_input_payload), + .io_cpu_fetch_isValid(_zz_171_), + .io_cpu_fetch_isStuck(_zz_172_), + .io_cpu_fetch_isRemoved(_zz_173_), + .io_cpu_fetch_pc(IBusCachedPlugin_iBusRsp_stages_1_input_payload), + .io_cpu_fetch_data(IBusCachedPlugin_cache_io_cpu_fetch_data), + .io_cpu_fetch_dataBypassValid(IBusCachedPlugin_s1_tightlyCoupledHit), + .io_cpu_fetch_dataBypass(_zz_174_), + .io_cpu_fetch_mmuBus_cmd_isValid(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid), + .io_cpu_fetch_mmuBus_cmd_virtualAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_cmd_bypassTranslation(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation), + .io_cpu_fetch_mmuBus_rsp_physicalAddress(_zz_75_), + .io_cpu_fetch_mmuBus_rsp_isIoAccess(_zz_175_), + .io_cpu_fetch_mmuBus_rsp_allowRead(_zz_176_), + .io_cpu_fetch_mmuBus_rsp_allowWrite(_zz_177_), + .io_cpu_fetch_mmuBus_rsp_allowExecute(_zz_178_), + .io_cpu_fetch_mmuBus_rsp_allowUser(_zz_179_), + .io_cpu_fetch_mmuBus_rsp_miss(_zz_180_), + .io_cpu_fetch_mmuBus_rsp_hit(_zz_181_), + .io_cpu_fetch_mmuBus_end(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end), + .io_cpu_fetch_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_cpu_decode_isValid(_zz_182_), + .io_cpu_decode_isStuck(_zz_183_), + .io_cpu_decode_pc(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload), + .io_cpu_decode_physicalAddress(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_cpu_decode_data(IBusCachedPlugin_cache_io_cpu_decode_data), + .io_cpu_decode_cacheMiss(IBusCachedPlugin_cache_io_cpu_decode_cacheMiss), + .io_cpu_decode_error(IBusCachedPlugin_cache_io_cpu_decode_error), + .io_cpu_decode_mmuMiss(IBusCachedPlugin_cache_io_cpu_decode_mmuMiss), + .io_cpu_decode_illegalAccess(IBusCachedPlugin_cache_io_cpu_decode_illegalAccess), + .io_cpu_decode_isUser(_zz_184_), + .io_cpu_fill_valid(IBusCachedPlugin_rsp_redoFetch), + .io_cpu_fill_payload(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_mem_cmd_valid(IBusCachedPlugin_cache_io_mem_cmd_valid), + .io_mem_cmd_ready(iBus_cmd_ready), + .io_mem_cmd_payload_address(IBusCachedPlugin_cache_io_mem_cmd_payload_address), + .io_mem_cmd_payload_size(IBusCachedPlugin_cache_io_mem_cmd_payload_size), + .io_mem_rsp_valid(iBus_rsp_valid), + .io_mem_rsp_payload_data(iBus_rsp_payload_data), + .io_mem_rsp_payload_error(iBus_rsp_payload_error), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_262_) + 2'b00 : begin + _zz_187_ = execute_BRANCH_CALC; + end + 2'b01 : begin + _zz_187_ = _zz_80_; + end + 2'b10 : begin + _zz_187_ = _zz_74_; + end + default : begin + _zz_187_ = _zz_71_; + end + endcase + end + + always @(*) begin + case(_zz_160_) + 2'b00 : begin + _zz_188_ = _zz_245_; + _zz_189_ = execute_REGFILE_WRITE_DATA; + end + 2'b01 : begin + _zz_188_ = (4'b0000); + _zz_189_ = execute_BRANCH_CALC; + end + default : begin + _zz_188_ = _zz_82_; + _zz_189_ = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_1_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_1__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_1__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_1__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_1__string = "EBREAK"; + default : _zz_1__string = "??????"; + endcase + end + always @(*) begin + case(_zz_2_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_2__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_2__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_2__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_2__string = "EBREAK"; + default : _zz_2__string = "??????"; + endcase + end + always @(*) begin + case(_zz_3_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_3__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_3__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_3__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_3__string = "EBREAK"; + default : _zz_3__string = "??????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : decode_ALU_BITWISE_CTRL_string = "SRC1 "; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_4_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_4__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_4__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_4__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_4__string = "SRC1 "; + default : _zz_4__string = "?????"; + endcase + end + always @(*) begin + case(_zz_5_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_5__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_5__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_5__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_5__string = "SRC1 "; + default : _zz_5__string = "?????"; + endcase + end + always @(*) begin + case(_zz_6_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_6__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_6__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_6__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_6__string = "SRC1 "; + default : _zz_6__string = "?????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_7_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_7__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_7__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_7__string = "BITWISE "; + default : _zz_7__string = "????????"; + endcase + end + always @(*) begin + case(_zz_8_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_8__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_8__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_8__string = "BITWISE "; + default : _zz_8__string = "????????"; + endcase + end + always @(*) begin + case(_zz_9_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_9__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_9__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_9__string = "BITWISE "; + default : _zz_9__string = "????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_10_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_10__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_10__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_10__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_10__string = "SRA_1 "; + default : _zz_10__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_11_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_11__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_11__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_11__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_11__string = "SRA_1 "; + default : _zz_11__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_12_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_12__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_12__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_12__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_12__string = "SRA_1 "; + default : _zz_12__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_13_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_13__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_13__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_13__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_13__string = "JALR"; + default : _zz_13__string = "????"; + endcase + end + always @(*) begin + case(_zz_14_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_14__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_14__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_14__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_14__string = "JALR"; + default : _zz_14__string = "????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_15_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_15__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_15__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_15__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_15__string = "URS1 "; + default : _zz_15__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_16_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_16__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_16__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_16__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_16__string = "URS1 "; + default : _zz_16__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_17__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_17__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_17__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_17__string = "URS1 "; + default : _zz_17__string = "????????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_18_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_18__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_18__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_18__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_18__string = "PC "; + default : _zz_18__string = "???"; + endcase + end + always @(*) begin + case(_zz_19_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_19__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_19__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_19__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_19__string = "PC "; + default : _zz_19__string = "???"; + endcase + end + always @(*) begin + case(_zz_20_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_20__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_20__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_20__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_20__string = "PC "; + default : _zz_20__string = "???"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_24_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_24__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_24__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_24__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_24__string = "EBREAK"; + default : _zz_24__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_27_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_27__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_27__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_27__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_27__string = "JALR"; + default : _zz_27__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_30_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_30__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_30__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_30__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_30__string = "SRA_1 "; + default : _zz_30__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_34_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_34__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_34__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_34__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_34__string = "PC "; + default : _zz_34__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_36_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_36__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_36__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_36__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_36__string = "URS1 "; + default : _zz_36__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_38_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_38__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_38__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_38__string = "BITWISE "; + default : _zz_38__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : execute_ALU_BITWISE_CTRL_string = "SRC1 "; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_40_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_40__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_40__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_40__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_40__string = "SRC1 "; + default : _zz_40__string = "?????"; + endcase + end + always @(*) begin + case(_zz_45_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_45__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_45__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_45__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_45__string = "SRC1 "; + default : _zz_45__string = "?????"; + endcase + end + always @(*) begin + case(_zz_48_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_48__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_48__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_48__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_48__string = "JALR"; + default : _zz_48__string = "????"; + endcase + end + always @(*) begin + case(_zz_49_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_49__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_49__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_49__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_49__string = "URS1 "; + default : _zz_49__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_50_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_50__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_50__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_50__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_50__string = "EBREAK"; + default : _zz_50__string = "??????"; + endcase + end + always @(*) begin + case(_zz_51_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_51__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_51__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_51__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_51__string = "SRA_1 "; + default : _zz_51__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_52_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_52__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_52__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_52__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_52__string = "PC "; + default : _zz_52__string = "???"; + endcase + end + always @(*) begin + case(_zz_53_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_53__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_53__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_53__string = "BITWISE "; + default : _zz_53__string = "????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_62_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_62__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_62__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_62__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_62__string = "JALR"; + default : _zz_62__string = "????"; + endcase + end + always @(*) begin + case(_zz_121_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_121__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_121__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_121__string = "BITWISE "; + default : _zz_121__string = "????????"; + endcase + end + always @(*) begin + case(_zz_122_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_122__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_122__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_122__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_122__string = "PC "; + default : _zz_122__string = "???"; + endcase + end + always @(*) begin + case(_zz_123_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_123__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_123__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_123__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_123__string = "SRA_1 "; + default : _zz_123__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_124_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_124__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_124__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_124__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_124__string = "EBREAK"; + default : _zz_124__string = "??????"; + endcase + end + always @(*) begin + case(_zz_125_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_125__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_125__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_125__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_125__string = "URS1 "; + default : _zz_125__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_126_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_126__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_126__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_126__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_126__string = "JALR"; + default : _zz_126__string = "????"; + endcase + end + always @(*) begin + case(_zz_127_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_127__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_127__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_127__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_127__string = "SRC1 "; + default : _zz_127__string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : decode_to_execute_ALU_BITWISE_CTRL_string = "SRC1 "; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + `endif + + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_64_; + assign decode_SRC_LESS_UNSIGNED = _zz_54_; + assign decode_ENV_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_ALU_BITWISE_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_PREDICTION_HAD_BRANCHED2 = _zz_29_; + assign decode_CSR_WRITE_OPCODE = _zz_23_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_DO_EBREAK = _zz_21_; + assign decode_IS_CSR = _zz_44_; + assign decode_MEMORY_ENABLE = _zz_55_; + assign decode_FLUSH_ALL = _zz_57_; + assign decode_ALU_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_CSR_READ_OPCODE = _zz_22_; + assign decode_SHIFT_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign _zz_13_ = _zz_14_; + assign decode_SRC1_CTRL = _zz_15_; + assign _zz_16_ = _zz_17_; + assign decode_SRC2_CTRL = _zz_18_; + assign _zz_19_ = _zz_20_; + assign decode_SRC_USE_SUB_LESS = _zz_47_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_56_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign execute_ENV_CTRL = _zz_24_; + assign execute_BRANCH_CALC = _zz_25_; + assign execute_BRANCH_DO = _zz_26_; + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = _zz_43_; + assign execute_BRANCH_COND_RESULT = _zz_28_; + assign execute_BRANCH_CTRL = _zz_27_; + assign execute_SHIFT_CTRL = _zz_30_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign execute_SRC2_CTRL = _zz_34_; + assign execute_SRC1_CTRL = _zz_36_; + assign execute_SRC_ADD_SUB = _zz_33_; + assign execute_SRC_LESS = _zz_31_; + assign execute_ALU_CTRL = _zz_38_; + assign execute_SRC2 = _zz_35_; + assign execute_SRC1 = _zz_37_; + assign execute_ALU_BITWISE_CTRL = _zz_40_; + always @ (*) begin + _zz_41_ = 1'b0; + if(execute_RegFilePlugin_regFileWrite_valid)begin + _zz_41_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_46_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + always @ (*) begin + _zz_58_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + _zz_169_ = 1'b0; + if((execute_arbitration_isValid && execute_FLUSH_ALL))begin + _zz_169_ = 1'b1; + if((! IBusCachedPlugin_cache_io_flush_cmd_ready))begin + execute_arbitration_haltItself = 1'b1; + end + end + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_ALIGNEMENT_FAULT)) && (! execute_DBusSimplePlugin_cmdSent)))begin + execute_arbitration_haltItself = 1'b1; + end + if((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_INSTRUCTION[5])) && (! dBus_rsp_ready)))begin + execute_arbitration_haltItself = 1'b1; + end + if((execute_arbitration_isValid && execute_MEMORY_ENABLE))begin + _zz_58_ = execute_DBusSimplePlugin_rspFormated; + end + if(_zz_190_)begin + _zz_58_ = _zz_136_; + if(_zz_191_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_58_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_MEMORY_ADDRESS_LOW = _zz_60_; + assign execute_MEMORY_READ_DATA = _zz_59_; + assign execute_REGFILE_WRITE_DATA = _zz_39_; + assign execute_RS2 = _zz_42_; + assign execute_SRC_ADD = _zz_32_; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_ALIGNEMENT_FAULT = _zz_61_; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_FLUSH_ALL = decode_to_execute_FLUSH_ALL; + always @ (*) begin + IBusCachedPlugin_rsp_issueDetected = 1'b0; + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(((_zz_182_ && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! 1'b0)))begin + IBusCachedPlugin_rsp_issueDetected = 1'b1; + IBusCachedPlugin_rsp_redoFetch = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + assign decode_BRANCH_CTRL = _zz_62_; + always @ (*) begin + _zz_63_ = decode_FORMAL_PC_NEXT; + if(_zz_70_)begin + _zz_63_ = _zz_71_; + end + if(_zz_73_)begin + _zz_63_ = _zz_74_; + end + end + + assign decode_PC = _zz_66_; + always @ (*) begin + decode_INSTRUCTION = _zz_65_; + if((_zz_164_ != (3'b000)))begin + decode_INSTRUCTION = _zz_165_; + end + end + + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusCachedPlugin_iBusRsp_decodeInput_valid && (! IBusCachedPlugin_injector_decodeRemoved)); + _zz_86_ = 1'b0; + case(_zz_164_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + _zz_86_ = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if((CsrPlugin_interrupt && decode_arbitration_isValid))begin + decode_arbitration_haltByOther = 1'b1; + end + if(1'b0)begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_removeIt = 1'b0; + _zz_79_ = 1'b0; + _zz_80_ = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(_zz_77_)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(execute_exception_agregat_valid)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(_zz_192_)begin + _zz_79_ = 1'b1; + _zz_80_ = {CsrPlugin_mtvec_base,(2'b00)}; + decode_arbitration_flushAll = 1'b1; + end + if(_zz_193_)begin + _zz_80_ = CsrPlugin_mepc; + _zz_79_ = 1'b1; + decode_arbitration_flushAll = 1'b1; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_redoIt = 1'b0; + always @ (*) begin + execute_arbitration_haltByOther = 1'b0; + _zz_67_ = 1'b0; + _zz_68_ = 1'b0; + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode} != (2'b00)))begin + _zz_67_ = 1'b1; + end + if(_zz_194_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_195_)begin + _zz_68_ = 1'b1; + _zz_67_ = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + _zz_67_ = 1'b1; + end + if(_zz_196_)begin + _zz_67_ = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(_zz_194_)begin + if(_zz_195_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + assign execute_arbitration_redoIt = 1'b0; + always @ (*) begin + _zz_69_ = 1'b0; + if((IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid))begin + _zz_69_ = 1'b1; + end + end + + always @ (*) begin + _zz_83_ = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + _zz_83_ = 1'b0; + end + end + + always @ (*) begin + _zz_84_ = 1'b1; + if(DebugPlugin_haltIt)begin + _zz_84_ = 1'b0; + end + end + + assign IBusCachedPlugin_jump_pcLoad_valid = ({_zz_79_,{_zz_77_,{_zz_73_,_zz_70_}}} != (4'b0000)); + assign _zz_87_ = {_zz_70_,{_zz_73_,{_zz_79_,_zz_77_}}}; + assign _zz_88_ = (_zz_87_ & (~ _zz_204_)); + assign _zz_89_ = _zz_88_[3]; + assign _zz_90_ = (_zz_88_[1] || _zz_89_); + assign _zz_91_ = (_zz_88_[2] || _zz_89_); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_187_; + assign _zz_92_ = (! _zz_67_); + assign IBusCachedPlugin_fetchPc_output_valid = (IBusCachedPlugin_fetchPc_preOutput_valid && _zz_92_); + assign IBusCachedPlugin_fetchPc_preOutput_ready = (IBusCachedPlugin_fetchPc_output_ready && _zz_92_); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b0; + if((IBusCachedPlugin_iBusRsp_stages_1_input_valid && IBusCachedPlugin_iBusRsp_stages_1_input_ready))begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_206_); + IBusCachedPlugin_fetchPc_samplePcNext = 1'b0; + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + if(_zz_197_)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusCachedPlugin_fetchPc_preOutput_valid = _zz_93_; + assign IBusCachedPlugin_fetchPc_preOutput_payload = IBusCachedPlugin_fetchPc_pc; + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt)begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_94_ = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_94_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_94_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(((IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid && (! 1'b1)) && (! 1'b0)))begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_95_ = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_95_); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_95_); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b0; + if((IBusCachedPlugin_rsp_issueDetected || IBusCachedPlugin_rsp_iBusRspOutputHalt))begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + end + + assign _zz_96_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready && _zz_96_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && _zz_96_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_97_; + assign _zz_97_ = ((1'b0 && (! _zz_98_)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_98_ = _zz_99_; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_98_; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! _zz_100_)) || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_100_ = _zz_101_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid = _zz_100_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload = _zz_102_; + assign IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + assign IBusCachedPlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_66_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_65_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_64_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign _zz_103_ = _zz_207_[11]; + always @ (*) begin + _zz_104_[18] = _zz_103_; + _zz_104_[17] = _zz_103_; + _zz_104_[16] = _zz_103_; + _zz_104_[15] = _zz_103_; + _zz_104_[14] = _zz_103_; + _zz_104_[13] = _zz_103_; + _zz_104_[12] = _zz_103_; + _zz_104_[11] = _zz_103_; + _zz_104_[10] = _zz_103_; + _zz_104_[9] = _zz_103_; + _zz_104_[8] = _zz_103_; + _zz_104_[7] = _zz_103_; + _zz_104_[6] = _zz_103_; + _zz_104_[5] = _zz_103_; + _zz_104_[4] = _zz_103_; + _zz_104_[3] = _zz_103_; + _zz_104_[2] = _zz_103_; + _zz_104_[1] = _zz_103_; + _zz_104_[0] = _zz_103_; + end + + assign _zz_72_ = ((decode_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_B) && _zz_208_[31])); + assign _zz_70_ = (_zz_72_ && decode_arbitration_isFiring); + assign _zz_105_ = _zz_209_[19]; + always @ (*) begin + _zz_106_[10] = _zz_105_; + _zz_106_[9] = _zz_105_; + _zz_106_[8] = _zz_105_; + _zz_106_[7] = _zz_105_; + _zz_106_[6] = _zz_105_; + _zz_106_[5] = _zz_105_; + _zz_106_[4] = _zz_105_; + _zz_106_[3] = _zz_105_; + _zz_106_[2] = _zz_105_; + _zz_106_[1] = _zz_105_; + _zz_106_[0] = _zz_105_; + end + + assign _zz_107_ = _zz_210_[11]; + always @ (*) begin + _zz_108_[18] = _zz_107_; + _zz_108_[17] = _zz_107_; + _zz_108_[16] = _zz_107_; + _zz_108_[15] = _zz_107_; + _zz_108_[14] = _zz_107_; + _zz_108_[13] = _zz_107_; + _zz_108_[12] = _zz_107_; + _zz_108_[11] = _zz_107_; + _zz_108_[10] = _zz_107_; + _zz_108_[9] = _zz_107_; + _zz_108_[8] = _zz_107_; + _zz_108_[7] = _zz_107_; + _zz_108_[6] = _zz_107_; + _zz_108_[5] = _zz_107_; + _zz_108_[4] = _zz_107_; + _zz_108_[3] = _zz_107_; + _zz_108_[2] = _zz_107_; + _zz_108_[1] = _zz_107_; + _zz_108_[0] = _zz_107_; + end + + assign _zz_71_ = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JAL) ? {{_zz_106_,{{{_zz_263_,_zz_264_},_zz_265_},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_108_,{{{_zz_266_,_zz_267_},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @ (*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign _zz_170_ = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign _zz_173_ = (IBusCachedPlugin_jump_pcLoad_valid || _zz_68_); + assign _zz_174_ = (32'b00000000000000000000000000000000); + assign _zz_171_ = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign _zz_172_ = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_182_ = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign _zz_183_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_184_ = (CsrPlugin_privilege == (2'b00)); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign _zz_73_ = IBusCachedPlugin_rsp_redoFetch; + assign _zz_74_ = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_decodeInput_valid = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready = IBusCachedPlugin_iBusRsp_decodeInput_ready; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_pc = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + assign _zz_175_ = _zz_75_[31]; + assign _zz_176_ = 1'b1; + assign _zz_177_ = 1'b1; + assign _zz_178_ = 1'b1; + assign _zz_179_ = 1'b1; + assign _zz_180_ = 1'b0; + assign _zz_181_ = 1'b1; + assign _zz_61_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_ALIGNEMENT_FAULT)) && (! execute_DBusSimplePlugin_cmdSent)); + assign dBus_cmd_payload_wr = execute_INSTRUCTION[5]; + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_109_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_109_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_109_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_109_; + assign _zz_60_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_110_ = (4'b0001); + end + 2'b01 : begin + _zz_110_ = (4'b0011); + end + default : begin + _zz_110_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_110_ <<< dBus_cmd_payload_address[1 : 0]); + assign _zz_59_ = dBus_rsp_data; + always @ (*) begin + _zz_76_ = execute_ALIGNEMENT_FAULT; + if((! ((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers))))begin + _zz_76_ = 1'b0; + end + end + + always @ (*) begin + execute_DBusSimplePlugin_rspShifted = execute_MEMORY_READ_DATA; + case(execute_MEMORY_ADDRESS_LOW) + 2'b01 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + execute_DBusSimplePlugin_rspShifted[15 : 0] = execute_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_111_ = (execute_DBusSimplePlugin_rspShifted[7] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_112_[31] = _zz_111_; + _zz_112_[30] = _zz_111_; + _zz_112_[29] = _zz_111_; + _zz_112_[28] = _zz_111_; + _zz_112_[27] = _zz_111_; + _zz_112_[26] = _zz_111_; + _zz_112_[25] = _zz_111_; + _zz_112_[24] = _zz_111_; + _zz_112_[23] = _zz_111_; + _zz_112_[22] = _zz_111_; + _zz_112_[21] = _zz_111_; + _zz_112_[20] = _zz_111_; + _zz_112_[19] = _zz_111_; + _zz_112_[18] = _zz_111_; + _zz_112_[17] = _zz_111_; + _zz_112_[16] = _zz_111_; + _zz_112_[15] = _zz_111_; + _zz_112_[14] = _zz_111_; + _zz_112_[13] = _zz_111_; + _zz_112_[12] = _zz_111_; + _zz_112_[11] = _zz_111_; + _zz_112_[10] = _zz_111_; + _zz_112_[9] = _zz_111_; + _zz_112_[8] = _zz_111_; + _zz_112_[7 : 0] = execute_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_113_ = (execute_DBusSimplePlugin_rspShifted[15] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_114_[31] = _zz_113_; + _zz_114_[30] = _zz_113_; + _zz_114_[29] = _zz_113_; + _zz_114_[28] = _zz_113_; + _zz_114_[27] = _zz_113_; + _zz_114_[26] = _zz_113_; + _zz_114_[25] = _zz_113_; + _zz_114_[24] = _zz_113_; + _zz_114_[23] = _zz_113_; + _zz_114_[22] = _zz_113_; + _zz_114_[21] = _zz_113_; + _zz_114_[20] = _zz_113_; + _zz_114_[19] = _zz_113_; + _zz_114_[18] = _zz_113_; + _zz_114_[17] = _zz_113_; + _zz_114_[16] = _zz_113_; + _zz_114_[15 : 0] = execute_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_201_) + 2'b00 : begin + execute_DBusSimplePlugin_rspFormated = _zz_112_; + end + 2'b01 : begin + execute_DBusSimplePlugin_rspFormated = _zz_114_; + end + default : begin + execute_DBusSimplePlugin_rspFormated = execute_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_75_ = IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + assign _zz_116_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_117_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_118_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_119_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_120_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_115_ = {({(_zz_268_ == _zz_269_),(_zz_270_ == _zz_271_)} != (2'b00)),{(_zz_120_ != (1'b0)),{({_zz_272_,_zz_273_} != (2'b00)),{(_zz_274_ != _zz_275_),{_zz_276_,{_zz_277_,_zz_278_}}}}}}; + assign _zz_57_ = _zz_211_[0]; + assign _zz_56_ = _zz_212_[0]; + assign _zz_55_ = _zz_213_[0]; + assign _zz_54_ = _zz_214_[0]; + assign _zz_121_ = _zz_115_[5 : 4]; + assign _zz_53_ = _zz_121_; + assign _zz_122_ = _zz_115_[7 : 6]; + assign _zz_52_ = _zz_122_; + assign _zz_123_ = _zz_115_[11 : 10]; + assign _zz_51_ = _zz_123_; + assign _zz_124_ = _zz_115_[14 : 13]; + assign _zz_50_ = _zz_124_; + assign _zz_125_ = _zz_115_[16 : 15]; + assign _zz_49_ = _zz_125_; + assign _zz_126_ = _zz_115_[18 : 17]; + assign _zz_48_ = _zz_126_; + assign _zz_47_ = _zz_215_[0]; + assign _zz_46_ = _zz_216_[0]; + assign _zz_127_ = _zz_115_[23 : 22]; + assign _zz_45_ = _zz_127_; + assign _zz_44_ = _zz_217_[0]; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_128_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_185_; + assign execute_RegFilePlugin_rs2Data = _zz_186_; + assign _zz_43_ = execute_RegFilePlugin_rs1Data; + assign _zz_42_ = execute_RegFilePlugin_rs2Data; + assign execute_RegFilePlugin_regFileWrite_valid = (execute_REGFILE_WRITE_VALID && execute_arbitration_isFiring); + assign execute_RegFilePlugin_regFileWrite_payload_address = execute_INSTRUCTION[11 : 7]; + assign execute_RegFilePlugin_regFileWrite_payload_data = _zz_58_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = execute_SRC1; + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_129_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_129_ = {31'd0, _zz_218_}; + end + default : begin + _zz_129_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_39_ = _zz_129_; + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_130_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_130_ = {29'd0, _zz_219_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_130_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_130_ = {27'd0, _zz_220_}; + end + endcase + end + + assign _zz_37_ = _zz_130_; + assign _zz_131_ = _zz_221_[11]; + always @ (*) begin + _zz_132_[19] = _zz_131_; + _zz_132_[18] = _zz_131_; + _zz_132_[17] = _zz_131_; + _zz_132_[16] = _zz_131_; + _zz_132_[15] = _zz_131_; + _zz_132_[14] = _zz_131_; + _zz_132_[13] = _zz_131_; + _zz_132_[12] = _zz_131_; + _zz_132_[11] = _zz_131_; + _zz_132_[10] = _zz_131_; + _zz_132_[9] = _zz_131_; + _zz_132_[8] = _zz_131_; + _zz_132_[7] = _zz_131_; + _zz_132_[6] = _zz_131_; + _zz_132_[5] = _zz_131_; + _zz_132_[4] = _zz_131_; + _zz_132_[3] = _zz_131_; + _zz_132_[2] = _zz_131_; + _zz_132_[1] = _zz_131_; + _zz_132_[0] = _zz_131_; + end + + assign _zz_133_ = _zz_222_[11]; + always @ (*) begin + _zz_134_[19] = _zz_133_; + _zz_134_[18] = _zz_133_; + _zz_134_[17] = _zz_133_; + _zz_134_[16] = _zz_133_; + _zz_134_[15] = _zz_133_; + _zz_134_[14] = _zz_133_; + _zz_134_[13] = _zz_133_; + _zz_134_[12] = _zz_133_; + _zz_134_[11] = _zz_133_; + _zz_134_[10] = _zz_133_; + _zz_134_[9] = _zz_133_; + _zz_134_[8] = _zz_133_; + _zz_134_[7] = _zz_133_; + _zz_134_[6] = _zz_133_; + _zz_134_[5] = _zz_133_; + _zz_134_[4] = _zz_133_; + _zz_134_[3] = _zz_133_; + _zz_134_[2] = _zz_133_; + _zz_134_[1] = _zz_133_; + _zz_134_[0] = _zz_133_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_135_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_135_ = {_zz_132_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_135_ = {_zz_134_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_135_ = execute_PC; + end + endcase + end + + assign _zz_35_ = _zz_135_; + assign execute_SrcPlugin_addSub = _zz_223_; + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_33_ = execute_SrcPlugin_addSub; + assign _zz_32_ = execute_SrcPlugin_addSub; + assign _zz_31_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_shiftReg : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_136_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_136_ = _zz_231_; + end + endcase + end + + assign _zz_29_ = _zz_72_; + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_137_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_137_ == (3'b000))) begin + _zz_138_ = execute_BranchPlugin_eq; + end else if((_zz_137_ == (3'b001))) begin + _zz_138_ = (! execute_BranchPlugin_eq); + end else if((((_zz_137_ & (3'b101)) == (3'b101)))) begin + _zz_138_ = (! execute_SRC_LESS); + end else begin + _zz_138_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_139_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_139_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_139_ = 1'b1; + end + default : begin + _zz_139_ = _zz_138_; + end + endcase + end + + assign _zz_28_ = _zz_139_; + assign _zz_140_ = _zz_233_[11]; + always @ (*) begin + _zz_141_[19] = _zz_140_; + _zz_141_[18] = _zz_140_; + _zz_141_[17] = _zz_140_; + _zz_141_[16] = _zz_140_; + _zz_141_[15] = _zz_140_; + _zz_141_[14] = _zz_140_; + _zz_141_[13] = _zz_140_; + _zz_141_[12] = _zz_140_; + _zz_141_[11] = _zz_140_; + _zz_141_[10] = _zz_140_; + _zz_141_[9] = _zz_140_; + _zz_141_[8] = _zz_140_; + _zz_141_[7] = _zz_140_; + _zz_141_[6] = _zz_140_; + _zz_141_[5] = _zz_140_; + _zz_141_[4] = _zz_140_; + _zz_141_[3] = _zz_140_; + _zz_141_[2] = _zz_140_; + _zz_141_[1] = _zz_140_; + _zz_141_[0] = _zz_140_; + end + + assign _zz_142_ = _zz_234_[19]; + always @ (*) begin + _zz_143_[10] = _zz_142_; + _zz_143_[9] = _zz_142_; + _zz_143_[8] = _zz_142_; + _zz_143_[7] = _zz_142_; + _zz_143_[6] = _zz_142_; + _zz_143_[5] = _zz_142_; + _zz_143_[4] = _zz_142_; + _zz_143_[3] = _zz_142_; + _zz_143_[2] = _zz_142_; + _zz_143_[1] = _zz_142_; + _zz_143_[0] = _zz_142_; + end + + assign _zz_144_ = _zz_235_[11]; + always @ (*) begin + _zz_145_[18] = _zz_144_; + _zz_145_[17] = _zz_144_; + _zz_145_[16] = _zz_144_; + _zz_145_[15] = _zz_144_; + _zz_145_[14] = _zz_144_; + _zz_145_[13] = _zz_144_; + _zz_145_[12] = _zz_144_; + _zz_145_[11] = _zz_144_; + _zz_145_[10] = _zz_144_; + _zz_145_[9] = _zz_144_; + _zz_145_[8] = _zz_144_; + _zz_145_[7] = _zz_144_; + _zz_145_[6] = _zz_144_; + _zz_145_[5] = _zz_144_; + _zz_145_[4] = _zz_144_; + _zz_145_[3] = _zz_144_; + _zz_145_[2] = _zz_144_; + _zz_145_[1] = _zz_144_; + _zz_145_[0] = _zz_144_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_146_ = (_zz_236_[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_146_ = _zz_237_[1]; + end + default : begin + _zz_146_ = _zz_238_[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_146_); + assign _zz_26_ = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + execute_BranchPlugin_branch_src2 = {_zz_148_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JAL) ? {{_zz_150_,{{{_zz_390_,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_152_,{{{_zz_391_,_zz_392_},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if((execute_PREDICTION_HAD_BRANCHED2 && (! execute_BranchPlugin_missAlignedTarget)))begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_242_}; + end + end + endcase + end + + assign _zz_147_ = _zz_239_[11]; + always @ (*) begin + _zz_148_[19] = _zz_147_; + _zz_148_[18] = _zz_147_; + _zz_148_[17] = _zz_147_; + _zz_148_[16] = _zz_147_; + _zz_148_[15] = _zz_147_; + _zz_148_[14] = _zz_147_; + _zz_148_[13] = _zz_147_; + _zz_148_[12] = _zz_147_; + _zz_148_[11] = _zz_147_; + _zz_148_[10] = _zz_147_; + _zz_148_[9] = _zz_147_; + _zz_148_[8] = _zz_147_; + _zz_148_[7] = _zz_147_; + _zz_148_[6] = _zz_147_; + _zz_148_[5] = _zz_147_; + _zz_148_[4] = _zz_147_; + _zz_148_[3] = _zz_147_; + _zz_148_[2] = _zz_147_; + _zz_148_[1] = _zz_147_; + _zz_148_[0] = _zz_147_; + end + + assign _zz_149_ = _zz_240_[19]; + always @ (*) begin + _zz_150_[10] = _zz_149_; + _zz_150_[9] = _zz_149_; + _zz_150_[8] = _zz_149_; + _zz_150_[7] = _zz_149_; + _zz_150_[6] = _zz_149_; + _zz_150_[5] = _zz_149_; + _zz_150_[4] = _zz_149_; + _zz_150_[3] = _zz_149_; + _zz_150_[2] = _zz_149_; + _zz_150_[1] = _zz_149_; + _zz_150_[0] = _zz_149_; + end + + assign _zz_151_ = _zz_241_[11]; + always @ (*) begin + _zz_152_[18] = _zz_151_; + _zz_152_[17] = _zz_151_; + _zz_152_[16] = _zz_151_; + _zz_152_[15] = _zz_151_; + _zz_152_[14] = _zz_151_; + _zz_152_[13] = _zz_151_; + _zz_152_[12] = _zz_151_; + _zz_152_[11] = _zz_151_; + _zz_152_[10] = _zz_151_; + _zz_152_[9] = _zz_151_; + _zz_152_[8] = _zz_151_; + _zz_152_[7] = _zz_151_; + _zz_152_[6] = _zz_151_; + _zz_152_[5] = _zz_151_; + _zz_152_[4] = _zz_151_; + _zz_152_[3] = _zz_151_; + _zz_152_[2] = _zz_151_; + _zz_152_[1] = _zz_151_; + _zz_152_[0] = _zz_151_; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_25_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign _zz_77_ = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + always @ (*) begin + _zz_78_ = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(1'b0)begin + _zz_78_ = 1'b0; + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_medeleg = (32'b00000000000000000000000000000000); + assign CsrPlugin_mideleg = (32'b00000000000000000000000000000000); + assign _zz_153_ = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_154_ = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_155_ = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode = 1'b0; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = (2'b11); + assign execute_exception_agregat_valid = ({_zz_81_,{_zz_78_,_zz_76_}} != (3'b000)); + assign _zz_156_ = {_zz_81_,{_zz_78_,_zz_76_}}; + assign _zz_157_ = (_zz_156_ & (~ _zz_243_)); + assign _zz_158_ = _zz_157_[1]; + assign _zz_159_ = _zz_157_[2]; + assign _zz_160_ = {_zz_159_,_zz_158_}; + assign execute_exception_agregat_payload_code = _zz_188_; + assign execute_exception_agregat_payload_badAddr = _zz_189_; + assign CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + if(CsrPlugin_mstatus_MIE)begin + if(({_zz_155_,{_zz_154_,_zz_153_}} != (3'b000)))begin + CsrPlugin_interrupt = 1'b1; + end + if(_zz_153_)begin + CsrPlugin_interruptCode = (4'b0111); + end + if(_zz_154_)begin + CsrPlugin_interruptCode = (4'b0011); + end + if(_zz_155_)begin + CsrPlugin_interruptCode = (4'b1011); + end + end + if((! _zz_83_))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_interruptTargetPrivilege = (2'b11); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && _zz_84_); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! (execute_arbitration_isValid != (1'b0))) && IBusCachedPlugin_injector_nextPcCalc_valids_2); + if((CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute != (1'b0)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + assign contextSwitching = _zz_79_; + assign _zz_23_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_22_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_blockedBySideEffects = 1'b0; + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_161_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_162_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((execute_INSTRUCTION[29 : 28] != CsrPlugin_privilege))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + _zz_81_ = 1'b0; + _zz_82_ = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + _zz_81_ = 1'b1; + _zz_82_ = (4'b1011); + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + _zz_81_ = 1'b1; + _zz_82_ = (4'b0011); + end + end + + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + always @ (*) begin + case(_zz_203_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readData & (~ execute_SRC1)) : (execute_CsrPlugin_readData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_162_ = (_zz_161_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_162_ != (32'b00000000000000000000000000000000)); + assign DebugPlugin_isPipBusy = (DebugPlugin_isPipActive || DebugPlugin_isPipActive_regNext); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + _zz_85_ = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_198_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + _zz_85_ = 1'b1; + debug_bus_cmd_ready = _zz_86_; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_163_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign _zz_21_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_250_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_251_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_252_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_253_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_20_ = decode_SRC2_CTRL; + assign _zz_18_ = _zz_52_; + assign _zz_34_ = decode_to_execute_SRC2_CTRL; + assign _zz_17_ = decode_SRC1_CTRL; + assign _zz_15_ = _zz_49_; + assign _zz_36_ = decode_to_execute_SRC1_CTRL; + assign _zz_14_ = decode_BRANCH_CTRL; + assign _zz_62_ = _zz_48_; + assign _zz_27_ = decode_to_execute_BRANCH_CTRL; + assign _zz_12_ = decode_SHIFT_CTRL; + assign _zz_10_ = _zz_51_; + assign _zz_30_ = decode_to_execute_SHIFT_CTRL; + assign _zz_9_ = decode_ALU_CTRL; + assign _zz_7_ = _zz_53_; + assign _zz_38_ = decode_to_execute_ALU_CTRL; + assign _zz_6_ = decode_ALU_BITWISE_CTRL; + assign _zz_4_ = _zz_45_; + assign _zz_40_ = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_3_ = decode_ENV_CTRL; + assign _zz_1_ = _zz_50_; + assign _zz_24_ = decode_to_execute_ENV_CTRL; + assign decode_arbitration_isFlushed = ({execute_arbitration_flushAll,decode_arbitration_flushAll} != (2'b00)); + assign execute_arbitration_isFlushed = (execute_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (1'b0 || execute_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || 1'b0); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign iBusWishbone_ADR = {_zz_260_,_zz_166_}; + assign iBusWishbone_CTI = ((_zz_166_ == (3'b111)) ? (3'b111) : (3'b010)); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + always @ (*) begin + iBusWishbone_CYC = 1'b0; + iBusWishbone_STB = 1'b0; + if(_zz_199_)begin + iBusWishbone_CYC = 1'b1; + iBusWishbone_STB = 1'b1; + end + end + + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_167_; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_168_ = (4'b0001); + end + 2'b01 : begin + _zz_168_ = (4'b0011); + end + default : begin + _zz_168_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_261_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + CsrPlugin_privilege <= (2'b11); + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_93_ <= 1'b0; + _zz_99_ <= 1'b0; + _zz_101_ <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + execute_DBusSimplePlugin_cmdSent <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mip_MEIP <= 1'b0; + CsrPlugin_mip_MTIP <= 1'b0; + CsrPlugin_mip_MSIP <= 1'b0; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_161_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + _zz_164_ <= (3'b000); + _zz_166_ <= (3'b000); + _zz_167_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(_zz_197_)begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_samplePcNext)begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + _zz_93_ <= 1'b1; + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + _zz_99_ <= 1'b0; + end + if(_zz_97_)begin + _zz_99_ <= IBusCachedPlugin_iBusRsp_stages_0_output_valid; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready)begin + _zz_101_ <= IBusCachedPlugin_iBusRsp_stages_1_output_valid; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + _zz_101_ <= 1'b0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || _zz_68_))begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + end + if((dBus_cmd_valid && dBus_cmd_ready))begin + execute_DBusSimplePlugin_cmdSent <= 1'b1; + end + if((! execute_arbitration_isStuck))begin + execute_DBusSimplePlugin_cmdSent <= 1'b0; + end + if(_zz_190_)begin + if(_zz_191_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_192_)begin + CsrPlugin_privilege <= CsrPlugin_targetPrivilege; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_193_)begin + case(_zz_202_) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MPIE <= 1'b1; + CsrPlugin_privilege <= CsrPlugin_mstatus_MPP; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + case(_zz_164_) + 3'b000 : begin + if(_zz_85_)begin + _zz_164_ <= (3'b001); + end + end + 3'b001 : begin + _zz_164_ <= (3'b010); + end + 3'b010 : begin + _zz_164_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_164_ <= (3'b100); + end + end + 3'b100 : begin + _zz_164_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_161_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_254_[0]; + CsrPlugin_mstatus_MIE <= _zz_255_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_256_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_257_[0]; + CsrPlugin_mie_MTIE <= _zz_258_[0]; + CsrPlugin_mie_MSIE <= _zz_259_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(_zz_199_)begin + if(iBusWishbone_ACK)begin + _zz_166_ <= (_zz_166_ + (3'b001)); + end + end + _zz_167_ <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(_zz_200_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready)begin + _zz_102_ <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready)begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if((! execute_arbitration_isStuckByOthers))begin + execute_LightShifterPlugin_shiftReg <= _zz_58_; + end + if(_zz_190_)begin + if(_zz_191_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(execute_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(execute_exception_agregat_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= execute_exception_agregat_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= execute_exception_agregat_payload_badAddr; + end + if((CsrPlugin_exception || CsrPlugin_interruptJump))begin + case(CsrPlugin_privilege) + 2'b11 : begin + CsrPlugin_mepc <= execute_PC; + end + default : begin + end + endcase + end + if(_zz_192_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_19_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_16_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_13_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FLUSH_ALL <= decode_FLUSH_ALL; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_2_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_PC <= decode_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_63_; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(_zz_200_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipActive <= ({execute_arbitration_isValid,decode_arbitration_isValid} != (2'b00)); + DebugPlugin_isPipActive_regNext <= DebugPlugin_isPipActive; + if(execute_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_58_; + end + _zz_163_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_198_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_194_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + end else begin + if(debug_bus_cmd_valid)begin + case(_zz_198_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_246_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_247_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_248_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_249_[0]; + end + end + default : begin + end + endcase + end + if(_zz_194_)begin + if(_zz_195_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_196_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + if((DebugPlugin_stepIt && ({execute_arbitration_redoIt,decode_arbitration_redoIt} != (2'b00))))begin + DebugPlugin_haltIt <= 1'b0; + end + end + end + + always @ (posedge clk) begin + _zz_165_ <= debug_bus_cmd_payload_data; + end + +endmodule + diff --git a/hw/rtl/2-stage-512-cache-debug.yaml b/hw/rtl/2-stage-512-cache-debug.yaml new file mode 100644 index 0000000..d2c99a3 --- /dev/null +++ b/hw/rtl/2-stage-512-cache-debug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} +iBus: !!vexriscv.BusReport + flushInstructions: [16399, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 512} + kind: cached diff --git a/hw/rtl/2-stage-no-cache-debug.v b/hw/rtl/2-stage-no-cache-debug.v new file mode 100644 index 0000000..702dddb --- /dev/null +++ b/hw/rtl/2-stage-no-cache-debug.v @@ -0,0 +1,3499 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 26/04/2019, 01:12:01 +// Component : VexRiscv + + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output iBusWishbone_CYC, + output iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + reg [31:0] _zz_153_; + reg [31:0] _zz_154_; + wire _zz_155_; + wire _zz_156_; + wire _zz_157_; + wire _zz_158_; + wire _zz_159_; + wire [1:0] _zz_160_; + wire _zz_161_; + wire _zz_162_; + wire _zz_163_; + wire _zz_164_; + wire [5:0] _zz_165_; + wire _zz_166_; + wire _zz_167_; + wire [4:0] _zz_168_; + wire [1:0] _zz_169_; + wire [1:0] _zz_170_; + wire [1:0] _zz_171_; + wire _zz_172_; + wire [1:0] _zz_173_; + wire [1:0] _zz_174_; + wire [2:0] _zz_175_; + wire [31:0] _zz_176_; + wire [2:0] _zz_177_; + wire [31:0] _zz_178_; + wire [31:0] _zz_179_; + wire [11:0] _zz_180_; + wire [11:0] _zz_181_; + wire [2:0] _zz_182_; + wire [31:0] _zz_183_; + wire [0:0] _zz_184_; + wire [2:0] _zz_185_; + wire [0:0] _zz_186_; + wire [0:0] _zz_187_; + wire [0:0] _zz_188_; + wire [0:0] _zz_189_; + wire [0:0] _zz_190_; + wire [0:0] _zz_191_; + wire [0:0] _zz_192_; + wire [0:0] _zz_193_; + wire [0:0] _zz_194_; + wire [2:0] _zz_195_; + wire [4:0] _zz_196_; + wire [11:0] _zz_197_; + wire [11:0] _zz_198_; + wire [31:0] _zz_199_; + wire [31:0] _zz_200_; + wire [31:0] _zz_201_; + wire [31:0] _zz_202_; + wire [31:0] _zz_203_; + wire [31:0] _zz_204_; + wire [31:0] _zz_205_; + wire [31:0] _zz_206_; + wire [32:0] _zz_207_; + wire [19:0] _zz_208_; + wire [11:0] _zz_209_; + wire [11:0] _zz_210_; + wire [1:0] _zz_211_; + wire [1:0] _zz_212_; + wire [0:0] _zz_213_; + wire [0:0] _zz_214_; + wire [0:0] _zz_215_; + wire [0:0] _zz_216_; + wire [30:0] _zz_217_; + wire [30:0] _zz_218_; + wire [30:0] _zz_219_; + wire [30:0] _zz_220_; + wire [0:0] _zz_221_; + wire [0:0] _zz_222_; + wire [0:0] _zz_223_; + wire [0:0] _zz_224_; + wire [0:0] _zz_225_; + wire [0:0] _zz_226_; + wire [6:0] _zz_227_; + wire _zz_228_; + wire _zz_229_; + wire [6:0] _zz_230_; + wire [4:0] _zz_231_; + wire _zz_232_; + wire [4:0] _zz_233_; + wire [31:0] _zz_234_; + wire [31:0] _zz_235_; + wire [31:0] _zz_236_; + wire [31:0] _zz_237_; + wire [0:0] _zz_238_; + wire [4:0] _zz_239_; + wire [1:0] _zz_240_; + wire [1:0] _zz_241_; + wire _zz_242_; + wire [0:0] _zz_243_; + wire [20:0] _zz_244_; + wire [31:0] _zz_245_; + wire [31:0] _zz_246_; + wire _zz_247_; + wire [0:0] _zz_248_; + wire [1:0] _zz_249_; + wire [31:0] _zz_250_; + wire [31:0] _zz_251_; + wire _zz_252_; + wire [0:0] _zz_253_; + wire [1:0] _zz_254_; + wire [0:0] _zz_255_; + wire [0:0] _zz_256_; + wire _zz_257_; + wire [0:0] _zz_258_; + wire [17:0] _zz_259_; + wire [31:0] _zz_260_; + wire _zz_261_; + wire _zz_262_; + wire [31:0] _zz_263_; + wire [31:0] _zz_264_; + wire [31:0] _zz_265_; + wire _zz_266_; + wire _zz_267_; + wire [31:0] _zz_268_; + wire [31:0] _zz_269_; + wire [0:0] _zz_270_; + wire [0:0] _zz_271_; + wire [1:0] _zz_272_; + wire [1:0] _zz_273_; + wire _zz_274_; + wire [0:0] _zz_275_; + wire [15:0] _zz_276_; + wire [31:0] _zz_277_; + wire [31:0] _zz_278_; + wire [31:0] _zz_279_; + wire [31:0] _zz_280_; + wire [31:0] _zz_281_; + wire [31:0] _zz_282_; + wire [31:0] _zz_283_; + wire [31:0] _zz_284_; + wire _zz_285_; + wire [0:0] _zz_286_; + wire [0:0] _zz_287_; + wire [1:0] _zz_288_; + wire [1:0] _zz_289_; + wire _zz_290_; + wire [0:0] _zz_291_; + wire [13:0] _zz_292_; + wire [31:0] _zz_293_; + wire [31:0] _zz_294_; + wire [31:0] _zz_295_; + wire [31:0] _zz_296_; + wire [31:0] _zz_297_; + wire [31:0] _zz_298_; + wire [31:0] _zz_299_; + wire _zz_300_; + wire [0:0] _zz_301_; + wire [0:0] _zz_302_; + wire _zz_303_; + wire [0:0] _zz_304_; + wire [10:0] _zz_305_; + wire [31:0] _zz_306_; + wire [31:0] _zz_307_; + wire [31:0] _zz_308_; + wire [31:0] _zz_309_; + wire [1:0] _zz_310_; + wire [1:0] _zz_311_; + wire _zz_312_; + wire [0:0] _zz_313_; + wire [6:0] _zz_314_; + wire [31:0] _zz_315_; + wire [31:0] _zz_316_; + wire [31:0] _zz_317_; + wire [31:0] _zz_318_; + wire [31:0] _zz_319_; + wire [0:0] _zz_320_; + wire [0:0] _zz_321_; + wire [0:0] _zz_322_; + wire [0:0] _zz_323_; + wire _zz_324_; + wire [0:0] _zz_325_; + wire [2:0] _zz_326_; + wire [31:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire [31:0] _zz_330_; + wire [31:0] _zz_331_; + wire [31:0] _zz_332_; + wire [0:0] _zz_333_; + wire [0:0] _zz_334_; + wire [0:0] _zz_335_; + wire [0:0] _zz_336_; + wire [3:0] _zz_337_; + wire [3:0] _zz_338_; + wire [31:0] _zz_339_; + wire [31:0] _zz_340_; + wire [31:0] _zz_341_; + wire [31:0] _zz_342_; + wire [31:0] _zz_343_; + wire [31:0] _zz_344_; + wire [31:0] _zz_345_; + wire [31:0] _zz_346_; + wire _zz_347_; + wire [0:0] _zz_348_; + wire [12:0] _zz_349_; + wire [31:0] _zz_350_; + wire [31:0] _zz_351_; + wire [31:0] _zz_352_; + wire _zz_353_; + wire [0:0] _zz_354_; + wire [6:0] _zz_355_; + wire [31:0] _zz_356_; + wire [31:0] _zz_357_; + wire [31:0] _zz_358_; + wire _zz_359_; + wire [0:0] _zz_360_; + wire [0:0] _zz_361_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_1_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_2_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_3_; + wire decode_DO_EBREAK; + wire decode_CSR_READ_OPCODE; + wire decode_MEMORY_STORE; + wire decode_CSR_WRITE_OPCODE; + wire decode_SRC_LESS_UNSIGNED; + wire decode_SRC2_FORCE_ZERO; + wire decode_IS_CSR; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_4_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_5_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_6_; + wire decode_MEMORY_ENABLE; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_7_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_8_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_9_; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_10_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_11_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_12_; + wire execute_REGFILE_WRITE_VALID; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_13_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_14_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_15_; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_16_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_17_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_18_; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_19_; + wire `AluCtrlEnum_defaultEncoding_type _zz_20_; + wire `AluCtrlEnum_defaultEncoding_type _zz_21_; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_22_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire _zz_23_; + wire _zz_24_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_25_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_26_; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_27_; + wire _zz_28_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_29_; + wire _zz_30_; + wire [31:0] _zz_31_; + wire [31:0] _zz_32_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_33_; + wire [31:0] _zz_34_; + wire execute_IS_RVC; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_35_; + wire [31:0] _zz_36_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_37_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_38_; + wire [31:0] _zz_39_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_40_; + reg _zz_41_; + wire [31:0] _zz_42_; + wire [31:0] _zz_43_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire `BranchCtrlEnum_defaultEncoding_type _zz_44_; + wire _zz_45_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_46_; + wire _zz_47_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_48_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_49_; + wire _zz_50_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_51_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_52_; + wire `AluCtrlEnum_defaultEncoding_type _zz_53_; + wire _zz_54_; + wire _zz_55_; + wire _zz_56_; + wire _zz_57_; + wire _zz_58_; + wire _zz_59_; + reg [31:0] decode_INSTRUCTION; + reg [31:0] _zz_60_; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire [31:0] execute_MEMORY_READ_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] _zz_61_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_62_; + wire [31:0] execute_RS2; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_63_; + wire [31:0] decode_PC; + wire [31:0] _zz_64_; + wire _zz_65_; + wire [31:0] _zz_66_; + wire [31:0] _zz_67_; + wire decode_IS_RVC; + wire [31:0] execute_PC; + wire [31:0] execute_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusSimplePlugin_fetcherHalt; + reg IBusSimplePlugin_fetcherflushIt; + reg IBusSimplePlugin_incomingInstruction; + wire IBusSimplePlugin_pcValids_0; + wire IBusSimplePlugin_pcValids_1; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + wire [31:0] iBus_cmd_payload_pc; + wire iBus_rsp_valid; + wire iBus_rsp_payload_error; + wire [31:0] iBus_rsp_payload_inst; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg IBusSimplePlugin_injectionPort_valid; + reg IBusSimplePlugin_injectionPort_ready; + wire [31:0] IBusSimplePlugin_injectionPort_payload; + wire IBusSimplePlugin_jump_pcLoad_valid; + wire [31:0] IBusSimplePlugin_jump_pcLoad_payload; + wire [1:0] _zz_68_; + wire IBusSimplePlugin_fetchPc_preOutput_valid; + wire IBusSimplePlugin_fetchPc_preOutput_ready; + wire [31:0] IBusSimplePlugin_fetchPc_preOutput_payload; + wire _zz_69_; + wire IBusSimplePlugin_fetchPc_output_valid; + wire IBusSimplePlugin_fetchPc_output_ready; + wire [31:0] IBusSimplePlugin_fetchPc_output_payload; + reg [31:0] IBusSimplePlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusSimplePlugin_fetchPc_inc; + reg IBusSimplePlugin_fetchPc_propagatePc; + reg [31:0] IBusSimplePlugin_fetchPc_pc; + reg IBusSimplePlugin_fetchPc_samplePcNext; + reg _zz_70_; + reg [31:0] IBusSimplePlugin_decodePc_pcReg /* verilator public */ ; + wire [31:0] IBusSimplePlugin_decodePc_pcPlus; + reg IBusSimplePlugin_decodePc_injectedDecode; + wire IBusSimplePlugin_iBusRsp_stages_0_input_valid; + wire IBusSimplePlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_0_input_payload; + wire IBusSimplePlugin_iBusRsp_stages_0_output_valid; + wire IBusSimplePlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_0_output_payload; + reg IBusSimplePlugin_iBusRsp_stages_0_halt; + wire IBusSimplePlugin_iBusRsp_stages_0_inputSample; + wire IBusSimplePlugin_iBusRsp_stages_1_input_valid; + wire IBusSimplePlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_1_input_payload; + wire IBusSimplePlugin_iBusRsp_stages_1_output_valid; + wire IBusSimplePlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_1_output_payload; + wire IBusSimplePlugin_iBusRsp_stages_1_halt; + wire IBusSimplePlugin_iBusRsp_stages_1_inputSample; + wire _zz_71_; + wire _zz_72_; + wire _zz_73_; + wire _zz_74_; + reg _zz_75_; + reg IBusSimplePlugin_iBusRsp_readyForError; + wire IBusSimplePlugin_iBusRsp_output_valid; + wire IBusSimplePlugin_iBusRsp_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_output_payload_pc; + wire IBusSimplePlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusSimplePlugin_iBusRsp_output_payload_rsp_inst; + wire IBusSimplePlugin_iBusRsp_output_payload_isRvc; + wire IBusSimplePlugin_decompressor_decodeInput_valid; + wire IBusSimplePlugin_decompressor_decodeInput_ready; + wire [31:0] IBusSimplePlugin_decompressor_decodeInput_payload_pc; + wire IBusSimplePlugin_decompressor_decodeInput_payload_rsp_error; + wire [31:0] IBusSimplePlugin_decompressor_decodeInput_payload_rsp_inst; + wire IBusSimplePlugin_decompressor_decodeInput_payload_isRvc; + reg IBusSimplePlugin_decompressor_bufferValid; + reg [15:0] IBusSimplePlugin_decompressor_bufferData; + wire [31:0] IBusSimplePlugin_decompressor_rawInDecode; + wire IBusSimplePlugin_decompressor_isRvc; + wire [15:0] _zz_76_; + reg [31:0] IBusSimplePlugin_decompressor_decompressed; + wire [4:0] _zz_77_; + wire [4:0] _zz_78_; + wire [11:0] _zz_79_; + wire _zz_80_; + reg [11:0] _zz_81_; + wire _zz_82_; + reg [9:0] _zz_83_; + wire [20:0] _zz_84_; + wire _zz_85_; + reg [14:0] _zz_86_; + wire _zz_87_; + reg [2:0] _zz_88_; + wire _zz_89_; + reg [9:0] _zz_90_; + wire [20:0] _zz_91_; + wire _zz_92_; + reg [4:0] _zz_93_; + wire [12:0] _zz_94_; + wire [4:0] _zz_95_; + wire [4:0] _zz_96_; + wire [4:0] _zz_97_; + wire _zz_98_; + reg [2:0] _zz_99_; + reg [2:0] _zz_100_; + wire _zz_101_; + reg [6:0] _zz_102_; + reg IBusSimplePlugin_injector_nextPcCalc_valids_0; + reg IBusSimplePlugin_injector_nextPcCalc_valids_1; + reg IBusSimplePlugin_injector_decodeRemoved; + wire IBusSimplePlugin_cmd_valid; + wire IBusSimplePlugin_cmd_ready; + wire [31:0] IBusSimplePlugin_cmd_payload_pc; + reg [0:0] IBusSimplePlugin_pendingCmd; + wire [0:0] IBusSimplePlugin_pendingCmdNext; + reg [0:0] IBusSimplePlugin_rspJoin_discardCounter; + reg IBusSimplePlugin_rspJoin_rspBufferOutput_valid; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_ready; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error; + wire [31:0] IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst; + wire iBus_rsp_takeWhen_valid; + wire iBus_rsp_takeWhen_payload_error; + wire [31:0] iBus_rsp_takeWhen_payload_inst; + wire IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid; + wire IBusSimplePlugin_rspJoin_rspBuffer_rspStream_ready; + wire IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_error; + wire [31:0] IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_inst; + reg IBusSimplePlugin_rspJoin_rspBuffer_validReg; + wire [31:0] IBusSimplePlugin_rspJoin_fetchRsp_pc; + reg IBusSimplePlugin_rspJoin_fetchRsp_rsp_error; + wire [31:0] IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst; + wire IBusSimplePlugin_rspJoin_fetchRsp_isRvc; + wire IBusSimplePlugin_rspJoin_join_valid; + wire IBusSimplePlugin_rspJoin_join_ready; + wire [31:0] IBusSimplePlugin_rspJoin_join_payload_pc; + wire IBusSimplePlugin_rspJoin_join_payload_rsp_error; + wire [31:0] IBusSimplePlugin_rspJoin_join_payload_rsp_inst; + wire IBusSimplePlugin_rspJoin_join_payload_isRvc; + wire IBusSimplePlugin_rspJoin_exceptionDetected; + wire IBusSimplePlugin_rspJoin_redoRequired; + wire _zz_103_; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + reg _zz_104_; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_105_; + reg [3:0] _zz_106_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] execute_DBusSimplePlugin_rspShifted; + wire _zz_107_; + reg [31:0] _zz_108_; + wire _zz_109_; + reg [31:0] _zz_110_; + reg [31:0] execute_DBusSimplePlugin_rspFormated; + wire [26:0] _zz_111_; + wire _zz_112_; + wire _zz_113_; + wire _zz_114_; + wire _zz_115_; + wire _zz_116_; + wire `AluCtrlEnum_defaultEncoding_type _zz_117_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_118_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_119_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_120_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_121_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_122_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_123_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_124_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire lastStageRegFileWrite_valid /* verilator public */ ; + wire [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + wire [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_125_; + reg [31:0] _zz_126_; + wire _zz_127_; + reg [19:0] _zz_128_; + wire _zz_129_; + reg [19:0] _zz_130_; + reg [31:0] _zz_131_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + reg [31:0] execute_LightShifterPlugin_shiftReg; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_132_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_133_; + reg _zz_134_; + reg _zz_135_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_136_; + reg [10:0] _zz_137_; + wire _zz_138_; + reg [19:0] _zz_139_; + wire _zz_140_; + reg [18:0] _zz_141_; + reg [31:0] _zz_142_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_143_; + wire _zz_144_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_145_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_146_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_147_; + reg _zz_148_; + reg DebugPlugin_resetIt_regNext; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg [31:0] decode_to_execute_INSTRUCTION; + reg [31:0] decode_to_execute_PC; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg decode_to_execute_MEMORY_ENABLE; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg decode_to_execute_IS_CSR; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg decode_to_execute_IS_RVC; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg decode_to_execute_MEMORY_STORE; + reg decode_to_execute_CSR_READ_OPCODE; + reg decode_to_execute_DO_EBREAK; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg [2:0] _zz_149_; + reg [31:0] IBusSimplePlugin_injectionPort_payload_regNext; + wire iBus_cmd_m2sPipe_valid; + wire iBus_cmd_m2sPipe_ready; + wire [31:0] iBus_cmd_m2sPipe_payload_pc; + reg _zz_150_; + reg [31:0] _zz_151_; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_152_; + `ifndef SYNTHESIS + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_1__string; + reg [39:0] _zz_2__string; + reg [39:0] _zz_3__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_4__string; + reg [47:0] _zz_5__string; + reg [47:0] _zz_6__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_7__string; + reg [71:0] _zz_8__string; + reg [71:0] _zz_9__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_10__string; + reg [95:0] _zz_11__string; + reg [95:0] _zz_12__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_13__string; + reg [23:0] _zz_14__string; + reg [23:0] _zz_15__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_16__string; + reg [31:0] _zz_17__string; + reg [31:0] _zz_18__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_19__string; + reg [63:0] _zz_20__string; + reg [63:0] _zz_21__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_25__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_27__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_29__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_33__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_35__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_38__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_40__string; + reg [31:0] _zz_44__string; + reg [95:0] _zz_46__string; + reg [71:0] _zz_48__string; + reg [23:0] _zz_49__string; + reg [39:0] _zz_51__string; + reg [47:0] _zz_52__string; + reg [63:0] _zz_53__string; + reg [63:0] _zz_117__string; + reg [47:0] _zz_118__string; + reg [39:0] _zz_119__string; + reg [23:0] _zz_120__string; + reg [71:0] _zz_121__string; + reg [95:0] _zz_122__string; + reg [31:0] _zz_123__string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_155_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_156_ = (! execute_arbitration_isStuckByOthers); + assign _zz_157_ = ({CsrPlugin_selfException_valid,DBusSimplePlugin_memoryExceptionPort_valid} != (2'b00)); + assign _zz_158_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_159_ = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_160_ = execute_INSTRUCTION[29 : 28]; + assign _zz_161_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_162_ = (1'b0 == 1'b0); + assign _zz_163_ = (DebugPlugin_stepIt && IBusSimplePlugin_incomingInstruction); + assign _zz_164_ = (IBusSimplePlugin_fetchPc_preOutput_valid && IBusSimplePlugin_fetchPc_preOutput_ready); + assign _zz_165_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_166_ = (IBusSimplePlugin_iBusRsp_output_valid && IBusSimplePlugin_iBusRsp_output_ready); + assign _zz_167_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_168_ = {_zz_76_[1 : 0],_zz_76_[15 : 13]}; + assign _zz_169_ = _zz_76_[6 : 5]; + assign _zz_170_ = _zz_76_[11 : 10]; + assign _zz_171_ = execute_INSTRUCTION[13 : 12]; + assign _zz_172_ = execute_INSTRUCTION[13]; + assign _zz_173_ = (_zz_68_ & (~ _zz_174_)); + assign _zz_174_ = (_zz_68_ - (2'b01)); + assign _zz_175_ = {IBusSimplePlugin_fetchPc_inc,(2'b00)}; + assign _zz_176_ = {29'd0, _zz_175_}; + assign _zz_177_ = (decode_IS_RVC ? (3'b010) : (3'b100)); + assign _zz_178_ = {29'd0, _zz_177_}; + assign _zz_179_ = {{_zz_86_,_zz_76_[6 : 2]},(12'b000000000000)}; + assign _zz_180_ = {{{(4'b0000),_zz_76_[8 : 7]},_zz_76_[12 : 9]},(2'b00)}; + assign _zz_181_ = {{{(4'b0000),_zz_76_[8 : 7]},_zz_76_[12 : 9]},(2'b00)}; + assign _zz_182_ = (decode_IS_RVC ? (3'b010) : (3'b100)); + assign _zz_183_ = {29'd0, _zz_182_}; + assign _zz_184_ = (IBusSimplePlugin_pendingCmd + (IBusSimplePlugin_cmd_valid && IBusSimplePlugin_cmd_ready)); + assign _zz_185_ = (execute_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_186_ = _zz_111_[1 : 1]; + assign _zz_187_ = _zz_111_[3 : 3]; + assign _zz_188_ = _zz_111_[4 : 4]; + assign _zz_189_ = _zz_111_[5 : 5]; + assign _zz_190_ = _zz_111_[6 : 6]; + assign _zz_191_ = _zz_111_[16 : 16]; + assign _zz_192_ = _zz_111_[21 : 21]; + assign _zz_193_ = _zz_111_[24 : 24]; + assign _zz_194_ = execute_SRC_LESS; + assign _zz_195_ = (execute_IS_RVC ? (3'b010) : (3'b100)); + assign _zz_196_ = execute_INSTRUCTION[19 : 15]; + assign _zz_197_ = execute_INSTRUCTION[31 : 20]; + assign _zz_198_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_199_ = ($signed(_zz_200_) + $signed(_zz_203_)); + assign _zz_200_ = ($signed(_zz_201_) + $signed(_zz_202_)); + assign _zz_201_ = execute_SRC1; + assign _zz_202_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_203_ = (execute_SRC_USE_SUB_LESS ? _zz_204_ : _zz_205_); + assign _zz_204_ = (32'b00000000000000000000000000000001); + assign _zz_205_ = (32'b00000000000000000000000000000000); + assign _zz_206_ = (_zz_207_ >>> 1); + assign _zz_207_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_208_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_209_ = execute_INSTRUCTION[31 : 20]; + assign _zz_210_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_211_ = (_zz_143_ & (~ _zz_212_)); + assign _zz_212_ = (_zz_143_ - (2'b01)); + assign _zz_213_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_214_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_215_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_216_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_217_ = (decode_PC >>> 1); + assign _zz_218_ = (decode_PC >>> 1); + assign _zz_219_ = (decode_PC >>> 1); + assign _zz_220_ = (decode_PC >>> 1); + assign _zz_221_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_222_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_223_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_224_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_225_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_226_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_227_ = ({3'd0,_zz_152_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_228_ = (_zz_76_[11 : 10] == (2'b01)); + assign _zz_229_ = ((_zz_76_[11 : 10] == (2'b11)) && (_zz_76_[6 : 5] == (2'b00))); + assign _zz_230_ = (7'b0000000); + assign _zz_231_ = _zz_76_[6 : 2]; + assign _zz_232_ = _zz_76_[12]; + assign _zz_233_ = _zz_76_[11 : 7]; + assign _zz_234_ = (decode_INSTRUCTION & (32'b00000000000000000000000000011100)); + assign _zz_235_ = (32'b00000000000000000000000000000100); + assign _zz_236_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_237_ = (32'b00000000000000000000000001000000); + assign _zz_238_ = _zz_116_; + assign _zz_239_ = {(_zz_245_ == _zz_246_),{_zz_247_,{_zz_248_,_zz_249_}}}; + assign _zz_240_ = {(_zz_250_ == _zz_251_),_zz_115_}; + assign _zz_241_ = (2'b00); + assign _zz_242_ = ({_zz_252_,_zz_115_} != (2'b00)); + assign _zz_243_ = ({_zz_253_,_zz_254_} != (3'b000)); + assign _zz_244_ = {(_zz_255_ != _zz_256_),{_zz_257_,{_zz_258_,_zz_259_}}}; + assign _zz_245_ = (decode_INSTRUCTION & (32'b00000000000000000001000000010000)); + assign _zz_246_ = (32'b00000000000000000001000000010000); + assign _zz_247_ = ((decode_INSTRUCTION & _zz_260_) == (32'b00000000000000000010000000010000)); + assign _zz_248_ = _zz_113_; + assign _zz_249_ = {_zz_261_,_zz_262_}; + assign _zz_250_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010100)); + assign _zz_251_ = (32'b00000000000000000000000000000100); + assign _zz_252_ = ((decode_INSTRUCTION & _zz_263_) == (32'b00000000000000000000000000000100)); + assign _zz_253_ = (_zz_264_ == _zz_265_); + assign _zz_254_ = {_zz_266_,_zz_267_}; + assign _zz_255_ = (_zz_268_ == _zz_269_); + assign _zz_256_ = (1'b0); + assign _zz_257_ = ({_zz_270_,_zz_271_} != (2'b00)); + assign _zz_258_ = (_zz_272_ != _zz_273_); + assign _zz_259_ = {_zz_274_,{_zz_275_,_zz_276_}}; + assign _zz_260_ = (32'b00000000000000000010000000010000); + assign _zz_261_ = ((decode_INSTRUCTION & _zz_277_) == (32'b00000000000000000000000000000100)); + assign _zz_262_ = ((decode_INSTRUCTION & _zz_278_) == (32'b00000000000000000000000000000000)); + assign _zz_263_ = (32'b00000000000000000000000001000100); + assign _zz_264_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_265_ = (32'b00000000000000000000000001000000); + assign _zz_266_ = ((decode_INSTRUCTION & _zz_279_) == (32'b00000000000000000010000000010000)); + assign _zz_267_ = ((decode_INSTRUCTION & _zz_280_) == (32'b01000000000000000000000000110000)); + assign _zz_268_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_269_ = (32'b00000000000000000101000000010000); + assign _zz_270_ = (_zz_281_ == _zz_282_); + assign _zz_271_ = (_zz_283_ == _zz_284_); + assign _zz_272_ = {_zz_114_,_zz_285_}; + assign _zz_273_ = (2'b00); + assign _zz_274_ = ({_zz_286_,_zz_287_} != (2'b00)); + assign _zz_275_ = (_zz_288_ != _zz_289_); + assign _zz_276_ = {_zz_290_,{_zz_291_,_zz_292_}}; + assign _zz_277_ = (32'b00000000000000000000000000001100); + assign _zz_278_ = (32'b00000000000000000000000000101000); + assign _zz_279_ = (32'b00000000000000000010000000010100); + assign _zz_280_ = (32'b01000000000000000100000000110100); + assign _zz_281_ = (decode_INSTRUCTION & (32'b01000000000000000011000001010100)); + assign _zz_282_ = (32'b01000000000000000001000000010000); + assign _zz_283_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_284_ = (32'b00000000000000000001000000010000); + assign _zz_285_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001110000)) == (32'b00000000000000000000000000100000)); + assign _zz_286_ = _zz_114_; + assign _zz_287_ = ((decode_INSTRUCTION & _zz_293_) == (32'b00000000000000000000000000000000)); + assign _zz_288_ = {(_zz_294_ == _zz_295_),(_zz_296_ == _zz_297_)}; + assign _zz_289_ = (2'b00); + assign _zz_290_ = ((_zz_298_ == _zz_299_) != (1'b0)); + assign _zz_291_ = (_zz_300_ != (1'b0)); + assign _zz_292_ = {(_zz_301_ != _zz_302_),{_zz_303_,{_zz_304_,_zz_305_}}}; + assign _zz_293_ = (32'b00000000000000000000000000100000); + assign _zz_294_ = (decode_INSTRUCTION & (32'b00000000000000000001000001010000)); + assign _zz_295_ = (32'b00000000000000000001000001010000); + assign _zz_296_ = (decode_INSTRUCTION & (32'b00000000000000000010000001010000)); + assign _zz_297_ = (32'b00000000000000000010000001010000); + assign _zz_298_ = (decode_INSTRUCTION & (32'b00000000000000000001000000000000)); + assign _zz_299_ = (32'b00000000000000000001000000000000); + assign _zz_300_ = ((decode_INSTRUCTION & (32'b00000000000000000011000000000000)) == (32'b00000000000000000010000000000000)); + assign _zz_301_ = ((decode_INSTRUCTION & (32'b00010000000000000011000001010000)) == (32'b00000000000000000000000001010000)); + assign _zz_302_ = (1'b0); + assign _zz_303_ = ({_zz_112_,(_zz_306_ == _zz_307_)} != (2'b00)); + assign _zz_304_ = ((_zz_308_ == _zz_309_) != (1'b0)); + assign _zz_305_ = {(_zz_113_ != (1'b0)),{(_zz_310_ != _zz_311_),{_zz_312_,{_zz_313_,_zz_314_}}}}; + assign _zz_306_ = (decode_INSTRUCTION & (32'b00010000010000000011000001010000)); + assign _zz_307_ = (32'b00010000000000000000000001010000); + assign _zz_308_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010000)); + assign _zz_309_ = (32'b00000000000000000000000000010000); + assign _zz_310_ = {((decode_INSTRUCTION & _zz_315_) == (32'b00000000000000000110000000010000)),((decode_INSTRUCTION & _zz_316_) == (32'b00000000000000000100000000010000))}; + assign _zz_311_ = (2'b00); + assign _zz_312_ = (((decode_INSTRUCTION & _zz_317_) == (32'b00000000000000000010000000010000)) != (1'b0)); + assign _zz_313_ = ((_zz_318_ == _zz_319_) != (1'b0)); + assign _zz_314_ = {({_zz_320_,_zz_321_} != (2'b00)),{(_zz_322_ != _zz_323_),{_zz_324_,{_zz_325_,_zz_326_}}}}; + assign _zz_315_ = (32'b00000000000000000110000000010100); + assign _zz_316_ = (32'b00000000000000000101000000010100); + assign _zz_317_ = (32'b00000000000000000110000000010100); + assign _zz_318_ = (decode_INSTRUCTION & (32'b00000000000000000000000000000000)); + assign _zz_319_ = (32'b00000000000000000000000000000000); + assign _zz_320_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100100)); + assign _zz_321_ = ((decode_INSTRUCTION & (32'b00000000000000000011000001010100)) == (32'b00000000000000000001000000010000)); + assign _zz_322_ = _zz_112_; + assign _zz_323_ = (1'b0); + assign _zz_324_ = ({(_zz_327_ == _zz_328_),(_zz_329_ == _zz_330_)} != (2'b00)); + assign _zz_325_ = ((_zz_331_ == _zz_332_) != (1'b0)); + assign _zz_326_ = {({_zz_333_,_zz_334_} != (2'b00)),{(_zz_335_ != _zz_336_),(_zz_337_ != _zz_338_)}}; + assign _zz_327_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010000)); + assign _zz_328_ = (32'b00000000000000000010000000000000); + assign _zz_329_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000000)); + assign _zz_330_ = (32'b00000000000000000001000000000000); + assign _zz_331_ = (decode_INSTRUCTION & (32'b00000000000000000000000000100000)); + assign _zz_332_ = (32'b00000000000000000000000000100000); + assign _zz_333_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000110100)) == (32'b00000000000000000000000000100000)); + assign _zz_334_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100000)); + assign _zz_335_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001011000)) == (32'b00000000000000000000000000000000)); + assign _zz_336_ = (1'b0); + assign _zz_337_ = {((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000000)),{((decode_INSTRUCTION & _zz_339_) == (32'b00000000000000000000000000000000)),{(_zz_340_ == _zz_341_),(_zz_342_ == _zz_343_)}}}; + assign _zz_338_ = (4'b0000); + assign _zz_339_ = (32'b00000000000000000000000000011000); + assign _zz_340_ = (decode_INSTRUCTION & (32'b00000000000000000110000000000100)); + assign _zz_341_ = (32'b00000000000000000010000000000000); + assign _zz_342_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000100)); + assign _zz_343_ = (32'b00000000000000000001000000000000); + assign _zz_344_ = (32'b00000000000000000001000001111111); + assign _zz_345_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_346_ = (32'b00000000000000000010000001110011); + assign _zz_347_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_348_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_349_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_350_) == (32'b00000000000000000000000000000011)),{(_zz_351_ == _zz_352_),{_zz_353_,{_zz_354_,_zz_355_}}}}}}; + assign _zz_350_ = (32'b00000000000000000101000001011111); + assign _zz_351_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_352_ = (32'b00000000000000000000000001100011); + assign _zz_353_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_354_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_355_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_356_) == (32'b00000000000000000101000000110011)),{(_zz_357_ == _zz_358_),{_zz_359_,{_zz_360_,_zz_361_}}}}}}; + assign _zz_356_ = (32'b10111110000000000111000001111111); + assign _zz_357_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_358_ = (32'b00000000000000000000000000110011); + assign _zz_359_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_360_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_361_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("2-stage-no-cache-debug.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_41_) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_124_) begin + _zz_153_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_124_) begin + _zz_154_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_1_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_1__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_1__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_1__string = "AND_1"; + default : _zz_1__string = "?????"; + endcase + end + always @(*) begin + case(_zz_2_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_2__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_2__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_2__string = "AND_1"; + default : _zz_2__string = "?????"; + endcase + end + always @(*) begin + case(_zz_3_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_3__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_3__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_3__string = "AND_1"; + default : _zz_3__string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_4_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_4__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_4__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_4__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_4__string = "EBREAK"; + default : _zz_4__string = "??????"; + endcase + end + always @(*) begin + case(_zz_5_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_5__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_5__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_5__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_5__string = "EBREAK"; + default : _zz_5__string = "??????"; + endcase + end + always @(*) begin + case(_zz_6_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_6__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_6__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_6__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_6__string = "EBREAK"; + default : _zz_6__string = "??????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_7_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_7__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_7__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_7__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_7__string = "SRA_1 "; + default : _zz_7__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_8_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_8__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_8__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_8__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_8__string = "SRA_1 "; + default : _zz_8__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_9_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_9__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_9__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_9__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_9__string = "SRA_1 "; + default : _zz_9__string = "?????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_10_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_10__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_10__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_10__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_10__string = "URS1 "; + default : _zz_10__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_11_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_11__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_11__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_11__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_11__string = "URS1 "; + default : _zz_11__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_12_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_12__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_12__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_12__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_12__string = "URS1 "; + default : _zz_12__string = "????????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_13_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_13__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_13__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_13__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_13__string = "PC "; + default : _zz_13__string = "???"; + endcase + end + always @(*) begin + case(_zz_14_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_14__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_14__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_14__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_14__string = "PC "; + default : _zz_14__string = "???"; + endcase + end + always @(*) begin + case(_zz_15_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_15__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_15__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_15__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_15__string = "PC "; + default : _zz_15__string = "???"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_16_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_16__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_16__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_16__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_16__string = "JALR"; + default : _zz_16__string = "????"; + endcase + end + always @(*) begin + case(_zz_17_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_17__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_17__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_17__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_17__string = "JALR"; + default : _zz_17__string = "????"; + endcase + end + always @(*) begin + case(_zz_18_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_18__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_18__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_18__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_18__string = "JALR"; + default : _zz_18__string = "????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_19_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_19__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_19__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_19__string = "BITWISE "; + default : _zz_19__string = "????????"; + endcase + end + always @(*) begin + case(_zz_20_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_20__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_20__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_20__string = "BITWISE "; + default : _zz_20__string = "????????"; + endcase + end + always @(*) begin + case(_zz_21_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_21__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_21__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_21__string = "BITWISE "; + default : _zz_21__string = "????????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_25_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_25__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_25__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_25__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_25__string = "EBREAK"; + default : _zz_25__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_27_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_27__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_27__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_27__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_27__string = "JALR"; + default : _zz_27__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_29_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_29__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_29__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_29__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_29__string = "SRA_1 "; + default : _zz_29__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_33_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_33__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_33__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_33__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_33__string = "PC "; + default : _zz_33__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_35_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_35__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_35__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_35__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_35__string = "URS1 "; + default : _zz_35__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_38_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_38__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_38__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_38__string = "BITWISE "; + default : _zz_38__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_40_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_40__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_40__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_40__string = "AND_1"; + default : _zz_40__string = "?????"; + endcase + end + always @(*) begin + case(_zz_44_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_44__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_44__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_44__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_44__string = "JALR"; + default : _zz_44__string = "????"; + endcase + end + always @(*) begin + case(_zz_46_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_46__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_46__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_46__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_46__string = "URS1 "; + default : _zz_46__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_48_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_48__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_48__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_48__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_48__string = "SRA_1 "; + default : _zz_48__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_49_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_49__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_49__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_49__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_49__string = "PC "; + default : _zz_49__string = "???"; + endcase + end + always @(*) begin + case(_zz_51_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_51__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_51__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_51__string = "AND_1"; + default : _zz_51__string = "?????"; + endcase + end + always @(*) begin + case(_zz_52_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_52__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_52__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_52__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_52__string = "EBREAK"; + default : _zz_52__string = "??????"; + endcase + end + always @(*) begin + case(_zz_53_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_53__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_53__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_53__string = "BITWISE "; + default : _zz_53__string = "????????"; + endcase + end + always @(*) begin + case(_zz_117_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_117__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_117__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_117__string = "BITWISE "; + default : _zz_117__string = "????????"; + endcase + end + always @(*) begin + case(_zz_118_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_118__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_118__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_118__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_118__string = "EBREAK"; + default : _zz_118__string = "??????"; + endcase + end + always @(*) begin + case(_zz_119_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_119__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_119__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_119__string = "AND_1"; + default : _zz_119__string = "?????"; + endcase + end + always @(*) begin + case(_zz_120_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_120__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_120__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_120__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_120__string = "PC "; + default : _zz_120__string = "???"; + endcase + end + always @(*) begin + case(_zz_121_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_121__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_121__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_121__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_121__string = "SRA_1 "; + default : _zz_121__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_122_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_122__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_122__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_122__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_122__string = "URS1 "; + default : _zz_122__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_123_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_123__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_123__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_123__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_123__string = "JALR"; + default : _zz_123__string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + `endif + + assign decode_ALU_BITWISE_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_DO_EBREAK = _zz_22_; + assign decode_CSR_READ_OPCODE = _zz_23_; + assign decode_MEMORY_STORE = _zz_57_; + assign decode_CSR_WRITE_OPCODE = _zz_24_; + assign decode_SRC_LESS_UNSIGNED = _zz_56_; + assign decode_SRC2_FORCE_ZERO = _zz_37_; + assign decode_IS_CSR = _zz_50_; + assign decode_ENV_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_MEMORY_ENABLE = _zz_58_; + assign decode_SHIFT_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_SRC1_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_SRC2_CTRL = _zz_13_; + assign _zz_14_ = _zz_15_; + assign decode_BRANCH_CTRL = _zz_16_; + assign _zz_17_ = _zz_18_; + assign decode_ALU_CTRL = _zz_19_; + assign _zz_20_ = _zz_21_; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_64_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_55_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign execute_ENV_CTRL = _zz_25_; + assign execute_BRANCH_CALC = _zz_26_; + assign execute_BRANCH_DO = _zz_28_; + assign execute_RS1 = _zz_43_; + assign execute_BRANCH_CTRL = _zz_27_; + assign execute_SHIFT_CTRL = _zz_29_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign execute_SRC2_CTRL = _zz_33_; + assign execute_IS_RVC = decode_to_execute_IS_RVC; + assign execute_SRC1_CTRL = _zz_35_; + assign decode_SRC_USE_SUB_LESS = _zz_47_; + assign decode_SRC_ADD_ZERO = _zz_54_; + assign execute_SRC_ADD_SUB = _zz_32_; + assign execute_SRC_LESS = _zz_30_; + assign execute_ALU_CTRL = _zz_38_; + assign execute_SRC2 = _zz_34_; + assign execute_SRC1 = _zz_36_; + assign execute_ALU_BITWISE_CTRL = _zz_40_; + always @ (*) begin + _zz_41_ = 1'b0; + if(lastStageRegFileWrite_valid)begin + _zz_41_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_45_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_59_; + assign decode_INSTRUCTION_READY = 1'b1; + always @ (*) begin + decode_INSTRUCTION = _zz_66_; + if((_zz_149_ != (3'b000)))begin + decode_INSTRUCTION = IBusSimplePlugin_injectionPort_payload_regNext; + end + end + + always @ (*) begin + _zz_60_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_104_)))begin + execute_arbitration_haltItself = 1'b1; + end + if((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_MEMORY_STORE)) && ((! dBus_rsp_ready) || (! _zz_104_))))begin + execute_arbitration_haltItself = 1'b1; + end + if((execute_arbitration_isValid && execute_MEMORY_ENABLE))begin + _zz_60_ = execute_DBusSimplePlugin_rspFormated; + end + if(_zz_155_)begin + _zz_60_ = _zz_132_; + if(_zz_156_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_60_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_MEMORY_ADDRESS_LOW = _zz_62_; + assign execute_MEMORY_READ_DATA = _zz_61_; + assign execute_REGFILE_WRITE_DATA = _zz_39_; + assign execute_SRC_ADD = _zz_31_; + assign execute_RS2 = _zz_42_; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_63_; + assign decode_PC = _zz_67_; + assign decode_IS_RVC = _zz_65_; + assign execute_PC = decode_to_execute_PC; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusSimplePlugin_decompressor_decodeInput_valid && (! IBusSimplePlugin_injector_decodeRemoved)); + IBusSimplePlugin_injectionPort_ready = 1'b0; + case(_zz_149_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + IBusSimplePlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)) != (1'b0)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(decodeExceptionPort_valid)begin + decode_arbitration_removeIt = 1'b1; + end + if(_zz_148_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_haltByOther = 1'b0; + execute_arbitration_removeIt = 1'b0; + IBusSimplePlugin_fetcherHalt = 1'b0; + IBusSimplePlugin_fetcherflushIt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_157_)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode} != (2'b00)))begin + IBusSimplePlugin_fetcherHalt = 1'b1; + end + if(_zz_158_)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + decode_arbitration_flushAll = 1'b1; + end + if(_zz_159_)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + decode_arbitration_flushAll = 1'b1; + case(_zz_160_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(_zz_161_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_162_)begin + IBusSimplePlugin_fetcherflushIt = 1'b1; + IBusSimplePlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + end + if(_zz_163_)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(_zz_161_)begin + if(_zz_162_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + assign lastStageInstruction = execute_INSTRUCTION; + assign lastStagePc = execute_PC; + assign lastStageIsValid = execute_arbitration_isValid; + assign lastStageIsFiring = execute_arbitration_isFiring; + always @ (*) begin + IBusSimplePlugin_incomingInstruction = 1'b0; + if(IBusSimplePlugin_iBusRsp_stages_1_input_valid)begin + IBusSimplePlugin_incomingInstruction = 1'b1; + end + if((IBusSimplePlugin_decompressor_bufferValid && (IBusSimplePlugin_decompressor_bufferData[1 : 0] != (2'b11))))begin + IBusSimplePlugin_incomingInstruction = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_forceMachineWire = 1'b0; + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode)begin + CsrPlugin_allowException = 1'b0; + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_allowInterrupts = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + assign IBusSimplePlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid} != (2'b00)); + assign _zz_68_ = {CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid}; + assign IBusSimplePlugin_jump_pcLoad_payload = (_zz_173_[0] ? BranchPlugin_jumpInterface_payload : CsrPlugin_jumpInterface_payload); + assign _zz_69_ = (! IBusSimplePlugin_fetcherHalt); + assign IBusSimplePlugin_fetchPc_output_valid = (IBusSimplePlugin_fetchPc_preOutput_valid && _zz_69_); + assign IBusSimplePlugin_fetchPc_preOutput_ready = (IBusSimplePlugin_fetchPc_output_ready && _zz_69_); + assign IBusSimplePlugin_fetchPc_output_payload = IBusSimplePlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusSimplePlugin_fetchPc_propagatePc = 1'b0; + if((IBusSimplePlugin_iBusRsp_stages_1_input_valid && IBusSimplePlugin_iBusRsp_stages_1_input_ready))begin + IBusSimplePlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusSimplePlugin_fetchPc_pc = (IBusSimplePlugin_fetchPc_pcReg + _zz_176_); + IBusSimplePlugin_fetchPc_samplePcNext = 1'b0; + if(IBusSimplePlugin_fetchPc_inc)begin + IBusSimplePlugin_fetchPc_pc[1] = 1'b0; + end + if(IBusSimplePlugin_fetchPc_propagatePc)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + IBusSimplePlugin_fetchPc_pc = IBusSimplePlugin_jump_pcLoad_payload; + end + if(_zz_164_)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + end + IBusSimplePlugin_fetchPc_pc[0] = 1'b0; + end + + assign IBusSimplePlugin_fetchPc_preOutput_valid = _zz_70_; + assign IBusSimplePlugin_fetchPc_preOutput_payload = IBusSimplePlugin_fetchPc_pc; + assign IBusSimplePlugin_decodePc_pcPlus = (IBusSimplePlugin_decodePc_pcReg + _zz_178_); + always @ (*) begin + IBusSimplePlugin_decodePc_injectedDecode = 1'b0; + if((_zz_149_ != (3'b000)))begin + IBusSimplePlugin_decodePc_injectedDecode = 1'b1; + end + end + + assign IBusSimplePlugin_iBusRsp_stages_0_input_valid = IBusSimplePlugin_fetchPc_output_valid; + assign IBusSimplePlugin_fetchPc_output_ready = IBusSimplePlugin_iBusRsp_stages_0_input_ready; + assign IBusSimplePlugin_iBusRsp_stages_0_input_payload = IBusSimplePlugin_fetchPc_output_payload; + assign IBusSimplePlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusSimplePlugin_iBusRsp_stages_0_halt = 1'b0; + if((IBusSimplePlugin_iBusRsp_stages_0_input_valid && ((! IBusSimplePlugin_cmd_valid) || (! IBusSimplePlugin_cmd_ready))))begin + IBusSimplePlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_71_ = (! IBusSimplePlugin_iBusRsp_stages_0_halt); + assign IBusSimplePlugin_iBusRsp_stages_0_input_ready = (IBusSimplePlugin_iBusRsp_stages_0_output_ready && _zz_71_); + assign IBusSimplePlugin_iBusRsp_stages_0_output_valid = (IBusSimplePlugin_iBusRsp_stages_0_input_valid && _zz_71_); + assign IBusSimplePlugin_iBusRsp_stages_0_output_payload = IBusSimplePlugin_iBusRsp_stages_0_input_payload; + assign IBusSimplePlugin_iBusRsp_stages_1_halt = 1'b0; + assign _zz_72_ = (! IBusSimplePlugin_iBusRsp_stages_1_halt); + assign IBusSimplePlugin_iBusRsp_stages_1_input_ready = (IBusSimplePlugin_iBusRsp_stages_1_output_ready && _zz_72_); + assign IBusSimplePlugin_iBusRsp_stages_1_output_valid = (IBusSimplePlugin_iBusRsp_stages_1_input_valid && _zz_72_); + assign IBusSimplePlugin_iBusRsp_stages_1_output_payload = IBusSimplePlugin_iBusRsp_stages_1_input_payload; + assign IBusSimplePlugin_iBusRsp_stages_0_output_ready = _zz_73_; + assign _zz_73_ = ((1'b0 && (! _zz_74_)) || IBusSimplePlugin_iBusRsp_stages_1_input_ready); + assign _zz_74_ = _zz_75_; + assign IBusSimplePlugin_iBusRsp_stages_1_input_valid = _zz_74_; + assign IBusSimplePlugin_iBusRsp_stages_1_input_payload = IBusSimplePlugin_fetchPc_pcReg; + always @ (*) begin + IBusSimplePlugin_iBusRsp_readyForError = 1'b1; + if((IBusSimplePlugin_decompressor_bufferValid && IBusSimplePlugin_decompressor_isRvc))begin + IBusSimplePlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusSimplePlugin_decompressor_rawInDecode = (IBusSimplePlugin_decompressor_bufferValid ? {IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[15 : 0],IBusSimplePlugin_decompressor_bufferData} : {IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[31 : 16],(IBusSimplePlugin_iBusRsp_output_payload_pc[1] ? IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[31 : 16] : IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[15 : 0])}); + assign IBusSimplePlugin_decompressor_isRvc = (IBusSimplePlugin_decompressor_rawInDecode[1 : 0] != (2'b11)); + assign _zz_76_ = IBusSimplePlugin_decompressor_rawInDecode[15 : 0]; + always @ (*) begin + IBusSimplePlugin_decompressor_decompressed = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(_zz_168_) + 5'b00000 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{{{(2'b00),_zz_76_[10 : 7]},_zz_76_[12 : 11]},_zz_76_[5]},_zz_76_[6]},(2'b00)},(5'b00010)},(3'b000)},_zz_78_},(7'b0010011)}; + end + 5'b00010 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{_zz_79_,_zz_77_},(3'b010)},_zz_78_},(7'b0000011)}; + end + 5'b00110 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_79_[11 : 5],_zz_78_},_zz_77_},(3'b010)},_zz_79_[4 : 0]},(7'b0100011)}; + end + 5'b01000 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{_zz_81_,_zz_76_[11 : 7]},(3'b000)},_zz_76_[11 : 7]},(7'b0010011)}; + end + 5'b01001 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_84_[20],_zz_84_[10 : 1]},_zz_84_[11]},_zz_84_[19 : 12]},_zz_96_},(7'b1101111)}; + end + 5'b01010 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{_zz_81_,(5'b00000)},(3'b000)},_zz_76_[11 : 7]},(7'b0010011)}; + end + 5'b01011 : begin + IBusSimplePlugin_decompressor_decompressed = ((_zz_76_[11 : 7] == (5'b00010)) ? {{{{{{{{{_zz_88_,_zz_76_[4 : 3]},_zz_76_[5]},_zz_76_[2]},_zz_76_[6]},(4'b0000)},_zz_76_[11 : 7]},(3'b000)},_zz_76_[11 : 7]},(7'b0010011)} : {{_zz_179_[31 : 12],_zz_76_[11 : 7]},(7'b0110111)}); + end + 5'b01100 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{((_zz_76_[11 : 10] == (2'b10)) ? _zz_102_ : {{(1'b0),(_zz_228_ || _zz_229_)},(5'b00000)}),(((! _zz_76_[11]) || _zz_98_) ? _zz_76_[6 : 2] : _zz_78_)},_zz_77_},_zz_100_},_zz_77_},(_zz_98_ ? (7'b0010011) : (7'b0110011))}; + end + 5'b01101 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_91_[20],_zz_91_[10 : 1]},_zz_91_[11]},_zz_91_[19 : 12]},_zz_95_},(7'b1101111)}; + end + 5'b01110 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{_zz_94_[12],_zz_94_[10 : 5]},_zz_95_},_zz_77_},(3'b000)},_zz_94_[4 : 1]},_zz_94_[11]},(7'b1100011)}; + end + 5'b01111 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{_zz_94_[12],_zz_94_[10 : 5]},_zz_95_},_zz_77_},(3'b001)},_zz_94_[4 : 1]},_zz_94_[11]},(7'b1100011)}; + end + 5'b10000 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{(7'b0000000),_zz_76_[6 : 2]},_zz_76_[11 : 7]},(3'b001)},_zz_76_[11 : 7]},(7'b0010011)}; + end + 5'b10010 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{{(4'b0000),_zz_76_[3 : 2]},_zz_76_[12]},_zz_76_[6 : 4]},(2'b00)},_zz_97_},(3'b010)},_zz_76_[11 : 7]},(7'b0000011)}; + end + 5'b10100 : begin + IBusSimplePlugin_decompressor_decompressed = ((_zz_76_[12 : 2] == (11'b10000000000)) ? (32'b00000000000100000000000001110011) : ((_zz_76_[6 : 2] == (5'b00000)) ? {{{{(12'b000000000000),_zz_76_[11 : 7]},(3'b000)},(_zz_76_[12] ? _zz_96_ : _zz_95_)},(7'b1100111)} : {{{{{_zz_230_,_zz_231_},(_zz_232_ ? _zz_233_ : _zz_95_)},(3'b000)},_zz_76_[11 : 7]},(7'b0110011)})); + end + 5'b10110 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_180_[11 : 5],_zz_76_[6 : 2]},_zz_97_},(3'b010)},_zz_181_[4 : 0]},(7'b0100011)}; + end + default : begin + end + endcase + end + + assign _zz_77_ = {(2'b01),_zz_76_[9 : 7]}; + assign _zz_78_ = {(2'b01),_zz_76_[4 : 2]}; + assign _zz_79_ = {{{{(5'b00000),_zz_76_[5]},_zz_76_[12 : 10]},_zz_76_[6]},(2'b00)}; + assign _zz_80_ = _zz_76_[12]; + always @ (*) begin + _zz_81_[11] = _zz_80_; + _zz_81_[10] = _zz_80_; + _zz_81_[9] = _zz_80_; + _zz_81_[8] = _zz_80_; + _zz_81_[7] = _zz_80_; + _zz_81_[6] = _zz_80_; + _zz_81_[5] = _zz_80_; + _zz_81_[4 : 0] = _zz_76_[6 : 2]; + end + + assign _zz_82_ = _zz_76_[12]; + always @ (*) begin + _zz_83_[9] = _zz_82_; + _zz_83_[8] = _zz_82_; + _zz_83_[7] = _zz_82_; + _zz_83_[6] = _zz_82_; + _zz_83_[5] = _zz_82_; + _zz_83_[4] = _zz_82_; + _zz_83_[3] = _zz_82_; + _zz_83_[2] = _zz_82_; + _zz_83_[1] = _zz_82_; + _zz_83_[0] = _zz_82_; + end + + assign _zz_84_ = {{{{{{{{_zz_83_,_zz_76_[8]},_zz_76_[10 : 9]},_zz_76_[6]},_zz_76_[7]},_zz_76_[2]},_zz_76_[11]},_zz_76_[5 : 3]},(1'b0)}; + assign _zz_85_ = _zz_76_[12]; + always @ (*) begin + _zz_86_[14] = _zz_85_; + _zz_86_[13] = _zz_85_; + _zz_86_[12] = _zz_85_; + _zz_86_[11] = _zz_85_; + _zz_86_[10] = _zz_85_; + _zz_86_[9] = _zz_85_; + _zz_86_[8] = _zz_85_; + _zz_86_[7] = _zz_85_; + _zz_86_[6] = _zz_85_; + _zz_86_[5] = _zz_85_; + _zz_86_[4] = _zz_85_; + _zz_86_[3] = _zz_85_; + _zz_86_[2] = _zz_85_; + _zz_86_[1] = _zz_85_; + _zz_86_[0] = _zz_85_; + end + + assign _zz_87_ = _zz_76_[12]; + always @ (*) begin + _zz_88_[2] = _zz_87_; + _zz_88_[1] = _zz_87_; + _zz_88_[0] = _zz_87_; + end + + assign _zz_89_ = _zz_76_[12]; + always @ (*) begin + _zz_90_[9] = _zz_89_; + _zz_90_[8] = _zz_89_; + _zz_90_[7] = _zz_89_; + _zz_90_[6] = _zz_89_; + _zz_90_[5] = _zz_89_; + _zz_90_[4] = _zz_89_; + _zz_90_[3] = _zz_89_; + _zz_90_[2] = _zz_89_; + _zz_90_[1] = _zz_89_; + _zz_90_[0] = _zz_89_; + end + + assign _zz_91_ = {{{{{{{{_zz_90_,_zz_76_[8]},_zz_76_[10 : 9]},_zz_76_[6]},_zz_76_[7]},_zz_76_[2]},_zz_76_[11]},_zz_76_[5 : 3]},(1'b0)}; + assign _zz_92_ = _zz_76_[12]; + always @ (*) begin + _zz_93_[4] = _zz_92_; + _zz_93_[3] = _zz_92_; + _zz_93_[2] = _zz_92_; + _zz_93_[1] = _zz_92_; + _zz_93_[0] = _zz_92_; + end + + assign _zz_94_ = {{{{{_zz_93_,_zz_76_[6 : 5]},_zz_76_[2]},_zz_76_[11 : 10]},_zz_76_[4 : 3]},(1'b0)}; + assign _zz_95_ = (5'b00000); + assign _zz_96_ = (5'b00001); + assign _zz_97_ = (5'b00010); + assign _zz_98_ = (_zz_76_[11 : 10] != (2'b11)); + always @ (*) begin + case(_zz_169_) + 2'b00 : begin + _zz_99_ = (3'b000); + end + 2'b01 : begin + _zz_99_ = (3'b100); + end + 2'b10 : begin + _zz_99_ = (3'b110); + end + default : begin + _zz_99_ = (3'b111); + end + endcase + end + + always @ (*) begin + case(_zz_170_) + 2'b00 : begin + _zz_100_ = (3'b101); + end + 2'b01 : begin + _zz_100_ = (3'b101); + end + 2'b10 : begin + _zz_100_ = (3'b111); + end + default : begin + _zz_100_ = _zz_99_; + end + endcase + end + + assign _zz_101_ = _zz_76_[12]; + always @ (*) begin + _zz_102_[6] = _zz_101_; + _zz_102_[5] = _zz_101_; + _zz_102_[4] = _zz_101_; + _zz_102_[3] = _zz_101_; + _zz_102_[2] = _zz_101_; + _zz_102_[1] = _zz_101_; + _zz_102_[0] = _zz_101_; + end + + assign IBusSimplePlugin_decompressor_decodeInput_valid = (IBusSimplePlugin_decompressor_isRvc ? (IBusSimplePlugin_decompressor_bufferValid || IBusSimplePlugin_iBusRsp_output_valid) : (IBusSimplePlugin_iBusRsp_output_valid && (IBusSimplePlugin_decompressor_bufferValid || (! IBusSimplePlugin_iBusRsp_output_payload_pc[1])))); + assign IBusSimplePlugin_decompressor_decodeInput_payload_pc = IBusSimplePlugin_iBusRsp_output_payload_pc; + assign IBusSimplePlugin_decompressor_decodeInput_payload_isRvc = IBusSimplePlugin_decompressor_isRvc; + assign IBusSimplePlugin_decompressor_decodeInput_payload_rsp_inst = (IBusSimplePlugin_decompressor_isRvc ? IBusSimplePlugin_decompressor_decompressed : IBusSimplePlugin_decompressor_rawInDecode); + assign IBusSimplePlugin_iBusRsp_output_ready = ((! IBusSimplePlugin_decompressor_decodeInput_valid) || (! (((! IBusSimplePlugin_decompressor_decodeInput_ready) || ((IBusSimplePlugin_decompressor_isRvc && (! IBusSimplePlugin_iBusRsp_output_payload_pc[1])) && (IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[17 : 16] != (2'b11)))) || (((! IBusSimplePlugin_decompressor_isRvc) && IBusSimplePlugin_decompressor_bufferValid) && (IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[17 : 16] != (2'b11)))))); + assign IBusSimplePlugin_pcValids_0 = IBusSimplePlugin_injector_nextPcCalc_valids_0; + assign IBusSimplePlugin_pcValids_1 = IBusSimplePlugin_injector_nextPcCalc_valids_1; + assign IBusSimplePlugin_decompressor_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_67_ = IBusSimplePlugin_decodePc_pcReg; + assign _zz_66_ = IBusSimplePlugin_decompressor_decodeInput_payload_rsp_inst; + assign _zz_65_ = IBusSimplePlugin_decompressor_decodeInput_payload_isRvc; + assign _zz_64_ = (decode_PC + _zz_183_); + assign iBus_cmd_valid = IBusSimplePlugin_cmd_valid; + assign IBusSimplePlugin_cmd_ready = iBus_cmd_ready; + assign iBus_cmd_payload_pc = IBusSimplePlugin_cmd_payload_pc; + assign IBusSimplePlugin_pendingCmdNext = (_zz_184_ - iBus_rsp_valid); + assign IBusSimplePlugin_cmd_valid = ((IBusSimplePlugin_iBusRsp_stages_0_input_valid && (IBusSimplePlugin_pendingCmd != (1'b1))) && (! ({execute_arbitration_isValid,decode_arbitration_isValid} != (2'b00)))); + assign IBusSimplePlugin_cmd_payload_pc = {IBusSimplePlugin_iBusRsp_stages_0_input_payload[31 : 2],(2'b00)}; + assign iBus_rsp_takeWhen_valid = (iBus_rsp_valid && (! (IBusSimplePlugin_rspJoin_discardCounter != (1'b0)))); + assign iBus_rsp_takeWhen_payload_error = iBus_rsp_payload_error; + assign iBus_rsp_takeWhen_payload_inst = iBus_rsp_payload_inst; + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid = iBus_rsp_takeWhen_valid; + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_error = iBus_rsp_takeWhen_payload_error; + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_inst = iBus_rsp_takeWhen_payload_inst; + always @ (*) begin + IBusSimplePlugin_rspJoin_rspBufferOutput_valid = IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid; + if(IBusSimplePlugin_rspJoin_rspBuffer_validReg)begin + IBusSimplePlugin_rspJoin_rspBufferOutput_valid = 1'b1; + end + end + + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_ready = IBusSimplePlugin_rspJoin_rspBufferOutput_ready; + assign IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error = IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_error; + assign IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst = IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_inst; + assign IBusSimplePlugin_rspJoin_fetchRsp_pc = IBusSimplePlugin_iBusRsp_stages_1_output_payload; + always @ (*) begin + IBusSimplePlugin_rspJoin_fetchRsp_rsp_error = IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error; + if((! IBusSimplePlugin_rspJoin_rspBufferOutput_valid))begin + IBusSimplePlugin_rspJoin_fetchRsp_rsp_error = 1'b0; + end + end + + assign IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst = IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst; + assign IBusSimplePlugin_rspJoin_exceptionDetected = 1'b0; + assign IBusSimplePlugin_rspJoin_redoRequired = 1'b0; + assign IBusSimplePlugin_rspJoin_join_valid = (IBusSimplePlugin_iBusRsp_stages_1_output_valid && IBusSimplePlugin_rspJoin_rspBufferOutput_valid); + assign IBusSimplePlugin_rspJoin_join_payload_pc = IBusSimplePlugin_rspJoin_fetchRsp_pc; + assign IBusSimplePlugin_rspJoin_join_payload_rsp_error = IBusSimplePlugin_rspJoin_fetchRsp_rsp_error; + assign IBusSimplePlugin_rspJoin_join_payload_rsp_inst = IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst; + assign IBusSimplePlugin_rspJoin_join_payload_isRvc = IBusSimplePlugin_rspJoin_fetchRsp_isRvc; + assign IBusSimplePlugin_iBusRsp_stages_1_output_ready = (IBusSimplePlugin_iBusRsp_stages_1_output_valid ? (IBusSimplePlugin_rspJoin_join_valid && IBusSimplePlugin_rspJoin_join_ready) : IBusSimplePlugin_rspJoin_join_ready); + assign IBusSimplePlugin_rspJoin_rspBufferOutput_ready = (IBusSimplePlugin_rspJoin_join_valid && IBusSimplePlugin_rspJoin_join_ready); + assign _zz_103_ = (! (IBusSimplePlugin_rspJoin_exceptionDetected || IBusSimplePlugin_rspJoin_redoRequired)); + assign IBusSimplePlugin_rspJoin_join_ready = (IBusSimplePlugin_iBusRsp_output_ready && _zz_103_); + assign IBusSimplePlugin_iBusRsp_output_valid = (IBusSimplePlugin_rspJoin_join_valid && _zz_103_); + assign IBusSimplePlugin_iBusRsp_output_payload_pc = IBusSimplePlugin_rspJoin_join_payload_pc; + assign IBusSimplePlugin_iBusRsp_output_payload_rsp_error = IBusSimplePlugin_rspJoin_join_payload_rsp_error; + assign IBusSimplePlugin_iBusRsp_output_payload_rsp_inst = IBusSimplePlugin_rspJoin_join_payload_rsp_inst; + assign IBusSimplePlugin_iBusRsp_output_payload_isRvc = IBusSimplePlugin_rspJoin_join_payload_isRvc; + assign _zz_63_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_104_)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_105_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_105_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_105_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_105_; + assign _zz_62_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_106_ = (4'b0001); + end + 2'b01 : begin + _zz_106_ = (4'b0011); + end + default : begin + _zz_106_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_106_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_61_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(execute_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_185_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (1'b0 || (! execute_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = execute_REGFILE_WRITE_DATA; + always @ (*) begin + execute_DBusSimplePlugin_rspShifted = execute_MEMORY_READ_DATA; + case(execute_MEMORY_ADDRESS_LOW) + 2'b01 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + execute_DBusSimplePlugin_rspShifted[15 : 0] = execute_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + execute_DBusSimplePlugin_rspShifted[7 : 0] = execute_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_107_ = (execute_DBusSimplePlugin_rspShifted[7] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_108_[31] = _zz_107_; + _zz_108_[30] = _zz_107_; + _zz_108_[29] = _zz_107_; + _zz_108_[28] = _zz_107_; + _zz_108_[27] = _zz_107_; + _zz_108_[26] = _zz_107_; + _zz_108_[25] = _zz_107_; + _zz_108_[24] = _zz_107_; + _zz_108_[23] = _zz_107_; + _zz_108_[22] = _zz_107_; + _zz_108_[21] = _zz_107_; + _zz_108_[20] = _zz_107_; + _zz_108_[19] = _zz_107_; + _zz_108_[18] = _zz_107_; + _zz_108_[17] = _zz_107_; + _zz_108_[16] = _zz_107_; + _zz_108_[15] = _zz_107_; + _zz_108_[14] = _zz_107_; + _zz_108_[13] = _zz_107_; + _zz_108_[12] = _zz_107_; + _zz_108_[11] = _zz_107_; + _zz_108_[10] = _zz_107_; + _zz_108_[9] = _zz_107_; + _zz_108_[8] = _zz_107_; + _zz_108_[7 : 0] = execute_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_109_ = (execute_DBusSimplePlugin_rspShifted[15] && (! execute_INSTRUCTION[14])); + always @ (*) begin + _zz_110_[31] = _zz_109_; + _zz_110_[30] = _zz_109_; + _zz_110_[29] = _zz_109_; + _zz_110_[28] = _zz_109_; + _zz_110_[27] = _zz_109_; + _zz_110_[26] = _zz_109_; + _zz_110_[25] = _zz_109_; + _zz_110_[24] = _zz_109_; + _zz_110_[23] = _zz_109_; + _zz_110_[22] = _zz_109_; + _zz_110_[21] = _zz_109_; + _zz_110_[20] = _zz_109_; + _zz_110_[19] = _zz_109_; + _zz_110_[18] = _zz_109_; + _zz_110_[17] = _zz_109_; + _zz_110_[16] = _zz_109_; + _zz_110_[15 : 0] = execute_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_171_) + 2'b00 : begin + execute_DBusSimplePlugin_rspFormated = _zz_108_; + end + 2'b01 : begin + execute_DBusSimplePlugin_rspFormated = _zz_110_; + end + default : begin + execute_DBusSimplePlugin_rspFormated = execute_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_112_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_113_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_114_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_115_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_116_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_111_ = {({_zz_116_,(_zz_234_ == _zz_235_)} != (2'b00)),{((_zz_236_ == _zz_237_) != (1'b0)),{({_zz_238_,_zz_239_} != (6'b000000)),{(_zz_240_ != _zz_241_),{_zz_242_,{_zz_243_,_zz_244_}}}}}}; + assign _zz_59_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_344_) == (32'b00000000000000000001000001110011)),{(_zz_345_ == _zz_346_),{_zz_347_,{_zz_348_,_zz_349_}}}}}}} != (20'b00000000000000000000)); + assign _zz_58_ = _zz_186_[0]; + assign _zz_57_ = _zz_187_[0]; + assign _zz_56_ = _zz_188_[0]; + assign _zz_55_ = _zz_189_[0]; + assign _zz_54_ = _zz_190_[0]; + assign _zz_117_ = _zz_111_[9 : 8]; + assign _zz_53_ = _zz_117_; + assign _zz_118_ = _zz_111_[13 : 12]; + assign _zz_52_ = _zz_118_; + assign _zz_119_ = _zz_111_[15 : 14]; + assign _zz_51_ = _zz_119_; + assign _zz_50_ = _zz_191_[0]; + assign _zz_120_ = _zz_111_[18 : 17]; + assign _zz_49_ = _zz_120_; + assign _zz_121_ = _zz_111_[20 : 19]; + assign _zz_48_ = _zz_121_; + assign _zz_47_ = _zz_192_[0]; + assign _zz_122_ = _zz_111_[23 : 22]; + assign _zz_46_ = _zz_122_; + assign _zz_45_ = _zz_193_[0]; + assign _zz_123_ = _zz_111_[26 : 25]; + assign _zz_44_ = _zz_123_; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_124_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_153_; + assign execute_RegFilePlugin_rs2Data = _zz_154_; + assign _zz_43_ = execute_RegFilePlugin_rs1Data; + assign _zz_42_ = execute_RegFilePlugin_rs2Data; + assign lastStageRegFileWrite_valid = (execute_REGFILE_WRITE_VALID && execute_arbitration_isFiring); + assign lastStageRegFileWrite_payload_address = execute_INSTRUCTION[11 : 7]; + assign lastStageRegFileWrite_payload_data = _zz_60_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_125_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_125_ = {31'd0, _zz_194_}; + end + default : begin + _zz_125_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_39_ = _zz_125_; + assign _zz_37_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_126_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_126_ = {29'd0, _zz_195_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_126_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_126_ = {27'd0, _zz_196_}; + end + endcase + end + + assign _zz_36_ = _zz_126_; + assign _zz_127_ = _zz_197_[11]; + always @ (*) begin + _zz_128_[19] = _zz_127_; + _zz_128_[18] = _zz_127_; + _zz_128_[17] = _zz_127_; + _zz_128_[16] = _zz_127_; + _zz_128_[15] = _zz_127_; + _zz_128_[14] = _zz_127_; + _zz_128_[13] = _zz_127_; + _zz_128_[12] = _zz_127_; + _zz_128_[11] = _zz_127_; + _zz_128_[10] = _zz_127_; + _zz_128_[9] = _zz_127_; + _zz_128_[8] = _zz_127_; + _zz_128_[7] = _zz_127_; + _zz_128_[6] = _zz_127_; + _zz_128_[5] = _zz_127_; + _zz_128_[4] = _zz_127_; + _zz_128_[3] = _zz_127_; + _zz_128_[2] = _zz_127_; + _zz_128_[1] = _zz_127_; + _zz_128_[0] = _zz_127_; + end + + assign _zz_129_ = _zz_198_[11]; + always @ (*) begin + _zz_130_[19] = _zz_129_; + _zz_130_[18] = _zz_129_; + _zz_130_[17] = _zz_129_; + _zz_130_[16] = _zz_129_; + _zz_130_[15] = _zz_129_; + _zz_130_[14] = _zz_129_; + _zz_130_[13] = _zz_129_; + _zz_130_[12] = _zz_129_; + _zz_130_[11] = _zz_129_; + _zz_130_[10] = _zz_129_; + _zz_130_[9] = _zz_129_; + _zz_130_[8] = _zz_129_; + _zz_130_[7] = _zz_129_; + _zz_130_[6] = _zz_129_; + _zz_130_[5] = _zz_129_; + _zz_130_[4] = _zz_129_; + _zz_130_[3] = _zz_129_; + _zz_130_[2] = _zz_129_; + _zz_130_[1] = _zz_129_; + _zz_130_[0] = _zz_129_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_131_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_131_ = {_zz_128_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_131_ = {_zz_130_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_131_ = execute_PC; + end + endcase + end + + assign _zz_34_ = _zz_131_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_199_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_32_ = execute_SrcPlugin_addSub; + assign _zz_31_ = execute_SrcPlugin_addSub; + assign _zz_30_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_shiftReg : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_132_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_132_ = _zz_206_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_133_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_133_ == (3'b000))) begin + _zz_134_ = execute_BranchPlugin_eq; + end else if((_zz_133_ == (3'b001))) begin + _zz_134_ = (! execute_BranchPlugin_eq); + end else if((((_zz_133_ & (3'b101)) == (3'b101)))) begin + _zz_134_ = (! execute_SRC_LESS); + end else begin + _zz_134_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_135_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_135_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_135_ = 1'b1; + end + default : begin + _zz_135_ = _zz_134_; + end + endcase + end + + assign _zz_28_ = _zz_135_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_136_ = _zz_208_[19]; + always @ (*) begin + _zz_137_[10] = _zz_136_; + _zz_137_[9] = _zz_136_; + _zz_137_[8] = _zz_136_; + _zz_137_[7] = _zz_136_; + _zz_137_[6] = _zz_136_; + _zz_137_[5] = _zz_136_; + _zz_137_[4] = _zz_136_; + _zz_137_[3] = _zz_136_; + _zz_137_[2] = _zz_136_; + _zz_137_[1] = _zz_136_; + _zz_137_[0] = _zz_136_; + end + + assign _zz_138_ = _zz_209_[11]; + always @ (*) begin + _zz_139_[19] = _zz_138_; + _zz_139_[18] = _zz_138_; + _zz_139_[17] = _zz_138_; + _zz_139_[16] = _zz_138_; + _zz_139_[15] = _zz_138_; + _zz_139_[14] = _zz_138_; + _zz_139_[13] = _zz_138_; + _zz_139_[12] = _zz_138_; + _zz_139_[11] = _zz_138_; + _zz_139_[10] = _zz_138_; + _zz_139_[9] = _zz_138_; + _zz_139_[8] = _zz_138_; + _zz_139_[7] = _zz_138_; + _zz_139_[6] = _zz_138_; + _zz_139_[5] = _zz_138_; + _zz_139_[4] = _zz_138_; + _zz_139_[3] = _zz_138_; + _zz_139_[2] = _zz_138_; + _zz_139_[1] = _zz_138_; + _zz_139_[0] = _zz_138_; + end + + assign _zz_140_ = _zz_210_[11]; + always @ (*) begin + _zz_141_[18] = _zz_140_; + _zz_141_[17] = _zz_140_; + _zz_141_[16] = _zz_140_; + _zz_141_[15] = _zz_140_; + _zz_141_[14] = _zz_140_; + _zz_141_[13] = _zz_140_; + _zz_141_[12] = _zz_140_; + _zz_141_[11] = _zz_140_; + _zz_141_[10] = _zz_140_; + _zz_141_[9] = _zz_140_; + _zz_141_[8] = _zz_140_; + _zz_141_[7] = _zz_140_; + _zz_141_[6] = _zz_140_; + _zz_141_[5] = _zz_140_; + _zz_141_[4] = _zz_140_; + _zz_141_[3] = _zz_140_; + _zz_141_[2] = _zz_140_; + _zz_141_[1] = _zz_140_; + _zz_141_[0] = _zz_140_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_142_ = {{_zz_137_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_142_ = {_zz_139_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_142_ = {{_zz_141_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_142_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_26_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_143_ = {CsrPlugin_selfException_valid,DBusSimplePlugin_memoryExceptionPort_valid}; + assign _zz_144_ = _zz_211_[0]; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(decodeExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! (execute_arbitration_isValid != (1'b0))) && IBusSimplePlugin_pcValids_1); + if((CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute != (1'b0)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_24_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_23_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = 1'b0; + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_145_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_146_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_172_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_146_ = (_zz_145_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_146_ != (32'b00000000000000000000000000000000)); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + IBusSimplePlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_165_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + IBusSimplePlugin_injectionPort_valid = 1'b1; + debug_bus_cmd_ready = IBusSimplePlugin_injectionPort_ready; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_147_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign IBusSimplePlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign _zz_22_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_217_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_218_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_219_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_220_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_21_ = decode_ALU_CTRL; + assign _zz_19_ = _zz_53_; + assign _zz_38_ = decode_to_execute_ALU_CTRL; + assign _zz_18_ = decode_BRANCH_CTRL; + assign _zz_16_ = _zz_44_; + assign _zz_27_ = decode_to_execute_BRANCH_CTRL; + assign _zz_15_ = decode_SRC2_CTRL; + assign _zz_13_ = _zz_49_; + assign _zz_33_ = decode_to_execute_SRC2_CTRL; + assign _zz_12_ = decode_SRC1_CTRL; + assign _zz_10_ = _zz_46_; + assign _zz_35_ = decode_to_execute_SRC1_CTRL; + assign _zz_9_ = decode_SHIFT_CTRL; + assign _zz_7_ = _zz_48_; + assign _zz_29_ = decode_to_execute_SHIFT_CTRL; + assign _zz_6_ = decode_ENV_CTRL; + assign _zz_4_ = _zz_52_; + assign _zz_25_ = decode_to_execute_ENV_CTRL; + assign _zz_3_ = decode_ALU_BITWISE_CTRL; + assign _zz_1_ = _zz_51_; + assign _zz_40_ = decode_to_execute_ALU_BITWISE_CTRL; + assign decode_arbitration_isFlushed = ({execute_arbitration_flushAll,decode_arbitration_flushAll} != (2'b00)); + assign execute_arbitration_isFlushed = (execute_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (1'b0 || execute_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || 1'b0); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign iBus_cmd_ready = ((1'b1 && (! iBus_cmd_m2sPipe_valid)) || iBus_cmd_m2sPipe_ready); + assign iBus_cmd_m2sPipe_valid = _zz_150_; + assign iBus_cmd_m2sPipe_payload_pc = _zz_151_; + assign iBusWishbone_ADR = (iBus_cmd_m2sPipe_payload_pc >>> 2); + assign iBusWishbone_CTI = (3'b000); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + assign iBusWishbone_CYC = iBus_cmd_m2sPipe_valid; + assign iBusWishbone_STB = iBus_cmd_m2sPipe_valid; + assign iBus_cmd_m2sPipe_ready = (iBus_cmd_m2sPipe_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = (iBusWishbone_CYC && iBusWishbone_ACK); + assign iBus_rsp_payload_inst = iBusWishbone_DAT_MISO; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_152_ = (4'b0001); + end + 2'b01 : begin + _zz_152_ = (4'b0011); + end + default : begin + _zz_152_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_227_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusSimplePlugin_fetchPc_pcReg <= externalResetVector; + IBusSimplePlugin_fetchPc_inc <= 1'b0; + _zz_70_ <= 1'b0; + IBusSimplePlugin_decodePc_pcReg <= externalResetVector; + _zz_75_ <= 1'b0; + IBusSimplePlugin_decompressor_bufferValid <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusSimplePlugin_injector_decodeRemoved <= 1'b0; + IBusSimplePlugin_pendingCmd <= (1'b0); + IBusSimplePlugin_rspJoin_discardCounter <= (1'b0); + IBusSimplePlugin_rspJoin_rspBuffer_validReg <= 1'b0; + _zz_104_ <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_145_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + _zz_149_ <= (3'b000); + _zz_150_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusSimplePlugin_fetchPc_propagatePc)begin + IBusSimplePlugin_fetchPc_inc <= 1'b0; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_fetchPc_inc <= 1'b0; + end + if(_zz_164_)begin + IBusSimplePlugin_fetchPc_inc <= 1'b1; + end + if(IBusSimplePlugin_fetchPc_samplePcNext)begin + IBusSimplePlugin_fetchPc_pcReg <= IBusSimplePlugin_fetchPc_pc; + end + _zz_70_ <= 1'b1; + if((decode_arbitration_isFiring && (! IBusSimplePlugin_decodePc_injectedDecode)))begin + IBusSimplePlugin_decodePc_pcReg <= IBusSimplePlugin_decodePc_pcPlus; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_decodePc_pcReg <= IBusSimplePlugin_jump_pcLoad_payload; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + _zz_75_ <= 1'b0; + end + if(_zz_73_)begin + _zz_75_ <= IBusSimplePlugin_iBusRsp_stages_0_output_valid; + end + if((IBusSimplePlugin_decompressor_decodeInput_valid && IBusSimplePlugin_decompressor_decodeInput_ready))begin + IBusSimplePlugin_decompressor_bufferValid <= 1'b0; + end + if(_zz_166_)begin + IBusSimplePlugin_decompressor_bufferValid <= ((! (((! IBusSimplePlugin_decompressor_isRvc) && (! IBusSimplePlugin_iBusRsp_output_payload_pc[1])) && (! IBusSimplePlugin_decompressor_bufferValid))) && (! ((IBusSimplePlugin_decompressor_isRvc && IBusSimplePlugin_iBusRsp_output_payload_pc[1]) && IBusSimplePlugin_decompressor_decodeInput_ready))); + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_decompressor_bufferValid <= 1'b0; + end + if((! 1'b0))begin + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= IBusSimplePlugin_injector_nextPcCalc_valids_0; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusSimplePlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_decodeRemoved <= 1'b0; + end + IBusSimplePlugin_pendingCmd <= IBusSimplePlugin_pendingCmdNext; + IBusSimplePlugin_rspJoin_discardCounter <= (IBusSimplePlugin_rspJoin_discardCounter - (iBus_rsp_valid && (IBusSimplePlugin_rspJoin_discardCounter != (1'b0)))); + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_rspJoin_discardCounter <= (IBusSimplePlugin_pendingCmd - iBus_rsp_valid); + end + if(IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid)begin + IBusSimplePlugin_rspJoin_rspBuffer_validReg <= 1'b1; + end + if(IBusSimplePlugin_rspJoin_rspBufferOutput_ready)begin + IBusSimplePlugin_rspJoin_rspBuffer_validReg <= 1'b0; + end + if((dBus_cmd_valid && dBus_cmd_ready))begin + _zz_104_ <= 1'b1; + end + if((! execute_arbitration_isStuck))begin + _zz_104_ <= 1'b0; + end + if(_zz_155_)begin + if(_zz_156_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_158_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_159_)begin + case(_zz_160_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if((((! IBusSimplePlugin_iBusRsp_output_ready) && (IBusSimplePlugin_decompressor_decodeInput_valid && IBusSimplePlugin_decompressor_decodeInput_ready)) && (! (IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))))begin + IBusSimplePlugin_fetchPc_pcReg[1] <= 1'b1; + end + case(_zz_149_) + 3'b000 : begin + if(IBusSimplePlugin_injectionPort_valid)begin + _zz_149_ <= (3'b001); + end + end + 3'b001 : begin + _zz_149_ <= (3'b010); + end + 3'b010 : begin + _zz_149_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_149_ <= (3'b100); + end + end + 3'b100 : begin + _zz_149_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_145_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_221_[0]; + CsrPlugin_mstatus_MIE <= _zz_222_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_224_[0]; + CsrPlugin_mie_MTIE <= _zz_225_[0]; + CsrPlugin_mie_MSIE <= _zz_226_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(iBus_cmd_ready)begin + _zz_150_ <= iBus_cmd_valid; + end + if(_zz_167_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(_zz_166_)begin + IBusSimplePlugin_decompressor_bufferData <= IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[31 : 16]; + end + if((! execute_arbitration_isStuckByOthers))begin + execute_LightShifterPlugin_shiftReg <= _zz_60_; + end + if(_zz_155_)begin + if(_zz_156_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(execute_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(decodeExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= decodeExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= decodeExceptionPort_payload_badAddr; + end + if(_zz_157_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_144_ ? DBusSimplePlugin_memoryExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_144_ ? DBusSimplePlugin_memoryExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(_zz_158_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= execute_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= decode_FORMAL_PC_NEXT; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_20_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_17_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_14_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(((! execute_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_execute)))begin + decode_to_execute_PC <= decode_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_RVC <= decode_IS_RVC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_2_; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_223_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(iBus_cmd_ready)begin + _zz_151_ <= iBus_cmd_payload_pc; + end + if(_zz_167_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({execute_arbitration_isValid,decode_arbitration_isValid} != (2'b00)) || IBusSimplePlugin_incomingInstruction); + if(execute_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_60_; + end + _zz_147_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_165_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_161_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + _zz_148_ <= 1'b0; + end else begin + if((DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)))begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid)begin + case(_zz_165_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_godmode <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_213_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_214_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_215_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_216_[0]; + end + end + default : begin + end + endcase + end + if(_zz_161_)begin + if(_zz_162_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_163_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + _zz_148_ <= (DebugPlugin_stepIt && decode_arbitration_isFiring); + end + end + + always @ (posedge clk) begin + IBusSimplePlugin_injectionPort_payload_regNext <= IBusSimplePlugin_injectionPort_payload; + end + +endmodule + diff --git a/hw/rtl/2-stage-no-cache-debug.yaml b/hw/rtl/2-stage-no-cache-debug.yaml new file mode 100644 index 0000000..6ab729f --- /dev/null +++ b/hw/rtl/2-stage-no-cache-debug.yaml @@ -0,0 +1 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} diff --git a/hw/rtl/4-stage-1024-cache-debug.v b/hw/rtl/4-stage-1024-cache-debug.v new file mode 100644 index 0000000..5992167 --- /dev/null +++ b/hw/rtl/4-stage-1024-cache-debug.v @@ -0,0 +1,3965 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 26/04/2019, 01:09:33 +// Component : VexRiscv + + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input io_cpu_fetch_dataBypassValid, + input [31:0] io_cpu_fetch_dataBypass, + output io_cpu_fetch_mmuBus_cmd_isValid, + output [31:0] io_cpu_fetch_mmuBus_cmd_virtualAddress, + output io_cpu_fetch_mmuBus_cmd_bypassTranslation, + input [31:0] io_cpu_fetch_mmuBus_rsp_physicalAddress, + input io_cpu_fetch_mmuBus_rsp_isIoAccess, + input io_cpu_fetch_mmuBus_rsp_allowRead, + input io_cpu_fetch_mmuBus_rsp_allowWrite, + input io_cpu_fetch_mmuBus_rsp_allowExecute, + input io_cpu_fetch_mmuBus_rsp_exception, + input io_cpu_fetch_mmuBus_rsp_refilling, + output io_cpu_fetch_mmuBus_end, + input io_cpu_fetch_mmuBus_busy, + output [31:0] io_cpu_fetch_physicalAddress, + output io_cpu_fetch_cacheMiss, + output io_cpu_fetch_error, + output io_cpu_fetch_mmuRefilling, + output io_cpu_fetch_mmuException, + input io_cpu_fetch_isUser, + output io_cpu_fetch_haltIt, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset); + reg [23:0] _zz_10_; + reg [31:0] _zz_11_; + wire _zz_12_; + wire _zz_13_; + wire [0:0] _zz_14_; + wire [0:0] _zz_15_; + wire [23:0] _zz_16_; + reg _zz_1_; + reg _zz_2_; + reg lineLoader_fire; + reg lineLoader_valid; + reg [31:0] lineLoader_address; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [5:0] lineLoader_flushCounter; + reg _zz_3_; + reg lineLoader_cmdSent; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + reg [2:0] lineLoader_wordIndex; + wire lineLoader_write_tag_0_valid; + wire [4:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [21:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [7:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire _zz_4_; + wire [4:0] _zz_5_; + wire _zz_6_; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [21:0] fetchStage_read_waysValues_0_tag_address; + wire [23:0] _zz_7_; + wire [7:0] _zz_8_; + wire _zz_9_; + wire [31:0] fetchStage_read_waysValues_0_data; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + reg [23:0] ways_0_tags [0:31]; + reg [31:0] ways_0_datas [0:255]; + assign _zz_12_ = (! lineLoader_flushCounter[5]); + assign _zz_13_ = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign _zz_14_ = _zz_7_[0 : 0]; + assign _zz_15_ = _zz_7_[1 : 1]; + assign _zz_16_ = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @ (posedge clk) begin + if(_zz_2_) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_16_; + end + end + + always @ (posedge clk) begin + if(_zz_6_) begin + _zz_10_ <= ways_0_tags[_zz_5_]; + end + end + + always @ (posedge clk) begin + if(_zz_1_) begin + ways_0_datas[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_9_) begin + _zz_11_ <= ways_0_datas[_zz_8_]; + end + end + + always @ (*) begin + _zz_1_ = 1'b0; + if(lineLoader_write_data_0_valid)begin + _zz_1_ = 1'b1; + end + end + + always @ (*) begin + _zz_2_ = 1'b0; + if(lineLoader_write_tag_0_valid)begin + _zz_2_ = 1'b1; + end + end + + assign io_cpu_fetch_haltIt = io_cpu_fetch_mmuBus_busy; + always @ (*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid)begin + if((lineLoader_wordIndex == (3'b111)))begin + lineLoader_fire = 1'b1; + end + end + end + + always @ (*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(_zz_12_)begin + io_cpu_prefetch_haltIt = 1'b1; + end + if((! _zz_3_))begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush)begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],(5'b00000)}; + assign io_mem_cmd_payload_size = (3'b101); + always @ (*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(lineLoader_fire)begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign _zz_4_ = 1'b1; + assign lineLoader_write_tag_0_valid = ((_zz_4_ && lineLoader_fire) || (! lineLoader_flushCounter[5])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[5] ? lineLoader_address[9 : 5] : lineLoader_flushCounter[4 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[5]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 10]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && _zz_4_); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[9 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign _zz_5_ = io_cpu_prefetch_pc[9 : 5]; + assign _zz_6_ = (! io_cpu_fetch_isStuck); + assign _zz_7_ = _zz_10_; + assign fetchStage_read_waysValues_0_tag_valid = _zz_14_[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_15_[0]; + assign fetchStage_read_waysValues_0_tag_address = _zz_7_[23 : 2]; + assign _zz_8_ = io_cpu_prefetch_pc[9 : 2]; + assign _zz_9_ = (! io_cpu_fetch_isStuck); + assign fetchStage_read_waysValues_0_data = _zz_11_; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuBus_rsp_physicalAddress[31 : 10])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != (1'b0)); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_waysValues_0_data; + assign fetchStage_hit_word = fetchStage_hit_data[31 : 0]; + assign io_cpu_fetch_data = (io_cpu_fetch_dataBypassValid ? io_cpu_fetch_dataBypass : fetchStage_hit_word); + assign io_cpu_fetch_mmuBus_cmd_isValid = io_cpu_fetch_isValid; + assign io_cpu_fetch_mmuBus_cmd_virtualAddress = io_cpu_fetch_pc; + assign io_cpu_fetch_mmuBus_cmd_bypassTranslation = 1'b0; + assign io_cpu_fetch_mmuBus_end = ((! io_cpu_fetch_isStuck) || io_cpu_fetch_isRemoved); + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuBus_rsp_physicalAddress; + assign io_cpu_fetch_cacheMiss = (! fetchStage_hit_valid); + assign io_cpu_fetch_error = fetchStage_hit_error; + assign io_cpu_fetch_mmuRefilling = io_cpu_fetch_mmuBus_rsp_refilling; + assign io_cpu_fetch_mmuException = ((! io_cpu_fetch_mmuBus_rsp_refilling) && (io_cpu_fetch_mmuBus_rsp_exception || (! io_cpu_fetch_mmuBus_rsp_allowExecute))); + always @ (posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= (3'b000); + end else begin + if(lineLoader_fire)begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire)begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid)begin + lineLoader_valid <= 1'b1; + end + if(io_flush)begin + lineLoader_flushPending <= 1'b1; + end + if(_zz_13_)begin + lineLoader_flushPending <= 1'b0; + end + if((io_mem_cmd_valid && io_mem_cmd_ready))begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire)begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid)begin + lineLoader_wordIndex <= (lineLoader_wordIndex + (3'b001)); + if(io_mem_rsp_payload_error)begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + if(io_cpu_fill_valid)begin + lineLoader_address <= io_cpu_fill_payload; + end + if(_zz_12_)begin + lineLoader_flushCounter <= (lineLoader_flushCounter + (6'b000001)); + end + _zz_3_ <= lineLoader_flushCounter[5]; + if(_zz_13_)begin + lineLoader_flushCounter <= (6'b000000); + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + wire _zz_142_; + wire _zz_143_; + wire _zz_144_; + wire _zz_145_; + wire _zz_146_; + wire [31:0] _zz_147_; + wire _zz_148_; + wire _zz_149_; + wire _zz_150_; + wire _zz_151_; + wire _zz_152_; + wire _zz_153_; + wire _zz_154_; + wire _zz_155_; + wire _zz_156_; + wire _zz_157_; + wire [31:0] _zz_158_; + reg _zz_159_; + reg [31:0] _zz_160_; + reg [31:0] _zz_161_; + reg [31:0] _zz_162_; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_error; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_haltIt; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation; + wire IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire _zz_163_; + wire _zz_164_; + wire _zz_165_; + wire _zz_166_; + wire _zz_167_; + wire _zz_168_; + wire [1:0] _zz_169_; + wire _zz_170_; + wire _zz_171_; + wire _zz_172_; + wire _zz_173_; + wire [5:0] _zz_174_; + wire _zz_175_; + wire _zz_176_; + wire [1:0] _zz_177_; + wire _zz_178_; + wire [2:0] _zz_179_; + wire [2:0] _zz_180_; + wire [31:0] _zz_181_; + wire [2:0] _zz_182_; + wire [0:0] _zz_183_; + wire [0:0] _zz_184_; + wire [0:0] _zz_185_; + wire [0:0] _zz_186_; + wire [0:0] _zz_187_; + wire [0:0] _zz_188_; + wire [0:0] _zz_189_; + wire [0:0] _zz_190_; + wire [0:0] _zz_191_; + wire [0:0] _zz_192_; + wire [2:0] _zz_193_; + wire [4:0] _zz_194_; + wire [11:0] _zz_195_; + wire [11:0] _zz_196_; + wire [31:0] _zz_197_; + wire [31:0] _zz_198_; + wire [31:0] _zz_199_; + wire [31:0] _zz_200_; + wire [31:0] _zz_201_; + wire [31:0] _zz_202_; + wire [31:0] _zz_203_; + wire [31:0] _zz_204_; + wire [32:0] _zz_205_; + wire [19:0] _zz_206_; + wire [11:0] _zz_207_; + wire [11:0] _zz_208_; + wire [1:0] _zz_209_; + wire [1:0] _zz_210_; + wire [1:0] _zz_211_; + wire [1:0] _zz_212_; + wire [0:0] _zz_213_; + wire [0:0] _zz_214_; + wire [0:0] _zz_215_; + wire [0:0] _zz_216_; + wire [30:0] _zz_217_; + wire [30:0] _zz_218_; + wire [30:0] _zz_219_; + wire [30:0] _zz_220_; + wire [0:0] _zz_221_; + wire [0:0] _zz_222_; + wire [0:0] _zz_223_; + wire [0:0] _zz_224_; + wire [0:0] _zz_225_; + wire [0:0] _zz_226_; + wire [26:0] _zz_227_; + wire [6:0] _zz_228_; + wire [1:0] _zz_229_; + wire [31:0] _zz_230_; + wire [31:0] _zz_231_; + wire [31:0] _zz_232_; + wire [31:0] _zz_233_; + wire [0:0] _zz_234_; + wire [0:0] _zz_235_; + wire _zz_236_; + wire [0:0] _zz_237_; + wire [21:0] _zz_238_; + wire [31:0] _zz_239_; + wire [31:0] _zz_240_; + wire [31:0] _zz_241_; + wire [31:0] _zz_242_; + wire _zz_243_; + wire _zz_244_; + wire [0:0] _zz_245_; + wire [0:0] _zz_246_; + wire [1:0] _zz_247_; + wire [1:0] _zz_248_; + wire _zz_249_; + wire [0:0] _zz_250_; + wire [17:0] _zz_251_; + wire [31:0] _zz_252_; + wire [31:0] _zz_253_; + wire [31:0] _zz_254_; + wire _zz_255_; + wire _zz_256_; + wire _zz_257_; + wire [1:0] _zz_258_; + wire [1:0] _zz_259_; + wire _zz_260_; + wire [0:0] _zz_261_; + wire [14:0] _zz_262_; + wire [31:0] _zz_263_; + wire [31:0] _zz_264_; + wire [31:0] _zz_265_; + wire [31:0] _zz_266_; + wire [31:0] _zz_267_; + wire [31:0] _zz_268_; + wire _zz_269_; + wire [0:0] _zz_270_; + wire [0:0] _zz_271_; + wire _zz_272_; + wire [0:0] _zz_273_; + wire [11:0] _zz_274_; + wire [31:0] _zz_275_; + wire [31:0] _zz_276_; + wire [31:0] _zz_277_; + wire [31:0] _zz_278_; + wire _zz_279_; + wire [0:0] _zz_280_; + wire [0:0] _zz_281_; + wire _zz_282_; + wire [0:0] _zz_283_; + wire [7:0] _zz_284_; + wire [31:0] _zz_285_; + wire [31:0] _zz_286_; + wire [31:0] _zz_287_; + wire [0:0] _zz_288_; + wire [0:0] _zz_289_; + wire [1:0] _zz_290_; + wire [1:0] _zz_291_; + wire _zz_292_; + wire [0:0] _zz_293_; + wire [3:0] _zz_294_; + wire [31:0] _zz_295_; + wire [31:0] _zz_296_; + wire [31:0] _zz_297_; + wire [31:0] _zz_298_; + wire [31:0] _zz_299_; + wire [31:0] _zz_300_; + wire _zz_301_; + wire [0:0] _zz_302_; + wire [0:0] _zz_303_; + wire [5:0] _zz_304_; + wire [5:0] _zz_305_; + wire _zz_306_; + wire [0:0] _zz_307_; + wire [0:0] _zz_308_; + wire [31:0] _zz_309_; + wire _zz_310_; + wire [0:0] _zz_311_; + wire [2:0] _zz_312_; + wire _zz_313_; + wire [0:0] _zz_314_; + wire [1:0] _zz_315_; + wire [0:0] _zz_316_; + wire [1:0] _zz_317_; + wire _zz_318_; + wire [31:0] _zz_319_; + wire _zz_320_; + wire _zz_321_; + wire [31:0] _zz_322_; + wire [31:0] _zz_323_; + wire [31:0] _zz_324_; + wire [31:0] _zz_325_; + wire [31:0] _zz_326_; + wire [31:0] _zz_327_; + wire [31:0] _zz_328_; + wire [31:0] _zz_329_; + wire [31:0] _zz_330_; + wire [31:0] _zz_331_; + wire [31:0] _zz_332_; + wire [31:0] _zz_333_; + wire [31:0] _zz_334_; + wire _zz_335_; + wire [0:0] _zz_336_; + wire [12:0] _zz_337_; + wire [31:0] _zz_338_; + wire [31:0] _zz_339_; + wire [31:0] _zz_340_; + wire _zz_341_; + wire [0:0] _zz_342_; + wire [6:0] _zz_343_; + wire [31:0] _zz_344_; + wire [31:0] _zz_345_; + wire [31:0] _zz_346_; + wire _zz_347_; + wire [0:0] _zz_348_; + wire [0:0] _zz_349_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_1_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_2_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_3_; + wire decode_DO_EBREAK; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_4_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_5_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_6_; + wire decode_MEMORY_ENABLE; + wire decode_MEMORY_STORE; + wire decode_SRC2_FORCE_ZERO; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_7_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_8_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_9_; + wire decode_CSR_READ_OPCODE; + wire [31:0] memory_PC; + wire `EnvCtrlEnum_defaultEncoding_type _zz_10_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_11_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_12_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_13_; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_14_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_15_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_16_; + wire [31:0] memory_INSTRUCTION; + wire decode_IS_CSR; + wire decode_CSR_WRITE_OPCODE; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire decode_SRC_LESS_UNSIGNED; + wire [31:0] memory_MEMORY_READ_DATA; + wire writeBack_REGFILE_WRITE_VALID; + wire memory_REGFILE_WRITE_VALID; + wire execute_REGFILE_WRITE_VALID; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_17_; + wire `AluCtrlEnum_defaultEncoding_type _zz_18_; + wire `AluCtrlEnum_defaultEncoding_type _zz_19_; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_20_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_21_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_22_; + wire [1:0] memory_MEMORY_ADDRESS_LOW; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_23_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_24_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_25_; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_26_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_defaultEncoding_type memory_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_27_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_28_; + wire _zz_29_; + wire _zz_30_; + wire `EnvCtrlEnum_defaultEncoding_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_31_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_32_; + wire [31:0] execute_PC; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_33_; + wire _zz_34_; + reg [31:0] _zz_35_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_36_; + wire _zz_37_; + wire [31:0] _zz_38_; + wire [31:0] _zz_39_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_40_; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_41_; + wire [31:0] _zz_42_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_43_; + wire [31:0] _zz_44_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_45_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_46_; + wire [31:0] _zz_47_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_48_; + reg _zz_49_; + wire [31:0] _zz_50_; + wire [31:0] _zz_51_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire `BranchCtrlEnum_defaultEncoding_type _zz_52_; + wire _zz_53_; + wire _zz_54_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_55_; + wire _zz_56_; + wire `AluCtrlEnum_defaultEncoding_type _zz_57_; + wire _zz_58_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_59_; + wire _zz_60_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_61_; + wire _zz_62_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_63_; + wire _zz_64_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_65_; + wire _zz_66_; + wire _zz_67_; + wire _zz_68_; + reg [31:0] decode_INSTRUCTION; + wire writeBack_MEMORY_STORE; + reg [31:0] _zz_69_; + wire writeBack_MEMORY_ENABLE; + wire [1:0] writeBack_MEMORY_ADDRESS_LOW; + wire [31:0] writeBack_MEMORY_READ_DATA; + wire memory_ALIGNEMENT_FAULT; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_STORE; + wire memory_MEMORY_ENABLE; + wire [31:0] _zz_70_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_71_; + wire [31:0] execute_RS2; + wire [31:0] execute_INSTRUCTION; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_72_; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected; + reg _zz_73_; + reg _zz_74_; + reg _zz_75_; + reg [31:0] _zz_76_; + reg [31:0] _zz_77_; + wire [31:0] decode_PC; + wire [31:0] _zz_78_; + wire [31:0] _zz_79_; + wire [31:0] _zz_80_; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + reg memory_arbitration_flushAll; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + wire writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + wire writeBack_arbitration_flushAll; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_fetcherflushIt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + wire IBusCachedPlugin_redoBranch_valid; + wire [31:0] IBusCachedPlugin_redoBranch_payload; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg IBusCachedPlugin_injectionPort_valid; + reg IBusCachedPlugin_injectionPort_ready; + wire [31:0] IBusCachedPlugin_injectionPort_payload; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [2:0] _zz_81_; + wire [2:0] _zz_82_; + wire _zz_83_; + wire _zz_84_; + wire IBusCachedPlugin_fetchPc_preOutput_valid; + wire IBusCachedPlugin_fetchPc_preOutput_ready; + wire [31:0] IBusCachedPlugin_fetchPc_preOutput_payload; + wire _zz_85_; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_inc; + reg IBusCachedPlugin_fetchPc_propagatePc; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + reg IBusCachedPlugin_fetchPc_samplePcNext; + reg _zz_86_; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_0_inputSample; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + reg IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt; + wire IBusCachedPlugin_iBusRsp_cacheRspArbitration_inputSample; + wire _zz_87_; + wire _zz_88_; + wire _zz_89_; + wire _zz_90_; + reg _zz_91_; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_decodeInput_valid; + wire IBusCachedPlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + reg IBusCachedPlugin_injector_decodeRemoved; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + reg IBusCachedPlugin_rsp_redoFetch; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + wire _zz_92_; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_93_; + reg [3:0] _zz_94_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] writeBack_DBusSimplePlugin_rspShifted; + wire _zz_95_; + reg [31:0] _zz_96_; + wire _zz_97_; + reg [31:0] _zz_98_; + reg [31:0] writeBack_DBusSimplePlugin_rspFormated; + wire [27:0] _zz_99_; + wire _zz_100_; + wire _zz_101_; + wire _zz_102_; + wire _zz_103_; + wire _zz_104_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_105_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_106_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_107_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_108_; + wire `AluCtrlEnum_defaultEncoding_type _zz_109_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_110_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_111_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_112_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire lastStageRegFileWrite_valid /* verilator public */ ; + wire [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + wire [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_113_; + reg [31:0] _zz_114_; + wire _zz_115_; + reg [19:0] _zz_116_; + wire _zz_117_; + reg [19:0] _zz_118_; + reg [31:0] _zz_119_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_120_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_121_; + reg _zz_122_; + reg _zz_123_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_124_; + reg [10:0] _zz_125_; + wire _zz_126_; + reg [19:0] _zz_127_; + wire _zz_128_; + reg [18:0] _zz_129_; + reg [31:0] _zz_130_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_131_; + wire _zz_132_; + wire [1:0] _zz_133_; + wire _zz_134_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_135_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_136_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_137_; + reg DebugPlugin_resetIt_regNext; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg [1:0] execute_to_memory_MEMORY_ADDRESS_LOW; + reg [1:0] memory_to_writeBack_MEMORY_ADDRESS_LOW; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg execute_to_memory_REGFILE_WRITE_VALID; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + reg [31:0] memory_to_writeBack_MEMORY_READ_DATA; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_IS_CSR; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg [31:0] decode_to_execute_INSTRUCTION; + reg [31:0] execute_to_memory_INSTRUCTION; + reg [31:0] memory_to_writeBack_INSTRUCTION; + reg execute_to_memory_ALIGNEMENT_FAULT; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type execute_to_memory_ENV_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type memory_to_writeBack_ENV_CTRL; + reg [31:0] decode_to_execute_PC; + reg [31:0] execute_to_memory_PC; + reg [31:0] memory_to_writeBack_PC; + reg decode_to_execute_CSR_READ_OPCODE; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg decode_to_execute_MEMORY_STORE; + reg execute_to_memory_MEMORY_STORE; + reg memory_to_writeBack_MEMORY_STORE; + reg decode_to_execute_MEMORY_ENABLE; + reg execute_to_memory_MEMORY_ENABLE; + reg memory_to_writeBack_MEMORY_ENABLE; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + reg decode_to_execute_DO_EBREAK; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg [2:0] _zz_138_; + reg [31:0] IBusCachedPlugin_injectionPort_payload_regNext; + reg [2:0] _zz_139_; + reg _zz_140_; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_141_; + `ifndef SYNTHESIS + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_1__string; + reg [39:0] _zz_2__string; + reg [39:0] _zz_3__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_4__string; + reg [71:0] _zz_5__string; + reg [71:0] _zz_6__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_7__string; + reg [31:0] _zz_8__string; + reg [31:0] _zz_9__string; + reg [47:0] _zz_10__string; + reg [47:0] _zz_11__string; + reg [47:0] _zz_12__string; + reg [47:0] _zz_13__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_14__string; + reg [47:0] _zz_15__string; + reg [47:0] _zz_16__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_17__string; + reg [63:0] _zz_18__string; + reg [63:0] _zz_19__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_20__string; + reg [23:0] _zz_21__string; + reg [23:0] _zz_22__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_23__string; + reg [95:0] _zz_24__string; + reg [95:0] _zz_25__string; + reg [47:0] memory_ENV_CTRL_string; + reg [47:0] _zz_27__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_28__string; + reg [47:0] writeBack_ENV_CTRL_string; + reg [47:0] _zz_31__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_33__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_36__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_41__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_43__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_46__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_48__string; + reg [31:0] _zz_52__string; + reg [23:0] _zz_55__string; + reg [63:0] _zz_57__string; + reg [47:0] _zz_59__string; + reg [39:0] _zz_61__string; + reg [71:0] _zz_63__string; + reg [95:0] _zz_65__string; + reg [95:0] _zz_105__string; + reg [71:0] _zz_106__string; + reg [39:0] _zz_107__string; + reg [47:0] _zz_108__string; + reg [63:0] _zz_109__string; + reg [23:0] _zz_110__string; + reg [31:0] _zz_111__string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [47:0] execute_to_memory_ENV_CTRL_string; + reg [47:0] memory_to_writeBack_ENV_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_163_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_164_ = (! execute_arbitration_isStuckByOthers); + assign _zz_165_ = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != (2'b00)); + assign _zz_166_ = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != (2'b00)); + assign _zz_167_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_168_ = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_169_ = writeBack_INSTRUCTION[29 : 28]; + assign _zz_170_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_171_ = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00)) == 1'b0); + assign _zz_172_ = (DebugPlugin_stepIt && IBusCachedPlugin_incomingInstruction); + assign _zz_173_ = (IBusCachedPlugin_fetchPc_preOutput_valid && IBusCachedPlugin_fetchPc_preOutput_ready); + assign _zz_174_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_175_ = (iBus_cmd_valid || (_zz_139_ != (3'b000))); + assign _zz_176_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_177_ = writeBack_INSTRUCTION[13 : 12]; + assign _zz_178_ = execute_INSTRUCTION[13]; + assign _zz_179_ = (_zz_81_ - (3'b001)); + assign _zz_180_ = {IBusCachedPlugin_fetchPc_inc,(2'b00)}; + assign _zz_181_ = {29'd0, _zz_180_}; + assign _zz_182_ = (memory_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_183_ = _zz_99_[1 : 1]; + assign _zz_184_ = _zz_99_[3 : 3]; + assign _zz_185_ = _zz_99_[6 : 6]; + assign _zz_186_ = _zz_99_[9 : 9]; + assign _zz_187_ = _zz_99_[12 : 12]; + assign _zz_188_ = _zz_99_[15 : 15]; + assign _zz_189_ = _zz_99_[19 : 19]; + assign _zz_190_ = _zz_99_[22 : 22]; + assign _zz_191_ = _zz_99_[24 : 24]; + assign _zz_192_ = execute_SRC_LESS; + assign _zz_193_ = (3'b100); + assign _zz_194_ = execute_INSTRUCTION[19 : 15]; + assign _zz_195_ = execute_INSTRUCTION[31 : 20]; + assign _zz_196_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_197_ = ($signed(_zz_198_) + $signed(_zz_201_)); + assign _zz_198_ = ($signed(_zz_199_) + $signed(_zz_200_)); + assign _zz_199_ = execute_SRC1; + assign _zz_200_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_201_ = (execute_SRC_USE_SUB_LESS ? _zz_202_ : _zz_203_); + assign _zz_202_ = (32'b00000000000000000000000000000001); + assign _zz_203_ = (32'b00000000000000000000000000000000); + assign _zz_204_ = (_zz_205_ >>> 1); + assign _zz_205_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_206_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_207_ = execute_INSTRUCTION[31 : 20]; + assign _zz_208_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_209_ = (_zz_131_ & (~ _zz_210_)); + assign _zz_210_ = (_zz_131_ - (2'b01)); + assign _zz_211_ = (_zz_133_ & (~ _zz_212_)); + assign _zz_212_ = (_zz_133_ - (2'b01)); + assign _zz_213_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_214_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_215_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_216_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_217_ = (decode_PC >>> 1); + assign _zz_218_ = (decode_PC >>> 1); + assign _zz_219_ = (decode_PC >>> 1); + assign _zz_220_ = (decode_PC >>> 1); + assign _zz_221_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_222_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_223_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_224_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_225_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_226_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_227_ = (iBus_cmd_payload_address >>> 5); + assign _zz_228_ = ({3'd0,_zz_141_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_229_ = {_zz_84_,_zz_83_}; + assign _zz_230_ = (decode_INSTRUCTION & (32'b00000000000000000000000000011100)); + assign _zz_231_ = (32'b00000000000000000000000000000100); + assign _zz_232_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_233_ = (32'b00000000000000000000000001000000); + assign _zz_234_ = _zz_103_; + assign _zz_235_ = (1'b0); + assign _zz_236_ = ({(_zz_239_ == _zz_240_),(_zz_241_ == _zz_242_)} != (2'b00)); + assign _zz_237_ = ({_zz_243_,_zz_244_} != (2'b00)); + assign _zz_238_ = {({_zz_245_,_zz_246_} != (2'b00)),{(_zz_247_ != _zz_248_),{_zz_249_,{_zz_250_,_zz_251_}}}}; + assign _zz_239_ = (decode_INSTRUCTION & (32'b00000000000000000000000000110100)); + assign _zz_240_ = (32'b00000000000000000000000000100000); + assign _zz_241_ = (decode_INSTRUCTION & (32'b00000000000000000000000001100100)); + assign _zz_242_ = (32'b00000000000000000000000000100000); + assign _zz_243_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100100)); + assign _zz_244_ = ((decode_INSTRUCTION & (32'b00000000000000000011000001010100)) == (32'b00000000000000000001000000010000)); + assign _zz_245_ = _zz_104_; + assign _zz_246_ = ((decode_INSTRUCTION & _zz_252_) == (32'b00000000000000000000000000100000)); + assign _zz_247_ = {_zz_104_,(_zz_253_ == _zz_254_)}; + assign _zz_248_ = (2'b00); + assign _zz_249_ = ({_zz_255_,_zz_256_} != (2'b00)); + assign _zz_250_ = (_zz_257_ != (1'b0)); + assign _zz_251_ = {(_zz_258_ != _zz_259_),{_zz_260_,{_zz_261_,_zz_262_}}}; + assign _zz_252_ = (32'b00000000000000000000000001110000); + assign _zz_253_ = (decode_INSTRUCTION & (32'b00000000000000000000000000100000)); + assign _zz_254_ = (32'b00000000000000000000000000000000); + assign _zz_255_ = ((decode_INSTRUCTION & (32'b00000000000000000010000000010000)) == (32'b00000000000000000010000000000000)); + assign _zz_256_ = ((decode_INSTRUCTION & (32'b00000000000000000101000000000000)) == (32'b00000000000000000001000000000000)); + assign _zz_257_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000000)) == (32'b00000000000000000000000000000000)); + assign _zz_258_ = {(_zz_263_ == _zz_264_),(_zz_265_ == _zz_266_)}; + assign _zz_259_ = (2'b00); + assign _zz_260_ = ((_zz_267_ == _zz_268_) != (1'b0)); + assign _zz_261_ = (_zz_269_ != (1'b0)); + assign _zz_262_ = {(_zz_270_ != _zz_271_),{_zz_272_,{_zz_273_,_zz_274_}}}; + assign _zz_263_ = (decode_INSTRUCTION & (32'b00000000000000000110000000010100)); + assign _zz_264_ = (32'b00000000000000000110000000010000); + assign _zz_265_ = (decode_INSTRUCTION & (32'b00000000000000000101000000010100)); + assign _zz_266_ = (32'b00000000000000000100000000010000); + assign _zz_267_ = (decode_INSTRUCTION & (32'b00000000000000000110000000010100)); + assign _zz_268_ = (32'b00000000000000000010000000010000); + assign _zz_269_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000100000)); + assign _zz_270_ = ((decode_INSTRUCTION & (32'b00010000000000000011000001010000)) == (32'b00000000000000000000000001010000)); + assign _zz_271_ = (1'b0); + assign _zz_272_ = ({_zz_103_,(_zz_275_ == _zz_276_)} != (2'b00)); + assign _zz_273_ = ((_zz_277_ == _zz_278_) != (1'b0)); + assign _zz_274_ = {(_zz_279_ != (1'b0)),{(_zz_280_ != _zz_281_),{_zz_282_,{_zz_283_,_zz_284_}}}}; + assign _zz_275_ = (decode_INSTRUCTION & (32'b00010000010000000011000001010000)); + assign _zz_276_ = (32'b00010000000000000000000001010000); + assign _zz_277_ = (decode_INSTRUCTION & (32'b00000000000000000001000001001000)); + assign _zz_278_ = (32'b00000000000000000001000000001000); + assign _zz_279_ = ((decode_INSTRUCTION & (32'b00000000000000000001000000000000)) == (32'b00000000000000000001000000000000)); + assign _zz_280_ = ((decode_INSTRUCTION & (32'b00000000000000000011000000000000)) == (32'b00000000000000000010000000000000)); + assign _zz_281_ = (1'b0); + assign _zz_282_ = (((decode_INSTRUCTION & _zz_285_) == (32'b00000000000000000000000000000000)) != (1'b0)); + assign _zz_283_ = ((_zz_286_ == _zz_287_) != (1'b0)); + assign _zz_284_ = {({_zz_288_,_zz_289_} != (2'b00)),{(_zz_290_ != _zz_291_),{_zz_292_,{_zz_293_,_zz_294_}}}}; + assign _zz_285_ = (32'b00000000000000000000000001011000); + assign _zz_286_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_287_ = (32'b00000000000000000101000000010000); + assign _zz_288_ = ((decode_INSTRUCTION & _zz_295_) == (32'b01000000000000000001000000010000)); + assign _zz_289_ = ((decode_INSTRUCTION & _zz_296_) == (32'b00000000000000000001000000010000)); + assign _zz_290_ = {(_zz_297_ == _zz_298_),(_zz_299_ == _zz_300_)}; + assign _zz_291_ = (2'b00); + assign _zz_292_ = ({_zz_301_,_zz_102_} != (2'b00)); + assign _zz_293_ = ({_zz_302_,_zz_303_} != (2'b00)); + assign _zz_294_ = {(_zz_304_ != _zz_305_),{_zz_306_,{_zz_307_,_zz_308_}}}; + assign _zz_295_ = (32'b01000000000000000011000001010100); + assign _zz_296_ = (32'b00000000000000000111000001010100); + assign _zz_297_ = (decode_INSTRUCTION & (32'b00000000000000000001000001010000)); + assign _zz_298_ = (32'b00000000000000000001000001010000); + assign _zz_299_ = (decode_INSTRUCTION & (32'b00000000000000000010000001010000)); + assign _zz_300_ = (32'b00000000000000000010000001010000); + assign _zz_301_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000010100)) == (32'b00000000000000000000000000000100)); + assign _zz_302_ = ((decode_INSTRUCTION & _zz_309_) == (32'b00000000000000000000000000000100)); + assign _zz_303_ = _zz_102_; + assign _zz_304_ = {_zz_101_,{_zz_310_,{_zz_311_,_zz_312_}}}; + assign _zz_305_ = (6'b000000); + assign _zz_306_ = ({_zz_313_,{_zz_314_,_zz_315_}} != (4'b0000)); + assign _zz_307_ = ({_zz_316_,_zz_317_} != (3'b000)); + assign _zz_308_ = (_zz_318_ != (1'b0)); + assign _zz_309_ = (32'b00000000000000000000000001000100); + assign _zz_310_ = ((decode_INSTRUCTION & (32'b00000000000000000001000000010000)) == (32'b00000000000000000001000000010000)); + assign _zz_311_ = ((decode_INSTRUCTION & _zz_319_) == (32'b00000000000000000010000000010000)); + assign _zz_312_ = {_zz_100_,{_zz_320_,_zz_321_}}; + assign _zz_313_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000000)); + assign _zz_314_ = ((decode_INSTRUCTION & _zz_322_) == (32'b00000000000000000000000000000000)); + assign _zz_315_ = {(_zz_323_ == _zz_324_),(_zz_325_ == _zz_326_)}; + assign _zz_316_ = ((decode_INSTRUCTION & _zz_327_) == (32'b00000000000000000000000001000000)); + assign _zz_317_ = {(_zz_328_ == _zz_329_),(_zz_330_ == _zz_331_)}; + assign _zz_318_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000010000)) == (32'b00000000000000000000000000010000)); + assign _zz_319_ = (32'b00000000000000000010000000010000); + assign _zz_320_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000001100)) == (32'b00000000000000000000000000000100)); + assign _zz_321_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000101000)) == (32'b00000000000000000000000000000000)); + assign _zz_322_ = (32'b00000000000000000000000000011000); + assign _zz_323_ = (decode_INSTRUCTION & (32'b00000000000000000110000000000100)); + assign _zz_324_ = (32'b00000000000000000010000000000000); + assign _zz_325_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000100)); + assign _zz_326_ = (32'b00000000000000000001000000000000); + assign _zz_327_ = (32'b00000000000000000000000001000100); + assign _zz_328_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010100)); + assign _zz_329_ = (32'b00000000000000000010000000010000); + assign _zz_330_ = (decode_INSTRUCTION & (32'b01000000000000000100000000110100)); + assign _zz_331_ = (32'b01000000000000000000000000110000); + assign _zz_332_ = (32'b00000000000000000001000001111111); + assign _zz_333_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_334_ = (32'b00000000000000000010000001110011); + assign _zz_335_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_336_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_337_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_338_) == (32'b00000000000000000000000000000011)),{(_zz_339_ == _zz_340_),{_zz_341_,{_zz_342_,_zz_343_}}}}}}; + assign _zz_338_ = (32'b00000000000000000101000001011111); + assign _zz_339_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_340_ = (32'b00000000000000000000000001100011); + assign _zz_341_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_342_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_343_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_344_) == (32'b00000000000000000101000000110011)),{(_zz_345_ == _zz_346_),{_zz_347_,{_zz_348_,_zz_349_}}}}}}; + assign _zz_344_ = (32'b10111110000000000111000001111111); + assign _zz_345_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_346_ = (32'b00000000000000000000000000110011); + assign _zz_347_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_348_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_349_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("4-stage-1024-cache-debug.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_49_) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_112_) begin + _zz_160_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_112_) begin + _zz_161_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush(_zz_142_), + .io_cpu_prefetch_isValid(_zz_143_), + .io_cpu_prefetch_haltIt(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt), + .io_cpu_prefetch_pc(IBusCachedPlugin_iBusRsp_stages_0_input_payload), + .io_cpu_fetch_isValid(_zz_144_), + .io_cpu_fetch_isStuck(_zz_145_), + .io_cpu_fetch_isRemoved(_zz_146_), + .io_cpu_fetch_pc(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload), + .io_cpu_fetch_data(IBusCachedPlugin_cache_io_cpu_fetch_data), + .io_cpu_fetch_dataBypassValid(IBusCachedPlugin_s1_tightlyCoupledHit), + .io_cpu_fetch_dataBypass(_zz_147_), + .io_cpu_fetch_mmuBus_cmd_isValid(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_isValid), + .io_cpu_fetch_mmuBus_cmd_virtualAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_cmd_bypassTranslation(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_bypassTranslation), + .io_cpu_fetch_mmuBus_rsp_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_cmd_virtualAddress), + .io_cpu_fetch_mmuBus_rsp_isIoAccess(_zz_148_), + .io_cpu_fetch_mmuBus_rsp_allowRead(_zz_149_), + .io_cpu_fetch_mmuBus_rsp_allowWrite(_zz_150_), + .io_cpu_fetch_mmuBus_rsp_allowExecute(_zz_151_), + .io_cpu_fetch_mmuBus_rsp_exception(_zz_152_), + .io_cpu_fetch_mmuBus_rsp_refilling(_zz_153_), + .io_cpu_fetch_mmuBus_end(IBusCachedPlugin_cache_io_cpu_fetch_mmuBus_end), + .io_cpu_fetch_mmuBus_busy(_zz_154_), + .io_cpu_fetch_physicalAddress(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_cpu_fetch_cacheMiss(IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss), + .io_cpu_fetch_error(IBusCachedPlugin_cache_io_cpu_fetch_error), + .io_cpu_fetch_mmuRefilling(IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling), + .io_cpu_fetch_mmuException(IBusCachedPlugin_cache_io_cpu_fetch_mmuException), + .io_cpu_fetch_isUser(_zz_155_), + .io_cpu_fetch_haltIt(IBusCachedPlugin_cache_io_cpu_fetch_haltIt), + .io_cpu_decode_isValid(_zz_156_), + .io_cpu_decode_isStuck(_zz_157_), + .io_cpu_decode_pc(_zz_158_), + .io_cpu_decode_physicalAddress(IBusCachedPlugin_cache_io_cpu_decode_physicalAddress), + .io_cpu_decode_data(IBusCachedPlugin_cache_io_cpu_decode_data), + .io_cpu_fill_valid(_zz_159_), + .io_cpu_fill_payload(IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress), + .io_mem_cmd_valid(IBusCachedPlugin_cache_io_mem_cmd_valid), + .io_mem_cmd_ready(iBus_cmd_ready), + .io_mem_cmd_payload_address(IBusCachedPlugin_cache_io_mem_cmd_payload_address), + .io_mem_cmd_payload_size(IBusCachedPlugin_cache_io_mem_cmd_payload_size), + .io_mem_rsp_valid(iBus_rsp_valid), + .io_mem_rsp_payload_data(iBus_rsp_payload_data), + .io_mem_rsp_payload_error(iBus_rsp_payload_error), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_229_) + 2'b00 : begin + _zz_162_ = CsrPlugin_jumpInterface_payload; + end + 2'b01 : begin + _zz_162_ = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_162_ = IBusCachedPlugin_redoBranch_payload; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_1_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_1__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_1__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_1__string = "AND_1"; + default : _zz_1__string = "?????"; + endcase + end + always @(*) begin + case(_zz_2_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_2__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_2__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_2__string = "AND_1"; + default : _zz_2__string = "?????"; + endcase + end + always @(*) begin + case(_zz_3_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_3__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_3__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_3__string = "AND_1"; + default : _zz_3__string = "?????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_4_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_4__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_4__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_4__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_4__string = "SRA_1 "; + default : _zz_4__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_5_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_5__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_5__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_5__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_5__string = "SRA_1 "; + default : _zz_5__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_6_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_6__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_6__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_6__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_6__string = "SRA_1 "; + default : _zz_6__string = "?????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_7_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_7__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_7__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_7__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_7__string = "JALR"; + default : _zz_7__string = "????"; + endcase + end + always @(*) begin + case(_zz_8_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_8__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_8__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_8__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_8__string = "JALR"; + default : _zz_8__string = "????"; + endcase + end + always @(*) begin + case(_zz_9_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_9__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_9__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_9__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_9__string = "JALR"; + default : _zz_9__string = "????"; + endcase + end + always @(*) begin + case(_zz_10_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_10__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_10__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_10__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_10__string = "EBREAK"; + default : _zz_10__string = "??????"; + endcase + end + always @(*) begin + case(_zz_11_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_11__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_11__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_11__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_11__string = "EBREAK"; + default : _zz_11__string = "??????"; + endcase + end + always @(*) begin + case(_zz_12_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_12__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_12__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_12__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_12__string = "EBREAK"; + default : _zz_12__string = "??????"; + endcase + end + always @(*) begin + case(_zz_13_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_13__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_13__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_13__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_13__string = "EBREAK"; + default : _zz_13__string = "??????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_14_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_14__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_14__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_14__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_14__string = "EBREAK"; + default : _zz_14__string = "??????"; + endcase + end + always @(*) begin + case(_zz_15_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_15__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_15__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_15__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_15__string = "EBREAK"; + default : _zz_15__string = "??????"; + endcase + end + always @(*) begin + case(_zz_16_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_16__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_16__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_16__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_16__string = "EBREAK"; + default : _zz_16__string = "??????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_17__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_17__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_17__string = "BITWISE "; + default : _zz_17__string = "????????"; + endcase + end + always @(*) begin + case(_zz_18_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_18__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_18__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_18__string = "BITWISE "; + default : _zz_18__string = "????????"; + endcase + end + always @(*) begin + case(_zz_19_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_19__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_19__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_19__string = "BITWISE "; + default : _zz_19__string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_20_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_20__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_20__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_20__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_20__string = "PC "; + default : _zz_20__string = "???"; + endcase + end + always @(*) begin + case(_zz_21_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_21__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_21__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_21__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_21__string = "PC "; + default : _zz_21__string = "???"; + endcase + end + always @(*) begin + case(_zz_22_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_22__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_22__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_22__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_22__string = "PC "; + default : _zz_22__string = "???"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_23_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_23__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_23__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_23__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_23__string = "URS1 "; + default : _zz_23__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_24_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_24__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_24__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_24__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_24__string = "URS1 "; + default : _zz_24__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_25_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_25__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_25__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_25__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_25__string = "URS1 "; + default : _zz_25__string = "????????????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : memory_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : memory_ENV_CTRL_string = "EBREAK"; + default : memory_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_27_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_27__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_27__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_27__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_27__string = "EBREAK"; + default : _zz_27__string = "??????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_28_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_28__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_28__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_28__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_28__string = "EBREAK"; + default : _zz_28__string = "??????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : writeBack_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : writeBack_ENV_CTRL_string = "EBREAK"; + default : writeBack_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_31_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_31__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_31__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_31__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_31__string = "EBREAK"; + default : _zz_31__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_33_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_33__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_33__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_33__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_33__string = "JALR"; + default : _zz_33__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_36_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_36__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_36__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_36__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_36__string = "SRA_1 "; + default : _zz_36__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_41_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_41__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_41__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_41__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_41__string = "PC "; + default : _zz_41__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_43_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_43__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_43__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_43__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_43__string = "URS1 "; + default : _zz_43__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_46_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_46__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_46__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_46__string = "BITWISE "; + default : _zz_46__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_48_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_48__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_48__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_48__string = "AND_1"; + default : _zz_48__string = "?????"; + endcase + end + always @(*) begin + case(_zz_52_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_52__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_52__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_52__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_52__string = "JALR"; + default : _zz_52__string = "????"; + endcase + end + always @(*) begin + case(_zz_55_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_55__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_55__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_55__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_55__string = "PC "; + default : _zz_55__string = "???"; + endcase + end + always @(*) begin + case(_zz_57_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_57__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_57__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_57__string = "BITWISE "; + default : _zz_57__string = "????????"; + endcase + end + always @(*) begin + case(_zz_59_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_59__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_59__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_59__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_59__string = "EBREAK"; + default : _zz_59__string = "??????"; + endcase + end + always @(*) begin + case(_zz_61_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_61__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_61__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_61__string = "AND_1"; + default : _zz_61__string = "?????"; + endcase + end + always @(*) begin + case(_zz_63_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_63__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_63__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_63__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_63__string = "SRA_1 "; + default : _zz_63__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_65_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_65__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_65__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_65__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_65__string = "URS1 "; + default : _zz_65__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_105_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_105__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_105__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_105__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_105__string = "URS1 "; + default : _zz_105__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_106_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_106__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_106__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_106__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_106__string = "SRA_1 "; + default : _zz_106__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_107_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_107__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_107__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_107__string = "AND_1"; + default : _zz_107__string = "?????"; + endcase + end + always @(*) begin + case(_zz_108_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_108__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_108__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_108__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_108__string = "EBREAK"; + default : _zz_108__string = "??????"; + endcase + end + always @(*) begin + case(_zz_109_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_109__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_109__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_109__string = "BITWISE "; + default : _zz_109__string = "????????"; + endcase + end + always @(*) begin + case(_zz_110_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_110__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_110__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_110__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_110__string = "PC "; + default : _zz_110__string = "???"; + endcase + end + always @(*) begin + case(_zz_111_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_111__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_111__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_111__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_111__string = "JALR"; + default : _zz_111__string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_to_memory_ENV_CTRL_string = "EBREAK"; + default : execute_to_memory_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : memory_to_writeBack_ENV_CTRL_string = "EBREAK"; + default : memory_to_writeBack_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + `endif + + assign decode_ALU_BITWISE_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_DO_EBREAK = _zz_26_; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign execute_REGFILE_WRITE_DATA = _zz_47_; + assign decode_SHIFT_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_MEMORY_ENABLE = _zz_62_; + assign decode_MEMORY_STORE = _zz_58_; + assign decode_SRC2_FORCE_ZERO = _zz_45_; + assign decode_BRANCH_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_CSR_READ_OPCODE = _zz_29_; + assign memory_PC = execute_to_memory_PC; + assign _zz_10_ = _zz_11_; + assign _zz_12_ = _zz_13_; + assign decode_ENV_CTRL = _zz_14_; + assign _zz_15_ = _zz_16_; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign decode_IS_CSR = _zz_64_; + assign decode_CSR_WRITE_OPCODE = _zz_30_; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_78_; + assign decode_SRC_LESS_UNSIGNED = _zz_56_; + assign memory_MEMORY_READ_DATA = _zz_70_; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_ALU_CTRL = _zz_17_; + assign _zz_18_ = _zz_19_; + assign decode_SRC2_CTRL = _zz_20_; + assign _zz_21_ = _zz_22_; + assign memory_MEMORY_ADDRESS_LOW = execute_to_memory_MEMORY_ADDRESS_LOW; + assign execute_MEMORY_ADDRESS_LOW = _zz_71_; + assign decode_SRC1_CTRL = _zz_23_; + assign _zz_24_ = _zz_25_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_53_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_27_; + assign execute_ENV_CTRL = _zz_28_; + assign writeBack_ENV_CTRL = _zz_31_; + assign execute_BRANCH_CALC = _zz_32_; + assign execute_BRANCH_DO = _zz_34_; + assign execute_PC = decode_to_execute_PC; + assign execute_RS1 = _zz_51_; + assign execute_BRANCH_CTRL = _zz_33_; + always @ (*) begin + _zz_35_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_92_)))begin + execute_arbitration_haltItself = 1'b1; + end + if(_zz_163_)begin + _zz_35_ = _zz_120_; + if(_zz_164_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_35_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_SHIFT_CTRL = _zz_36_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_40_ = execute_PC; + assign execute_SRC2_CTRL = _zz_41_; + assign execute_SRC1_CTRL = _zz_43_; + assign decode_SRC_USE_SUB_LESS = _zz_67_; + assign decode_SRC_ADD_ZERO = _zz_54_; + assign execute_SRC_ADD_SUB = _zz_39_; + assign execute_SRC_LESS = _zz_37_; + assign execute_ALU_CTRL = _zz_46_; + assign execute_SRC2 = _zz_42_; + assign execute_SRC1 = _zz_44_; + assign execute_ALU_BITWISE_CTRL = _zz_48_; + always @ (*) begin + _zz_49_ = 1'b0; + if(lastStageRegFileWrite_valid)begin + _zz_49_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_66_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_68_; + assign decode_INSTRUCTION_READY = 1'b1; + always @ (*) begin + decode_INSTRUCTION = _zz_79_; + if((_zz_138_ != (3'b000)))begin + decode_INSTRUCTION = IBusCachedPlugin_injectionPort_payload_regNext; + end + end + + assign writeBack_MEMORY_STORE = memory_to_writeBack_MEMORY_STORE; + always @ (*) begin + _zz_69_ = writeBack_REGFILE_WRITE_DATA; + if((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE))begin + _zz_69_ = writeBack_DBusSimplePlugin_rspFormated; + end + end + + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign writeBack_MEMORY_ADDRESS_LOW = memory_to_writeBack_MEMORY_ADDRESS_LOW; + assign writeBack_MEMORY_READ_DATA = memory_to_writeBack_MEMORY_READ_DATA; + assign memory_ALIGNEMENT_FAULT = execute_to_memory_ALIGNEMENT_FAULT; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE = execute_to_memory_MEMORY_STORE; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_SRC_ADD = _zz_38_; + assign execute_RS2 = _zz_50_; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_72_; + assign decode_FLUSH_ALL = _zz_60_; + always @ (*) begin + IBusCachedPlugin_rsp_issueDetected = _zz_73_; + _zz_74_ = _zz_75_; + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'bxxxx); + if(((_zz_144_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuException) && (! _zz_75_)))begin + _zz_74_ = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b1100); + end + if(((_zz_144_ && IBusCachedPlugin_cache_io_cpu_fetch_error) && (! _zz_73_)))begin + IBusCachedPlugin_rsp_issueDetected = 1'b1; + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + IBusCachedPlugin_decodeExceptionPort_payload_code = (4'b0001); + end + if(IBusCachedPlugin_fetcherHalt)begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + end + end + + always @ (*) begin + _zz_73_ = _zz_74_; + _zz_75_ = 1'b0; + IBusCachedPlugin_rsp_redoFetch = 1'b0; + _zz_159_ = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling)); + if(((_zz_144_ && IBusCachedPlugin_cache_io_cpu_fetch_mmuRefilling) && (! 1'b0)))begin + _zz_75_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(((_zz_144_ && IBusCachedPlugin_cache_io_cpu_fetch_cacheMiss) && (! _zz_74_)))begin + _zz_73_ = 1'b1; + _zz_159_ = 1'b1; + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + end + if((! IBusCachedPlugin_iBusRsp_readyForError))begin + _zz_159_ = 1'b0; + end + end + + always @ (*) begin + _zz_76_ = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid)begin + _zz_76_ = BranchPlugin_jumpInterface_payload; + end + end + + always @ (*) begin + _zz_77_ = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_redoBranch_valid)begin + _zz_77_ = IBusCachedPlugin_redoBranch_payload; + end + end + + assign decode_PC = _zz_80_; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusCachedPlugin_iBusRsp_decodeInput_valid && (! IBusCachedPlugin_injector_decodeRemoved)); + IBusCachedPlugin_injectionPort_ready = 1'b0; + case(_zz_138_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + IBusCachedPlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET))}} != (3'b000)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_165_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_removeIt = 1'b0; + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_166_)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_haltByOther = 1'b0; + memory_arbitration_flushAll = 1'b0; + IBusCachedPlugin_fetcherHalt = 1'b0; + IBusCachedPlugin_fetcherflushIt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode}}} != (4'b0000)))begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_167_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + memory_arbitration_flushAll = 1'b1; + end + if(_zz_168_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + memory_arbitration_flushAll = 1'b1; + case(_zz_169_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(_zz_170_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_171_)begin + IBusCachedPlugin_fetcherflushIt = 1'b1; + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(_zz_172_)begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + execute_arbitration_flushAll = 1'b1; + end + if(_zz_170_)begin + if(_zz_171_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + always @ (*) begin + memory_arbitration_haltItself = 1'b0; + if((((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (! memory_MEMORY_STORE)) && ((! dBus_rsp_ready) || 1'b0)))begin + memory_arbitration_haltItself = 1'b1; + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @ (*) begin + memory_arbitration_removeIt = 1'b0; + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + memory_arbitration_removeIt = 1'b1; + end + if(memory_arbitration_isFlushed)begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_haltItself = 1'b0; + assign writeBack_arbitration_haltByOther = 1'b0; + always @ (*) begin + writeBack_arbitration_removeIt = 1'b0; + if(writeBack_arbitration_isFlushed)begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_flushAll = 1'b0; + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @ (*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid)begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_forceMachineWire = 1'b0; + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode)begin + CsrPlugin_allowException = 1'b0; + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_allowInterrupts = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,IBusCachedPlugin_redoBranch_valid}} != (3'b000)); + assign _zz_81_ = {IBusCachedPlugin_redoBranch_valid,{BranchPlugin_jumpInterface_valid,CsrPlugin_jumpInterface_valid}}; + assign _zz_82_ = (_zz_81_ & (~ _zz_179_)); + assign _zz_83_ = _zz_82_[1]; + assign _zz_84_ = _zz_82_[2]; + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_162_; + assign _zz_85_ = (! IBusCachedPlugin_fetcherHalt); + assign IBusCachedPlugin_fetchPc_output_valid = (IBusCachedPlugin_fetchPc_preOutput_valid && _zz_85_); + assign IBusCachedPlugin_fetchPc_preOutput_ready = (IBusCachedPlugin_fetchPc_output_ready && _zz_85_); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b0; + if((IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready))begin + IBusCachedPlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_181_); + IBusCachedPlugin_fetchPc_samplePcNext = 1'b0; + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + if(_zz_173_)begin + IBusCachedPlugin_fetchPc_samplePcNext = 1'b1; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusCachedPlugin_fetchPc_preOutput_valid = _zz_86_; + assign IBusCachedPlugin_fetchPc_preOutput_payload = IBusCachedPlugin_fetchPc_pc; + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt)begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_87_ = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_87_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_87_); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @ (*) begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_fetch_haltIt)begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + if((IBusCachedPlugin_rsp_issueDetected || IBusCachedPlugin_rsp_iBusRspOutputHalt))begin + IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt = 1'b1; + end + end + + assign _zz_88_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready && _zz_88_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && _zz_88_); + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_89_; + assign _zz_89_ = ((1'b0 && (! _zz_90_)) || IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_90_ = _zz_91_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid = _zz_90_; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload = IBusCachedPlugin_fetchPc_pcReg; + always @ (*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if((! IBusCachedPlugin_pcValids_0))begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_0; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_80_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_79_ = IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_78_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @ (*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign _zz_143_ = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign _zz_146_ = (IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt); + assign _zz_147_ = (32'b00000000000000000000000000000000); + assign _zz_144_ = (IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign _zz_145_ = (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready); + assign _zz_155_ = (CsrPlugin_privilege == (2'b00)); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload[31 : 2],(2'b00)}; + assign IBusCachedPlugin_redoBranch_valid = IBusCachedPlugin_rsp_redoFetch; + assign IBusCachedPlugin_redoBranch_payload = IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_payload; + assign IBusCachedPlugin_iBusRsp_decodeInput_valid = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_valid; + assign IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_ready = IBusCachedPlugin_iBusRsp_decodeInput_ready; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_fetch_data; + assign IBusCachedPlugin_iBusRsp_decodeInput_payload_pc = IBusCachedPlugin_iBusRsp_cacheRspArbitration_output_payload; + assign _zz_151_ = 1'b1; + assign _zz_149_ = 1'b1; + assign _zz_150_ = 1'b1; + assign _zz_148_ = 1'b0; + assign _zz_152_ = 1'b0; + assign _zz_153_ = 1'b0; + assign _zz_154_ = 1'b0; + assign _zz_142_ = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_92_ = 1'b0; + assign _zz_72_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_92_)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_93_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_93_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_93_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_93_; + assign _zz_71_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_94_ = (4'b0001); + end + 2'b01 : begin + _zz_94_ = (4'b0011); + end + default : begin + _zz_94_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_94_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_70_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(memory_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_182_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (1'b1 || (! memory_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = memory_REGFILE_WRITE_DATA; + always @ (*) begin + writeBack_DBusSimplePlugin_rspShifted = writeBack_MEMORY_READ_DATA; + case(writeBack_MEMORY_ADDRESS_LOW) + 2'b01 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + writeBack_DBusSimplePlugin_rspShifted[15 : 0] = writeBack_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_95_ = (writeBack_DBusSimplePlugin_rspShifted[7] && (! writeBack_INSTRUCTION[14])); + always @ (*) begin + _zz_96_[31] = _zz_95_; + _zz_96_[30] = _zz_95_; + _zz_96_[29] = _zz_95_; + _zz_96_[28] = _zz_95_; + _zz_96_[27] = _zz_95_; + _zz_96_[26] = _zz_95_; + _zz_96_[25] = _zz_95_; + _zz_96_[24] = _zz_95_; + _zz_96_[23] = _zz_95_; + _zz_96_[22] = _zz_95_; + _zz_96_[21] = _zz_95_; + _zz_96_[20] = _zz_95_; + _zz_96_[19] = _zz_95_; + _zz_96_[18] = _zz_95_; + _zz_96_[17] = _zz_95_; + _zz_96_[16] = _zz_95_; + _zz_96_[15] = _zz_95_; + _zz_96_[14] = _zz_95_; + _zz_96_[13] = _zz_95_; + _zz_96_[12] = _zz_95_; + _zz_96_[11] = _zz_95_; + _zz_96_[10] = _zz_95_; + _zz_96_[9] = _zz_95_; + _zz_96_[8] = _zz_95_; + _zz_96_[7 : 0] = writeBack_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_97_ = (writeBack_DBusSimplePlugin_rspShifted[15] && (! writeBack_INSTRUCTION[14])); + always @ (*) begin + _zz_98_[31] = _zz_97_; + _zz_98_[30] = _zz_97_; + _zz_98_[29] = _zz_97_; + _zz_98_[28] = _zz_97_; + _zz_98_[27] = _zz_97_; + _zz_98_[26] = _zz_97_; + _zz_98_[25] = _zz_97_; + _zz_98_[24] = _zz_97_; + _zz_98_[23] = _zz_97_; + _zz_98_[22] = _zz_97_; + _zz_98_[21] = _zz_97_; + _zz_98_[20] = _zz_97_; + _zz_98_[19] = _zz_97_; + _zz_98_[18] = _zz_97_; + _zz_98_[17] = _zz_97_; + _zz_98_[16] = _zz_97_; + _zz_98_[15 : 0] = writeBack_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_177_) + 2'b00 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_96_; + end + 2'b01 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_98_; + end + default : begin + writeBack_DBusSimplePlugin_rspFormated = writeBack_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_100_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_101_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_102_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_103_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_104_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_99_ = {({_zz_101_,(_zz_230_ == _zz_231_)} != (2'b00)),{((_zz_232_ == _zz_233_) != (1'b0)),{(_zz_100_ != (1'b0)),{(_zz_234_ != _zz_235_),{_zz_236_,{_zz_237_,_zz_238_}}}}}}; + assign _zz_68_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_332_) == (32'b00000000000000000001000001110011)),{(_zz_333_ == _zz_334_),{_zz_335_,{_zz_336_,_zz_337_}}}}}}} != (20'b00000000000000000000)); + assign _zz_67_ = _zz_183_[0]; + assign _zz_66_ = _zz_184_[0]; + assign _zz_105_ = _zz_99_[5 : 4]; + assign _zz_65_ = _zz_105_; + assign _zz_64_ = _zz_185_[0]; + assign _zz_106_ = _zz_99_[8 : 7]; + assign _zz_63_ = _zz_106_; + assign _zz_62_ = _zz_186_[0]; + assign _zz_107_ = _zz_99_[11 : 10]; + assign _zz_61_ = _zz_107_; + assign _zz_60_ = _zz_187_[0]; + assign _zz_108_ = _zz_99_[14 : 13]; + assign _zz_59_ = _zz_108_; + assign _zz_58_ = _zz_188_[0]; + assign _zz_109_ = _zz_99_[17 : 16]; + assign _zz_57_ = _zz_109_; + assign _zz_56_ = _zz_189_[0]; + assign _zz_110_ = _zz_99_[21 : 20]; + assign _zz_55_ = _zz_110_; + assign _zz_54_ = _zz_190_[0]; + assign _zz_53_ = _zz_191_[0]; + assign _zz_111_ = _zz_99_[27 : 26]; + assign _zz_52_ = _zz_111_; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_112_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_160_; + assign execute_RegFilePlugin_rs2Data = _zz_161_; + assign _zz_51_ = execute_RegFilePlugin_rs1Data; + assign _zz_50_ = execute_RegFilePlugin_rs2Data; + assign lastStageRegFileWrite_valid = (writeBack_REGFILE_WRITE_VALID && writeBack_arbitration_isFiring); + assign lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION[11 : 7]; + assign lastStageRegFileWrite_payload_data = _zz_69_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_113_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_113_ = {31'd0, _zz_192_}; + end + default : begin + _zz_113_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_47_ = _zz_113_; + assign _zz_45_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_114_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_114_ = {29'd0, _zz_193_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_114_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_114_ = {27'd0, _zz_194_}; + end + endcase + end + + assign _zz_44_ = _zz_114_; + assign _zz_115_ = _zz_195_[11]; + always @ (*) begin + _zz_116_[19] = _zz_115_; + _zz_116_[18] = _zz_115_; + _zz_116_[17] = _zz_115_; + _zz_116_[16] = _zz_115_; + _zz_116_[15] = _zz_115_; + _zz_116_[14] = _zz_115_; + _zz_116_[13] = _zz_115_; + _zz_116_[12] = _zz_115_; + _zz_116_[11] = _zz_115_; + _zz_116_[10] = _zz_115_; + _zz_116_[9] = _zz_115_; + _zz_116_[8] = _zz_115_; + _zz_116_[7] = _zz_115_; + _zz_116_[6] = _zz_115_; + _zz_116_[5] = _zz_115_; + _zz_116_[4] = _zz_115_; + _zz_116_[3] = _zz_115_; + _zz_116_[2] = _zz_115_; + _zz_116_[1] = _zz_115_; + _zz_116_[0] = _zz_115_; + end + + assign _zz_117_ = _zz_196_[11]; + always @ (*) begin + _zz_118_[19] = _zz_117_; + _zz_118_[18] = _zz_117_; + _zz_118_[17] = _zz_117_; + _zz_118_[16] = _zz_117_; + _zz_118_[15] = _zz_117_; + _zz_118_[14] = _zz_117_; + _zz_118_[13] = _zz_117_; + _zz_118_[12] = _zz_117_; + _zz_118_[11] = _zz_117_; + _zz_118_[10] = _zz_117_; + _zz_118_[9] = _zz_117_; + _zz_118_[8] = _zz_117_; + _zz_118_[7] = _zz_117_; + _zz_118_[6] = _zz_117_; + _zz_118_[5] = _zz_117_; + _zz_118_[4] = _zz_117_; + _zz_118_[3] = _zz_117_; + _zz_118_[2] = _zz_117_; + _zz_118_[1] = _zz_117_; + _zz_118_[0] = _zz_117_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_119_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_119_ = {_zz_116_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_119_ = {_zz_118_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_119_ = _zz_40_; + end + endcase + end + + assign _zz_42_ = _zz_119_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_197_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_39_ = execute_SrcPlugin_addSub; + assign _zz_38_ = execute_SrcPlugin_addSub; + assign _zz_37_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? memory_REGFILE_WRITE_DATA : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_120_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_120_ = _zz_204_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_121_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_121_ == (3'b000))) begin + _zz_122_ = execute_BranchPlugin_eq; + end else if((_zz_121_ == (3'b001))) begin + _zz_122_ = (! execute_BranchPlugin_eq); + end else if((((_zz_121_ & (3'b101)) == (3'b101)))) begin + _zz_122_ = (! execute_SRC_LESS); + end else begin + _zz_122_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_123_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_123_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_123_ = 1'b1; + end + default : begin + _zz_123_ = _zz_122_; + end + endcase + end + + assign _zz_34_ = _zz_123_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_124_ = _zz_206_[19]; + always @ (*) begin + _zz_125_[10] = _zz_124_; + _zz_125_[9] = _zz_124_; + _zz_125_[8] = _zz_124_; + _zz_125_[7] = _zz_124_; + _zz_125_[6] = _zz_124_; + _zz_125_[5] = _zz_124_; + _zz_125_[4] = _zz_124_; + _zz_125_[3] = _zz_124_; + _zz_125_[2] = _zz_124_; + _zz_125_[1] = _zz_124_; + _zz_125_[0] = _zz_124_; + end + + assign _zz_126_ = _zz_207_[11]; + always @ (*) begin + _zz_127_[19] = _zz_126_; + _zz_127_[18] = _zz_126_; + _zz_127_[17] = _zz_126_; + _zz_127_[16] = _zz_126_; + _zz_127_[15] = _zz_126_; + _zz_127_[14] = _zz_126_; + _zz_127_[13] = _zz_126_; + _zz_127_[12] = _zz_126_; + _zz_127_[11] = _zz_126_; + _zz_127_[10] = _zz_126_; + _zz_127_[9] = _zz_126_; + _zz_127_[8] = _zz_126_; + _zz_127_[7] = _zz_126_; + _zz_127_[6] = _zz_126_; + _zz_127_[5] = _zz_126_; + _zz_127_[4] = _zz_126_; + _zz_127_[3] = _zz_126_; + _zz_127_[2] = _zz_126_; + _zz_127_[1] = _zz_126_; + _zz_127_[0] = _zz_126_; + end + + assign _zz_128_ = _zz_208_[11]; + always @ (*) begin + _zz_129_[18] = _zz_128_; + _zz_129_[17] = _zz_128_; + _zz_129_[16] = _zz_128_; + _zz_129_[15] = _zz_128_; + _zz_129_[14] = _zz_128_; + _zz_129_[13] = _zz_128_; + _zz_129_[12] = _zz_128_; + _zz_129_[11] = _zz_128_; + _zz_129_[10] = _zz_128_; + _zz_129_[9] = _zz_128_; + _zz_129_[8] = _zz_128_; + _zz_129_[7] = _zz_128_; + _zz_129_[6] = _zz_128_; + _zz_129_[5] = _zz_128_; + _zz_129_[4] = _zz_128_; + _zz_129_[3] = _zz_128_; + _zz_129_[2] = _zz_128_; + _zz_129_[1] = _zz_128_; + _zz_129_[0] = _zz_128_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_130_ = {{_zz_125_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_130_ = {_zz_127_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_130_ = {{_zz_129_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_130_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_32_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + BranchPlugin_branchExceptionPort_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && BranchPlugin_jumpInterface_payload[1]); + if(1'b0)begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = (4'b0000); + assign BranchPlugin_branchExceptionPort_payload_badAddr = BranchPlugin_jumpInterface_payload; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_131_ = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_132_ = _zz_209_[0]; + assign _zz_133_ = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_134_ = _zz_211_[0]; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_165_)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b1; + end + if(memory_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(writeBack_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! ({writeBack_arbitration_isValid,{memory_arbitration_isValid,execute_arbitration_isValid}} != (3'b000))) && IBusCachedPlugin_pcValids_3); + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != (3'b000)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_30_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_29_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = ({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00)); + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_135_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_136_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_178_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_136_ = (_zz_135_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_136_ != (32'b00000000000000000000000000000000)); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + IBusCachedPlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_174_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + IBusCachedPlugin_injectionPort_valid = 1'b1; + debug_bus_cmd_ready = IBusCachedPlugin_injectionPort_ready; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_137_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign IBusCachedPlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign _zz_26_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_217_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_218_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_219_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_220_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_25_ = decode_SRC1_CTRL; + assign _zz_23_ = _zz_65_; + assign _zz_43_ = decode_to_execute_SRC1_CTRL; + assign _zz_22_ = decode_SRC2_CTRL; + assign _zz_20_ = _zz_55_; + assign _zz_41_ = decode_to_execute_SRC2_CTRL; + assign _zz_19_ = decode_ALU_CTRL; + assign _zz_17_ = _zz_57_; + assign _zz_46_ = decode_to_execute_ALU_CTRL; + assign _zz_16_ = decode_ENV_CTRL; + assign _zz_13_ = execute_ENV_CTRL; + assign _zz_11_ = memory_ENV_CTRL; + assign _zz_14_ = _zz_59_; + assign _zz_28_ = decode_to_execute_ENV_CTRL; + assign _zz_27_ = execute_to_memory_ENV_CTRL; + assign _zz_31_ = memory_to_writeBack_ENV_CTRL; + assign _zz_9_ = decode_BRANCH_CTRL; + assign _zz_7_ = _zz_52_; + assign _zz_33_ = decode_to_execute_BRANCH_CTRL; + assign _zz_6_ = decode_SHIFT_CTRL; + assign _zz_4_ = _zz_63_; + assign _zz_36_ = decode_to_execute_SHIFT_CTRL; + assign _zz_3_ = decode_ALU_BITWISE_CTRL; + assign _zz_1_ = _zz_61_; + assign _zz_48_ = decode_to_execute_ALU_BITWISE_CTRL; + assign decode_arbitration_isFlushed = ({writeBack_arbitration_flushAll,{memory_arbitration_flushAll,{execute_arbitration_flushAll,decode_arbitration_flushAll}}} != (4'b0000)); + assign execute_arbitration_isFlushed = ({writeBack_arbitration_flushAll,{memory_arbitration_flushAll,execute_arbitration_flushAll}} != (3'b000)); + assign memory_arbitration_isFlushed = ({writeBack_arbitration_flushAll,memory_arbitration_flushAll} != (2'b00)); + assign writeBack_arbitration_isFlushed = (writeBack_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign iBusWishbone_ADR = {_zz_227_,_zz_139_}; + assign iBusWishbone_CTI = ((_zz_139_ == (3'b111)) ? (3'b111) : (3'b010)); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + always @ (*) begin + iBusWishbone_CYC = 1'b0; + iBusWishbone_STB = 1'b0; + if(_zz_175_)begin + iBusWishbone_CYC = 1'b1; + iBusWishbone_STB = 1'b1; + end + end + + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_140_; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_141_ = (4'b0001); + end + 2'b01 : begin + _zz_141_ = (4'b0011); + end + default : begin + _zz_141_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_228_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_86_ <= 1'b0; + _zz_91_ <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_135_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + _zz_138_ <= (3'b000); + _zz_139_ <= (3'b000); + _zz_140_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusCachedPlugin_fetchPc_propagatePc)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_jump_pcLoad_valid)begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(_zz_173_)begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_samplePcNext)begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + _zz_86_ <= 1'b1; + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + _zz_91_ <= 1'b0; + end + if(_zz_89_)begin + _zz_91_ <= IBusCachedPlugin_iBusRsp_stages_0_output_valid; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)))begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if((! memory_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if((! writeBack_arbitration_isStuck))begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusCachedPlugin_jump_pcLoad_valid || IBusCachedPlugin_fetcherflushIt))begin + IBusCachedPlugin_injector_decodeRemoved <= 1'b0; + end + if(_zz_163_)begin + if(_zz_164_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if((! memory_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if((! writeBack_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_167_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_168_)begin + case(_zz_169_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(((! memory_arbitration_isStuck) || memory_arbitration_removeIt))begin + memory_arbitration_isValid <= 1'b0; + end + if(((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)))begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt))begin + writeBack_arbitration_isValid <= 1'b0; + end + if(((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)))begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + case(_zz_138_) + 3'b000 : begin + if(IBusCachedPlugin_injectionPort_valid)begin + _zz_138_ <= (3'b001); + end + end + 3'b001 : begin + _zz_138_ <= (3'b010); + end + 3'b010 : begin + _zz_138_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_138_ <= (3'b100); + end + end + 3'b100 : begin + _zz_138_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_135_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_221_[0]; + CsrPlugin_mstatus_MIE <= _zz_222_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_224_[0]; + CsrPlugin_mie_MTIE <= _zz_225_[0]; + CsrPlugin_mie_MSIE <= _zz_226_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(_zz_175_)begin + if(iBusWishbone_ACK)begin + _zz_139_ <= (_zz_139_ + (3'b001)); + end + end + _zz_140_ <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(_zz_176_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(IBusCachedPlugin_iBusRsp_cacheRspArbitration_input_ready)begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(!(! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))) begin + $display("ERROR DBusSimplePlugin doesn't allow memory stage stall when read happend"); + end + if(!(! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_MEMORY_STORE)) && writeBack_arbitration_isStuck))) begin + $display("ERROR DBusSimplePlugin doesn't allow writeback stage stall when read happend"); + end + if(_zz_163_)begin + if(_zz_164_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(writeBack_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(_zz_165_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_132_ ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_132_ ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_166_)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_134_ ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_134_ ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusSimplePlugin_memoryExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + end + if(_zz_167_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_24_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_ADDRESS_LOW <= execute_MEMORY_ADDRESS_LOW; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_ADDRESS_LOW <= memory_MEMORY_ADDRESS_LOW; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_21_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_18_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_READ_DATA <= memory_MEMORY_READ_DATA; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_77_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_76_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_ALIGNEMENT_FAULT <= execute_ALIGNEMENT_FAULT; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_15_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_ENV_CTRL <= _zz_12_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_ENV_CTRL <= _zz_10_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_PC <= decode_PC; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_PC <= _zz_40_; + end + if(((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)))begin + memory_to_writeBack_PC <= memory_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_STORE <= execute_MEMORY_STORE; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_STORE <= memory_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_5_; + end + if(((! memory_arbitration_isStuck) && (! execute_arbitration_isStuckByOthers)))begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_35_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_REGFILE_WRITE_DATA <= memory_REGFILE_WRITE_DATA; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_2_; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_223_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(_zz_176_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != (4'b0000)) || IBusCachedPlugin_incomingInstruction); + if(writeBack_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_69_; + end + _zz_137_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_174_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_170_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + end else begin + if((DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)))begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid)begin + case(_zz_174_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_godmode <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_213_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_214_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_215_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_216_[0]; + end + end + default : begin + end + endcase + end + if(_zz_170_)begin + if(_zz_171_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_172_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + end + end + + always @ (posedge clk) begin + IBusCachedPlugin_injectionPort_payload_regNext <= IBusCachedPlugin_injectionPort_payload; + end + +endmodule + diff --git a/hw/rtl/4-stage-1024-cache-debug.yaml b/hw/rtl/4-stage-1024-cache-debug.yaml new file mode 100644 index 0000000..5864b0c --- /dev/null +++ b/hw/rtl/4-stage-1024-cache-debug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 1024} + kind: cached diff --git a/hw/rtl/4-stage-no-cache-debug.v b/hw/rtl/4-stage-no-cache-debug.v new file mode 100644 index 0000000..5611387 --- /dev/null +++ b/hw/rtl/4-stage-no-cache-debug.v @@ -0,0 +1,3865 @@ +// Generator : SpinalHDL v1.3.3 git head : 8b8cd335eecbea3b5f1f970f218a982dbdb12d99 +// Date : 26/04/2019, 01:11:32 +// Component : VexRiscv + + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output iBusWishbone_CYC, + output iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + reg [31:0] _zz_160_; + reg [31:0] _zz_161_; + wire _zz_162_; + wire _zz_163_; + wire _zz_164_; + wire _zz_165_; + wire [1:0] _zz_166_; + wire _zz_167_; + wire _zz_168_; + wire _zz_169_; + wire _zz_170_; + wire [5:0] _zz_171_; + wire _zz_172_; + wire _zz_173_; + wire [4:0] _zz_174_; + wire [1:0] _zz_175_; + wire [1:0] _zz_176_; + wire [1:0] _zz_177_; + wire _zz_178_; + wire [1:0] _zz_179_; + wire [1:0] _zz_180_; + wire [2:0] _zz_181_; + wire [31:0] _zz_182_; + wire [2:0] _zz_183_; + wire [31:0] _zz_184_; + wire [31:0] _zz_185_; + wire [11:0] _zz_186_; + wire [11:0] _zz_187_; + wire [2:0] _zz_188_; + wire [31:0] _zz_189_; + wire [0:0] _zz_190_; + wire [2:0] _zz_191_; + wire [0:0] _zz_192_; + wire [0:0] _zz_193_; + wire [0:0] _zz_194_; + wire [0:0] _zz_195_; + wire [0:0] _zz_196_; + wire [0:0] _zz_197_; + wire [0:0] _zz_198_; + wire [0:0] _zz_199_; + wire [0:0] _zz_200_; + wire [2:0] _zz_201_; + wire [4:0] _zz_202_; + wire [11:0] _zz_203_; + wire [11:0] _zz_204_; + wire [31:0] _zz_205_; + wire [31:0] _zz_206_; + wire [31:0] _zz_207_; + wire [31:0] _zz_208_; + wire [31:0] _zz_209_; + wire [31:0] _zz_210_; + wire [31:0] _zz_211_; + wire [31:0] _zz_212_; + wire [32:0] _zz_213_; + wire [19:0] _zz_214_; + wire [11:0] _zz_215_; + wire [11:0] _zz_216_; + wire [0:0] _zz_217_; + wire [0:0] _zz_218_; + wire [0:0] _zz_219_; + wire [0:0] _zz_220_; + wire [30:0] _zz_221_; + wire [30:0] _zz_222_; + wire [30:0] _zz_223_; + wire [30:0] _zz_224_; + wire [0:0] _zz_225_; + wire [0:0] _zz_226_; + wire [0:0] _zz_227_; + wire [0:0] _zz_228_; + wire [0:0] _zz_229_; + wire [0:0] _zz_230_; + wire [6:0] _zz_231_; + wire _zz_232_; + wire _zz_233_; + wire [6:0] _zz_234_; + wire [4:0] _zz_235_; + wire _zz_236_; + wire [4:0] _zz_237_; + wire _zz_238_; + wire [0:0] _zz_239_; + wire [1:0] _zz_240_; + wire [0:0] _zz_241_; + wire [0:0] _zz_242_; + wire [1:0] _zz_243_; + wire [1:0] _zz_244_; + wire _zz_245_; + wire [0:0] _zz_246_; + wire [20:0] _zz_247_; + wire [31:0] _zz_248_; + wire [31:0] _zz_249_; + wire [31:0] _zz_250_; + wire [31:0] _zz_251_; + wire [31:0] _zz_252_; + wire [31:0] _zz_253_; + wire [31:0] _zz_254_; + wire [31:0] _zz_255_; + wire _zz_256_; + wire [0:0] _zz_257_; + wire [0:0] _zz_258_; + wire [0:0] _zz_259_; + wire [0:0] _zz_260_; + wire [1:0] _zz_261_; + wire [1:0] _zz_262_; + wire _zz_263_; + wire [0:0] _zz_264_; + wire [17:0] _zz_265_; + wire [31:0] _zz_266_; + wire [31:0] _zz_267_; + wire [31:0] _zz_268_; + wire [31:0] _zz_269_; + wire [31:0] _zz_270_; + wire [31:0] _zz_271_; + wire [31:0] _zz_272_; + wire _zz_273_; + wire [0:0] _zz_274_; + wire [0:0] _zz_275_; + wire [1:0] _zz_276_; + wire [1:0] _zz_277_; + wire _zz_278_; + wire [0:0] _zz_279_; + wire [15:0] _zz_280_; + wire [31:0] _zz_281_; + wire [31:0] _zz_282_; + wire [31:0] _zz_283_; + wire [31:0] _zz_284_; + wire [31:0] _zz_285_; + wire [31:0] _zz_286_; + wire [31:0] _zz_287_; + wire [31:0] _zz_288_; + wire _zz_289_; + wire [1:0] _zz_290_; + wire [1:0] _zz_291_; + wire _zz_292_; + wire [0:0] _zz_293_; + wire [12:0] _zz_294_; + wire [31:0] _zz_295_; + wire [31:0] _zz_296_; + wire [31:0] _zz_297_; + wire [31:0] _zz_298_; + wire [0:0] _zz_299_; + wire [0:0] _zz_300_; + wire [0:0] _zz_301_; + wire [0:0] _zz_302_; + wire _zz_303_; + wire [0:0] _zz_304_; + wire [8:0] _zz_305_; + wire [31:0] _zz_306_; + wire [31:0] _zz_307_; + wire [0:0] _zz_308_; + wire [0:0] _zz_309_; + wire [1:0] _zz_310_; + wire [1:0] _zz_311_; + wire _zz_312_; + wire [0:0] _zz_313_; + wire [4:0] _zz_314_; + wire [31:0] _zz_315_; + wire [31:0] _zz_316_; + wire [31:0] _zz_317_; + wire [31:0] _zz_318_; + wire [31:0] _zz_319_; + wire [31:0] _zz_320_; + wire [31:0] _zz_321_; + wire [31:0] _zz_322_; + wire [0:0] _zz_323_; + wire [0:0] _zz_324_; + wire [0:0] _zz_325_; + wire [0:0] _zz_326_; + wire _zz_327_; + wire [0:0] _zz_328_; + wire [1:0] _zz_329_; + wire [31:0] _zz_330_; + wire [31:0] _zz_331_; + wire [31:0] _zz_332_; + wire [31:0] _zz_333_; + wire [31:0] _zz_334_; + wire [0:0] _zz_335_; + wire [0:0] _zz_336_; + wire [0:0] _zz_337_; + wire [0:0] _zz_338_; + wire [5:0] _zz_339_; + wire [5:0] _zz_340_; + wire [31:0] _zz_341_; + wire [31:0] _zz_342_; + wire [31:0] _zz_343_; + wire [0:0] _zz_344_; + wire [0:0] _zz_345_; + wire [31:0] _zz_346_; + wire [31:0] _zz_347_; + wire [31:0] _zz_348_; + wire _zz_349_; + wire [0:0] _zz_350_; + wire [12:0] _zz_351_; + wire [31:0] _zz_352_; + wire [31:0] _zz_353_; + wire [31:0] _zz_354_; + wire _zz_355_; + wire [0:0] _zz_356_; + wire [6:0] _zz_357_; + wire [31:0] _zz_358_; + wire [31:0] _zz_359_; + wire [31:0] _zz_360_; + wire _zz_361_; + wire [0:0] _zz_362_; + wire [0:0] _zz_363_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_1_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_2_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_3_; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_4_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_5_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_6_; + wire decode_CSR_READ_OPCODE; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_7_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_8_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_9_; + wire [1:0] memory_MEMORY_ADDRESS_LOW; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire decode_IS_CSR; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_10_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_11_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_12_; + wire decode_SRC2_FORCE_ZERO; + wire writeBack_REGFILE_WRITE_VALID; + wire memory_REGFILE_WRITE_VALID; + wire execute_REGFILE_WRITE_VALID; + wire decode_MEMORY_ENABLE; + wire decode_CSR_WRITE_OPCODE; + wire [31:0] memory_PC; + wire [31:0] memory_INSTRUCTION; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_MEMORY_READ_DATA; + wire decode_DO_EBREAK; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_13_; + wire `AluCtrlEnum_defaultEncoding_type _zz_14_; + wire `AluCtrlEnum_defaultEncoding_type _zz_15_; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_16_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_17_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_18_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_19_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_20_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_21_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_22_; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_23_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_24_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_25_; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_STORE; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_26_; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_defaultEncoding_type memory_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_27_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_28_; + wire _zz_29_; + wire _zz_30_; + wire `EnvCtrlEnum_defaultEncoding_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_31_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_32_; + wire [31:0] execute_PC; + wire [31:0] execute_RS1; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_33_; + wire _zz_34_; + reg [31:0] _zz_35_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_36_; + wire _zz_37_; + wire [31:0] _zz_38_; + wire [31:0] _zz_39_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_40_; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_41_; + wire [31:0] _zz_42_; + wire execute_IS_RVC; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_43_; + wire [31:0] _zz_44_; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire _zz_45_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_46_; + wire [31:0] _zz_47_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_48_; + reg _zz_49_; + wire [31:0] _zz_50_; + wire [31:0] _zz_51_; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire decode_INSTRUCTION_READY; + wire _zz_52_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_53_; + wire _zz_54_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_55_; + wire _zz_56_; + wire `AluCtrlEnum_defaultEncoding_type _zz_57_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_58_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_59_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_60_; + wire _zz_61_; + wire _zz_62_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_63_; + wire _zz_64_; + wire _zz_65_; + wire _zz_66_; + wire _zz_67_; + reg [31:0] decode_INSTRUCTION; + wire writeBack_MEMORY_STORE; + reg [31:0] _zz_68_; + wire writeBack_MEMORY_ENABLE; + wire [1:0] writeBack_MEMORY_ADDRESS_LOW; + wire [31:0] writeBack_MEMORY_READ_DATA; + wire memory_ALIGNEMENT_FAULT; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_STORE; + wire memory_MEMORY_ENABLE; + wire [31:0] _zz_69_; + wire [31:0] execute_SRC_ADD; + wire [1:0] _zz_70_; + wire [31:0] execute_RS2; + wire [31:0] execute_INSTRUCTION; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire _zz_71_; + reg [31:0] _zz_72_; + wire [31:0] decode_PC; + wire [31:0] _zz_73_; + wire _zz_74_; + wire [31:0] _zz_75_; + wire [31:0] _zz_76_; + wire decode_IS_RVC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + reg memory_arbitration_flushAll; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + wire writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + wire writeBack_arbitration_flushAll; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusSimplePlugin_fetcherHalt; + reg IBusSimplePlugin_fetcherflushIt; + reg IBusSimplePlugin_incomingInstruction; + wire IBusSimplePlugin_pcValids_0; + wire IBusSimplePlugin_pcValids_1; + wire IBusSimplePlugin_pcValids_2; + wire IBusSimplePlugin_pcValids_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + wire [31:0] iBus_cmd_payload_pc; + wire iBus_rsp_valid; + wire iBus_rsp_payload_error; + wire [31:0] iBus_rsp_payload_inst; + reg DBusSimplePlugin_memoryExceptionPort_valid; + reg [3:0] DBusSimplePlugin_memoryExceptionPort_payload_code; + wire [31:0] DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg IBusSimplePlugin_injectionPort_valid; + reg IBusSimplePlugin_injectionPort_ready; + wire [31:0] IBusSimplePlugin_injectionPort_payload; + wire IBusSimplePlugin_jump_pcLoad_valid; + wire [31:0] IBusSimplePlugin_jump_pcLoad_payload; + wire [1:0] _zz_77_; + wire IBusSimplePlugin_fetchPc_preOutput_valid; + wire IBusSimplePlugin_fetchPc_preOutput_ready; + wire [31:0] IBusSimplePlugin_fetchPc_preOutput_payload; + wire _zz_78_; + wire IBusSimplePlugin_fetchPc_output_valid; + wire IBusSimplePlugin_fetchPc_output_ready; + wire [31:0] IBusSimplePlugin_fetchPc_output_payload; + reg [31:0] IBusSimplePlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusSimplePlugin_fetchPc_inc; + reg IBusSimplePlugin_fetchPc_propagatePc; + reg [31:0] IBusSimplePlugin_fetchPc_pc; + reg IBusSimplePlugin_fetchPc_samplePcNext; + reg _zz_79_; + reg [31:0] IBusSimplePlugin_decodePc_pcReg /* verilator public */ ; + wire [31:0] IBusSimplePlugin_decodePc_pcPlus; + reg IBusSimplePlugin_decodePc_injectedDecode; + wire IBusSimplePlugin_iBusRsp_stages_0_input_valid; + wire IBusSimplePlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_0_input_payload; + wire IBusSimplePlugin_iBusRsp_stages_0_output_valid; + wire IBusSimplePlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_0_output_payload; + reg IBusSimplePlugin_iBusRsp_stages_0_halt; + wire IBusSimplePlugin_iBusRsp_stages_0_inputSample; + wire IBusSimplePlugin_iBusRsp_stages_1_input_valid; + wire IBusSimplePlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_1_input_payload; + wire IBusSimplePlugin_iBusRsp_stages_1_output_valid; + wire IBusSimplePlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_1_output_payload; + wire IBusSimplePlugin_iBusRsp_stages_1_halt; + wire IBusSimplePlugin_iBusRsp_stages_1_inputSample; + wire _zz_80_; + wire _zz_81_; + wire _zz_82_; + wire _zz_83_; + reg _zz_84_; + reg IBusSimplePlugin_iBusRsp_readyForError; + wire IBusSimplePlugin_iBusRsp_output_valid; + wire IBusSimplePlugin_iBusRsp_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_output_payload_pc; + wire IBusSimplePlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusSimplePlugin_iBusRsp_output_payload_rsp_inst; + wire IBusSimplePlugin_iBusRsp_output_payload_isRvc; + wire IBusSimplePlugin_decompressor_decodeInput_valid; + wire IBusSimplePlugin_decompressor_decodeInput_ready; + wire [31:0] IBusSimplePlugin_decompressor_decodeInput_payload_pc; + wire IBusSimplePlugin_decompressor_decodeInput_payload_rsp_error; + wire [31:0] IBusSimplePlugin_decompressor_decodeInput_payload_rsp_inst; + wire IBusSimplePlugin_decompressor_decodeInput_payload_isRvc; + reg IBusSimplePlugin_decompressor_bufferValid; + reg [15:0] IBusSimplePlugin_decompressor_bufferData; + wire [31:0] IBusSimplePlugin_decompressor_rawInDecode; + wire IBusSimplePlugin_decompressor_isRvc; + wire [15:0] _zz_85_; + reg [31:0] IBusSimplePlugin_decompressor_decompressed; + wire [4:0] _zz_86_; + wire [4:0] _zz_87_; + wire [11:0] _zz_88_; + wire _zz_89_; + reg [11:0] _zz_90_; + wire _zz_91_; + reg [9:0] _zz_92_; + wire [20:0] _zz_93_; + wire _zz_94_; + reg [14:0] _zz_95_; + wire _zz_96_; + reg [2:0] _zz_97_; + wire _zz_98_; + reg [9:0] _zz_99_; + wire [20:0] _zz_100_; + wire _zz_101_; + reg [4:0] _zz_102_; + wire [12:0] _zz_103_; + wire [4:0] _zz_104_; + wire [4:0] _zz_105_; + wire [4:0] _zz_106_; + wire _zz_107_; + reg [2:0] _zz_108_; + reg [2:0] _zz_109_; + wire _zz_110_; + reg [6:0] _zz_111_; + reg IBusSimplePlugin_injector_nextPcCalc_valids_0; + reg IBusSimplePlugin_injector_nextPcCalc_valids_1; + reg IBusSimplePlugin_injector_nextPcCalc_valids_2; + reg IBusSimplePlugin_injector_nextPcCalc_valids_3; + reg IBusSimplePlugin_injector_decodeRemoved; + wire IBusSimplePlugin_cmd_valid; + wire IBusSimplePlugin_cmd_ready; + wire [31:0] IBusSimplePlugin_cmd_payload_pc; + reg [0:0] IBusSimplePlugin_pendingCmd; + wire [0:0] IBusSimplePlugin_pendingCmdNext; + reg [0:0] IBusSimplePlugin_rspJoin_discardCounter; + reg IBusSimplePlugin_rspJoin_rspBufferOutput_valid; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_ready; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error; + wire [31:0] IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst; + wire iBus_rsp_takeWhen_valid; + wire iBus_rsp_takeWhen_payload_error; + wire [31:0] iBus_rsp_takeWhen_payload_inst; + wire IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid; + wire IBusSimplePlugin_rspJoin_rspBuffer_rspStream_ready; + wire IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_error; + wire [31:0] IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_inst; + reg IBusSimplePlugin_rspJoin_rspBuffer_validReg; + wire [31:0] IBusSimplePlugin_rspJoin_fetchRsp_pc; + reg IBusSimplePlugin_rspJoin_fetchRsp_rsp_error; + wire [31:0] IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst; + wire IBusSimplePlugin_rspJoin_fetchRsp_isRvc; + wire IBusSimplePlugin_rspJoin_join_valid; + wire IBusSimplePlugin_rspJoin_join_ready; + wire [31:0] IBusSimplePlugin_rspJoin_join_payload_pc; + wire IBusSimplePlugin_rspJoin_join_payload_rsp_error; + wire [31:0] IBusSimplePlugin_rspJoin_join_payload_rsp_inst; + wire IBusSimplePlugin_rspJoin_join_payload_isRvc; + wire IBusSimplePlugin_rspJoin_exceptionDetected; + wire IBusSimplePlugin_rspJoin_redoRequired; + wire _zz_112_; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + wire _zz_113_; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_114_; + reg [3:0] _zz_115_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] writeBack_DBusSimplePlugin_rspShifted; + wire _zz_116_; + reg [31:0] _zz_117_; + wire _zz_118_; + reg [31:0] _zz_119_; + reg [31:0] writeBack_DBusSimplePlugin_rspFormated; + wire [26:0] _zz_120_; + wire _zz_121_; + wire _zz_122_; + wire _zz_123_; + wire _zz_124_; + wire _zz_125_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_126_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_127_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_128_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_129_; + wire `AluCtrlEnum_defaultEncoding_type _zz_130_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_131_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_132_; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire _zz_133_; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire lastStageRegFileWrite_valid /* verilator public */ ; + wire [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + wire [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_134_; + reg [31:0] _zz_135_; + wire _zz_136_; + reg [19:0] _zz_137_; + wire _zz_138_; + reg [19:0] _zz_139_; + reg [31:0] _zz_140_; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_141_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_142_; + reg _zz_143_; + reg _zz_144_; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_145_; + reg [10:0] _zz_146_; + wire _zz_147_; + reg [19:0] _zz_148_; + wire _zz_149_; + reg [18:0] _zz_150_; + reg [31:0] _zz_151_; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + reg [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire execute_CsrPlugin_inWfi /* verilator public */ ; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg [31:0] _zz_152_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_153_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_154_; + reg _zz_155_; + reg DebugPlugin_resetIt_regNext; + reg decode_to_execute_MEMORY_STORE; + reg execute_to_memory_MEMORY_STORE; + reg memory_to_writeBack_MEMORY_STORE; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type execute_to_memory_ENV_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type memory_to_writeBack_ENV_CTRL; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + reg decode_to_execute_DO_EBREAK; + reg [31:0] memory_to_writeBack_MEMORY_READ_DATA; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + reg [31:0] decode_to_execute_INSTRUCTION; + reg [31:0] execute_to_memory_INSTRUCTION; + reg [31:0] memory_to_writeBack_INSTRUCTION; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg [31:0] decode_to_execute_PC; + reg [31:0] execute_to_memory_PC; + reg [31:0] memory_to_writeBack_PC; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_MEMORY_ENABLE; + reg execute_to_memory_MEMORY_ENABLE; + reg memory_to_writeBack_MEMORY_ENABLE; + reg decode_to_execute_IS_RVC; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg execute_to_memory_REGFILE_WRITE_VALID; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + reg decode_to_execute_SRC2_FORCE_ZERO; + reg execute_to_memory_ALIGNEMENT_FAULT; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg decode_to_execute_IS_CSR; + reg [1:0] execute_to_memory_MEMORY_ADDRESS_LOW; + reg [1:0] memory_to_writeBack_MEMORY_ADDRESS_LOW; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg decode_to_execute_CSR_READ_OPCODE; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg [2:0] _zz_156_; + reg [31:0] IBusSimplePlugin_injectionPort_payload_regNext; + wire iBus_cmd_m2sPipe_valid; + wire iBus_cmd_m2sPipe_ready; + wire [31:0] iBus_cmd_m2sPipe_payload_pc; + reg _zz_157_; + reg [31:0] _zz_158_; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_159_; + `ifndef SYNTHESIS + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_1__string; + reg [39:0] _zz_2__string; + reg [39:0] _zz_3__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_4__string; + reg [31:0] _zz_5__string; + reg [31:0] _zz_6__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_7__string; + reg [95:0] _zz_8__string; + reg [95:0] _zz_9__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_10__string; + reg [23:0] _zz_11__string; + reg [23:0] _zz_12__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_13__string; + reg [63:0] _zz_14__string; + reg [63:0] _zz_15__string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_16__string; + reg [71:0] _zz_17__string; + reg [71:0] _zz_18__string; + reg [47:0] _zz_19__string; + reg [47:0] _zz_20__string; + reg [47:0] _zz_21__string; + reg [47:0] _zz_22__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_23__string; + reg [47:0] _zz_24__string; + reg [47:0] _zz_25__string; + reg [47:0] memory_ENV_CTRL_string; + reg [47:0] _zz_27__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_28__string; + reg [47:0] writeBack_ENV_CTRL_string; + reg [47:0] _zz_31__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_33__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_36__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_41__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_43__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_46__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_48__string; + reg [95:0] _zz_53__string; + reg [23:0] _zz_55__string; + reg [63:0] _zz_57__string; + reg [47:0] _zz_58__string; + reg [39:0] _zz_59__string; + reg [31:0] _zz_60__string; + reg [71:0] _zz_63__string; + reg [71:0] _zz_126__string; + reg [31:0] _zz_127__string; + reg [39:0] _zz_128__string; + reg [47:0] _zz_129__string; + reg [63:0] _zz_130__string; + reg [23:0] _zz_131__string; + reg [95:0] _zz_132__string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [47:0] execute_to_memory_ENV_CTRL_string; + reg [47:0] memory_to_writeBack_ENV_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_162_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_163_ = (! execute_arbitration_isStuckByOthers); + assign _zz_164_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_165_ = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_166_ = writeBack_INSTRUCTION[29 : 28]; + assign _zz_167_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_168_ = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00)) == 1'b0); + assign _zz_169_ = (DebugPlugin_stepIt && IBusSimplePlugin_incomingInstruction); + assign _zz_170_ = (IBusSimplePlugin_fetchPc_preOutput_valid && IBusSimplePlugin_fetchPc_preOutput_ready); + assign _zz_171_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_172_ = (IBusSimplePlugin_iBusRsp_output_valid && IBusSimplePlugin_iBusRsp_output_ready); + assign _zz_173_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_174_ = {_zz_85_[1 : 0],_zz_85_[15 : 13]}; + assign _zz_175_ = _zz_85_[6 : 5]; + assign _zz_176_ = _zz_85_[11 : 10]; + assign _zz_177_ = writeBack_INSTRUCTION[13 : 12]; + assign _zz_178_ = execute_INSTRUCTION[13]; + assign _zz_179_ = (_zz_77_ & (~ _zz_180_)); + assign _zz_180_ = (_zz_77_ - (2'b01)); + assign _zz_181_ = {IBusSimplePlugin_fetchPc_inc,(2'b00)}; + assign _zz_182_ = {29'd0, _zz_181_}; + assign _zz_183_ = (decode_IS_RVC ? (3'b010) : (3'b100)); + assign _zz_184_ = {29'd0, _zz_183_}; + assign _zz_185_ = {{_zz_95_,_zz_85_[6 : 2]},(12'b000000000000)}; + assign _zz_186_ = {{{(4'b0000),_zz_85_[8 : 7]},_zz_85_[12 : 9]},(2'b00)}; + assign _zz_187_ = {{{(4'b0000),_zz_85_[8 : 7]},_zz_85_[12 : 9]},(2'b00)}; + assign _zz_188_ = (decode_IS_RVC ? (3'b010) : (3'b100)); + assign _zz_189_ = {29'd0, _zz_188_}; + assign _zz_190_ = (IBusSimplePlugin_pendingCmd + (IBusSimplePlugin_cmd_valid && IBusSimplePlugin_cmd_ready)); + assign _zz_191_ = (memory_MEMORY_STORE ? (3'b110) : (3'b100)); + assign _zz_192_ = _zz_120_[0 : 0]; + assign _zz_193_ = _zz_120_[2 : 2]; + assign _zz_194_ = _zz_120_[4 : 4]; + assign _zz_195_ = _zz_120_[8 : 8]; + assign _zz_196_ = _zz_120_[9 : 9]; + assign _zz_197_ = _zz_120_[19 : 19]; + assign _zz_198_ = _zz_120_[22 : 22]; + assign _zz_199_ = _zz_120_[26 : 26]; + assign _zz_200_ = execute_SRC_LESS; + assign _zz_201_ = (execute_IS_RVC ? (3'b010) : (3'b100)); + assign _zz_202_ = execute_INSTRUCTION[19 : 15]; + assign _zz_203_ = execute_INSTRUCTION[31 : 20]; + assign _zz_204_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_205_ = ($signed(_zz_206_) + $signed(_zz_209_)); + assign _zz_206_ = ($signed(_zz_207_) + $signed(_zz_208_)); + assign _zz_207_ = execute_SRC1; + assign _zz_208_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_209_ = (execute_SRC_USE_SUB_LESS ? _zz_210_ : _zz_211_); + assign _zz_210_ = (32'b00000000000000000000000000000001); + assign _zz_211_ = (32'b00000000000000000000000000000000); + assign _zz_212_ = (_zz_213_ >>> 1); + assign _zz_213_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_214_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_215_ = execute_INSTRUCTION[31 : 20]; + assign _zz_216_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_217_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_218_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_219_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_220_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_221_ = (decode_PC >>> 1); + assign _zz_222_ = (decode_PC >>> 1); + assign _zz_223_ = (decode_PC >>> 1); + assign _zz_224_ = (decode_PC >>> 1); + assign _zz_225_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_226_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_227_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_228_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_229_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_230_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_231_ = ({3'd0,_zz_159_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_232_ = (_zz_85_[11 : 10] == (2'b01)); + assign _zz_233_ = ((_zz_85_[11 : 10] == (2'b11)) && (_zz_85_[6 : 5] == (2'b00))); + assign _zz_234_ = (7'b0000000); + assign _zz_235_ = _zz_85_[6 : 2]; + assign _zz_236_ = _zz_85_[12]; + assign _zz_237_ = _zz_85_[11 : 7]; + assign _zz_238_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000000)); + assign _zz_239_ = ((decode_INSTRUCTION & _zz_248_) == (32'b00000000000000000000000000000000)); + assign _zz_240_ = {(_zz_249_ == _zz_250_),(_zz_251_ == _zz_252_)}; + assign _zz_241_ = ((decode_INSTRUCTION & _zz_253_) == (32'b00000000000000000000000000000100)); + assign _zz_242_ = _zz_125_; + assign _zz_243_ = {(_zz_254_ == _zz_255_),_zz_125_}; + assign _zz_244_ = (2'b00); + assign _zz_245_ = ({_zz_256_,{_zz_257_,_zz_258_}} != (3'b000)); + assign _zz_246_ = ({_zz_259_,_zz_260_} != (2'b00)); + assign _zz_247_ = {(_zz_261_ != _zz_262_),{_zz_263_,{_zz_264_,_zz_265_}}}; + assign _zz_248_ = (32'b00000000000000000000000000011000); + assign _zz_249_ = (decode_INSTRUCTION & (32'b00000000000000000110000000000100)); + assign _zz_250_ = (32'b00000000000000000010000000000000); + assign _zz_251_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000100)); + assign _zz_252_ = (32'b00000000000000000001000000000000); + assign _zz_253_ = (32'b00000000000000000000000000010100); + assign _zz_254_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_255_ = (32'b00000000000000000000000000000100); + assign _zz_256_ = ((decode_INSTRUCTION & _zz_266_) == (32'b00000000000000000000000001000000)); + assign _zz_257_ = (_zz_267_ == _zz_268_); + assign _zz_258_ = (_zz_269_ == _zz_270_); + assign _zz_259_ = _zz_124_; + assign _zz_260_ = (_zz_271_ == _zz_272_); + assign _zz_261_ = {_zz_124_,_zz_273_}; + assign _zz_262_ = (2'b00); + assign _zz_263_ = ({_zz_274_,_zz_275_} != (2'b00)); + assign _zz_264_ = (_zz_276_ != _zz_277_); + assign _zz_265_ = {_zz_278_,{_zz_279_,_zz_280_}}; + assign _zz_266_ = (32'b00000000000000000000000001000100); + assign _zz_267_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010100)); + assign _zz_268_ = (32'b00000000000000000010000000010000); + assign _zz_269_ = (decode_INSTRUCTION & (32'b01000000000000000100000000110100)); + assign _zz_270_ = (32'b01000000000000000000000000110000); + assign _zz_271_ = (decode_INSTRUCTION & (32'b00000000000000000000000001110000)); + assign _zz_272_ = (32'b00000000000000000000000000100000); + assign _zz_273_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000000000)); + assign _zz_274_ = ((decode_INSTRUCTION & _zz_281_) == (32'b00000000000000000000000000100100)); + assign _zz_275_ = ((decode_INSTRUCTION & _zz_282_) == (32'b00000000000000000001000000010000)); + assign _zz_276_ = {(_zz_283_ == _zz_284_),(_zz_285_ == _zz_286_)}; + assign _zz_277_ = (2'b00); + assign _zz_278_ = ((_zz_287_ == _zz_288_) != (1'b0)); + assign _zz_279_ = (_zz_289_ != (1'b0)); + assign _zz_280_ = {(_zz_290_ != _zz_291_),{_zz_292_,{_zz_293_,_zz_294_}}}; + assign _zz_281_ = (32'b00000000000000000000000001100100); + assign _zz_282_ = (32'b00000000000000000011000001010100); + assign _zz_283_ = (decode_INSTRUCTION & (32'b00000000000000000110000000010100)); + assign _zz_284_ = (32'b00000000000000000110000000010000); + assign _zz_285_ = (decode_INSTRUCTION & (32'b00000000000000000101000000010100)); + assign _zz_286_ = (32'b00000000000000000100000000010000); + assign _zz_287_ = (decode_INSTRUCTION & (32'b00000000000000000110000000010100)); + assign _zz_288_ = (32'b00000000000000000010000000010000); + assign _zz_289_ = ((decode_INSTRUCTION & (32'b00010000000000000011000001010000)) == (32'b00000000000000000000000001010000)); + assign _zz_290_ = {_zz_123_,((decode_INSTRUCTION & _zz_295_) == (32'b00010000000000000000000001010000))}; + assign _zz_291_ = (2'b00); + assign _zz_292_ = (((decode_INSTRUCTION & _zz_296_) == (32'b00000000000000000001000000000000)) != (1'b0)); + assign _zz_293_ = ((_zz_297_ == _zz_298_) != (1'b0)); + assign _zz_294_ = {({_zz_299_,_zz_300_} != (2'b00)),{(_zz_301_ != _zz_302_),{_zz_303_,{_zz_304_,_zz_305_}}}}; + assign _zz_295_ = (32'b00010000010000000011000001010000); + assign _zz_296_ = (32'b00000000000000000001000000000000); + assign _zz_297_ = (decode_INSTRUCTION & (32'b00000000000000000011000000000000)); + assign _zz_298_ = (32'b00000000000000000010000000000000); + assign _zz_299_ = _zz_122_; + assign _zz_300_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000011100)) == (32'b00000000000000000000000000000100)); + assign _zz_301_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001011000)) == (32'b00000000000000000000000001000000)); + assign _zz_302_ = (1'b0); + assign _zz_303_ = (_zz_121_ != (1'b0)); + assign _zz_304_ = ((_zz_306_ == _zz_307_) != (1'b0)); + assign _zz_305_ = {({_zz_308_,_zz_309_} != (2'b00)),{(_zz_310_ != _zz_311_),{_zz_312_,{_zz_313_,_zz_314_}}}}; + assign _zz_306_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_307_ = (32'b00000000000000000000000000000000); + assign _zz_308_ = ((decode_INSTRUCTION & _zz_315_) == (32'b00000000000000000001000001010000)); + assign _zz_309_ = ((decode_INSTRUCTION & _zz_316_) == (32'b00000000000000000010000001010000)); + assign _zz_310_ = {(_zz_317_ == _zz_318_),(_zz_319_ == _zz_320_)}; + assign _zz_311_ = (2'b00); + assign _zz_312_ = ((_zz_321_ == _zz_322_) != (1'b0)); + assign _zz_313_ = ({_zz_323_,_zz_324_} != (2'b00)); + assign _zz_314_ = {(_zz_325_ != _zz_326_),{_zz_327_,{_zz_328_,_zz_329_}}}; + assign _zz_315_ = (32'b00000000000000000001000001010000); + assign _zz_316_ = (32'b00000000000000000010000001010000); + assign _zz_317_ = (decode_INSTRUCTION & (32'b00000000000000000000000000110100)); + assign _zz_318_ = (32'b00000000000000000000000000100000); + assign _zz_319_ = (decode_INSTRUCTION & (32'b00000000000000000000000001100100)); + assign _zz_320_ = (32'b00000000000000000000000000100000); + assign _zz_321_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_322_ = (32'b00000000000000000101000000010000); + assign _zz_323_ = ((decode_INSTRUCTION & _zz_330_) == (32'b01000000000000000001000000010000)); + assign _zz_324_ = ((decode_INSTRUCTION & _zz_331_) == (32'b00000000000000000001000000010000)); + assign _zz_325_ = ((decode_INSTRUCTION & _zz_332_) == (32'b00000000000000000000000000100000)); + assign _zz_326_ = (1'b0); + assign _zz_327_ = ((_zz_333_ == _zz_334_) != (1'b0)); + assign _zz_328_ = ({_zz_335_,_zz_336_} != (2'b00)); + assign _zz_329_ = {(_zz_337_ != _zz_338_),(_zz_339_ != _zz_340_)}; + assign _zz_330_ = (32'b01000000000000000011000001010100); + assign _zz_331_ = (32'b00000000000000000111000001010100); + assign _zz_332_ = (32'b00000000000000000000000000100000); + assign _zz_333_ = (decode_INSTRUCTION & (32'b00000000000000000000000000010000)); + assign _zz_334_ = (32'b00000000000000000000000000010000); + assign _zz_335_ = ((decode_INSTRUCTION & (32'b00000000000000000010000000010000)) == (32'b00000000000000000010000000000000)); + assign _zz_336_ = ((decode_INSTRUCTION & (32'b00000000000000000101000000000000)) == (32'b00000000000000000001000000000000)); + assign _zz_337_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000000)) == (32'b00000000000000000000000000000000)); + assign _zz_338_ = (1'b0); + assign _zz_339_ = {_zz_122_,{((decode_INSTRUCTION & _zz_341_) == (32'b00000000000000000001000000010000)),{(_zz_342_ == _zz_343_),{_zz_121_,{_zz_344_,_zz_345_}}}}}; + assign _zz_340_ = (6'b000000); + assign _zz_341_ = (32'b00000000000000000001000000010000); + assign _zz_342_ = (decode_INSTRUCTION & (32'b00000000000000000010000000010000)); + assign _zz_343_ = (32'b00000000000000000010000000010000); + assign _zz_344_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000001100)) == (32'b00000000000000000000000000000100)); + assign _zz_345_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000101000)) == (32'b00000000000000000000000000000000)); + assign _zz_346_ = (32'b00000000000000000001000001111111); + assign _zz_347_ = (decode_INSTRUCTION & (32'b00000000000000000010000001111111)); + assign _zz_348_ = (32'b00000000000000000010000001110011); + assign _zz_349_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001111111)) == (32'b00000000000000000100000001100011)); + assign _zz_350_ = ((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000010000000010011)); + assign _zz_351_ = {((decode_INSTRUCTION & (32'b00000000000000000110000000111111)) == (32'b00000000000000000000000000100011)),{((decode_INSTRUCTION & (32'b00000000000000000010000001111111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_352_) == (32'b00000000000000000000000000000011)),{(_zz_353_ == _zz_354_),{_zz_355_,{_zz_356_,_zz_357_}}}}}}; + assign _zz_352_ = (32'b00000000000000000101000001011111); + assign _zz_353_ = (decode_INSTRUCTION & (32'b00000000000000000111000001111011)); + assign _zz_354_ = (32'b00000000000000000000000001100011); + assign _zz_355_ = ((decode_INSTRUCTION & (32'b00000000000000000110000001111111)) == (32'b00000000000000000000000000001111)); + assign _zz_356_ = ((decode_INSTRUCTION & (32'b11111110000000000000000001111111)) == (32'b00000000000000000000000000110011)); + assign _zz_357_ = {((decode_INSTRUCTION & (32'b10111100000000000111000001111111)) == (32'b00000000000000000101000000010011)),{((decode_INSTRUCTION & (32'b11111100000000000011000001111111)) == (32'b00000000000000000001000000010011)),{((decode_INSTRUCTION & _zz_358_) == (32'b00000000000000000101000000110011)),{(_zz_359_ == _zz_360_),{_zz_361_,{_zz_362_,_zz_363_}}}}}}; + assign _zz_358_ = (32'b10111110000000000111000001111111); + assign _zz_359_ = (decode_INSTRUCTION & (32'b10111110000000000111000001111111)); + assign _zz_360_ = (32'b00000000000000000000000000110011); + assign _zz_361_ = ((decode_INSTRUCTION & (32'b11011111111111111111111111111111)) == (32'b00010000001000000000000001110011)); + assign _zz_362_ = ((decode_INSTRUCTION & (32'b11111111111011111111111111111111)) == (32'b00000000000000000000000001110011)); + assign _zz_363_ = ((decode_INSTRUCTION & (32'b11111111111111111111111111111111)) == (32'b00010000010100000000000001110011)); + initial begin + $readmemb("4-stage-no-cache-debug.v_toplevel_RegFilePlugin_regFile.bin",RegFilePlugin_regFile); + end + always @ (posedge clk) begin + if(_zz_49_) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_133_) begin + _zz_160_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_133_) begin + _zz_161_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_1_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_1__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_1__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_1__string = "AND_1"; + default : _zz_1__string = "?????"; + endcase + end + always @(*) begin + case(_zz_2_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_2__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_2__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_2__string = "AND_1"; + default : _zz_2__string = "?????"; + endcase + end + always @(*) begin + case(_zz_3_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_3__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_3__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_3__string = "AND_1"; + default : _zz_3__string = "?????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_4_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_4__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_4__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_4__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_4__string = "JALR"; + default : _zz_4__string = "????"; + endcase + end + always @(*) begin + case(_zz_5_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_5__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_5__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_5__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_5__string = "JALR"; + default : _zz_5__string = "????"; + endcase + end + always @(*) begin + case(_zz_6_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_6__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_6__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_6__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_6__string = "JALR"; + default : _zz_6__string = "????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_7_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_7__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_7__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_7__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_7__string = "URS1 "; + default : _zz_7__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_8_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_8__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_8__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_8__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_8__string = "URS1 "; + default : _zz_8__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_9_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_9__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_9__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_9__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_9__string = "URS1 "; + default : _zz_9__string = "????????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_10_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_10__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_10__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_10__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_10__string = "PC "; + default : _zz_10__string = "???"; + endcase + end + always @(*) begin + case(_zz_11_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_11__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_11__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_11__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_11__string = "PC "; + default : _zz_11__string = "???"; + endcase + end + always @(*) begin + case(_zz_12_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_12__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_12__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_12__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_12__string = "PC "; + default : _zz_12__string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_13_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_13__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_13__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_13__string = "BITWISE "; + default : _zz_13__string = "????????"; + endcase + end + always @(*) begin + case(_zz_14_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_14__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_14__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_14__string = "BITWISE "; + default : _zz_14__string = "????????"; + endcase + end + always @(*) begin + case(_zz_15_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_15__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_15__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_15__string = "BITWISE "; + default : _zz_15__string = "????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_16_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_16__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_16__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_16__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_16__string = "SRA_1 "; + default : _zz_16__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_17__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_17__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_17__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_17__string = "SRA_1 "; + default : _zz_17__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_18_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_18__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_18__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_18__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_18__string = "SRA_1 "; + default : _zz_18__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_19_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_19__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_19__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_19__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_19__string = "EBREAK"; + default : _zz_19__string = "??????"; + endcase + end + always @(*) begin + case(_zz_20_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_20__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_20__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_20__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_20__string = "EBREAK"; + default : _zz_20__string = "??????"; + endcase + end + always @(*) begin + case(_zz_21_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_21__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_21__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_21__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_21__string = "EBREAK"; + default : _zz_21__string = "??????"; + endcase + end + always @(*) begin + case(_zz_22_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_22__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_22__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_22__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_22__string = "EBREAK"; + default : _zz_22__string = "??????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_23_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_23__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_23__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_23__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_23__string = "EBREAK"; + default : _zz_23__string = "??????"; + endcase + end + always @(*) begin + case(_zz_24_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_24__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_24__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_24__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_24__string = "EBREAK"; + default : _zz_24__string = "??????"; + endcase + end + always @(*) begin + case(_zz_25_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_25__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_25__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_25__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_25__string = "EBREAK"; + default : _zz_25__string = "??????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : memory_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : memory_ENV_CTRL_string = "EBREAK"; + default : memory_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_27_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_27__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_27__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_27__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_27__string = "EBREAK"; + default : _zz_27__string = "??????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_28_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_28__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_28__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_28__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_28__string = "EBREAK"; + default : _zz_28__string = "??????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : writeBack_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : writeBack_ENV_CTRL_string = "EBREAK"; + default : writeBack_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_31_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_31__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_31__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_31__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_31__string = "EBREAK"; + default : _zz_31__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_33_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_33__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_33__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_33__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_33__string = "JALR"; + default : _zz_33__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_36_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_36__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_36__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_36__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_36__string = "SRA_1 "; + default : _zz_36__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_41_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_41__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_41__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_41__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_41__string = "PC "; + default : _zz_41__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_43_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_43__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_43__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_43__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_43__string = "URS1 "; + default : _zz_43__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_46_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_46__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_46__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_46__string = "BITWISE "; + default : _zz_46__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_48_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_48__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_48__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_48__string = "AND_1"; + default : _zz_48__string = "?????"; + endcase + end + always @(*) begin + case(_zz_53_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_53__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_53__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_53__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_53__string = "URS1 "; + default : _zz_53__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_55_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_55__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_55__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_55__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_55__string = "PC "; + default : _zz_55__string = "???"; + endcase + end + always @(*) begin + case(_zz_57_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_57__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_57__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_57__string = "BITWISE "; + default : _zz_57__string = "????????"; + endcase + end + always @(*) begin + case(_zz_58_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_58__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_58__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_58__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_58__string = "EBREAK"; + default : _zz_58__string = "??????"; + endcase + end + always @(*) begin + case(_zz_59_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_59__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_59__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_59__string = "AND_1"; + default : _zz_59__string = "?????"; + endcase + end + always @(*) begin + case(_zz_60_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_60__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_60__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_60__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_60__string = "JALR"; + default : _zz_60__string = "????"; + endcase + end + always @(*) begin + case(_zz_63_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_63__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_63__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_63__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_63__string = "SRA_1 "; + default : _zz_63__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_126_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_126__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_126__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_126__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_126__string = "SRA_1 "; + default : _zz_126__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_127_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_127__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_127__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_127__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_127__string = "JALR"; + default : _zz_127__string = "????"; + endcase + end + always @(*) begin + case(_zz_128_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_128__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_128__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_128__string = "AND_1"; + default : _zz_128__string = "?????"; + endcase + end + always @(*) begin + case(_zz_129_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_129__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_129__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_129__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_129__string = "EBREAK"; + default : _zz_129__string = "??????"; + endcase + end + always @(*) begin + case(_zz_130_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_130__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_130__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_130__string = "BITWISE "; + default : _zz_130__string = "????????"; + endcase + end + always @(*) begin + case(_zz_131_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_131__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_131__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_131__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_131__string = "PC "; + default : _zz_131__string = "???"; + endcase + end + always @(*) begin + case(_zz_132_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_132__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_132__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_132__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_132__string = "URS1 "; + default : _zz_132__string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_to_memory_ENV_CTRL_string = "EBREAK"; + default : execute_to_memory_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : memory_to_writeBack_ENV_CTRL_string = "EBREAK"; + default : memory_to_writeBack_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + `endif + + assign decode_ALU_BITWISE_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_BRANCH_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign decode_CSR_READ_OPCODE = _zz_29_; + assign decode_SRC1_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign memory_MEMORY_ADDRESS_LOW = execute_to_memory_MEMORY_ADDRESS_LOW; + assign execute_MEMORY_ADDRESS_LOW = _zz_70_; + assign decode_IS_CSR = _zz_62_; + assign decode_SRC2_CTRL = _zz_10_; + assign _zz_11_ = _zz_12_; + assign decode_SRC2_FORCE_ZERO = _zz_45_; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_MEMORY_ENABLE = _zz_61_; + assign decode_CSR_WRITE_OPCODE = _zz_30_; + assign memory_PC = execute_to_memory_PC; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_73_; + assign memory_MEMORY_READ_DATA = _zz_69_; + assign decode_DO_EBREAK = _zz_26_; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign execute_REGFILE_WRITE_DATA = _zz_47_; + assign decode_ALU_CTRL = _zz_13_; + assign _zz_14_ = _zz_15_; + assign decode_SHIFT_CTRL = _zz_16_; + assign _zz_17_ = _zz_18_; + assign _zz_19_ = _zz_20_; + assign _zz_21_ = _zz_22_; + assign decode_ENV_CTRL = _zz_23_; + assign _zz_24_ = _zz_25_; + assign decode_SRC_LESS_UNSIGNED = _zz_65_; + assign decode_MEMORY_STORE = _zz_64_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_52_; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_27_; + assign execute_ENV_CTRL = _zz_28_; + assign writeBack_ENV_CTRL = _zz_31_; + assign execute_BRANCH_CALC = _zz_32_; + assign execute_BRANCH_DO = _zz_34_; + assign execute_PC = decode_to_execute_PC; + assign execute_RS1 = _zz_51_; + assign execute_BRANCH_CTRL = _zz_33_; + always @ (*) begin + _zz_35_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_113_)))begin + execute_arbitration_haltItself = 1'b1; + end + if(_zz_162_)begin + _zz_35_ = _zz_141_; + if(_zz_163_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_35_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_SHIFT_CTRL = _zz_36_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_40_ = execute_PC; + assign execute_SRC2_CTRL = _zz_41_; + assign execute_IS_RVC = decode_to_execute_IS_RVC; + assign execute_SRC1_CTRL = _zz_43_; + assign decode_SRC_USE_SUB_LESS = _zz_54_; + assign decode_SRC_ADD_ZERO = _zz_56_; + assign execute_SRC_ADD_SUB = _zz_39_; + assign execute_SRC_LESS = _zz_37_; + assign execute_ALU_CTRL = _zz_46_; + assign execute_SRC2 = _zz_42_; + assign execute_SRC1 = _zz_44_; + assign execute_ALU_BITWISE_CTRL = _zz_48_; + always @ (*) begin + _zz_49_ = 1'b0; + if(lastStageRegFileWrite_valid)begin + _zz_49_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_66_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = _zz_67_; + assign decode_INSTRUCTION_READY = 1'b1; + always @ (*) begin + decode_INSTRUCTION = _zz_75_; + if((_zz_156_ != (3'b000)))begin + decode_INSTRUCTION = IBusSimplePlugin_injectionPort_payload_regNext; + end + end + + assign writeBack_MEMORY_STORE = memory_to_writeBack_MEMORY_STORE; + always @ (*) begin + _zz_68_ = writeBack_REGFILE_WRITE_DATA; + if((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE))begin + _zz_68_ = writeBack_DBusSimplePlugin_rspFormated; + end + end + + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign writeBack_MEMORY_ADDRESS_LOW = memory_to_writeBack_MEMORY_ADDRESS_LOW; + assign writeBack_MEMORY_READ_DATA = memory_to_writeBack_MEMORY_READ_DATA; + assign memory_ALIGNEMENT_FAULT = execute_to_memory_ALIGNEMENT_FAULT; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE = execute_to_memory_MEMORY_STORE; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_SRC_ADD = _zz_38_; + assign execute_RS2 = _zz_50_; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = _zz_71_; + always @ (*) begin + _zz_72_ = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid)begin + _zz_72_ = BranchPlugin_jumpInterface_payload; + end + end + + assign decode_PC = _zz_76_; + assign decode_IS_RVC = _zz_74_; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusSimplePlugin_decompressor_decodeInput_valid && (! IBusSimplePlugin_injector_decodeRemoved)); + IBusSimplePlugin_injectionPort_ready = 1'b0; + case(_zz_156_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + IBusSimplePlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if(CsrPlugin_interrupt)begin + decode_arbitration_haltByOther = decode_arbitration_isValid; + end + if(({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET))}} != (3'b000)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(decodeExceptionPort_valid)begin + decode_arbitration_removeIt = 1'b1; + end + if(_zz_155_)begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_removeIt = 1'b0; + if(BranchPlugin_jumpInterface_valid)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(CsrPlugin_selfException_valid)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_haltByOther = 1'b0; + memory_arbitration_flushAll = 1'b0; + IBusSimplePlugin_fetcherHalt = 1'b0; + IBusSimplePlugin_fetcherflushIt = 1'b0; + CsrPlugin_jumpInterface_valid = 1'b0; + CsrPlugin_jumpInterface_payload = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode}}} != (4'b0000)))begin + IBusSimplePlugin_fetcherHalt = 1'b1; + end + if(_zz_164_)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,(2'b00)}; + memory_arbitration_flushAll = 1'b1; + end + if(_zz_165_)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + CsrPlugin_jumpInterface_valid = 1'b1; + memory_arbitration_flushAll = 1'b1; + case(_zz_166_) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + if(_zz_167_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_168_)begin + IBusSimplePlugin_fetcherflushIt = 1'b1; + IBusSimplePlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + end + if(_zz_169_)begin + IBusSimplePlugin_fetcherHalt = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + execute_arbitration_flushAll = 1'b1; + end + if(_zz_167_)begin + if(_zz_168_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + always @ (*) begin + memory_arbitration_haltItself = 1'b0; + if((((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (! memory_MEMORY_STORE)) && ((! dBus_rsp_ready) || 1'b0)))begin + memory_arbitration_haltItself = 1'b1; + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @ (*) begin + memory_arbitration_removeIt = 1'b0; + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + memory_arbitration_removeIt = 1'b1; + end + if(memory_arbitration_isFlushed)begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_haltItself = 1'b0; + assign writeBack_arbitration_haltByOther = 1'b0; + always @ (*) begin + writeBack_arbitration_removeIt = 1'b0; + if(writeBack_arbitration_isFlushed)begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_flushAll = 1'b0; + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @ (*) begin + IBusSimplePlugin_incomingInstruction = 1'b0; + if(IBusSimplePlugin_iBusRsp_stages_1_input_valid)begin + IBusSimplePlugin_incomingInstruction = 1'b1; + end + if((IBusSimplePlugin_decompressor_bufferValid && (IBusSimplePlugin_decompressor_bufferData[1 : 0] != (2'b11))))begin + IBusSimplePlugin_incomingInstruction = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_forceMachineWire = 1'b0; + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode)begin + CsrPlugin_allowException = 1'b0; + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @ (*) begin + CsrPlugin_allowInterrupts = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + assign IBusSimplePlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid} != (2'b00)); + assign _zz_77_ = {BranchPlugin_jumpInterface_valid,CsrPlugin_jumpInterface_valid}; + assign IBusSimplePlugin_jump_pcLoad_payload = (_zz_179_[0] ? CsrPlugin_jumpInterface_payload : BranchPlugin_jumpInterface_payload); + assign _zz_78_ = (! IBusSimplePlugin_fetcherHalt); + assign IBusSimplePlugin_fetchPc_output_valid = (IBusSimplePlugin_fetchPc_preOutput_valid && _zz_78_); + assign IBusSimplePlugin_fetchPc_preOutput_ready = (IBusSimplePlugin_fetchPc_output_ready && _zz_78_); + assign IBusSimplePlugin_fetchPc_output_payload = IBusSimplePlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusSimplePlugin_fetchPc_propagatePc = 1'b0; + if((IBusSimplePlugin_iBusRsp_stages_1_input_valid && IBusSimplePlugin_iBusRsp_stages_1_input_ready))begin + IBusSimplePlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusSimplePlugin_fetchPc_pc = (IBusSimplePlugin_fetchPc_pcReg + _zz_182_); + IBusSimplePlugin_fetchPc_samplePcNext = 1'b0; + if(IBusSimplePlugin_fetchPc_inc)begin + IBusSimplePlugin_fetchPc_pc[1] = 1'b0; + end + if(IBusSimplePlugin_fetchPc_propagatePc)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + IBusSimplePlugin_fetchPc_pc = IBusSimplePlugin_jump_pcLoad_payload; + end + if(_zz_170_)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + end + IBusSimplePlugin_fetchPc_pc[0] = 1'b0; + end + + assign IBusSimplePlugin_fetchPc_preOutput_valid = _zz_79_; + assign IBusSimplePlugin_fetchPc_preOutput_payload = IBusSimplePlugin_fetchPc_pc; + assign IBusSimplePlugin_decodePc_pcPlus = (IBusSimplePlugin_decodePc_pcReg + _zz_184_); + always @ (*) begin + IBusSimplePlugin_decodePc_injectedDecode = 1'b0; + if((_zz_156_ != (3'b000)))begin + IBusSimplePlugin_decodePc_injectedDecode = 1'b1; + end + end + + assign IBusSimplePlugin_iBusRsp_stages_0_input_valid = IBusSimplePlugin_fetchPc_output_valid; + assign IBusSimplePlugin_fetchPc_output_ready = IBusSimplePlugin_iBusRsp_stages_0_input_ready; + assign IBusSimplePlugin_iBusRsp_stages_0_input_payload = IBusSimplePlugin_fetchPc_output_payload; + assign IBusSimplePlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusSimplePlugin_iBusRsp_stages_0_halt = 1'b0; + if((IBusSimplePlugin_iBusRsp_stages_0_input_valid && ((! IBusSimplePlugin_cmd_valid) || (! IBusSimplePlugin_cmd_ready))))begin + IBusSimplePlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_80_ = (! IBusSimplePlugin_iBusRsp_stages_0_halt); + assign IBusSimplePlugin_iBusRsp_stages_0_input_ready = (IBusSimplePlugin_iBusRsp_stages_0_output_ready && _zz_80_); + assign IBusSimplePlugin_iBusRsp_stages_0_output_valid = (IBusSimplePlugin_iBusRsp_stages_0_input_valid && _zz_80_); + assign IBusSimplePlugin_iBusRsp_stages_0_output_payload = IBusSimplePlugin_iBusRsp_stages_0_input_payload; + assign IBusSimplePlugin_iBusRsp_stages_1_halt = 1'b0; + assign _zz_81_ = (! IBusSimplePlugin_iBusRsp_stages_1_halt); + assign IBusSimplePlugin_iBusRsp_stages_1_input_ready = (IBusSimplePlugin_iBusRsp_stages_1_output_ready && _zz_81_); + assign IBusSimplePlugin_iBusRsp_stages_1_output_valid = (IBusSimplePlugin_iBusRsp_stages_1_input_valid && _zz_81_); + assign IBusSimplePlugin_iBusRsp_stages_1_output_payload = IBusSimplePlugin_iBusRsp_stages_1_input_payload; + assign IBusSimplePlugin_iBusRsp_stages_0_output_ready = _zz_82_; + assign _zz_82_ = ((1'b0 && (! _zz_83_)) || IBusSimplePlugin_iBusRsp_stages_1_input_ready); + assign _zz_83_ = _zz_84_; + assign IBusSimplePlugin_iBusRsp_stages_1_input_valid = _zz_83_; + assign IBusSimplePlugin_iBusRsp_stages_1_input_payload = IBusSimplePlugin_fetchPc_pcReg; + always @ (*) begin + IBusSimplePlugin_iBusRsp_readyForError = 1'b1; + if((IBusSimplePlugin_decompressor_bufferValid && IBusSimplePlugin_decompressor_isRvc))begin + IBusSimplePlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign IBusSimplePlugin_decompressor_rawInDecode = (IBusSimplePlugin_decompressor_bufferValid ? {IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[15 : 0],IBusSimplePlugin_decompressor_bufferData} : {IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[31 : 16],(IBusSimplePlugin_iBusRsp_output_payload_pc[1] ? IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[31 : 16] : IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[15 : 0])}); + assign IBusSimplePlugin_decompressor_isRvc = (IBusSimplePlugin_decompressor_rawInDecode[1 : 0] != (2'b11)); + assign _zz_85_ = IBusSimplePlugin_decompressor_rawInDecode[15 : 0]; + always @ (*) begin + IBusSimplePlugin_decompressor_decompressed = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(_zz_174_) + 5'b00000 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{{{(2'b00),_zz_85_[10 : 7]},_zz_85_[12 : 11]},_zz_85_[5]},_zz_85_[6]},(2'b00)},(5'b00010)},(3'b000)},_zz_87_},(7'b0010011)}; + end + 5'b00010 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{_zz_88_,_zz_86_},(3'b010)},_zz_87_},(7'b0000011)}; + end + 5'b00110 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_88_[11 : 5],_zz_87_},_zz_86_},(3'b010)},_zz_88_[4 : 0]},(7'b0100011)}; + end + 5'b01000 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{_zz_90_,_zz_85_[11 : 7]},(3'b000)},_zz_85_[11 : 7]},(7'b0010011)}; + end + 5'b01001 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_93_[20],_zz_93_[10 : 1]},_zz_93_[11]},_zz_93_[19 : 12]},_zz_105_},(7'b1101111)}; + end + 5'b01010 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{_zz_90_,(5'b00000)},(3'b000)},_zz_85_[11 : 7]},(7'b0010011)}; + end + 5'b01011 : begin + IBusSimplePlugin_decompressor_decompressed = ((_zz_85_[11 : 7] == (5'b00010)) ? {{{{{{{{{_zz_97_,_zz_85_[4 : 3]},_zz_85_[5]},_zz_85_[2]},_zz_85_[6]},(4'b0000)},_zz_85_[11 : 7]},(3'b000)},_zz_85_[11 : 7]},(7'b0010011)} : {{_zz_185_[31 : 12],_zz_85_[11 : 7]},(7'b0110111)}); + end + 5'b01100 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{((_zz_85_[11 : 10] == (2'b10)) ? _zz_111_ : {{(1'b0),(_zz_232_ || _zz_233_)},(5'b00000)}),(((! _zz_85_[11]) || _zz_107_) ? _zz_85_[6 : 2] : _zz_87_)},_zz_86_},_zz_109_},_zz_86_},(_zz_107_ ? (7'b0010011) : (7'b0110011))}; + end + 5'b01101 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_100_[20],_zz_100_[10 : 1]},_zz_100_[11]},_zz_100_[19 : 12]},_zz_104_},(7'b1101111)}; + end + 5'b01110 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{_zz_103_[12],_zz_103_[10 : 5]},_zz_104_},_zz_86_},(3'b000)},_zz_103_[4 : 1]},_zz_103_[11]},(7'b1100011)}; + end + 5'b01111 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{_zz_103_[12],_zz_103_[10 : 5]},_zz_104_},_zz_86_},(3'b001)},_zz_103_[4 : 1]},_zz_103_[11]},(7'b1100011)}; + end + 5'b10000 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{(7'b0000000),_zz_85_[6 : 2]},_zz_85_[11 : 7]},(3'b001)},_zz_85_[11 : 7]},(7'b0010011)}; + end + 5'b10010 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{{{{(4'b0000),_zz_85_[3 : 2]},_zz_85_[12]},_zz_85_[6 : 4]},(2'b00)},_zz_106_},(3'b010)},_zz_85_[11 : 7]},(7'b0000011)}; + end + 5'b10100 : begin + IBusSimplePlugin_decompressor_decompressed = ((_zz_85_[12 : 2] == (11'b10000000000)) ? (32'b00000000000100000000000001110011) : ((_zz_85_[6 : 2] == (5'b00000)) ? {{{{(12'b000000000000),_zz_85_[11 : 7]},(3'b000)},(_zz_85_[12] ? _zz_105_ : _zz_104_)},(7'b1100111)} : {{{{{_zz_234_,_zz_235_},(_zz_236_ ? _zz_237_ : _zz_104_)},(3'b000)},_zz_85_[11 : 7]},(7'b0110011)})); + end + 5'b10110 : begin + IBusSimplePlugin_decompressor_decompressed = {{{{{_zz_186_[11 : 5],_zz_85_[6 : 2]},_zz_106_},(3'b010)},_zz_187_[4 : 0]},(7'b0100011)}; + end + default : begin + end + endcase + end + + assign _zz_86_ = {(2'b01),_zz_85_[9 : 7]}; + assign _zz_87_ = {(2'b01),_zz_85_[4 : 2]}; + assign _zz_88_ = {{{{(5'b00000),_zz_85_[5]},_zz_85_[12 : 10]},_zz_85_[6]},(2'b00)}; + assign _zz_89_ = _zz_85_[12]; + always @ (*) begin + _zz_90_[11] = _zz_89_; + _zz_90_[10] = _zz_89_; + _zz_90_[9] = _zz_89_; + _zz_90_[8] = _zz_89_; + _zz_90_[7] = _zz_89_; + _zz_90_[6] = _zz_89_; + _zz_90_[5] = _zz_89_; + _zz_90_[4 : 0] = _zz_85_[6 : 2]; + end + + assign _zz_91_ = _zz_85_[12]; + always @ (*) begin + _zz_92_[9] = _zz_91_; + _zz_92_[8] = _zz_91_; + _zz_92_[7] = _zz_91_; + _zz_92_[6] = _zz_91_; + _zz_92_[5] = _zz_91_; + _zz_92_[4] = _zz_91_; + _zz_92_[3] = _zz_91_; + _zz_92_[2] = _zz_91_; + _zz_92_[1] = _zz_91_; + _zz_92_[0] = _zz_91_; + end + + assign _zz_93_ = {{{{{{{{_zz_92_,_zz_85_[8]},_zz_85_[10 : 9]},_zz_85_[6]},_zz_85_[7]},_zz_85_[2]},_zz_85_[11]},_zz_85_[5 : 3]},(1'b0)}; + assign _zz_94_ = _zz_85_[12]; + always @ (*) begin + _zz_95_[14] = _zz_94_; + _zz_95_[13] = _zz_94_; + _zz_95_[12] = _zz_94_; + _zz_95_[11] = _zz_94_; + _zz_95_[10] = _zz_94_; + _zz_95_[9] = _zz_94_; + _zz_95_[8] = _zz_94_; + _zz_95_[7] = _zz_94_; + _zz_95_[6] = _zz_94_; + _zz_95_[5] = _zz_94_; + _zz_95_[4] = _zz_94_; + _zz_95_[3] = _zz_94_; + _zz_95_[2] = _zz_94_; + _zz_95_[1] = _zz_94_; + _zz_95_[0] = _zz_94_; + end + + assign _zz_96_ = _zz_85_[12]; + always @ (*) begin + _zz_97_[2] = _zz_96_; + _zz_97_[1] = _zz_96_; + _zz_97_[0] = _zz_96_; + end + + assign _zz_98_ = _zz_85_[12]; + always @ (*) begin + _zz_99_[9] = _zz_98_; + _zz_99_[8] = _zz_98_; + _zz_99_[7] = _zz_98_; + _zz_99_[6] = _zz_98_; + _zz_99_[5] = _zz_98_; + _zz_99_[4] = _zz_98_; + _zz_99_[3] = _zz_98_; + _zz_99_[2] = _zz_98_; + _zz_99_[1] = _zz_98_; + _zz_99_[0] = _zz_98_; + end + + assign _zz_100_ = {{{{{{{{_zz_99_,_zz_85_[8]},_zz_85_[10 : 9]},_zz_85_[6]},_zz_85_[7]},_zz_85_[2]},_zz_85_[11]},_zz_85_[5 : 3]},(1'b0)}; + assign _zz_101_ = _zz_85_[12]; + always @ (*) begin + _zz_102_[4] = _zz_101_; + _zz_102_[3] = _zz_101_; + _zz_102_[2] = _zz_101_; + _zz_102_[1] = _zz_101_; + _zz_102_[0] = _zz_101_; + end + + assign _zz_103_ = {{{{{_zz_102_,_zz_85_[6 : 5]},_zz_85_[2]},_zz_85_[11 : 10]},_zz_85_[4 : 3]},(1'b0)}; + assign _zz_104_ = (5'b00000); + assign _zz_105_ = (5'b00001); + assign _zz_106_ = (5'b00010); + assign _zz_107_ = (_zz_85_[11 : 10] != (2'b11)); + always @ (*) begin + case(_zz_175_) + 2'b00 : begin + _zz_108_ = (3'b000); + end + 2'b01 : begin + _zz_108_ = (3'b100); + end + 2'b10 : begin + _zz_108_ = (3'b110); + end + default : begin + _zz_108_ = (3'b111); + end + endcase + end + + always @ (*) begin + case(_zz_176_) + 2'b00 : begin + _zz_109_ = (3'b101); + end + 2'b01 : begin + _zz_109_ = (3'b101); + end + 2'b10 : begin + _zz_109_ = (3'b111); + end + default : begin + _zz_109_ = _zz_108_; + end + endcase + end + + assign _zz_110_ = _zz_85_[12]; + always @ (*) begin + _zz_111_[6] = _zz_110_; + _zz_111_[5] = _zz_110_; + _zz_111_[4] = _zz_110_; + _zz_111_[3] = _zz_110_; + _zz_111_[2] = _zz_110_; + _zz_111_[1] = _zz_110_; + _zz_111_[0] = _zz_110_; + end + + assign IBusSimplePlugin_decompressor_decodeInput_valid = (IBusSimplePlugin_decompressor_isRvc ? (IBusSimplePlugin_decompressor_bufferValid || IBusSimplePlugin_iBusRsp_output_valid) : (IBusSimplePlugin_iBusRsp_output_valid && (IBusSimplePlugin_decompressor_bufferValid || (! IBusSimplePlugin_iBusRsp_output_payload_pc[1])))); + assign IBusSimplePlugin_decompressor_decodeInput_payload_pc = IBusSimplePlugin_iBusRsp_output_payload_pc; + assign IBusSimplePlugin_decompressor_decodeInput_payload_isRvc = IBusSimplePlugin_decompressor_isRvc; + assign IBusSimplePlugin_decompressor_decodeInput_payload_rsp_inst = (IBusSimplePlugin_decompressor_isRvc ? IBusSimplePlugin_decompressor_decompressed : IBusSimplePlugin_decompressor_rawInDecode); + assign IBusSimplePlugin_iBusRsp_output_ready = ((! IBusSimplePlugin_decompressor_decodeInput_valid) || (! (((! IBusSimplePlugin_decompressor_decodeInput_ready) || ((IBusSimplePlugin_decompressor_isRvc && (! IBusSimplePlugin_iBusRsp_output_payload_pc[1])) && (IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[17 : 16] != (2'b11)))) || (((! IBusSimplePlugin_decompressor_isRvc) && IBusSimplePlugin_decompressor_bufferValid) && (IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[17 : 16] != (2'b11)))))); + assign IBusSimplePlugin_pcValids_0 = IBusSimplePlugin_injector_nextPcCalc_valids_0; + assign IBusSimplePlugin_pcValids_1 = IBusSimplePlugin_injector_nextPcCalc_valids_1; + assign IBusSimplePlugin_pcValids_2 = IBusSimplePlugin_injector_nextPcCalc_valids_2; + assign IBusSimplePlugin_pcValids_3 = IBusSimplePlugin_injector_nextPcCalc_valids_3; + assign IBusSimplePlugin_decompressor_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_76_ = IBusSimplePlugin_decodePc_pcReg; + assign _zz_75_ = IBusSimplePlugin_decompressor_decodeInput_payload_rsp_inst; + assign _zz_74_ = IBusSimplePlugin_decompressor_decodeInput_payload_isRvc; + assign _zz_73_ = (decode_PC + _zz_189_); + assign iBus_cmd_valid = IBusSimplePlugin_cmd_valid; + assign IBusSimplePlugin_cmd_ready = iBus_cmd_ready; + assign iBus_cmd_payload_pc = IBusSimplePlugin_cmd_payload_pc; + assign IBusSimplePlugin_pendingCmdNext = (_zz_190_ - iBus_rsp_valid); + assign IBusSimplePlugin_cmd_valid = ((IBusSimplePlugin_iBusRsp_stages_0_input_valid && (IBusSimplePlugin_pendingCmd != (1'b1))) && (! ({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != (4'b0000)))); + assign IBusSimplePlugin_cmd_payload_pc = {IBusSimplePlugin_iBusRsp_stages_0_input_payload[31 : 2],(2'b00)}; + assign iBus_rsp_takeWhen_valid = (iBus_rsp_valid && (! (IBusSimplePlugin_rspJoin_discardCounter != (1'b0)))); + assign iBus_rsp_takeWhen_payload_error = iBus_rsp_payload_error; + assign iBus_rsp_takeWhen_payload_inst = iBus_rsp_payload_inst; + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid = iBus_rsp_takeWhen_valid; + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_error = iBus_rsp_takeWhen_payload_error; + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_inst = iBus_rsp_takeWhen_payload_inst; + always @ (*) begin + IBusSimplePlugin_rspJoin_rspBufferOutput_valid = IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid; + if(IBusSimplePlugin_rspJoin_rspBuffer_validReg)begin + IBusSimplePlugin_rspJoin_rspBufferOutput_valid = 1'b1; + end + end + + assign IBusSimplePlugin_rspJoin_rspBuffer_rspStream_ready = IBusSimplePlugin_rspJoin_rspBufferOutput_ready; + assign IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error = IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_error; + assign IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst = IBusSimplePlugin_rspJoin_rspBuffer_rspStream_payload_inst; + assign IBusSimplePlugin_rspJoin_fetchRsp_pc = IBusSimplePlugin_iBusRsp_stages_1_output_payload; + always @ (*) begin + IBusSimplePlugin_rspJoin_fetchRsp_rsp_error = IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error; + if((! IBusSimplePlugin_rspJoin_rspBufferOutput_valid))begin + IBusSimplePlugin_rspJoin_fetchRsp_rsp_error = 1'b0; + end + end + + assign IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst = IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst; + assign IBusSimplePlugin_rspJoin_exceptionDetected = 1'b0; + assign IBusSimplePlugin_rspJoin_redoRequired = 1'b0; + assign IBusSimplePlugin_rspJoin_join_valid = (IBusSimplePlugin_iBusRsp_stages_1_output_valid && IBusSimplePlugin_rspJoin_rspBufferOutput_valid); + assign IBusSimplePlugin_rspJoin_join_payload_pc = IBusSimplePlugin_rspJoin_fetchRsp_pc; + assign IBusSimplePlugin_rspJoin_join_payload_rsp_error = IBusSimplePlugin_rspJoin_fetchRsp_rsp_error; + assign IBusSimplePlugin_rspJoin_join_payload_rsp_inst = IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst; + assign IBusSimplePlugin_rspJoin_join_payload_isRvc = IBusSimplePlugin_rspJoin_fetchRsp_isRvc; + assign IBusSimplePlugin_iBusRsp_stages_1_output_ready = (IBusSimplePlugin_iBusRsp_stages_1_output_valid ? (IBusSimplePlugin_rspJoin_join_valid && IBusSimplePlugin_rspJoin_join_ready) : IBusSimplePlugin_rspJoin_join_ready); + assign IBusSimplePlugin_rspJoin_rspBufferOutput_ready = (IBusSimplePlugin_rspJoin_join_valid && IBusSimplePlugin_rspJoin_join_ready); + assign _zz_112_ = (! (IBusSimplePlugin_rspJoin_exceptionDetected || IBusSimplePlugin_rspJoin_redoRequired)); + assign IBusSimplePlugin_rspJoin_join_ready = (IBusSimplePlugin_iBusRsp_output_ready && _zz_112_); + assign IBusSimplePlugin_iBusRsp_output_valid = (IBusSimplePlugin_rspJoin_join_valid && _zz_112_); + assign IBusSimplePlugin_iBusRsp_output_payload_pc = IBusSimplePlugin_rspJoin_join_payload_pc; + assign IBusSimplePlugin_iBusRsp_output_payload_rsp_error = IBusSimplePlugin_rspJoin_join_payload_rsp_error; + assign IBusSimplePlugin_iBusRsp_output_payload_rsp_inst = IBusSimplePlugin_rspJoin_join_payload_rsp_inst; + assign IBusSimplePlugin_iBusRsp_output_payload_isRvc = IBusSimplePlugin_rspJoin_join_payload_isRvc; + assign _zz_113_ = 1'b0; + assign _zz_71_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + always @ (*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT)begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_113_)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_114_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_114_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_114_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_114_; + assign _zz_70_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_115_ = (4'b0001); + end + 2'b01 : begin + _zz_115_ = (4'b0011); + end + default : begin + _zz_115_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_115_ <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign _zz_69_ = dBus_rsp_data; + always @ (*) begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + DBusSimplePlugin_memoryExceptionPort_payload_code = (4'bxxxx); + if(memory_ALIGNEMENT_FAULT)begin + DBusSimplePlugin_memoryExceptionPort_payload_code = {1'd0, _zz_191_}; + DBusSimplePlugin_memoryExceptionPort_valid = 1'b1; + end + if((! ((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (1'b1 || (! memory_arbitration_isStuckByOthers)))))begin + DBusSimplePlugin_memoryExceptionPort_valid = 1'b0; + end + end + + assign DBusSimplePlugin_memoryExceptionPort_payload_badAddr = memory_REGFILE_WRITE_DATA; + always @ (*) begin + writeBack_DBusSimplePlugin_rspShifted = writeBack_MEMORY_READ_DATA; + case(writeBack_MEMORY_ADDRESS_LOW) + 2'b01 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + writeBack_DBusSimplePlugin_rspShifted[15 : 0] = writeBack_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_116_ = (writeBack_DBusSimplePlugin_rspShifted[7] && (! writeBack_INSTRUCTION[14])); + always @ (*) begin + _zz_117_[31] = _zz_116_; + _zz_117_[30] = _zz_116_; + _zz_117_[29] = _zz_116_; + _zz_117_[28] = _zz_116_; + _zz_117_[27] = _zz_116_; + _zz_117_[26] = _zz_116_; + _zz_117_[25] = _zz_116_; + _zz_117_[24] = _zz_116_; + _zz_117_[23] = _zz_116_; + _zz_117_[22] = _zz_116_; + _zz_117_[21] = _zz_116_; + _zz_117_[20] = _zz_116_; + _zz_117_[19] = _zz_116_; + _zz_117_[18] = _zz_116_; + _zz_117_[17] = _zz_116_; + _zz_117_[16] = _zz_116_; + _zz_117_[15] = _zz_116_; + _zz_117_[14] = _zz_116_; + _zz_117_[13] = _zz_116_; + _zz_117_[12] = _zz_116_; + _zz_117_[11] = _zz_116_; + _zz_117_[10] = _zz_116_; + _zz_117_[9] = _zz_116_; + _zz_117_[8] = _zz_116_; + _zz_117_[7 : 0] = writeBack_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_118_ = (writeBack_DBusSimplePlugin_rspShifted[15] && (! writeBack_INSTRUCTION[14])); + always @ (*) begin + _zz_119_[31] = _zz_118_; + _zz_119_[30] = _zz_118_; + _zz_119_[29] = _zz_118_; + _zz_119_[28] = _zz_118_; + _zz_119_[27] = _zz_118_; + _zz_119_[26] = _zz_118_; + _zz_119_[25] = _zz_118_; + _zz_119_[24] = _zz_118_; + _zz_119_[23] = _zz_118_; + _zz_119_[22] = _zz_118_; + _zz_119_[21] = _zz_118_; + _zz_119_[20] = _zz_118_; + _zz_119_[19] = _zz_118_; + _zz_119_[18] = _zz_118_; + _zz_119_[17] = _zz_118_; + _zz_119_[16] = _zz_118_; + _zz_119_[15 : 0] = writeBack_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_177_) + 2'b00 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_117_; + end + 2'b01 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_119_; + end + default : begin + writeBack_DBusSimplePlugin_rspFormated = writeBack_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_121_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_122_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001001000)) == (32'b00000000000000000000000001001000)); + assign _zz_123_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_124_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_125_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_120_ = {(_zz_123_ != (1'b0)),{({_zz_238_,{_zz_239_,_zz_240_}} != (4'b0000)),{({_zz_241_,_zz_242_} != (2'b00)),{(_zz_243_ != _zz_244_),{_zz_245_,{_zz_246_,_zz_247_}}}}}}; + assign _zz_67_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001011111)) == (32'b00000000000000000000000000010111)),{((decode_INSTRUCTION & (32'b00000000000000000000000001111111)) == (32'b00000000000000000000000001101111)),{((decode_INSTRUCTION & (32'b00000000000000000001000001101111)) == (32'b00000000000000000000000000000011)),{((decode_INSTRUCTION & _zz_346_) == (32'b00000000000000000001000001110011)),{(_zz_347_ == _zz_348_),{_zz_349_,{_zz_350_,_zz_351_}}}}}}} != (20'b00000000000000000000)); + assign _zz_66_ = _zz_192_[0]; + assign _zz_65_ = _zz_193_[0]; + assign _zz_64_ = _zz_194_[0]; + assign _zz_126_ = _zz_120_[6 : 5]; + assign _zz_63_ = _zz_126_; + assign _zz_62_ = _zz_195_[0]; + assign _zz_61_ = _zz_196_[0]; + assign _zz_127_ = _zz_120_[12 : 11]; + assign _zz_60_ = _zz_127_; + assign _zz_128_ = _zz_120_[14 : 13]; + assign _zz_59_ = _zz_128_; + assign _zz_129_ = _zz_120_[16 : 15]; + assign _zz_58_ = _zz_129_; + assign _zz_130_ = _zz_120_[18 : 17]; + assign _zz_57_ = _zz_130_; + assign _zz_56_ = _zz_197_[0]; + assign _zz_131_ = _zz_120_[21 : 20]; + assign _zz_55_ = _zz_131_; + assign _zz_54_ = _zz_198_[0]; + assign _zz_132_ = _zz_120_[24 : 23]; + assign _zz_53_ = _zz_132_; + assign _zz_52_ = _zz_199_[0]; + assign decodeExceptionPort_valid = ((decode_arbitration_isValid && decode_INSTRUCTION_READY) && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = (4'b0010); + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign execute_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION[24 : 20]; + assign _zz_133_ = (! execute_arbitration_isStuck); + assign execute_RegFilePlugin_rs1Data = _zz_160_; + assign execute_RegFilePlugin_rs2Data = _zz_161_; + assign _zz_51_ = execute_RegFilePlugin_rs1Data; + assign _zz_50_ = execute_RegFilePlugin_rs2Data; + assign lastStageRegFileWrite_valid = (writeBack_REGFILE_WRITE_VALID && writeBack_arbitration_isFiring); + assign lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION[11 : 7]; + assign lastStageRegFileWrite_payload_data = _zz_68_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_134_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_134_ = {31'd0, _zz_200_}; + end + default : begin + _zz_134_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_47_ = _zz_134_; + assign _zz_45_ = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_135_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_135_ = {29'd0, _zz_201_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_135_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_135_ = {27'd0, _zz_202_}; + end + endcase + end + + assign _zz_44_ = _zz_135_; + assign _zz_136_ = _zz_203_[11]; + always @ (*) begin + _zz_137_[19] = _zz_136_; + _zz_137_[18] = _zz_136_; + _zz_137_[17] = _zz_136_; + _zz_137_[16] = _zz_136_; + _zz_137_[15] = _zz_136_; + _zz_137_[14] = _zz_136_; + _zz_137_[13] = _zz_136_; + _zz_137_[12] = _zz_136_; + _zz_137_[11] = _zz_136_; + _zz_137_[10] = _zz_136_; + _zz_137_[9] = _zz_136_; + _zz_137_[8] = _zz_136_; + _zz_137_[7] = _zz_136_; + _zz_137_[6] = _zz_136_; + _zz_137_[5] = _zz_136_; + _zz_137_[4] = _zz_136_; + _zz_137_[3] = _zz_136_; + _zz_137_[2] = _zz_136_; + _zz_137_[1] = _zz_136_; + _zz_137_[0] = _zz_136_; + end + + assign _zz_138_ = _zz_204_[11]; + always @ (*) begin + _zz_139_[19] = _zz_138_; + _zz_139_[18] = _zz_138_; + _zz_139_[17] = _zz_138_; + _zz_139_[16] = _zz_138_; + _zz_139_[15] = _zz_138_; + _zz_139_[14] = _zz_138_; + _zz_139_[13] = _zz_138_; + _zz_139_[12] = _zz_138_; + _zz_139_[11] = _zz_138_; + _zz_139_[10] = _zz_138_; + _zz_139_[9] = _zz_138_; + _zz_139_[8] = _zz_138_; + _zz_139_[7] = _zz_138_; + _zz_139_[6] = _zz_138_; + _zz_139_[5] = _zz_138_; + _zz_139_[4] = _zz_138_; + _zz_139_[3] = _zz_138_; + _zz_139_[2] = _zz_138_; + _zz_139_[1] = _zz_138_; + _zz_139_[0] = _zz_138_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_140_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_140_ = {_zz_137_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_140_ = {_zz_139_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_140_ = _zz_40_; + end + endcase + end + + assign _zz_42_ = _zz_140_; + always @ (*) begin + execute_SrcPlugin_addSub = _zz_205_; + if(execute_SRC2_FORCE_ZERO)begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_39_ = execute_SrcPlugin_addSub; + assign _zz_38_ = execute_SrcPlugin_addSub; + assign _zz_37_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? memory_REGFILE_WRITE_DATA : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_141_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_141_ = _zz_212_; + end + endcase + end + + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_142_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_142_ == (3'b000))) begin + _zz_143_ = execute_BranchPlugin_eq; + end else if((_zz_142_ == (3'b001))) begin + _zz_143_ = (! execute_BranchPlugin_eq); + end else if((((_zz_142_ & (3'b101)) == (3'b101)))) begin + _zz_143_ = (! execute_SRC_LESS); + end else begin + _zz_143_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_144_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_144_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_144_ = 1'b1; + end + default : begin + _zz_144_ = _zz_143_; + end + endcase + end + + assign _zz_34_ = _zz_144_; + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JALR) ? execute_RS1 : execute_PC); + assign _zz_145_ = _zz_214_[19]; + always @ (*) begin + _zz_146_[10] = _zz_145_; + _zz_146_[9] = _zz_145_; + _zz_146_[8] = _zz_145_; + _zz_146_[7] = _zz_145_; + _zz_146_[6] = _zz_145_; + _zz_146_[5] = _zz_145_; + _zz_146_[4] = _zz_145_; + _zz_146_[3] = _zz_145_; + _zz_146_[2] = _zz_145_; + _zz_146_[1] = _zz_145_; + _zz_146_[0] = _zz_145_; + end + + assign _zz_147_ = _zz_215_[11]; + always @ (*) begin + _zz_148_[19] = _zz_147_; + _zz_148_[18] = _zz_147_; + _zz_148_[17] = _zz_147_; + _zz_148_[16] = _zz_147_; + _zz_148_[15] = _zz_147_; + _zz_148_[14] = _zz_147_; + _zz_148_[13] = _zz_147_; + _zz_148_[12] = _zz_147_; + _zz_148_[11] = _zz_147_; + _zz_148_[10] = _zz_147_; + _zz_148_[9] = _zz_147_; + _zz_148_[8] = _zz_147_; + _zz_148_[7] = _zz_147_; + _zz_148_[6] = _zz_147_; + _zz_148_[5] = _zz_147_; + _zz_148_[4] = _zz_147_; + _zz_148_[3] = _zz_147_; + _zz_148_[2] = _zz_147_; + _zz_148_[1] = _zz_147_; + _zz_148_[0] = _zz_147_; + end + + assign _zz_149_ = _zz_216_[11]; + always @ (*) begin + _zz_150_[18] = _zz_149_; + _zz_150_[17] = _zz_149_; + _zz_150_[16] = _zz_149_; + _zz_150_[15] = _zz_149_; + _zz_150_[14] = _zz_149_; + _zz_150_[13] = _zz_149_; + _zz_150_[12] = _zz_149_; + _zz_150_[11] = _zz_149_; + _zz_150_[10] = _zz_149_; + _zz_150_[9] = _zz_149_; + _zz_150_[8] = _zz_149_; + _zz_150_[7] = _zz_149_; + _zz_150_[6] = _zz_149_; + _zz_150_[5] = _zz_149_; + _zz_150_[4] = _zz_149_; + _zz_150_[3] = _zz_149_; + _zz_150_[2] = _zz_149_; + _zz_150_[1] = _zz_149_; + _zz_150_[0] = _zz_149_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_151_ = {{_zz_146_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_151_ = {_zz_148_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_151_ = {{_zz_150_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_151_; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_32_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @ (*) begin + CsrPlugin_privilege = (2'b11); + if(CsrPlugin_forceMachineWire)begin + CsrPlugin_privilege = (2'b11); + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = (2'b11); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(decodeExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b1; + end + if(memory_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(writeBack_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + CsrPlugin_interruptTargetPrivilege = (2'bxx); + if((CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < (2'b11))))begin + if((((CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0111); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b0011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + if((((CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE) && 1'b1) && (! 1'b0)))begin + CsrPlugin_interrupt = 1'b1; + CsrPlugin_interruptCode = (4'b1011); + CsrPlugin_interruptTargetPrivilege = (2'b11); + end + end + if((! CsrPlugin_allowInterrupts))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! ({writeBack_arbitration_isValid,{memory_arbitration_isValid,execute_arbitration_isValid}} != (3'b000))) && IBusSimplePlugin_pcValids_3); + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != (3'b000)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @ (*) begin + CsrPlugin_xtvec_mode = (2'bxx); + CsrPlugin_xtvec_base = (30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign _zz_30_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_29_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_inWfi = 1'b0; + assign execute_CsrPlugin_blockedBySideEffects = ({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00)); + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_152_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_153_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + CsrPlugin_selfException_valid = 1'b0; + CsrPlugin_selfException_payload_code = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + CsrPlugin_selfException_valid = 1'b1; + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = (4'b1000); + end + default : begin + CsrPlugin_selfException_payload_code = (4'b1011); + end + endcase + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + CsrPlugin_selfException_valid = 1'b1; + CsrPlugin_selfException_payload_code = (4'b0011); + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readToWriteData = execute_CsrPlugin_readData; + always @ (*) begin + case(_zz_178_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign _zz_153_ = (_zz_152_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_153_ != (32'b00000000000000000000000000000000)); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + IBusSimplePlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_171_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + IBusSimplePlugin_injectionPort_valid = 1'b1; + debug_bus_cmd_ready = IBusSimplePlugin_injectionPort_ready; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_154_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign IBusSimplePlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign _zz_26_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_221_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_222_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_223_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_224_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_25_ = decode_ENV_CTRL; + assign _zz_22_ = execute_ENV_CTRL; + assign _zz_20_ = memory_ENV_CTRL; + assign _zz_23_ = _zz_58_; + assign _zz_28_ = decode_to_execute_ENV_CTRL; + assign _zz_27_ = execute_to_memory_ENV_CTRL; + assign _zz_31_ = memory_to_writeBack_ENV_CTRL; + assign _zz_18_ = decode_SHIFT_CTRL; + assign _zz_16_ = _zz_63_; + assign _zz_36_ = decode_to_execute_SHIFT_CTRL; + assign _zz_15_ = decode_ALU_CTRL; + assign _zz_13_ = _zz_57_; + assign _zz_46_ = decode_to_execute_ALU_CTRL; + assign _zz_12_ = decode_SRC2_CTRL; + assign _zz_10_ = _zz_55_; + assign _zz_41_ = decode_to_execute_SRC2_CTRL; + assign _zz_9_ = decode_SRC1_CTRL; + assign _zz_7_ = _zz_53_; + assign _zz_43_ = decode_to_execute_SRC1_CTRL; + assign _zz_6_ = decode_BRANCH_CTRL; + assign _zz_4_ = _zz_60_; + assign _zz_33_ = decode_to_execute_BRANCH_CTRL; + assign _zz_3_ = decode_ALU_BITWISE_CTRL; + assign _zz_1_ = _zz_59_; + assign _zz_48_ = decode_to_execute_ALU_BITWISE_CTRL; + assign decode_arbitration_isFlushed = ({writeBack_arbitration_flushAll,{memory_arbitration_flushAll,{execute_arbitration_flushAll,decode_arbitration_flushAll}}} != (4'b0000)); + assign execute_arbitration_isFlushed = ({writeBack_arbitration_flushAll,{memory_arbitration_flushAll,execute_arbitration_flushAll}} != (3'b000)); + assign memory_arbitration_isFlushed = ({writeBack_arbitration_flushAll,memory_arbitration_flushAll} != (2'b00)); + assign writeBack_arbitration_isFlushed = (writeBack_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign iBus_cmd_ready = ((1'b1 && (! iBus_cmd_m2sPipe_valid)) || iBus_cmd_m2sPipe_ready); + assign iBus_cmd_m2sPipe_valid = _zz_157_; + assign iBus_cmd_m2sPipe_payload_pc = _zz_158_; + assign iBusWishbone_ADR = (iBus_cmd_m2sPipe_payload_pc >>> 2); + assign iBusWishbone_CTI = (3'b000); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + assign iBusWishbone_CYC = iBus_cmd_m2sPipe_valid; + assign iBusWishbone_STB = iBus_cmd_m2sPipe_valid; + assign iBus_cmd_m2sPipe_ready = (iBus_cmd_m2sPipe_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = (iBusWishbone_CYC && iBusWishbone_ACK); + assign iBus_rsp_payload_inst = iBusWishbone_DAT_MISO; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_159_ = (4'b0001); + end + 2'b01 : begin + _zz_159_ = (4'b0011); + end + default : begin + _zz_159_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_231_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + IBusSimplePlugin_fetchPc_pcReg <= externalResetVector; + IBusSimplePlugin_fetchPc_inc <= 1'b0; + _zz_79_ <= 1'b0; + IBusSimplePlugin_decodePc_pcReg <= externalResetVector; + _zz_84_ <= 1'b0; + IBusSimplePlugin_decompressor_bufferValid <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusSimplePlugin_injector_decodeRemoved <= 1'b0; + IBusSimplePlugin_pendingCmd <= (1'b0); + IBusSimplePlugin_rspJoin_discardCounter <= (1'b0); + IBusSimplePlugin_rspJoin_rspBuffer_validReg <= 1'b0; + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_152_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + _zz_156_ <= (3'b000); + _zz_157_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusSimplePlugin_fetchPc_propagatePc)begin + IBusSimplePlugin_fetchPc_inc <= 1'b0; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_fetchPc_inc <= 1'b0; + end + if(_zz_170_)begin + IBusSimplePlugin_fetchPc_inc <= 1'b1; + end + if(IBusSimplePlugin_fetchPc_samplePcNext)begin + IBusSimplePlugin_fetchPc_pcReg <= IBusSimplePlugin_fetchPc_pc; + end + _zz_79_ <= 1'b1; + if((decode_arbitration_isFiring && (! IBusSimplePlugin_decodePc_injectedDecode)))begin + IBusSimplePlugin_decodePc_pcReg <= IBusSimplePlugin_decodePc_pcPlus; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_decodePc_pcReg <= IBusSimplePlugin_jump_pcLoad_payload; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + _zz_84_ <= 1'b0; + end + if(_zz_82_)begin + _zz_84_ <= IBusSimplePlugin_iBusRsp_stages_0_output_valid; + end + if((IBusSimplePlugin_decompressor_decodeInput_valid && IBusSimplePlugin_decompressor_decodeInput_ready))begin + IBusSimplePlugin_decompressor_bufferValid <= 1'b0; + end + if(_zz_172_)begin + IBusSimplePlugin_decompressor_bufferValid <= ((! (((! IBusSimplePlugin_decompressor_isRvc) && (! IBusSimplePlugin_iBusRsp_output_payload_pc[1])) && (! IBusSimplePlugin_decompressor_bufferValid))) && (! ((IBusSimplePlugin_decompressor_isRvc && IBusSimplePlugin_iBusRsp_output_payload_pc[1]) && IBusSimplePlugin_decompressor_decodeInput_ready))); + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_decompressor_bufferValid <= 1'b0; + end + if((! 1'b0))begin + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= IBusSimplePlugin_injector_nextPcCalc_valids_0; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! memory_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= IBusSimplePlugin_injector_nextPcCalc_valids_1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if((! writeBack_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= IBusSimplePlugin_injector_nextPcCalc_valids_2; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusSimplePlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_injector_decodeRemoved <= 1'b0; + end + IBusSimplePlugin_pendingCmd <= IBusSimplePlugin_pendingCmdNext; + IBusSimplePlugin_rspJoin_discardCounter <= (IBusSimplePlugin_rspJoin_discardCounter - (iBus_rsp_valid && (IBusSimplePlugin_rspJoin_discardCounter != (1'b0)))); + if((IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))begin + IBusSimplePlugin_rspJoin_discardCounter <= (IBusSimplePlugin_pendingCmd - iBus_rsp_valid); + end + if(IBusSimplePlugin_rspJoin_rspBuffer_rspStream_valid)begin + IBusSimplePlugin_rspJoin_rspBuffer_validReg <= 1'b1; + end + if(IBusSimplePlugin_rspJoin_rspBufferOutput_ready)begin + IBusSimplePlugin_rspJoin_rspBuffer_validReg <= 1'b0; + end + if(_zz_162_)begin + if(_zz_163_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + if((! decode_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if((! memory_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if((! writeBack_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_164_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_165_)begin + case(_zz_166_) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(((! memory_arbitration_isStuck) || memory_arbitration_removeIt))begin + memory_arbitration_isValid <= 1'b0; + end + if(((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)))begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt))begin + writeBack_arbitration_isValid <= 1'b0; + end + if(((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)))begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if((((! IBusSimplePlugin_iBusRsp_output_ready) && (IBusSimplePlugin_decompressor_decodeInput_valid && IBusSimplePlugin_decompressor_decodeInput_ready)) && (! (IBusSimplePlugin_jump_pcLoad_valid || IBusSimplePlugin_fetcherflushIt))))begin + IBusSimplePlugin_fetchPc_pcReg[1] <= 1'b1; + end + case(_zz_156_) + 3'b000 : begin + if(IBusSimplePlugin_injectionPort_valid)begin + _zz_156_ <= (3'b001); + end + end + 3'b001 : begin + _zz_156_ <= (3'b010); + end + 3'b010 : begin + _zz_156_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_156_ <= (3'b100); + end + end + 3'b100 : begin + _zz_156_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_152_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_225_[0]; + CsrPlugin_mstatus_MIE <= _zz_226_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_228_[0]; + CsrPlugin_mie_MTIE <= _zz_229_[0]; + CsrPlugin_mie_MSIE <= _zz_230_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(iBus_cmd_ready)begin + _zz_157_ <= iBus_cmd_valid; + end + if(_zz_173_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(_zz_172_)begin + IBusSimplePlugin_decompressor_bufferData <= IBusSimplePlugin_iBusRsp_output_payload_rsp_inst[31 : 16]; + end + if(!(! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))) begin + $display("ERROR DBusSimplePlugin doesn't allow memory stage stall when read happend"); + end + if(!(! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_MEMORY_STORE)) && writeBack_arbitration_isStuck))) begin + $display("ERROR DBusSimplePlugin doesn't allow writeback stage stall when read happend"); + end + if(_zz_162_)begin + if(_zz_163_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(writeBack_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(decodeExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= decodeExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= decodeExceptionPort_payload_badAddr; + end + if(CsrPlugin_selfException_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= CsrPlugin_selfException_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= CsrPlugin_selfException_payload_badAddr; + end + if(DBusSimplePlugin_memoryExceptionPort_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusSimplePlugin_memoryExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusSimplePlugin_memoryExceptionPort_payload_badAddr; + end + if(_zz_164_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException)begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_STORE <= execute_MEMORY_STORE; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_STORE <= memory_MEMORY_STORE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_24_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_ENV_CTRL <= _zz_21_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_ENV_CTRL <= _zz_19_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_17_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_14_; + end + if(((! memory_arbitration_isStuck) && (! execute_arbitration_isStuckByOthers)))begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_35_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_REGFILE_WRITE_DATA <= memory_REGFILE_WRITE_DATA; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_READ_DATA <= memory_MEMORY_READ_DATA; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= decode_FORMAL_PC_NEXT; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_72_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_PC <= decode_PC; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_PC <= _zz_40_; + end + if(((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)))begin + memory_to_writeBack_PC <= memory_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_RVC <= decode_IS_RVC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_ALIGNEMENT_FAULT <= execute_ALIGNEMENT_FAULT; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_11_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_ADDRESS_LOW <= execute_MEMORY_ADDRESS_LOW; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_ADDRESS_LOW <= memory_MEMORY_ADDRESS_LOW; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_2_; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_227_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(iBus_cmd_ready)begin + _zz_158_ <= iBus_cmd_payload_pc; + end + if(_zz_173_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != (4'b0000)) || IBusSimplePlugin_incomingInstruction); + if(writeBack_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_68_; + end + _zz_154_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_171_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_167_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + _zz_155_ <= 1'b0; + end else begin + if((DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)))begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid)begin + case(_zz_171_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_godmode <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_217_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_218_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_219_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_220_[0]; + end + end + default : begin + end + endcase + end + if(_zz_167_)begin + if(_zz_168_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_169_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + _zz_155_ <= (DebugPlugin_stepIt && decode_arbitration_isFiring); + end + end + + always @ (posedge clk) begin + IBusSimplePlugin_injectionPort_payload_regNext <= IBusSimplePlugin_injectionPort_payload; + end + +endmodule + diff --git a/hw/rtl/4-stage-no-cache-debug.yaml b/hw/rtl/4-stage-no-cache-debug.yaml new file mode 100644 index 0000000..6ab729f --- /dev/null +++ b/hw/rtl/4-stage-no-cache-debug.yaml @@ -0,0 +1 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} diff --git a/hw/rtl/5-stage-pipelined-no-cache-debug.v b/hw/rtl/5-stage-pipelined-no-cache-debug.v new file mode 100644 index 0000000..f3736e8 --- /dev/null +++ b/hw/rtl/5-stage-pipelined-no-cache-debug.v @@ -0,0 +1,3902 @@ +// Generator : SpinalHDL v1.3.2 git head : 41815ceafff4e72c2e3a3e1ff7e9ada5202a0d26 +// Date : 26/03/2019, 04:50:46 +// Component : VexRiscv + + +`define ShiftCtrlEnum_defaultEncoding_type [1:0] +`define ShiftCtrlEnum_defaultEncoding_DISABLE_1 2'b00 +`define ShiftCtrlEnum_defaultEncoding_SLL_1 2'b01 +`define ShiftCtrlEnum_defaultEncoding_SRL_1 2'b10 +`define ShiftCtrlEnum_defaultEncoding_SRA_1 2'b11 + +`define Src2CtrlEnum_defaultEncoding_type [1:0] +`define Src2CtrlEnum_defaultEncoding_RS 2'b00 +`define Src2CtrlEnum_defaultEncoding_IMI 2'b01 +`define Src2CtrlEnum_defaultEncoding_IMS 2'b10 +`define Src2CtrlEnum_defaultEncoding_PC 2'b11 + +`define AluBitwiseCtrlEnum_defaultEncoding_type [1:0] +`define AluBitwiseCtrlEnum_defaultEncoding_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_defaultEncoding_OR_1 2'b01 +`define AluBitwiseCtrlEnum_defaultEncoding_AND_1 2'b10 +`define AluBitwiseCtrlEnum_defaultEncoding_SRC1 2'b11 + +`define EnvCtrlEnum_defaultEncoding_type [1:0] +`define EnvCtrlEnum_defaultEncoding_NONE 2'b00 +`define EnvCtrlEnum_defaultEncoding_XRET 2'b01 +`define EnvCtrlEnum_defaultEncoding_ECALL 2'b10 +`define EnvCtrlEnum_defaultEncoding_EBREAK 2'b11 + +`define Src1CtrlEnum_defaultEncoding_type [1:0] +`define Src1CtrlEnum_defaultEncoding_RS 2'b00 +`define Src1CtrlEnum_defaultEncoding_IMU 2'b01 +`define Src1CtrlEnum_defaultEncoding_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_defaultEncoding_URS1 2'b11 + +`define AluCtrlEnum_defaultEncoding_type [1:0] +`define AluCtrlEnum_defaultEncoding_ADD_SUB 2'b00 +`define AluCtrlEnum_defaultEncoding_SLT_SLTU 2'b01 +`define AluCtrlEnum_defaultEncoding_BITWISE 2'b10 + +`define BranchCtrlEnum_defaultEncoding_type [1:0] +`define BranchCtrlEnum_defaultEncoding_INC 2'b00 +`define BranchCtrlEnum_defaultEncoding_B 2'b01 +`define BranchCtrlEnum_defaultEncoding_JAL 2'b10 +`define BranchCtrlEnum_defaultEncoding_JALR 2'b11 + +module StreamFifoLowLatency ( + input io_push_valid, + output io_push_ready, + input io_push_payload_error, + input [31:0] io_push_payload_inst, + output reg io_pop_valid, + input io_pop_ready, + output reg io_pop_payload_error, + output reg [31:0] io_pop_payload_inst, + input io_flush, + output [0:0] io_occupancy, + input clk, + input reset); + wire [0:0] _zz_5_; + reg _zz_1_; + reg pushPtr_willIncrement; + reg pushPtr_willClear; + wire pushPtr_willOverflowIfInc; + wire pushPtr_willOverflow; + reg popPtr_willIncrement; + reg popPtr_willClear; + wire popPtr_willOverflowIfInc; + wire popPtr_willOverflow; + wire ptrMatch; + reg risingOccupancy; + wire empty; + wire full; + wire pushing; + wire popping; + wire [32:0] _zz_2_; + wire [32:0] _zz_3_; + reg [32:0] _zz_4_; + assign _zz_5_ = _zz_2_[0 : 0]; + always @ (*) begin + _zz_1_ = 1'b0; + pushPtr_willIncrement = 1'b0; + if(pushing)begin + _zz_1_ = 1'b1; + pushPtr_willIncrement = 1'b1; + end + end + + always @ (*) begin + pushPtr_willClear = 1'b0; + popPtr_willClear = 1'b0; + if(io_flush)begin + pushPtr_willClear = 1'b1; + popPtr_willClear = 1'b1; + end + end + + assign pushPtr_willOverflowIfInc = 1'b1; + assign pushPtr_willOverflow = (pushPtr_willOverflowIfInc && pushPtr_willIncrement); + always @ (*) begin + popPtr_willIncrement = 1'b0; + if(popping)begin + popPtr_willIncrement = 1'b1; + end + end + + assign popPtr_willOverflowIfInc = 1'b1; + assign popPtr_willOverflow = (popPtr_willOverflowIfInc && popPtr_willIncrement); + assign ptrMatch = 1'b1; + assign empty = (ptrMatch && (! risingOccupancy)); + assign full = (ptrMatch && risingOccupancy); + assign pushing = (io_push_valid && io_push_ready); + assign popping = (io_pop_valid && io_pop_ready); + assign io_push_ready = (! full); + always @ (*) begin + if((! empty))begin + io_pop_valid = 1'b1; + io_pop_payload_error = _zz_5_[0]; + io_pop_payload_inst = _zz_2_[32 : 1]; + end else begin + io_pop_valid = io_push_valid; + io_pop_payload_error = io_push_payload_error; + io_pop_payload_inst = io_push_payload_inst; + end + end + + assign _zz_2_ = _zz_3_; + assign io_occupancy = (risingOccupancy && ptrMatch); + assign _zz_3_ = _zz_4_; + always @ (posedge clk) begin + if(reset) begin + risingOccupancy <= 1'b0; + end else begin + if((pushing != popping))begin + risingOccupancy <= pushing; + end + if(io_flush)begin + risingOccupancy <= 1'b0; + end + end + end + + always @ (posedge clk) begin + if(_zz_1_)begin + _zz_4_ <= {io_push_payload_inst,io_push_payload_error}; + end + end + +endmodule + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output iBusWishbone_CYC, + output iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [1:0] iBusWishbone_BTE, + output [2:0] iBusWishbone_CTI, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [1:0] dBusWishbone_BTE, + output [2:0] dBusWishbone_CTI, + input clk, + input reset, + input debugReset); + wire _zz_178_; + reg [31:0] _zz_179_; + reg [31:0] _zz_180_; + reg [31:0] _zz_181_; + wire IBusSimplePlugin_rspJoin_rspBuffer_c_io_push_ready; + wire IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_valid; + wire IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_payload_error; + wire [31:0] IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_payload_inst; + wire [0:0] IBusSimplePlugin_rspJoin_rspBuffer_c_io_occupancy; + wire _zz_182_; + wire _zz_183_; + wire _zz_184_; + wire _zz_185_; + wire _zz_186_; + wire _zz_187_; + wire _zz_188_; + wire _zz_189_; + wire [5:0] _zz_190_; + wire _zz_191_; + wire [1:0] _zz_192_; + wire [1:0] _zz_193_; + wire _zz_194_; + wire [2:0] _zz_195_; + wire [2:0] _zz_196_; + wire [31:0] _zz_197_; + wire [11:0] _zz_198_; + wire [31:0] _zz_199_; + wire [19:0] _zz_200_; + wire [11:0] _zz_201_; + wire [1:0] _zz_202_; + wire [0:0] _zz_203_; + wire [1:0] _zz_204_; + wire [0:0] _zz_205_; + wire [1:0] _zz_206_; + wire [0:0] _zz_207_; + wire [1:0] _zz_208_; + wire [0:0] _zz_209_; + wire [1:0] _zz_210_; + wire [2:0] _zz_211_; + wire [0:0] _zz_212_; + wire [0:0] _zz_213_; + wire [0:0] _zz_214_; + wire [0:0] _zz_215_; + wire [0:0] _zz_216_; + wire [0:0] _zz_217_; + wire [0:0] _zz_218_; + wire [0:0] _zz_219_; + wire [0:0] _zz_220_; + wire [0:0] _zz_221_; + wire [0:0] _zz_222_; + wire [2:0] _zz_223_; + wire [4:0] _zz_224_; + wire [11:0] _zz_225_; + wire [11:0] _zz_226_; + wire [31:0] _zz_227_; + wire [31:0] _zz_228_; + wire [31:0] _zz_229_; + wire [31:0] _zz_230_; + wire [1:0] _zz_231_; + wire [31:0] _zz_232_; + wire [1:0] _zz_233_; + wire [1:0] _zz_234_; + wire [31:0] _zz_235_; + wire [32:0] _zz_236_; + wire [11:0] _zz_237_; + wire [19:0] _zz_238_; + wire [11:0] _zz_239_; + wire [31:0] _zz_240_; + wire [31:0] _zz_241_; + wire [31:0] _zz_242_; + wire [11:0] _zz_243_; + wire [19:0] _zz_244_; + wire [11:0] _zz_245_; + wire [2:0] _zz_246_; + wire [1:0] _zz_247_; + wire [1:0] _zz_248_; + wire [0:0] _zz_249_; + wire [0:0] _zz_250_; + wire [0:0] _zz_251_; + wire [0:0] _zz_252_; + wire [30:0] _zz_253_; + wire [30:0] _zz_254_; + wire [30:0] _zz_255_; + wire [30:0] _zz_256_; + wire [0:0] _zz_257_; + wire [0:0] _zz_258_; + wire [0:0] _zz_259_; + wire [0:0] _zz_260_; + wire [0:0] _zz_261_; + wire [0:0] _zz_262_; + wire [6:0] _zz_263_; + wire _zz_264_; + wire _zz_265_; + wire [1:0] _zz_266_; + wire [0:0] _zz_267_; + wire [7:0] _zz_268_; + wire _zz_269_; + wire [0:0] _zz_270_; + wire [0:0] _zz_271_; + wire [31:0] _zz_272_; + wire [31:0] _zz_273_; + wire [31:0] _zz_274_; + wire [31:0] _zz_275_; + wire _zz_276_; + wire [0:0] _zz_277_; + wire [0:0] _zz_278_; + wire _zz_279_; + wire [2:0] _zz_280_; + wire [2:0] _zz_281_; + wire _zz_282_; + wire [0:0] _zz_283_; + wire [19:0] _zz_284_; + wire [31:0] _zz_285_; + wire [31:0] _zz_286_; + wire [31:0] _zz_287_; + wire [31:0] _zz_288_; + wire _zz_289_; + wire _zz_290_; + wire _zz_291_; + wire [0:0] _zz_292_; + wire [3:0] _zz_293_; + wire _zz_294_; + wire [0:0] _zz_295_; + wire [0:0] _zz_296_; + wire _zz_297_; + wire [0:0] _zz_298_; + wire [16:0] _zz_299_; + wire [31:0] _zz_300_; + wire [31:0] _zz_301_; + wire [31:0] _zz_302_; + wire [31:0] _zz_303_; + wire [31:0] _zz_304_; + wire _zz_305_; + wire [0:0] _zz_306_; + wire [1:0] _zz_307_; + wire [31:0] _zz_308_; + wire [31:0] _zz_309_; + wire [31:0] _zz_310_; + wire [0:0] _zz_311_; + wire [0:0] _zz_312_; + wire [0:0] _zz_313_; + wire [0:0] _zz_314_; + wire _zz_315_; + wire [0:0] _zz_316_; + wire [14:0] _zz_317_; + wire [31:0] _zz_318_; + wire [31:0] _zz_319_; + wire [31:0] _zz_320_; + wire [31:0] _zz_321_; + wire [31:0] _zz_322_; + wire [31:0] _zz_323_; + wire [31:0] _zz_324_; + wire [0:0] _zz_325_; + wire [0:0] _zz_326_; + wire [1:0] _zz_327_; + wire [1:0] _zz_328_; + wire _zz_329_; + wire [0:0] _zz_330_; + wire [11:0] _zz_331_; + wire [31:0] _zz_332_; + wire [31:0] _zz_333_; + wire [31:0] _zz_334_; + wire [31:0] _zz_335_; + wire _zz_336_; + wire [0:0] _zz_337_; + wire [0:0] _zz_338_; + wire _zz_339_; + wire [0:0] _zz_340_; + wire [8:0] _zz_341_; + wire [31:0] _zz_342_; + wire [31:0] _zz_343_; + wire _zz_344_; + wire [0:0] _zz_345_; + wire [0:0] _zz_346_; + wire _zz_347_; + wire [0:0] _zz_348_; + wire [0:0] _zz_349_; + wire [0:0] _zz_350_; + wire [0:0] _zz_351_; + wire [2:0] _zz_352_; + wire [2:0] _zz_353_; + wire _zz_354_; + wire [0:0] _zz_355_; + wire [4:0] _zz_356_; + wire [31:0] _zz_357_; + wire [31:0] _zz_358_; + wire [31:0] _zz_359_; + wire [31:0] _zz_360_; + wire [31:0] _zz_361_; + wire [31:0] _zz_362_; + wire [31:0] _zz_363_; + wire [31:0] _zz_364_; + wire [31:0] _zz_365_; + wire [31:0] _zz_366_; + wire [31:0] _zz_367_; + wire [31:0] _zz_368_; + wire [0:0] _zz_369_; + wire [0:0] _zz_370_; + wire [0:0] _zz_371_; + wire [0:0] _zz_372_; + wire [0:0] _zz_373_; + wire [0:0] _zz_374_; + wire _zz_375_; + wire [0:0] _zz_376_; + wire [2:0] _zz_377_; + wire [31:0] _zz_378_; + wire [31:0] _zz_379_; + wire [31:0] _zz_380_; + wire [31:0] _zz_381_; + wire [31:0] _zz_382_; + wire _zz_383_; + wire [1:0] _zz_384_; + wire [1:0] _zz_385_; + wire _zz_386_; + wire _zz_387_; + wire _zz_388_; + wire _zz_389_; + wire _zz_390_; + wire `ShiftCtrlEnum_defaultEncoding_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_1_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_2_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_3_; + wire decode_SRC_LESS_UNSIGNED; + wire decode_SRC_USE_SUB_LESS; + wire `Src2CtrlEnum_defaultEncoding_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_4_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_5_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_6_; + wire [31:0] memory_PC; + wire `AluBitwiseCtrlEnum_defaultEncoding_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_7_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_8_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_9_; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_CSR_WRITE_OPCODE; + wire decode_CSR_READ_OPCODE; + wire decode_DO_EBREAK; + wire `EnvCtrlEnum_defaultEncoding_type _zz_10_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_11_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_12_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_13_; + wire `EnvCtrlEnum_defaultEncoding_type decode_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_14_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_15_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_16_; + wire decode_RS2_USE; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_MEMORY_ENABLE; + wire decode_RS1_USE; + wire [1:0] memory_MEMORY_ADDRESS_LOW; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire `Src1CtrlEnum_defaultEncoding_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_17_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_18_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_19_; + wire execute_REGFILE_WRITE_VALID; + wire `AluCtrlEnum_defaultEncoding_type decode_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_20_; + wire `AluCtrlEnum_defaultEncoding_type _zz_21_; + wire `AluCtrlEnum_defaultEncoding_type _zz_22_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_23_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_24_; + wire decode_IS_CSR; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_READ_DATA; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire _zz_25_; + wire execute_RS2_USE; + wire execute_RS1_USE; + wire memory_REGFILE_WRITE_VALID; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_defaultEncoding_type memory_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_26_; + wire `EnvCtrlEnum_defaultEncoding_type execute_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_27_; + wire _zz_28_; + wire _zz_29_; + wire `EnvCtrlEnum_defaultEncoding_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_defaultEncoding_type _zz_30_; + wire execute_IS_FENCEI; + reg [31:0] _zz_31_; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] _zz_32_; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + wire _zz_33_; + wire [31:0] execute_RS1; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_defaultEncoding_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_34_; + wire _zz_35_; + wire decode_IS_FENCEI; + wire _zz_36_; + reg [31:0] _zz_37_; + wire `ShiftCtrlEnum_defaultEncoding_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_38_; + wire _zz_39_; + wire [31:0] _zz_40_; + wire [31:0] _zz_41_; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_42_; + wire `Src2CtrlEnum_defaultEncoding_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_defaultEncoding_type _zz_43_; + wire [31:0] _zz_44_; + wire `Src1CtrlEnum_defaultEncoding_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_defaultEncoding_type _zz_45_; + wire [31:0] _zz_46_; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_defaultEncoding_type execute_ALU_CTRL; + wire `AluCtrlEnum_defaultEncoding_type _zz_47_; + wire [31:0] _zz_48_; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_defaultEncoding_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_49_; + wire [31:0] _zz_50_; + wire _zz_51_; + reg _zz_52_; + wire [31:0] _zz_53_; + wire [31:0] _zz_54_; + reg decode_REGFILE_WRITE_VALID; + wire _zz_55_; + wire `AluCtrlEnum_defaultEncoding_type _zz_56_; + wire _zz_57_; + wire _zz_58_; + wire _zz_59_; + wire _zz_60_; + wire _zz_61_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_62_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_63_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_64_; + wire _zz_65_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_66_; + wire _zz_67_; + wire _zz_68_; + wire _zz_69_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_70_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_71_; + reg [31:0] _zz_72_; + wire writeBack_MEMORY_ENABLE; + wire [1:0] writeBack_MEMORY_ADDRESS_LOW; + wire [31:0] writeBack_MEMORY_READ_DATA; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_ALIGNEMENT_FAULT; + wire [31:0] memory_INSTRUCTION; + wire memory_MEMORY_ENABLE; + wire [31:0] _zz_73_; + wire [1:0] _zz_74_; + wire [31:0] execute_RS2; + wire [31:0] execute_SRC_ADD; + wire [31:0] execute_INSTRUCTION; + wire execute_ALIGNEMENT_FAULT; + wire execute_MEMORY_ENABLE; + wire _zz_75_; + wire `BranchCtrlEnum_defaultEncoding_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_defaultEncoding_type _zz_76_; + reg [31:0] _zz_77_; + reg [31:0] _zz_78_; + wire [31:0] _zz_79_; + wire [31:0] _zz_80_; + wire [31:0] _zz_81_; + wire [31:0] writeBack_PC /* verilator public */ ; + wire [31:0] writeBack_INSTRUCTION /* verilator public */ ; + wire [31:0] decode_PC /* verilator public */ ; + reg [31:0] decode_INSTRUCTION /* verilator public */ ; + reg decode_arbitration_haltItself /* verilator public */ ; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + reg decode_arbitration_flushAll /* verilator public */ ; + wire decode_arbitration_redoIt; + reg decode_arbitration_isValid /* verilator public */ ; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushAll; + wire execute_arbitration_redoIt; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + reg memory_arbitration_flushAll; + wire memory_arbitration_redoIt; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + wire writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + wire writeBack_arbitration_flushAll; + wire writeBack_arbitration_redoIt; + reg writeBack_arbitration_isValid /* verilator public */ ; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring /* verilator public */ ; + reg _zz_82_; + reg _zz_83_; + reg _zz_84_; + wire _zz_85_; + wire [31:0] _zz_86_; + wire _zz_87_; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + wire [31:0] iBus_cmd_payload_pc; + wire iBus_rsp_valid; + wire iBus_rsp_payload_error; + wire [31:0] iBus_rsp_payload_inst; + reg memory_exception_agregat_valid; + wire [3:0] memory_exception_agregat_payload_code; + wire [31:0] memory_exception_agregat_payload_badAddr; + wire _zz_88_; + wire [31:0] _zz_89_; + reg _zz_90_; + reg _zz_91_; + reg [31:0] _zz_92_; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg _zz_93_; + reg [3:0] _zz_94_; + reg _zz_95_; + reg _zz_96_; + reg _zz_97_; + reg _zz_98_; + wire IBusSimplePlugin_jump_pcLoad_valid; + wire [31:0] IBusSimplePlugin_jump_pcLoad_payload; + wire [2:0] _zz_99_; + wire [2:0] _zz_100_; + wire _zz_101_; + wire _zz_102_; + wire IBusSimplePlugin_fetchPc_preOutput_valid; + wire IBusSimplePlugin_fetchPc_preOutput_ready; + wire [31:0] IBusSimplePlugin_fetchPc_preOutput_payload; + wire _zz_103_; + wire IBusSimplePlugin_fetchPc_output_valid; + wire IBusSimplePlugin_fetchPc_output_ready; + wire [31:0] IBusSimplePlugin_fetchPc_output_payload; + reg [31:0] IBusSimplePlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusSimplePlugin_fetchPc_inc; + reg IBusSimplePlugin_fetchPc_propagatePc; + reg [31:0] IBusSimplePlugin_fetchPc_pc; + reg IBusSimplePlugin_fetchPc_samplePcNext; + reg _zz_104_; + wire IBusSimplePlugin_iBusRsp_stages_0_input_valid; + wire IBusSimplePlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_0_input_payload; + wire IBusSimplePlugin_iBusRsp_stages_0_output_valid; + wire IBusSimplePlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_0_output_payload; + reg IBusSimplePlugin_iBusRsp_stages_0_halt; + wire IBusSimplePlugin_iBusRsp_stages_0_inputSample; + wire IBusSimplePlugin_iBusRsp_stages_1_input_valid; + wire IBusSimplePlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_1_input_payload; + wire IBusSimplePlugin_iBusRsp_stages_1_output_valid; + wire IBusSimplePlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_stages_1_output_payload; + wire IBusSimplePlugin_iBusRsp_stages_1_halt; + wire IBusSimplePlugin_iBusRsp_stages_1_inputSample; + wire _zz_105_; + wire _zz_106_; + wire _zz_107_; + wire _zz_108_; + reg _zz_109_; + wire IBusSimplePlugin_iBusRsp_readyForError; + wire IBusSimplePlugin_iBusRsp_decodeInput_valid; + wire IBusSimplePlugin_iBusRsp_decodeInput_ready; + wire [31:0] IBusSimplePlugin_iBusRsp_decodeInput_payload_pc; + wire IBusSimplePlugin_iBusRsp_decodeInput_payload_rsp_error; + wire [31:0] IBusSimplePlugin_iBusRsp_decodeInput_payload_rsp_inst; + wire IBusSimplePlugin_iBusRsp_decodeInput_payload_isRvc; + reg IBusSimplePlugin_injector_nextPcCalc_valids_0; + reg IBusSimplePlugin_injector_nextPcCalc_valids_1; + reg IBusSimplePlugin_injector_nextPcCalc_valids_2; + reg IBusSimplePlugin_injector_nextPcCalc_valids_3; + reg IBusSimplePlugin_injector_decodeRemoved; + wire _zz_110_; + reg [18:0] _zz_111_; + wire _zz_112_; + reg [10:0] _zz_113_; + wire _zz_114_; + reg [18:0] _zz_115_; + wire IBusSimplePlugin_cmd_valid; + wire IBusSimplePlugin_cmd_ready; + wire [31:0] IBusSimplePlugin_cmd_payload_pc; + reg [1:0] IBusSimplePlugin_pendingCmd; + wire [1:0] IBusSimplePlugin_pendingCmdNext; + reg [1:0] IBusSimplePlugin_rspJoin_discardCounter; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_valid; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_ready; + wire IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error; + wire [31:0] IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst; + wire iBus_rsp_takeWhen_valid; + wire iBus_rsp_takeWhen_payload_error; + wire [31:0] iBus_rsp_takeWhen_payload_inst; + wire [31:0] IBusSimplePlugin_rspJoin_fetchRsp_pc; + reg IBusSimplePlugin_rspJoin_fetchRsp_rsp_error; + wire [31:0] IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst; + wire IBusSimplePlugin_rspJoin_fetchRsp_isRvc; + wire IBusSimplePlugin_rspJoin_issueDetected; + wire IBusSimplePlugin_rspJoin_join_valid; + wire IBusSimplePlugin_rspJoin_join_ready; + wire [31:0] IBusSimplePlugin_rspJoin_join_payload_pc; + wire IBusSimplePlugin_rspJoin_join_payload_rsp_error; + wire [31:0] IBusSimplePlugin_rspJoin_join_payload_rsp_inst; + wire IBusSimplePlugin_rspJoin_join_payload_isRvc; + wire _zz_116_; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + wire execute_DBusSimplePlugin_cmdSent; + reg [31:0] _zz_117_; + reg [3:0] _zz_118_; + wire [3:0] execute_DBusSimplePlugin_formalMask; + reg [31:0] writeBack_DBusSimplePlugin_rspShifted; + wire _zz_119_; + reg [31:0] _zz_120_; + wire _zz_121_; + reg [31:0] _zz_122_; + reg [31:0] writeBack_DBusSimplePlugin_rspFormated; + wire [25:0] _zz_123_; + wire _zz_124_; + wire _zz_125_; + wire _zz_126_; + wire _zz_127_; + wire _zz_128_; + wire `Src1CtrlEnum_defaultEncoding_type _zz_129_; + wire `EnvCtrlEnum_defaultEncoding_type _zz_130_; + wire `AluBitwiseCtrlEnum_defaultEncoding_type _zz_131_; + wire `BranchCtrlEnum_defaultEncoding_type _zz_132_; + wire `Src2CtrlEnum_defaultEncoding_type _zz_133_; + wire `ShiftCtrlEnum_defaultEncoding_type _zz_134_; + wire `AluCtrlEnum_defaultEncoding_type _zz_135_; + wire [31:0] execute_RegFilePlugin_srcInstruction; + wire [4:0] execute_RegFilePlugin_regFileReadAddress1; + wire [4:0] execute_RegFilePlugin_regFileReadAddress2; + wire [31:0] execute_RegFilePlugin_rs1Data; + wire [31:0] execute_RegFilePlugin_rs2Data; + wire writeBack_RegFilePlugin_regFileWrite_valid /* verilator public */ ; + wire [4:0] writeBack_RegFilePlugin_regFileWrite_payload_address /* verilator public */ ; + wire [31:0] writeBack_RegFilePlugin_regFileWrite_payload_data /* verilator public */ ; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_136_; + reg [31:0] _zz_137_; + wire _zz_138_; + reg [19:0] _zz_139_; + wire _zz_140_; + reg [19:0] _zz_141_; + reg [31:0] _zz_142_; + wire [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + reg execute_LightShifterPlugin_isActive; + wire execute_LightShifterPlugin_isShift; + reg [4:0] execute_LightShifterPlugin_amplitudeReg; + wire [4:0] execute_LightShifterPlugin_amplitude; + wire [31:0] execute_LightShifterPlugin_shiftInput; + wire execute_LightShifterPlugin_done; + reg [31:0] _zz_143_; + wire execute_BranchPlugin_eq; + wire [2:0] _zz_144_; + reg _zz_145_; + reg _zz_146_; + wire _zz_147_; + reg [19:0] _zz_148_; + wire _zz_149_; + reg [10:0] _zz_150_; + wire _zz_151_; + reg [18:0] _zz_152_; + reg _zz_153_; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_154_; + reg [19:0] _zz_155_; + wire _zz_156_; + reg [10:0] _zz_157_; + wire _zz_158_; + reg [18:0] _zz_159_; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire [31:0] CsrPlugin_medeleg; + wire [31:0] CsrPlugin_mideleg; + wire _zz_160_; + wire _zz_161_; + wire _zz_162_; + wire CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + wire CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + wire CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire execute_exception_agregat_valid; + wire [3:0] execute_exception_agregat_payload_code; + wire [31:0] execute_exception_agregat_payload_badAddr; + wire [1:0] _zz_163_; + wire _zz_164_; + reg CsrPlugin_interrupt; + reg [3:0] CsrPlugin_interruptCode /* verilator public */ ; + wire [1:0] CsrPlugin_interruptTargetPrivilege; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_done; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + reg [31:0] execute_CsrPlugin_readData; + wire execute_CsrPlugin_writeInstruction; + wire execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + reg [31:0] execute_CsrPlugin_writeData; + wire [11:0] execute_CsrPlugin_csrAddress; + reg _zz_165_; + reg _zz_166_; + wire _zz_167_; + reg _zz_168_; + reg [4:0] _zz_169_; + reg [31:0] _zz_170_; + reg [31:0] externalInterruptArray_regNext; + wire [31:0] _zz_171_; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipActive; + reg DebugPlugin_isPipActive_regNext; + wire DebugPlugin_isPipBusy; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_hardwareBreakpoints_0_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_0_pc; + reg DebugPlugin_hardwareBreakpoints_1_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_1_pc; + reg DebugPlugin_hardwareBreakpoints_2_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_2_pc; + reg DebugPlugin_hardwareBreakpoints_3_valid; + reg [30:0] DebugPlugin_hardwareBreakpoints_3_pc; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_172_; + reg DebugPlugin_resetIt_regNext; + reg decode_to_execute_IS_FENCEI; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + reg [31:0] memory_to_writeBack_MEMORY_READ_DATA; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + reg decode_to_execute_IS_CSR; + reg `BranchCtrlEnum_defaultEncoding_type decode_to_execute_BRANCH_CTRL; + reg `AluCtrlEnum_defaultEncoding_type decode_to_execute_ALU_CTRL; + reg decode_to_execute_REGFILE_WRITE_VALID; + reg execute_to_memory_REGFILE_WRITE_VALID; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + reg `Src1CtrlEnum_defaultEncoding_type decode_to_execute_SRC1_CTRL; + reg [1:0] execute_to_memory_MEMORY_ADDRESS_LOW; + reg [1:0] memory_to_writeBack_MEMORY_ADDRESS_LOW; + reg decode_to_execute_RS1_USE; + reg decode_to_execute_MEMORY_ENABLE; + reg execute_to_memory_MEMORY_ENABLE; + reg memory_to_writeBack_MEMORY_ENABLE; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + reg [31:0] decode_to_execute_INSTRUCTION; + reg [31:0] execute_to_memory_INSTRUCTION; + reg [31:0] memory_to_writeBack_INSTRUCTION; + reg decode_to_execute_RS2_USE; + reg `EnvCtrlEnum_defaultEncoding_type decode_to_execute_ENV_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type execute_to_memory_ENV_CTRL; + reg `EnvCtrlEnum_defaultEncoding_type memory_to_writeBack_ENV_CTRL; + reg decode_to_execute_DO_EBREAK; + reg decode_to_execute_CSR_READ_OPCODE; + reg decode_to_execute_CSR_WRITE_OPCODE; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + reg `AluBitwiseCtrlEnum_defaultEncoding_type decode_to_execute_ALU_BITWISE_CTRL; + reg [31:0] decode_to_execute_PC; + reg [31:0] execute_to_memory_PC; + reg [31:0] memory_to_writeBack_PC; + reg `Src2CtrlEnum_defaultEncoding_type decode_to_execute_SRC2_CTRL; + reg decode_to_execute_SRC_USE_SUB_LESS; + reg execute_to_memory_ALIGNEMENT_FAULT; + reg decode_to_execute_SRC_LESS_UNSIGNED; + reg `ShiftCtrlEnum_defaultEncoding_type decode_to_execute_SHIFT_CTRL; + reg [2:0] _zz_173_; + reg [31:0] _zz_174_; + wire iBus_cmd_m2sPipe_valid; + wire iBus_cmd_m2sPipe_ready; + wire [31:0] iBus_cmd_m2sPipe_payload_pc; + reg _zz_175_; + reg [31:0] _zz_176_; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_halfPipe_regs_valid; + reg dBus_cmd_halfPipe_regs_ready; + reg dBus_cmd_halfPipe_regs_payload_wr; + reg [31:0] dBus_cmd_halfPipe_regs_payload_address; + reg [31:0] dBus_cmd_halfPipe_regs_payload_data; + reg [1:0] dBus_cmd_halfPipe_regs_payload_size; + reg [3:0] _zz_177_; + `ifndef SYNTHESIS + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_1__string; + reg [71:0] _zz_2__string; + reg [71:0] _zz_3__string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_4__string; + reg [23:0] _zz_5__string; + reg [23:0] _zz_6__string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_7__string; + reg [39:0] _zz_8__string; + reg [39:0] _zz_9__string; + reg [47:0] _zz_10__string; + reg [47:0] _zz_11__string; + reg [47:0] _zz_12__string; + reg [47:0] _zz_13__string; + reg [47:0] decode_ENV_CTRL_string; + reg [47:0] _zz_14__string; + reg [47:0] _zz_15__string; + reg [47:0] _zz_16__string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_17__string; + reg [95:0] _zz_18__string; + reg [95:0] _zz_19__string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_20__string; + reg [63:0] _zz_21__string; + reg [63:0] _zz_22__string; + reg [31:0] _zz_23__string; + reg [31:0] _zz_24__string; + reg [47:0] memory_ENV_CTRL_string; + reg [47:0] _zz_26__string; + reg [47:0] execute_ENV_CTRL_string; + reg [47:0] _zz_27__string; + reg [47:0] writeBack_ENV_CTRL_string; + reg [47:0] _zz_30__string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_34__string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_38__string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_43__string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_45__string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_47__string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_49__string; + reg [63:0] _zz_56__string; + reg [71:0] _zz_62__string; + reg [23:0] _zz_63__string; + reg [31:0] _zz_64__string; + reg [39:0] _zz_66__string; + reg [47:0] _zz_70__string; + reg [95:0] _zz_71__string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_76__string; + reg [95:0] _zz_129__string; + reg [47:0] _zz_130__string; + reg [39:0] _zz_131__string; + reg [31:0] _zz_132__string; + reg [23:0] _zz_133__string; + reg [71:0] _zz_134__string; + reg [63:0] _zz_135__string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [47:0] decode_to_execute_ENV_CTRL_string; + reg [47:0] execute_to_memory_ENV_CTRL_string; + reg [47:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + `endif + + reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + assign _zz_182_ = ((execute_arbitration_isValid && execute_LightShifterPlugin_isShift) && (execute_SRC2[4 : 0] != (5'b00000))); + assign _zz_183_ = (! execute_arbitration_isStuckByOthers); + assign _zz_184_ = (execute_arbitration_isValid && execute_DO_EBREAK); + assign _zz_185_ = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00)) == 1'b0); + assign _zz_186_ = (DebugPlugin_stepIt && _zz_84_); + assign _zz_187_ = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign _zz_188_ = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)); + assign _zz_189_ = (IBusSimplePlugin_fetchPc_preOutput_valid && IBusSimplePlugin_fetchPc_preOutput_ready); + assign _zz_190_ = debug_bus_cmd_payload_address[7 : 2]; + assign _zz_191_ = (! dBus_cmd_halfPipe_regs_valid); + assign _zz_192_ = writeBack_INSTRUCTION[13 : 12]; + assign _zz_193_ = writeBack_INSTRUCTION[29 : 28]; + assign _zz_194_ = execute_INSTRUCTION[13]; + assign _zz_195_ = (_zz_99_ - (3'b001)); + assign _zz_196_ = {IBusSimplePlugin_fetchPc_inc,(2'b00)}; + assign _zz_197_ = {29'd0, _zz_196_}; + assign _zz_198_ = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_199_ = {{_zz_111_,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz_200_ = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz_201_ = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_202_ = (IBusSimplePlugin_pendingCmd + _zz_204_); + assign _zz_203_ = (IBusSimplePlugin_cmd_valid && IBusSimplePlugin_cmd_ready); + assign _zz_204_ = {1'd0, _zz_203_}; + assign _zz_205_ = iBus_rsp_valid; + assign _zz_206_ = {1'd0, _zz_205_}; + assign _zz_207_ = (iBus_rsp_valid && (IBusSimplePlugin_rspJoin_discardCounter != (2'b00))); + assign _zz_208_ = {1'd0, _zz_207_}; + assign _zz_209_ = iBus_rsp_valid; + assign _zz_210_ = {1'd0, _zz_209_}; + assign _zz_211_ = (memory_INSTRUCTION[5] ? (3'b110) : (3'b100)); + assign _zz_212_ = _zz_123_[4 : 4]; + assign _zz_213_ = _zz_123_[5 : 5]; + assign _zz_214_ = _zz_123_[6 : 6]; + assign _zz_215_ = _zz_123_[10 : 10]; + assign _zz_216_ = _zz_123_[18 : 18]; + assign _zz_217_ = _zz_123_[19 : 19]; + assign _zz_218_ = _zz_123_[20 : 20]; + assign _zz_219_ = _zz_123_[21 : 21]; + assign _zz_220_ = _zz_123_[22 : 22]; + assign _zz_221_ = _zz_123_[25 : 25]; + assign _zz_222_ = execute_SRC_LESS; + assign _zz_223_ = (3'b100); + assign _zz_224_ = execute_INSTRUCTION[19 : 15]; + assign _zz_225_ = execute_INSTRUCTION[31 : 20]; + assign _zz_226_ = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_227_ = ($signed(_zz_228_) + $signed(_zz_232_)); + assign _zz_228_ = ($signed(_zz_229_) + $signed(_zz_230_)); + assign _zz_229_ = execute_SRC1; + assign _zz_230_ = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_231_ = (execute_SRC_USE_SUB_LESS ? _zz_233_ : _zz_234_); + assign _zz_232_ = {{30{_zz_231_[1]}}, _zz_231_}; + assign _zz_233_ = (2'b01); + assign _zz_234_ = (2'b00); + assign _zz_235_ = (_zz_236_ >>> 1); + assign _zz_236_ = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_defaultEncoding_SRA_1) && execute_LightShifterPlugin_shiftInput[31]),execute_LightShifterPlugin_shiftInput}; + assign _zz_237_ = execute_INSTRUCTION[31 : 20]; + assign _zz_238_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_239_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_240_ = {_zz_148_,execute_INSTRUCTION[31 : 20]}; + assign _zz_241_ = {{_zz_150_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz_242_ = {{_zz_152_,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz_243_ = execute_INSTRUCTION[31 : 20]; + assign _zz_244_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz_245_ = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_246_ = (3'b100); + assign _zz_247_ = (_zz_163_ & (~ _zz_248_)); + assign _zz_248_ = (_zz_163_ - (2'b01)); + assign _zz_249_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_250_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_251_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_252_ = debug_bus_cmd_payload_data[0 : 0]; + assign _zz_253_ = (decode_PC >>> 1); + assign _zz_254_ = (decode_PC >>> 1); + assign _zz_255_ = (decode_PC >>> 1); + assign _zz_256_ = (decode_PC >>> 1); + assign _zz_257_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_258_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_259_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_260_ = execute_CsrPlugin_writeData[11 : 11]; + assign _zz_261_ = execute_CsrPlugin_writeData[7 : 7]; + assign _zz_262_ = execute_CsrPlugin_writeData[3 : 3]; + assign _zz_263_ = ({3'd0,_zz_177_} <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + assign _zz_264_ = 1'b1; + assign _zz_265_ = 1'b1; + assign _zz_266_ = {_zz_102_,_zz_101_}; + assign _zz_267_ = decode_INSTRUCTION[31]; + assign _zz_268_ = decode_INSTRUCTION[19 : 12]; + assign _zz_269_ = decode_INSTRUCTION[20]; + assign _zz_270_ = decode_INSTRUCTION[31]; + assign _zz_271_ = decode_INSTRUCTION[7]; + assign _zz_272_ = (decode_INSTRUCTION & (32'b00000000000000000001000001010000)); + assign _zz_273_ = (32'b00000000000000000001000001010000); + assign _zz_274_ = (decode_INSTRUCTION & (32'b00000000000000000010000001010000)); + assign _zz_275_ = (32'b00000000000000000010000001010000); + assign _zz_276_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001100100)) == (32'b00000000000000000000000000100100)); + assign _zz_277_ = ((decode_INSTRUCTION & _zz_285_) == (32'b00000000000000000100000000010000)); + assign _zz_278_ = ((decode_INSTRUCTION & _zz_286_) == (32'b00000000000000000001000000010000)); + assign _zz_279_ = ((decode_INSTRUCTION & (32'b00000000000000000110000000010100)) == (32'b00000000000000000010000000010000)); + assign _zz_280_ = {(_zz_287_ == _zz_288_),{_zz_289_,_zz_290_}}; + assign _zz_281_ = (3'b000); + assign _zz_282_ = ({_zz_291_,{_zz_292_,_zz_293_}} != (6'b000000)); + assign _zz_283_ = (_zz_294_ != (1'b0)); + assign _zz_284_ = {(_zz_295_ != _zz_296_),{_zz_297_,{_zz_298_,_zz_299_}}}; + assign _zz_285_ = (32'b00000000000000000100000000010100); + assign _zz_286_ = (32'b00000000000000000011000000010100); + assign _zz_287_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_288_ = (32'b00000000000000000000000001000000); + assign _zz_289_ = ((decode_INSTRUCTION & _zz_300_) == (32'b01000000000000000000000000110000)); + assign _zz_290_ = ((decode_INSTRUCTION & _zz_301_) == (32'b00000000000000000010000000010000)); + assign _zz_291_ = ((decode_INSTRUCTION & _zz_302_) == (32'b00000000000000000000000001001000)); + assign _zz_292_ = (_zz_303_ == _zz_304_); + assign _zz_293_ = {_zz_305_,{_zz_306_,_zz_307_}}; + assign _zz_294_ = ((decode_INSTRUCTION & _zz_308_) == (32'b00000000000000000000000000001000)); + assign _zz_295_ = (_zz_309_ == _zz_310_); + assign _zz_296_ = (1'b0); + assign _zz_297_ = ({_zz_311_,_zz_312_} != (2'b00)); + assign _zz_298_ = (_zz_313_ != _zz_314_); + assign _zz_299_ = {_zz_315_,{_zz_316_,_zz_317_}}; + assign _zz_300_ = (32'b01000000000000000000000000110000); + assign _zz_301_ = (32'b00000000000000000010000000010100); + assign _zz_302_ = (32'b00000000000000000000000001001000); + assign _zz_303_ = (decode_INSTRUCTION & (32'b00000000000000000001000000010000)); + assign _zz_304_ = (32'b00000000000000000001000000010000); + assign _zz_305_ = ((decode_INSTRUCTION & (32'b00000000000000000010000000010000)) == (32'b00000000000000000010000000010000)); + assign _zz_306_ = ((decode_INSTRUCTION & _zz_318_) == (32'b00000000000000000000000000000100)); + assign _zz_307_ = {_zz_128_,(_zz_319_ == _zz_320_)}; + assign _zz_308_ = (32'b00000000000000000000000001001000); + assign _zz_309_ = (decode_INSTRUCTION & (32'b00000000000000000000000001011000)); + assign _zz_310_ = (32'b00000000000000000000000000000000); + assign _zz_311_ = ((decode_INSTRUCTION & _zz_321_) == (32'b00000000000000000000000000100000)); + assign _zz_312_ = ((decode_INSTRUCTION & _zz_322_) == (32'b00000000000000000000000000100000)); + assign _zz_313_ = _zz_128_; + assign _zz_314_ = (1'b0); + assign _zz_315_ = ((_zz_323_ == _zz_324_) != (1'b0)); + assign _zz_316_ = ({_zz_325_,_zz_326_} != (2'b00)); + assign _zz_317_ = {(_zz_327_ != _zz_328_),{_zz_329_,{_zz_330_,_zz_331_}}}; + assign _zz_318_ = (32'b00000000000000000001000000000100); + assign _zz_319_ = (decode_INSTRUCTION & (32'b00000000000000000000000000101000)); + assign _zz_320_ = (32'b00000000000000000000000000000000); + assign _zz_321_ = (32'b00000000000000000000000000110100); + assign _zz_322_ = (32'b00000000000000000000000001100100); + assign _zz_323_ = (decode_INSTRUCTION & (32'b00000000000000000111000001010100)); + assign _zz_324_ = (32'b00000000000000000101000000010000); + assign _zz_325_ = ((decode_INSTRUCTION & _zz_332_) == (32'b01000000000000000001000000010000)); + assign _zz_326_ = ((decode_INSTRUCTION & _zz_333_) == (32'b00000000000000000001000000010000)); + assign _zz_327_ = {_zz_127_,(_zz_334_ == _zz_335_)}; + assign _zz_328_ = (2'b00); + assign _zz_329_ = ({_zz_127_,_zz_336_} != (2'b00)); + assign _zz_330_ = (_zz_125_ != (1'b0)); + assign _zz_331_ = {(_zz_337_ != _zz_338_),{_zz_339_,{_zz_340_,_zz_341_}}}; + assign _zz_332_ = (32'b01000000000000000011000001010100); + assign _zz_333_ = (32'b00000000000000000111000001010100); + assign _zz_334_ = (decode_INSTRUCTION & (32'b00000000000000000000000001110000)); + assign _zz_335_ = (32'b00000000000000000000000000100000); + assign _zz_336_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000100000)) == (32'b00000000000000000000000000000000)); + assign _zz_337_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001011000)) == (32'b00000000000000000000000001000000)); + assign _zz_338_ = (1'b0); + assign _zz_339_ = ({(_zz_342_ == _zz_343_),{_zz_344_,{_zz_345_,_zz_346_}}} != (4'b0000)); + assign _zz_340_ = ({_zz_347_,{_zz_348_,_zz_349_}} != (3'b000)); + assign _zz_341_ = {({_zz_350_,_zz_351_} != (2'b00)),{(_zz_352_ != _zz_353_),{_zz_354_,{_zz_355_,_zz_356_}}}}; + assign _zz_342_ = (decode_INSTRUCTION & (32'b00000000000000000000000001000100)); + assign _zz_343_ = (32'b00000000000000000000000000000000); + assign _zz_344_ = ((decode_INSTRUCTION & _zz_357_) == (32'b00000000000000000000000000000000)); + assign _zz_345_ = (_zz_358_ == _zz_359_); + assign _zz_346_ = (_zz_360_ == _zz_361_); + assign _zz_347_ = ((decode_INSTRUCTION & _zz_362_) == (32'b00000000000000000000000001000000)); + assign _zz_348_ = (_zz_363_ == _zz_364_); + assign _zz_349_ = (_zz_365_ == _zz_366_); + assign _zz_350_ = (_zz_367_ == _zz_368_); + assign _zz_351_ = _zz_127_; + assign _zz_352_ = {_zz_127_,{_zz_369_,_zz_370_}}; + assign _zz_353_ = (3'b000); + assign _zz_354_ = ({_zz_371_,_zz_372_} != (2'b00)); + assign _zz_355_ = (_zz_373_ != _zz_374_); + assign _zz_356_ = {_zz_375_,{_zz_376_,_zz_377_}}; + assign _zz_357_ = (32'b00000000000000000000000000011000); + assign _zz_358_ = (decode_INSTRUCTION & (32'b00000000000000000110000000000100)); + assign _zz_359_ = (32'b00000000000000000010000000000000); + assign _zz_360_ = (decode_INSTRUCTION & (32'b00000000000000000101000000000100)); + assign _zz_361_ = (32'b00000000000000000001000000000000); + assign _zz_362_ = (32'b00000000000000000000000001010000); + assign _zz_363_ = (decode_INSTRUCTION & (32'b00000000000000000000000000110000)); + assign _zz_364_ = (32'b00000000000000000000000000000000); + assign _zz_365_ = (decode_INSTRUCTION & (32'b00000000010000000011000001000000)); + assign _zz_366_ = (32'b00000000000000000000000001000000); + assign _zz_367_ = (decode_INSTRUCTION & (32'b00000000000000000001000000000000)); + assign _zz_368_ = (32'b00000000000000000001000000000000); + assign _zz_369_ = ((decode_INSTRUCTION & _zz_378_) == (32'b00000000000000000001000000000000)); + assign _zz_370_ = ((decode_INSTRUCTION & _zz_379_) == (32'b00000000000000000010000000000000)); + assign _zz_371_ = ((decode_INSTRUCTION & _zz_380_) == (32'b00000000000000000010000000000000)); + assign _zz_372_ = ((decode_INSTRUCTION & _zz_381_) == (32'b00000000000000000001000000000000)); + assign _zz_373_ = ((decode_INSTRUCTION & _zz_382_) == (32'b00000000000000000000000000010000)); + assign _zz_374_ = (1'b0); + assign _zz_375_ = (_zz_126_ != (1'b0)); + assign _zz_376_ = (_zz_383_ != (1'b0)); + assign _zz_377_ = {(_zz_384_ != _zz_385_),{_zz_386_,_zz_387_}}; + assign _zz_378_ = (32'b00000000000000000011000000000000); + assign _zz_379_ = (32'b00000000000000000011000000000000); + assign _zz_380_ = (32'b00000000000000000010000000010000); + assign _zz_381_ = (32'b00000000000000000101000000000000); + assign _zz_382_ = (32'b00000000000000000000000000010000); + assign _zz_383_ = ((decode_INSTRUCTION & (32'b00010000000000000011000001010000)) == (32'b00000000000000000000000001010000)); + assign _zz_384_ = {_zz_126_,((decode_INSTRUCTION & (32'b00010000010000000011000001010000)) == (32'b00010000000000000000000001010000))}; + assign _zz_385_ = (2'b00); + assign _zz_386_ = ({_zz_125_,_zz_124_} != (2'b00)); + assign _zz_387_ = ({((decode_INSTRUCTION & (32'b00000000000000000000000001000100)) == (32'b00000000000000000000000000000100)),_zz_124_} != (2'b00)); + assign _zz_388_ = execute_INSTRUCTION[31]; + assign _zz_389_ = execute_INSTRUCTION[31]; + assign _zz_390_ = execute_INSTRUCTION[7]; + always @ (posedge clk) begin + if(_zz_52_) begin + RegFilePlugin_regFile[writeBack_RegFilePlugin_regFileWrite_payload_address] <= writeBack_RegFilePlugin_regFileWrite_payload_data; + end + end + + always @ (posedge clk) begin + if(_zz_264_) begin + _zz_179_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress1]; + end + end + + always @ (posedge clk) begin + if(_zz_265_) begin + _zz_180_ <= RegFilePlugin_regFile[execute_RegFilePlugin_regFileReadAddress2]; + end + end + + StreamFifoLowLatency IBusSimplePlugin_rspJoin_rspBuffer_c ( + .io_push_valid(iBus_rsp_takeWhen_valid), + .io_push_ready(IBusSimplePlugin_rspJoin_rspBuffer_c_io_push_ready), + .io_push_payload_error(iBus_rsp_takeWhen_payload_error), + .io_push_payload_inst(iBus_rsp_takeWhen_payload_inst), + .io_pop_valid(IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_valid), + .io_pop_ready(IBusSimplePlugin_rspJoin_rspBufferOutput_ready), + .io_pop_payload_error(IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_payload_error), + .io_pop_payload_inst(IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_payload_inst), + .io_flush(_zz_178_), + .io_occupancy(IBusSimplePlugin_rspJoin_rspBuffer_c_io_occupancy), + .clk(clk), + .reset(reset) + ); + always @(*) begin + case(_zz_266_) + 2'b00 : begin + _zz_181_ = _zz_92_; + end + 2'b01 : begin + _zz_181_ = _zz_89_; + end + default : begin + _zz_181_ = _zz_86_; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_1_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_1__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_1__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_1__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_1__string = "SRA_1 "; + default : _zz_1__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_2_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_2__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_2__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_2__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_2__string = "SRA_1 "; + default : _zz_2__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_3_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_3__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_3__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_3__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_3__string = "SRA_1 "; + default : _zz_3__string = "?????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_4_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_4__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_4__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_4__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_4__string = "PC "; + default : _zz_4__string = "???"; + endcase + end + always @(*) begin + case(_zz_5_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_5__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_5__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_5__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_5__string = "PC "; + default : _zz_5__string = "???"; + endcase + end + always @(*) begin + case(_zz_6_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_6__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_6__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_6__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_6__string = "PC "; + default : _zz_6__string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : decode_ALU_BITWISE_CTRL_string = "SRC1 "; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_7_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_7__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_7__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_7__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_7__string = "SRC1 "; + default : _zz_7__string = "?????"; + endcase + end + always @(*) begin + case(_zz_8_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_8__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_8__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_8__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_8__string = "SRC1 "; + default : _zz_8__string = "?????"; + endcase + end + always @(*) begin + case(_zz_9_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_9__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_9__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_9__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_9__string = "SRC1 "; + default : _zz_9__string = "?????"; + endcase + end + always @(*) begin + case(_zz_10_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_10__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_10__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_10__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_10__string = "EBREAK"; + default : _zz_10__string = "??????"; + endcase + end + always @(*) begin + case(_zz_11_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_11__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_11__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_11__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_11__string = "EBREAK"; + default : _zz_11__string = "??????"; + endcase + end + always @(*) begin + case(_zz_12_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_12__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_12__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_12__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_12__string = "EBREAK"; + default : _zz_12__string = "??????"; + endcase + end + always @(*) begin + case(_zz_13_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_13__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_13__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_13__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_13__string = "EBREAK"; + default : _zz_13__string = "??????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_ENV_CTRL_string = "EBREAK"; + default : decode_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_14_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_14__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_14__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_14__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_14__string = "EBREAK"; + default : _zz_14__string = "??????"; + endcase + end + always @(*) begin + case(_zz_15_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_15__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_15__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_15__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_15__string = "EBREAK"; + default : _zz_15__string = "??????"; + endcase + end + always @(*) begin + case(_zz_16_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_16__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_16__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_16__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_16__string = "EBREAK"; + default : _zz_16__string = "??????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_17_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_17__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_17__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_17__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_17__string = "URS1 "; + default : _zz_17__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_18_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_18__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_18__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_18__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_18__string = "URS1 "; + default : _zz_18__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_19_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_19__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_19__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_19__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_19__string = "URS1 "; + default : _zz_19__string = "????????????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_20_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_20__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_20__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_20__string = "BITWISE "; + default : _zz_20__string = "????????"; + endcase + end + always @(*) begin + case(_zz_21_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_21__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_21__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_21__string = "BITWISE "; + default : _zz_21__string = "????????"; + endcase + end + always @(*) begin + case(_zz_22_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_22__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_22__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_22__string = "BITWISE "; + default : _zz_22__string = "????????"; + endcase + end + always @(*) begin + case(_zz_23_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_23__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_23__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_23__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_23__string = "JALR"; + default : _zz_23__string = "????"; + endcase + end + always @(*) begin + case(_zz_24_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_24__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_24__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_24__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_24__string = "JALR"; + default : _zz_24__string = "????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : memory_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : memory_ENV_CTRL_string = "EBREAK"; + default : memory_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_26_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_26__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_26__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_26__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_26__string = "EBREAK"; + default : _zz_26__string = "??????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_ENV_CTRL_string = "EBREAK"; + default : execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_27_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_27__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_27__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_27__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_27__string = "EBREAK"; + default : _zz_27__string = "??????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : writeBack_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : writeBack_ENV_CTRL_string = "EBREAK"; + default : writeBack_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(_zz_30_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_30__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_30__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_30__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_30__string = "EBREAK"; + default : _zz_30__string = "??????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_34_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_34__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_34__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_34__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_34__string = "JALR"; + default : _zz_34__string = "????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_38_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_38__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_38__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_38__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_38__string = "SRA_1 "; + default : _zz_38__string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_43_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_43__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_43__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_43__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_43__string = "PC "; + default : _zz_43__string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_45_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_45__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_45__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_45__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_45__string = "URS1 "; + default : _zz_45__string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_47_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_47__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_47__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_47__string = "BITWISE "; + default : _zz_47__string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : execute_ALU_BITWISE_CTRL_string = "SRC1 "; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_49_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_49__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_49__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_49__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_49__string = "SRC1 "; + default : _zz_49__string = "?????"; + endcase + end + always @(*) begin + case(_zz_56_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_56__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_56__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_56__string = "BITWISE "; + default : _zz_56__string = "????????"; + endcase + end + always @(*) begin + case(_zz_62_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_62__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_62__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_62__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_62__string = "SRA_1 "; + default : _zz_62__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_63_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_63__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_63__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_63__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_63__string = "PC "; + default : _zz_63__string = "???"; + endcase + end + always @(*) begin + case(_zz_64_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_64__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_64__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_64__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_64__string = "JALR"; + default : _zz_64__string = "????"; + endcase + end + always @(*) begin + case(_zz_66_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_66__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_66__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_66__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_66__string = "SRC1 "; + default : _zz_66__string = "?????"; + endcase + end + always @(*) begin + case(_zz_70_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_70__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_70__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_70__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_70__string = "EBREAK"; + default : _zz_70__string = "??????"; + endcase + end + always @(*) begin + case(_zz_71_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_71__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_71__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_71__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_71__string = "URS1 "; + default : _zz_71__string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_76_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_76__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_76__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_76__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_76__string = "JALR"; + default : _zz_76__string = "????"; + endcase + end + always @(*) begin + case(_zz_129_) + `Src1CtrlEnum_defaultEncoding_RS : _zz_129__string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : _zz_129__string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : _zz_129__string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : _zz_129__string = "URS1 "; + default : _zz_129__string = "????????????"; + endcase + end + always @(*) begin + case(_zz_130_) + `EnvCtrlEnum_defaultEncoding_NONE : _zz_130__string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : _zz_130__string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : _zz_130__string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : _zz_130__string = "EBREAK"; + default : _zz_130__string = "??????"; + endcase + end + always @(*) begin + case(_zz_131_) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : _zz_131__string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : _zz_131__string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : _zz_131__string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : _zz_131__string = "SRC1 "; + default : _zz_131__string = "?????"; + endcase + end + always @(*) begin + case(_zz_132_) + `BranchCtrlEnum_defaultEncoding_INC : _zz_132__string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : _zz_132__string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : _zz_132__string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : _zz_132__string = "JALR"; + default : _zz_132__string = "????"; + endcase + end + always @(*) begin + case(_zz_133_) + `Src2CtrlEnum_defaultEncoding_RS : _zz_133__string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : _zz_133__string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : _zz_133__string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : _zz_133__string = "PC "; + default : _zz_133__string = "???"; + endcase + end + always @(*) begin + case(_zz_134_) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : _zz_134__string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : _zz_134__string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : _zz_134__string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : _zz_134__string = "SRA_1 "; + default : _zz_134__string = "?????????"; + endcase + end + always @(*) begin + case(_zz_135_) + `AluCtrlEnum_defaultEncoding_ADD_SUB : _zz_135__string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : _zz_135__string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : _zz_135__string = "BITWISE "; + default : _zz_135__string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_defaultEncoding_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_defaultEncoding_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_defaultEncoding_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_defaultEncoding_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_defaultEncoding_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_defaultEncoding_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_defaultEncoding_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : decode_to_execute_ENV_CTRL_string = "EBREAK"; + default : decode_to_execute_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : execute_to_memory_ENV_CTRL_string = "EBREAK"; + default : execute_to_memory_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_defaultEncoding_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_defaultEncoding_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_defaultEncoding_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL "; + `EnvCtrlEnum_defaultEncoding_EBREAK : memory_to_writeBack_ENV_CTRL_string = "EBREAK"; + default : memory_to_writeBack_ENV_CTRL_string = "??????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + `AluBitwiseCtrlEnum_defaultEncoding_SRC1 : decode_to_execute_ALU_BITWISE_CTRL_string = "SRC1 "; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_defaultEncoding_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_defaultEncoding_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_defaultEncoding_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_defaultEncoding_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_defaultEncoding_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + `endif + + assign decode_SHIFT_CTRL = _zz_1_; + assign _zz_2_ = _zz_3_; + assign decode_SRC_LESS_UNSIGNED = _zz_67_; + assign decode_SRC_USE_SUB_LESS = _zz_57_; + assign decode_SRC2_CTRL = _zz_4_; + assign _zz_5_ = _zz_6_; + assign memory_PC = execute_to_memory_PC; + assign decode_ALU_BITWISE_CTRL = _zz_7_; + assign _zz_8_ = _zz_9_; + assign decode_PREDICTION_HAD_BRANCHED2 = _zz_36_; + assign decode_CSR_WRITE_OPCODE = _zz_29_; + assign decode_CSR_READ_OPCODE = _zz_28_; + assign decode_DO_EBREAK = _zz_25_; + assign _zz_10_ = _zz_11_; + assign _zz_12_ = _zz_13_; + assign decode_ENV_CTRL = _zz_14_; + assign _zz_15_ = _zz_16_; + assign decode_RS2_USE = _zz_61_; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_68_; + assign decode_MEMORY_ENABLE = _zz_60_; + assign decode_RS1_USE = _zz_65_; + assign memory_MEMORY_ADDRESS_LOW = execute_to_memory_MEMORY_ADDRESS_LOW; + assign execute_MEMORY_ADDRESS_LOW = _zz_74_; + assign decode_SRC1_CTRL = _zz_17_; + assign _zz_18_ = _zz_19_; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign decode_ALU_CTRL = _zz_20_; + assign _zz_21_ = _zz_22_; + assign _zz_23_ = _zz_24_; + assign decode_IS_CSR = _zz_55_; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign execute_REGFILE_WRITE_DATA = _zz_48_; + assign memory_MEMORY_READ_DATA = _zz_73_; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = _zz_79_; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_69_; + assign execute_RS2_USE = decode_to_execute_RS2_USE; + assign execute_RS1_USE = decode_to_execute_RS1_USE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_26_; + assign execute_ENV_CTRL = _zz_27_; + assign writeBack_ENV_CTRL = _zz_30_; + assign execute_IS_FENCEI = decode_to_execute_IS_FENCEI; + always @ (*) begin + _zz_31_ = decode_INSTRUCTION; + if(decode_IS_FENCEI)begin + _zz_31_[12] = 1'b0; + _zz_31_[22] = 1'b1; + end + end + + assign execute_BRANCH_CALC = _zz_32_; + assign execute_BRANCH_DO = _zz_33_; + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = _zz_54_; + assign execute_BRANCH_COND_RESULT = _zz_35_; + assign execute_BRANCH_CTRL = _zz_34_; + assign decode_IS_FENCEI = _zz_59_; + always @ (*) begin + _zz_37_ = execute_REGFILE_WRITE_DATA; + execute_arbitration_haltItself = 1'b0; + if(((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_ALIGNEMENT_FAULT)) && (! execute_DBusSimplePlugin_cmdSent)))begin + execute_arbitration_haltItself = 1'b1; + end + if(_zz_182_)begin + _zz_37_ = _zz_143_; + if(_zz_183_)begin + if(! execute_LightShifterPlugin_done) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + if((execute_arbitration_isValid && execute_IS_CSR))begin + _zz_37_ = execute_CsrPlugin_readData; + if(execute_CsrPlugin_blockedBySideEffects)begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_SHIFT_CTRL = _zz_38_; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_42_ = execute_PC; + assign execute_SRC2_CTRL = _zz_43_; + assign execute_SRC1_CTRL = _zz_45_; + assign execute_SRC_ADD_SUB = _zz_41_; + assign execute_SRC_LESS = _zz_39_; + assign execute_ALU_CTRL = _zz_47_; + assign execute_SRC2 = _zz_44_; + assign execute_SRC1 = _zz_46_; + assign execute_ALU_BITWISE_CTRL = _zz_49_; + assign _zz_50_ = writeBack_INSTRUCTION; + assign _zz_51_ = writeBack_REGFILE_WRITE_VALID; + always @ (*) begin + _zz_52_ = 1'b0; + if(writeBack_RegFilePlugin_regFileWrite_valid)begin + _zz_52_ = 1'b1; + end + end + + always @ (*) begin + decode_REGFILE_WRITE_VALID = _zz_58_; + if((decode_INSTRUCTION[11 : 7] == (5'b00000)))begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + always @ (*) begin + _zz_72_ = writeBack_REGFILE_WRITE_DATA; + if((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE))begin + _zz_72_ = writeBack_DBusSimplePlugin_rspFormated; + end + end + + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign writeBack_MEMORY_ADDRESS_LOW = memory_to_writeBack_MEMORY_ADDRESS_LOW; + assign writeBack_MEMORY_READ_DATA = memory_to_writeBack_MEMORY_READ_DATA; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_ALIGNEMENT_FAULT = execute_to_memory_ALIGNEMENT_FAULT; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_RS2 = _zz_53_; + assign execute_SRC_ADD = _zz_40_; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_ALIGNEMENT_FAULT = _zz_75_; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign decode_BRANCH_CTRL = _zz_76_; + always @ (*) begin + _zz_77_ = execute_FORMAL_PC_NEXT; + if(_zz_88_)begin + _zz_77_ = _zz_89_; + end + end + + always @ (*) begin + _zz_78_ = decode_FORMAL_PC_NEXT; + if(_zz_85_)begin + _zz_78_ = _zz_86_; + end + end + + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + assign decode_PC = _zz_81_; + always @ (*) begin + decode_INSTRUCTION = _zz_80_; + if((_zz_173_ != (3'b000)))begin + decode_INSTRUCTION = _zz_174_; + end + end + + always @ (*) begin + decode_arbitration_haltItself = 1'b0; + decode_arbitration_isValid = (IBusSimplePlugin_iBusRsp_decodeInput_valid && (! IBusSimplePlugin_injector_decodeRemoved)); + _zz_98_ = 1'b0; + case(_zz_173_) + 3'b000 : begin + end + 3'b001 : begin + end + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + decode_arbitration_haltItself = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b100 : begin + _zz_98_ = 1'b1; + end + default : begin + end + endcase + end + + always @ (*) begin + decode_arbitration_haltByOther = 1'b0; + if((CsrPlugin_interrupt && decode_arbitration_isValid))begin + decode_arbitration_haltByOther = 1'b1; + end + if(({(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET))} != (2'b00)))begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_removeIt = 1'b0; + if(decode_arbitration_isFlushed)begin + decode_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + decode_arbitration_flushAll = 1'b0; + execute_arbitration_removeIt = 1'b0; + if(_zz_88_)begin + decode_arbitration_flushAll = 1'b1; + end + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(execute_exception_agregat_valid)begin + decode_arbitration_flushAll = 1'b1; + execute_arbitration_removeIt = 1'b1; + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + if(execute_arbitration_isFlushed)begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_redoIt = 1'b0; + always @ (*) begin + execute_arbitration_haltByOther = 1'b0; + _zz_82_ = 1'b0; + _zz_83_ = 1'b0; + if(((execute_arbitration_isValid && execute_IS_FENCEI) && ({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00))))begin + execute_arbitration_haltByOther = 1'b1; + end + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode}}} != (4'b0000)))begin + _zz_82_ = 1'b1; + end + if((execute_arbitration_isValid && (_zz_165_ || _zz_166_)))begin + execute_arbitration_haltByOther = 1'b1; + end + if(_zz_184_)begin + execute_arbitration_haltByOther = 1'b1; + if(_zz_185_)begin + _zz_83_ = 1'b1; + _zz_82_ = 1'b1; + end + end + if(DebugPlugin_haltIt)begin + _zz_82_ = 1'b1; + end + if(_zz_186_)begin + _zz_82_ = 1'b1; + end + end + + always @ (*) begin + execute_arbitration_flushAll = 1'b0; + if(memory_exception_agregat_valid)begin + execute_arbitration_flushAll = 1'b1; + end + if(_zz_184_)begin + if(_zz_185_)begin + execute_arbitration_flushAll = 1'b1; + end + end + end + + assign execute_arbitration_redoIt = 1'b0; + always @ (*) begin + memory_arbitration_haltItself = 1'b0; + if((((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (! memory_INSTRUCTION[5])) && (! dBus_rsp_ready)))begin + memory_arbitration_haltItself = 1'b1; + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @ (*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_exception_agregat_valid)begin + memory_arbitration_removeIt = 1'b1; + end + if(memory_arbitration_isFlushed)begin + memory_arbitration_removeIt = 1'b1; + end + end + + always @ (*) begin + memory_arbitration_flushAll = 1'b0; + _zz_91_ = 1'b0; + _zz_92_ = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + if(_zz_187_)begin + _zz_91_ = 1'b1; + _zz_92_ = {CsrPlugin_mtvec_base,(2'b00)}; + memory_arbitration_flushAll = 1'b1; + end + if(_zz_188_)begin + _zz_92_ = CsrPlugin_mepc; + _zz_91_ = 1'b1; + memory_arbitration_flushAll = 1'b1; + end + end + + assign memory_arbitration_redoIt = 1'b0; + assign writeBack_arbitration_haltItself = 1'b0; + assign writeBack_arbitration_haltByOther = 1'b0; + always @ (*) begin + writeBack_arbitration_removeIt = 1'b0; + if(writeBack_arbitration_isFlushed)begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_flushAll = 1'b0; + assign writeBack_arbitration_redoIt = 1'b0; + always @ (*) begin + _zz_84_ = 1'b0; + if(IBusSimplePlugin_iBusRsp_stages_1_input_valid)begin + _zz_84_ = 1'b1; + end + end + + always @ (*) begin + _zz_95_ = 1'b1; + if((DebugPlugin_haltIt || DebugPlugin_stepIt))begin + _zz_95_ = 1'b0; + end + end + + always @ (*) begin + _zz_96_ = 1'b1; + if(DebugPlugin_haltIt)begin + _zz_96_ = 1'b0; + end + end + + assign IBusSimplePlugin_jump_pcLoad_valid = ({_zz_91_,{_zz_88_,_zz_85_}} != (3'b000)); + assign _zz_99_ = {_zz_85_,{_zz_88_,_zz_91_}}; + assign _zz_100_ = (_zz_99_ & (~ _zz_195_)); + assign _zz_101_ = _zz_100_[1]; + assign _zz_102_ = _zz_100_[2]; + assign IBusSimplePlugin_jump_pcLoad_payload = _zz_181_; + assign _zz_103_ = (! _zz_82_); + assign IBusSimplePlugin_fetchPc_output_valid = (IBusSimplePlugin_fetchPc_preOutput_valid && _zz_103_); + assign IBusSimplePlugin_fetchPc_preOutput_ready = (IBusSimplePlugin_fetchPc_output_ready && _zz_103_); + assign IBusSimplePlugin_fetchPc_output_payload = IBusSimplePlugin_fetchPc_preOutput_payload; + always @ (*) begin + IBusSimplePlugin_fetchPc_propagatePc = 1'b0; + if((IBusSimplePlugin_iBusRsp_stages_1_input_valid && IBusSimplePlugin_iBusRsp_stages_1_input_ready))begin + IBusSimplePlugin_fetchPc_propagatePc = 1'b1; + end + end + + always @ (*) begin + IBusSimplePlugin_fetchPc_pc = (IBusSimplePlugin_fetchPc_pcReg + _zz_197_); + IBusSimplePlugin_fetchPc_samplePcNext = 1'b0; + if(IBusSimplePlugin_fetchPc_propagatePc)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + IBusSimplePlugin_fetchPc_pc = IBusSimplePlugin_jump_pcLoad_payload; + end + if(_zz_189_)begin + IBusSimplePlugin_fetchPc_samplePcNext = 1'b1; + end + IBusSimplePlugin_fetchPc_pc[0] = 1'b0; + IBusSimplePlugin_fetchPc_pc[1] = 1'b0; + end + + assign IBusSimplePlugin_fetchPc_preOutput_valid = _zz_104_; + assign IBusSimplePlugin_fetchPc_preOutput_payload = IBusSimplePlugin_fetchPc_pc; + assign IBusSimplePlugin_iBusRsp_stages_0_input_valid = IBusSimplePlugin_fetchPc_output_valid; + assign IBusSimplePlugin_fetchPc_output_ready = IBusSimplePlugin_iBusRsp_stages_0_input_ready; + assign IBusSimplePlugin_iBusRsp_stages_0_input_payload = IBusSimplePlugin_fetchPc_output_payload; + assign IBusSimplePlugin_iBusRsp_stages_0_inputSample = 1'b1; + always @ (*) begin + IBusSimplePlugin_iBusRsp_stages_0_halt = 1'b0; + if((IBusSimplePlugin_iBusRsp_stages_0_input_valid && ((! IBusSimplePlugin_cmd_valid) || (! IBusSimplePlugin_cmd_ready))))begin + IBusSimplePlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_105_ = (! IBusSimplePlugin_iBusRsp_stages_0_halt); + assign IBusSimplePlugin_iBusRsp_stages_0_input_ready = (IBusSimplePlugin_iBusRsp_stages_0_output_ready && _zz_105_); + assign IBusSimplePlugin_iBusRsp_stages_0_output_valid = (IBusSimplePlugin_iBusRsp_stages_0_input_valid && _zz_105_); + assign IBusSimplePlugin_iBusRsp_stages_0_output_payload = IBusSimplePlugin_iBusRsp_stages_0_input_payload; + assign IBusSimplePlugin_iBusRsp_stages_1_halt = 1'b0; + assign _zz_106_ = (! IBusSimplePlugin_iBusRsp_stages_1_halt); + assign IBusSimplePlugin_iBusRsp_stages_1_input_ready = (IBusSimplePlugin_iBusRsp_stages_1_output_ready && _zz_106_); + assign IBusSimplePlugin_iBusRsp_stages_1_output_valid = (IBusSimplePlugin_iBusRsp_stages_1_input_valid && _zz_106_); + assign IBusSimplePlugin_iBusRsp_stages_1_output_payload = IBusSimplePlugin_iBusRsp_stages_1_input_payload; + assign IBusSimplePlugin_iBusRsp_stages_0_output_ready = _zz_107_; + assign _zz_107_ = ((1'b0 && (! _zz_108_)) || IBusSimplePlugin_iBusRsp_stages_1_input_ready); + assign _zz_108_ = _zz_109_; + assign IBusSimplePlugin_iBusRsp_stages_1_input_valid = _zz_108_; + assign IBusSimplePlugin_iBusRsp_stages_1_input_payload = IBusSimplePlugin_fetchPc_pcReg; + assign IBusSimplePlugin_iBusRsp_readyForError = 1'b1; + assign IBusSimplePlugin_iBusRsp_decodeInput_ready = (! decode_arbitration_isStuck); + assign _zz_81_ = IBusSimplePlugin_iBusRsp_decodeInput_payload_pc; + assign _zz_80_ = IBusSimplePlugin_iBusRsp_decodeInput_payload_rsp_inst; + assign _zz_79_ = (decode_PC + (32'b00000000000000000000000000000100)); + assign _zz_110_ = _zz_198_[11]; + always @ (*) begin + _zz_111_[18] = _zz_110_; + _zz_111_[17] = _zz_110_; + _zz_111_[16] = _zz_110_; + _zz_111_[15] = _zz_110_; + _zz_111_[14] = _zz_110_; + _zz_111_[13] = _zz_110_; + _zz_111_[12] = _zz_110_; + _zz_111_[11] = _zz_110_; + _zz_111_[10] = _zz_110_; + _zz_111_[9] = _zz_110_; + _zz_111_[8] = _zz_110_; + _zz_111_[7] = _zz_110_; + _zz_111_[6] = _zz_110_; + _zz_111_[5] = _zz_110_; + _zz_111_[4] = _zz_110_; + _zz_111_[3] = _zz_110_; + _zz_111_[2] = _zz_110_; + _zz_111_[1] = _zz_110_; + _zz_111_[0] = _zz_110_; + end + + assign _zz_87_ = ((decode_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_B) && _zz_199_[31])); + assign _zz_85_ = (_zz_87_ && decode_arbitration_isFiring); + assign _zz_112_ = _zz_200_[19]; + always @ (*) begin + _zz_113_[10] = _zz_112_; + _zz_113_[9] = _zz_112_; + _zz_113_[8] = _zz_112_; + _zz_113_[7] = _zz_112_; + _zz_113_[6] = _zz_112_; + _zz_113_[5] = _zz_112_; + _zz_113_[4] = _zz_112_; + _zz_113_[3] = _zz_112_; + _zz_113_[2] = _zz_112_; + _zz_113_[1] = _zz_112_; + _zz_113_[0] = _zz_112_; + end + + assign _zz_114_ = _zz_201_[11]; + always @ (*) begin + _zz_115_[18] = _zz_114_; + _zz_115_[17] = _zz_114_; + _zz_115_[16] = _zz_114_; + _zz_115_[15] = _zz_114_; + _zz_115_[14] = _zz_114_; + _zz_115_[13] = _zz_114_; + _zz_115_[12] = _zz_114_; + _zz_115_[11] = _zz_114_; + _zz_115_[10] = _zz_114_; + _zz_115_[9] = _zz_114_; + _zz_115_[8] = _zz_114_; + _zz_115_[7] = _zz_114_; + _zz_115_[6] = _zz_114_; + _zz_115_[5] = _zz_114_; + _zz_115_[4] = _zz_114_; + _zz_115_[3] = _zz_114_; + _zz_115_[2] = _zz_114_; + _zz_115_[1] = _zz_114_; + _zz_115_[0] = _zz_114_; + end + + assign _zz_86_ = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JAL) ? {{_zz_113_,{{{_zz_267_,_zz_268_},_zz_269_},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_115_,{{{_zz_270_,_zz_271_},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusSimplePlugin_cmd_valid; + assign IBusSimplePlugin_cmd_ready = iBus_cmd_ready; + assign iBus_cmd_payload_pc = IBusSimplePlugin_cmd_payload_pc; + assign IBusSimplePlugin_pendingCmdNext = (_zz_202_ - _zz_206_); + assign IBusSimplePlugin_cmd_valid = ((IBusSimplePlugin_iBusRsp_stages_0_input_valid && IBusSimplePlugin_iBusRsp_stages_0_output_ready) && (IBusSimplePlugin_pendingCmd != (2'b11))); + assign IBusSimplePlugin_cmd_payload_pc = {IBusSimplePlugin_iBusRsp_stages_0_input_payload[31 : 2],(2'b00)}; + assign iBus_rsp_takeWhen_valid = (iBus_rsp_valid && (! (IBusSimplePlugin_rspJoin_discardCounter != (2'b00)))); + assign iBus_rsp_takeWhen_payload_error = iBus_rsp_payload_error; + assign iBus_rsp_takeWhen_payload_inst = iBus_rsp_payload_inst; + assign _zz_178_ = (IBusSimplePlugin_jump_pcLoad_valid || _zz_83_); + assign IBusSimplePlugin_rspJoin_rspBufferOutput_valid = IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_valid; + assign IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error = IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_payload_error; + assign IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst = IBusSimplePlugin_rspJoin_rspBuffer_c_io_pop_payload_inst; + assign IBusSimplePlugin_rspJoin_fetchRsp_pc = IBusSimplePlugin_iBusRsp_stages_1_output_payload; + always @ (*) begin + IBusSimplePlugin_rspJoin_fetchRsp_rsp_error = IBusSimplePlugin_rspJoin_rspBufferOutput_payload_error; + if((! IBusSimplePlugin_rspJoin_rspBufferOutput_valid))begin + IBusSimplePlugin_rspJoin_fetchRsp_rsp_error = 1'b0; + end + end + + assign IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst = IBusSimplePlugin_rspJoin_rspBufferOutput_payload_inst; + assign IBusSimplePlugin_rspJoin_issueDetected = 1'b0; + assign IBusSimplePlugin_rspJoin_join_valid = (IBusSimplePlugin_iBusRsp_stages_1_output_valid && IBusSimplePlugin_rspJoin_rspBufferOutput_valid); + assign IBusSimplePlugin_rspJoin_join_payload_pc = IBusSimplePlugin_rspJoin_fetchRsp_pc; + assign IBusSimplePlugin_rspJoin_join_payload_rsp_error = IBusSimplePlugin_rspJoin_fetchRsp_rsp_error; + assign IBusSimplePlugin_rspJoin_join_payload_rsp_inst = IBusSimplePlugin_rspJoin_fetchRsp_rsp_inst; + assign IBusSimplePlugin_rspJoin_join_payload_isRvc = IBusSimplePlugin_rspJoin_fetchRsp_isRvc; + assign IBusSimplePlugin_iBusRsp_stages_1_output_ready = (IBusSimplePlugin_iBusRsp_stages_1_output_valid ? (IBusSimplePlugin_rspJoin_join_valid && IBusSimplePlugin_rspJoin_join_ready) : IBusSimplePlugin_rspJoin_join_ready); + assign IBusSimplePlugin_rspJoin_rspBufferOutput_ready = (IBusSimplePlugin_rspJoin_join_valid && IBusSimplePlugin_rspJoin_join_ready); + assign _zz_116_ = (! IBusSimplePlugin_rspJoin_issueDetected); + assign IBusSimplePlugin_rspJoin_join_ready = (IBusSimplePlugin_iBusRsp_decodeInput_ready && _zz_116_); + assign IBusSimplePlugin_iBusRsp_decodeInput_valid = (IBusSimplePlugin_rspJoin_join_valid && _zz_116_); + assign IBusSimplePlugin_iBusRsp_decodeInput_payload_pc = IBusSimplePlugin_rspJoin_join_payload_pc; + assign IBusSimplePlugin_iBusRsp_decodeInput_payload_rsp_error = IBusSimplePlugin_rspJoin_join_payload_rsp_error; + assign IBusSimplePlugin_iBusRsp_decodeInput_payload_rsp_inst = IBusSimplePlugin_rspJoin_join_payload_rsp_inst; + assign IBusSimplePlugin_iBusRsp_decodeInput_payload_isRvc = IBusSimplePlugin_rspJoin_join_payload_isRvc; + assign execute_DBusSimplePlugin_cmdSent = 1'b0; + assign _zz_75_ = (((dBus_cmd_payload_size == (2'b10)) && (dBus_cmd_payload_address[1 : 0] != (2'b00))) || ((dBus_cmd_payload_size == (2'b01)) && (dBus_cmd_payload_address[0 : 0] != (1'b0)))); + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_ALIGNEMENT_FAULT)) && (! execute_DBusSimplePlugin_cmdSent)); + assign dBus_cmd_payload_wr = execute_INSTRUCTION[5]; + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_117_ = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_117_ = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_117_ = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_117_; + assign _zz_74_ = dBus_cmd_payload_address[1 : 0]; + always @ (*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_118_ = (4'b0001); + end + 2'b01 : begin + _zz_118_ = (4'b0011); + end + default : begin + _zz_118_ = (4'b1111); + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_118_ <<< dBus_cmd_payload_address[1 : 0]); + assign _zz_73_ = dBus_rsp_data; + assign memory_exception_agregat_payload_code = {1'd0, _zz_211_}; + always @ (*) begin + memory_exception_agregat_valid = memory_ALIGNEMENT_FAULT; + if((! ((memory_arbitration_isValid && memory_MEMORY_ENABLE) && 1'b1)))begin + memory_exception_agregat_valid = 1'b0; + end + end + + assign memory_exception_agregat_payload_badAddr = memory_REGFILE_WRITE_DATA; + always @ (*) begin + writeBack_DBusSimplePlugin_rspShifted = writeBack_MEMORY_READ_DATA; + case(writeBack_MEMORY_ADDRESS_LOW) + 2'b01 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + writeBack_DBusSimplePlugin_rspShifted[15 : 0] = writeBack_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign _zz_119_ = (writeBack_DBusSimplePlugin_rspShifted[7] && (! writeBack_INSTRUCTION[14])); + always @ (*) begin + _zz_120_[31] = _zz_119_; + _zz_120_[30] = _zz_119_; + _zz_120_[29] = _zz_119_; + _zz_120_[28] = _zz_119_; + _zz_120_[27] = _zz_119_; + _zz_120_[26] = _zz_119_; + _zz_120_[25] = _zz_119_; + _zz_120_[24] = _zz_119_; + _zz_120_[23] = _zz_119_; + _zz_120_[22] = _zz_119_; + _zz_120_[21] = _zz_119_; + _zz_120_[20] = _zz_119_; + _zz_120_[19] = _zz_119_; + _zz_120_[18] = _zz_119_; + _zz_120_[17] = _zz_119_; + _zz_120_[16] = _zz_119_; + _zz_120_[15] = _zz_119_; + _zz_120_[14] = _zz_119_; + _zz_120_[13] = _zz_119_; + _zz_120_[12] = _zz_119_; + _zz_120_[11] = _zz_119_; + _zz_120_[10] = _zz_119_; + _zz_120_[9] = _zz_119_; + _zz_120_[8] = _zz_119_; + _zz_120_[7 : 0] = writeBack_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_121_ = (writeBack_DBusSimplePlugin_rspShifted[15] && (! writeBack_INSTRUCTION[14])); + always @ (*) begin + _zz_122_[31] = _zz_121_; + _zz_122_[30] = _zz_121_; + _zz_122_[29] = _zz_121_; + _zz_122_[28] = _zz_121_; + _zz_122_[27] = _zz_121_; + _zz_122_[26] = _zz_121_; + _zz_122_[25] = _zz_121_; + _zz_122_[24] = _zz_121_; + _zz_122_[23] = _zz_121_; + _zz_122_[22] = _zz_121_; + _zz_122_[21] = _zz_121_; + _zz_122_[20] = _zz_121_; + _zz_122_[19] = _zz_121_; + _zz_122_[18] = _zz_121_; + _zz_122_[17] = _zz_121_; + _zz_122_[16] = _zz_121_; + _zz_122_[15 : 0] = writeBack_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @ (*) begin + case(_zz_192_) + 2'b00 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_120_; + end + 2'b01 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_122_; + end + default : begin + writeBack_DBusSimplePlugin_rspFormated = writeBack_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign _zz_124_ = ((decode_INSTRUCTION & (32'b00000000000000000100000001010000)) == (32'b00000000000000000100000001010000)); + assign _zz_125_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000010100)) == (32'b00000000000000000000000000000100)); + assign _zz_126_ = ((decode_INSTRUCTION & (32'b00010000000100000011000001010000)) == (32'b00000000000100000000000001010000)); + assign _zz_127_ = ((decode_INSTRUCTION & (32'b00000000000000000000000000000100)) == (32'b00000000000000000000000000000100)); + assign _zz_128_ = ((decode_INSTRUCTION & (32'b00000000000000000000000001010000)) == (32'b00000000000000000000000000010000)); + assign _zz_123_ = {({(_zz_272_ == _zz_273_),(_zz_274_ == _zz_275_)} != (2'b00)),{({_zz_276_,{_zz_277_,_zz_278_}} != (3'b000)),{(_zz_279_ != (1'b0)),{(_zz_280_ != _zz_281_),{_zz_282_,{_zz_283_,_zz_284_}}}}}}; + assign _zz_129_ = _zz_123_[1 : 0]; + assign _zz_71_ = _zz_129_; + assign _zz_130_ = _zz_123_[3 : 2]; + assign _zz_70_ = _zz_130_; + assign _zz_69_ = _zz_212_[0]; + assign _zz_68_ = _zz_213_[0]; + assign _zz_67_ = _zz_214_[0]; + assign _zz_131_ = _zz_123_[8 : 7]; + assign _zz_66_ = _zz_131_; + assign _zz_65_ = _zz_215_[0]; + assign _zz_132_ = _zz_123_[12 : 11]; + assign _zz_64_ = _zz_132_; + assign _zz_133_ = _zz_123_[14 : 13]; + assign _zz_63_ = _zz_133_; + assign _zz_134_ = _zz_123_[16 : 15]; + assign _zz_62_ = _zz_134_; + assign _zz_61_ = _zz_216_[0]; + assign _zz_60_ = _zz_217_[0]; + assign _zz_59_ = _zz_218_[0]; + assign _zz_58_ = _zz_219_[0]; + assign _zz_57_ = _zz_220_[0]; + assign _zz_135_ = _zz_123_[24 : 23]; + assign _zz_56_ = _zz_135_; + assign _zz_55_ = _zz_221_[0]; + assign execute_RegFilePlugin_srcInstruction = (execute_arbitration_isStuck ? execute_INSTRUCTION : decode_INSTRUCTION); + assign execute_RegFilePlugin_regFileReadAddress1 = execute_RegFilePlugin_srcInstruction[19 : 15]; + assign execute_RegFilePlugin_regFileReadAddress2 = execute_RegFilePlugin_srcInstruction[24 : 20]; + assign execute_RegFilePlugin_rs1Data = _zz_179_; + assign execute_RegFilePlugin_rs2Data = _zz_180_; + assign _zz_54_ = execute_RegFilePlugin_rs1Data; + assign _zz_53_ = execute_RegFilePlugin_rs2Data; + assign writeBack_RegFilePlugin_regFileWrite_valid = (_zz_51_ && writeBack_arbitration_isFiring); + assign writeBack_RegFilePlugin_regFileWrite_payload_address = _zz_50_[11 : 7]; + assign writeBack_RegFilePlugin_regFileWrite_payload_data = _zz_72_; + always @ (*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_defaultEncoding_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + `AluBitwiseCtrlEnum_defaultEncoding_XOR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = execute_SRC1; + end + endcase + end + + always @ (*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_defaultEncoding_BITWISE : begin + _zz_136_ = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_defaultEncoding_SLT_SLTU : begin + _zz_136_ = {31'd0, _zz_222_}; + end + default : begin + _zz_136_ = execute_SRC_ADD_SUB; + end + endcase + end + + assign _zz_48_ = _zz_136_; + always @ (*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_defaultEncoding_RS : begin + _zz_137_ = execute_RS1; + end + `Src1CtrlEnum_defaultEncoding_PC_INCREMENT : begin + _zz_137_ = {29'd0, _zz_223_}; + end + `Src1CtrlEnum_defaultEncoding_IMU : begin + _zz_137_ = {execute_INSTRUCTION[31 : 12],(12'b000000000000)}; + end + default : begin + _zz_137_ = {27'd0, _zz_224_}; + end + endcase + end + + assign _zz_46_ = _zz_137_; + assign _zz_138_ = _zz_225_[11]; + always @ (*) begin + _zz_139_[19] = _zz_138_; + _zz_139_[18] = _zz_138_; + _zz_139_[17] = _zz_138_; + _zz_139_[16] = _zz_138_; + _zz_139_[15] = _zz_138_; + _zz_139_[14] = _zz_138_; + _zz_139_[13] = _zz_138_; + _zz_139_[12] = _zz_138_; + _zz_139_[11] = _zz_138_; + _zz_139_[10] = _zz_138_; + _zz_139_[9] = _zz_138_; + _zz_139_[8] = _zz_138_; + _zz_139_[7] = _zz_138_; + _zz_139_[6] = _zz_138_; + _zz_139_[5] = _zz_138_; + _zz_139_[4] = _zz_138_; + _zz_139_[3] = _zz_138_; + _zz_139_[2] = _zz_138_; + _zz_139_[1] = _zz_138_; + _zz_139_[0] = _zz_138_; + end + + assign _zz_140_ = _zz_226_[11]; + always @ (*) begin + _zz_141_[19] = _zz_140_; + _zz_141_[18] = _zz_140_; + _zz_141_[17] = _zz_140_; + _zz_141_[16] = _zz_140_; + _zz_141_[15] = _zz_140_; + _zz_141_[14] = _zz_140_; + _zz_141_[13] = _zz_140_; + _zz_141_[12] = _zz_140_; + _zz_141_[11] = _zz_140_; + _zz_141_[10] = _zz_140_; + _zz_141_[9] = _zz_140_; + _zz_141_[8] = _zz_140_; + _zz_141_[7] = _zz_140_; + _zz_141_[6] = _zz_140_; + _zz_141_[5] = _zz_140_; + _zz_141_[4] = _zz_140_; + _zz_141_[3] = _zz_140_; + _zz_141_[2] = _zz_140_; + _zz_141_[1] = _zz_140_; + _zz_141_[0] = _zz_140_; + end + + always @ (*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_defaultEncoding_RS : begin + _zz_142_ = execute_RS2; + end + `Src2CtrlEnum_defaultEncoding_IMI : begin + _zz_142_ = {_zz_139_,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_defaultEncoding_IMS : begin + _zz_142_ = {_zz_141_,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_142_ = _zz_42_; + end + endcase + end + + assign _zz_44_ = _zz_142_; + assign execute_SrcPlugin_addSub = _zz_227_; + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign _zz_41_ = execute_SrcPlugin_addSub; + assign _zz_40_ = execute_SrcPlugin_addSub; + assign _zz_39_ = execute_SrcPlugin_less; + assign execute_LightShifterPlugin_isShift = (execute_SHIFT_CTRL != `ShiftCtrlEnum_defaultEncoding_DISABLE_1); + assign execute_LightShifterPlugin_amplitude = (execute_LightShifterPlugin_isActive ? execute_LightShifterPlugin_amplitudeReg : execute_SRC2[4 : 0]); + assign execute_LightShifterPlugin_shiftInput = (execute_LightShifterPlugin_isActive ? memory_REGFILE_WRITE_DATA : execute_SRC1); + assign execute_LightShifterPlugin_done = (execute_LightShifterPlugin_amplitude[4 : 1] == (4'b0000)); + always @ (*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_defaultEncoding_SLL_1 : begin + _zz_143_ = (execute_LightShifterPlugin_shiftInput <<< 1); + end + default : begin + _zz_143_ = _zz_235_; + end + endcase + end + + assign _zz_36_ = (_zz_87_ && (! decode_IS_FENCEI)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign _zz_144_ = execute_INSTRUCTION[14 : 12]; + always @ (*) begin + if((_zz_144_ == (3'b000))) begin + _zz_145_ = execute_BranchPlugin_eq; + end else if((_zz_144_ == (3'b001))) begin + _zz_145_ = (! execute_BranchPlugin_eq); + end else if((((_zz_144_ & (3'b101)) == (3'b101)))) begin + _zz_145_ = (! execute_SRC_LESS); + end else begin + _zz_145_ = execute_SRC_LESS; + end + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_INC : begin + _zz_146_ = 1'b0; + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_146_ = 1'b1; + end + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_146_ = 1'b1; + end + default : begin + _zz_146_ = _zz_145_; + end + endcase + end + + assign _zz_35_ = _zz_146_; + assign _zz_147_ = _zz_237_[11]; + always @ (*) begin + _zz_148_[19] = _zz_147_; + _zz_148_[18] = _zz_147_; + _zz_148_[17] = _zz_147_; + _zz_148_[16] = _zz_147_; + _zz_148_[15] = _zz_147_; + _zz_148_[14] = _zz_147_; + _zz_148_[13] = _zz_147_; + _zz_148_[12] = _zz_147_; + _zz_148_[11] = _zz_147_; + _zz_148_[10] = _zz_147_; + _zz_148_[9] = _zz_147_; + _zz_148_[8] = _zz_147_; + _zz_148_[7] = _zz_147_; + _zz_148_[6] = _zz_147_; + _zz_148_[5] = _zz_147_; + _zz_148_[4] = _zz_147_; + _zz_148_[3] = _zz_147_; + _zz_148_[2] = _zz_147_; + _zz_148_[1] = _zz_147_; + _zz_148_[0] = _zz_147_; + end + + assign _zz_149_ = _zz_238_[19]; + always @ (*) begin + _zz_150_[10] = _zz_149_; + _zz_150_[9] = _zz_149_; + _zz_150_[8] = _zz_149_; + _zz_150_[7] = _zz_149_; + _zz_150_[6] = _zz_149_; + _zz_150_[5] = _zz_149_; + _zz_150_[4] = _zz_149_; + _zz_150_[3] = _zz_149_; + _zz_150_[2] = _zz_149_; + _zz_150_[1] = _zz_149_; + _zz_150_[0] = _zz_149_; + end + + assign _zz_151_ = _zz_239_[11]; + always @ (*) begin + _zz_152_[18] = _zz_151_; + _zz_152_[17] = _zz_151_; + _zz_152_[16] = _zz_151_; + _zz_152_[15] = _zz_151_; + _zz_152_[14] = _zz_151_; + _zz_152_[13] = _zz_151_; + _zz_152_[12] = _zz_151_; + _zz_152_[11] = _zz_151_; + _zz_152_[10] = _zz_151_; + _zz_152_[9] = _zz_151_; + _zz_152_[8] = _zz_151_; + _zz_152_[7] = _zz_151_; + _zz_152_[6] = _zz_151_; + _zz_152_[5] = _zz_151_; + _zz_152_[4] = _zz_151_; + _zz_152_[3] = _zz_151_; + _zz_152_[2] = _zz_151_; + _zz_152_[1] = _zz_151_; + _zz_152_[0] = _zz_151_; + end + + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JALR : begin + _zz_153_ = (_zz_240_[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_defaultEncoding_JAL : begin + _zz_153_ = _zz_241_[1]; + end + default : begin + _zz_153_ = _zz_242_[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_153_); + assign _zz_33_ = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + always @ (*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_defaultEncoding_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + execute_BranchPlugin_branch_src2 = {_zz_155_,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_defaultEncoding_JAL) ? {{_zz_157_,{{{_zz_388_,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_159_,{{{_zz_389_,_zz_390_},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if((execute_PREDICTION_HAD_BRANCHED2 && (! execute_BranchPlugin_missAlignedTarget)))begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_246_}; + end + end + endcase + end + + assign _zz_154_ = _zz_243_[11]; + always @ (*) begin + _zz_155_[19] = _zz_154_; + _zz_155_[18] = _zz_154_; + _zz_155_[17] = _zz_154_; + _zz_155_[16] = _zz_154_; + _zz_155_[15] = _zz_154_; + _zz_155_[14] = _zz_154_; + _zz_155_[13] = _zz_154_; + _zz_155_[12] = _zz_154_; + _zz_155_[11] = _zz_154_; + _zz_155_[10] = _zz_154_; + _zz_155_[9] = _zz_154_; + _zz_155_[8] = _zz_154_; + _zz_155_[7] = _zz_154_; + _zz_155_[6] = _zz_154_; + _zz_155_[5] = _zz_154_; + _zz_155_[4] = _zz_154_; + _zz_155_[3] = _zz_154_; + _zz_155_[2] = _zz_154_; + _zz_155_[1] = _zz_154_; + _zz_155_[0] = _zz_154_; + end + + assign _zz_156_ = _zz_244_[19]; + always @ (*) begin + _zz_157_[10] = _zz_156_; + _zz_157_[9] = _zz_156_; + _zz_157_[8] = _zz_156_; + _zz_157_[7] = _zz_156_; + _zz_157_[6] = _zz_156_; + _zz_157_[5] = _zz_156_; + _zz_157_[4] = _zz_156_; + _zz_157_[3] = _zz_156_; + _zz_157_[2] = _zz_156_; + _zz_157_[1] = _zz_156_; + _zz_157_[0] = _zz_156_; + end + + assign _zz_158_ = _zz_245_[11]; + always @ (*) begin + _zz_159_[18] = _zz_158_; + _zz_159_[17] = _zz_158_; + _zz_159_[16] = _zz_158_; + _zz_159_[15] = _zz_158_; + _zz_159_[14] = _zz_158_; + _zz_159_[13] = _zz_158_; + _zz_159_[12] = _zz_158_; + _zz_159_[11] = _zz_158_; + _zz_159_[10] = _zz_158_; + _zz_159_[9] = _zz_158_; + _zz_159_[8] = _zz_158_; + _zz_159_[7] = _zz_158_; + _zz_159_[6] = _zz_158_; + _zz_159_[5] = _zz_158_; + _zz_159_[4] = _zz_158_; + _zz_159_[3] = _zz_158_; + _zz_159_[2] = _zz_158_; + _zz_159_[1] = _zz_158_; + _zz_159_[0] = _zz_158_; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign _zz_32_ = {execute_BranchPlugin_branchAdder[31 : 1],(1'b0)}; + assign _zz_88_ = ((execute_arbitration_isValid && (! execute_arbitration_isStuckByOthers)) && execute_BRANCH_DO); + assign _zz_89_ = execute_BRANCH_CALC; + always @ (*) begin + _zz_90_ = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(execute_arbitration_isStuckByOthers)begin + _zz_90_ = 1'b0; + end + end + + assign CsrPlugin_misa_base = (2'b01); + assign CsrPlugin_misa_extensions = (26'b00000000000000000000000000); + assign CsrPlugin_medeleg = (32'b00000000000000000000000000000000); + assign CsrPlugin_mideleg = (32'b00000000000000000000000000000000); + assign _zz_160_ = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_161_ = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_162_ = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode = 1'b0; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = (2'b11); + assign execute_exception_agregat_valid = ({_zz_93_,_zz_90_} != (2'b00)); + assign _zz_163_ = {_zz_93_,_zz_90_}; + assign _zz_164_ = _zz_247_[0]; + assign execute_exception_agregat_payload_code = (_zz_164_ ? (4'b0000) : _zz_94_); + assign execute_exception_agregat_payload_badAddr = (_zz_164_ ? execute_BRANCH_CALC : (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx)); + assign CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + always @ (*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_exception_agregat_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b1; + end + if(memory_arbitration_isFlushed)begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + assign CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + always @ (*) begin + CsrPlugin_interrupt = 1'b0; + CsrPlugin_interruptCode = (4'bxxxx); + if(CsrPlugin_mstatus_MIE)begin + if(({_zz_162_,{_zz_161_,_zz_160_}} != (3'b000)))begin + CsrPlugin_interrupt = 1'b1; + end + if(_zz_160_)begin + CsrPlugin_interruptCode = (4'b0111); + end + if(_zz_161_)begin + CsrPlugin_interruptCode = (4'b0011); + end + if(_zz_162_)begin + CsrPlugin_interruptCode = (4'b1011); + end + end + if((! _zz_95_))begin + CsrPlugin_interrupt = 1'b0; + end + end + + assign CsrPlugin_interruptTargetPrivilege = (2'b11); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && _zz_96_); + assign CsrPlugin_lastStageWasWfi = 1'b0; + always @ (*) begin + CsrPlugin_pipelineLiberator_done = ((! ({writeBack_arbitration_isValid,{memory_arbitration_isValid,execute_arbitration_isValid}} != (3'b000))) && IBusSimplePlugin_injector_nextPcCalc_valids_3); + if(({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != (3'b000)))begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException)begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign CsrPlugin_interruptJump = (CsrPlugin_interrupt && CsrPlugin_pipelineLiberator_done); + always @ (*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interruptTargetPrivilege; + if(CsrPlugin_hadException)begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @ (*) begin + CsrPlugin_trapCause = CsrPlugin_interruptCode; + if(CsrPlugin_hadException)begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + assign contextSwitching = _zz_91_; + assign _zz_29_ = (! (((decode_INSTRUCTION[14 : 13] == (2'b01)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))) || ((decode_INSTRUCTION[14 : 13] == (2'b11)) && (decode_INSTRUCTION[19 : 15] == (5'b00000))))); + assign _zz_28_ = (decode_INSTRUCTION[13 : 7] != (7'b0100000)); + assign execute_CsrPlugin_blockedBySideEffects = ({writeBack_arbitration_isValid,memory_arbitration_isValid} != (2'b00)); + always @ (*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + execute_CsrPlugin_readData = (32'b00000000000000000000000000000000); + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = _zz_170_; + end + 12'b001100000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[12 : 11] = CsrPlugin_mstatus_MPP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mstatus_MPIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mstatus_MIE; + end + 12'b001101000001 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mepc; + end + 12'b001100000101 : begin + if(execute_CSR_WRITE_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + 12'b001101000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mip_MEIP; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mip_MTIP; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mip_MSIP; + end + 12'b001101000011 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mtval; + end + 12'b111111000000 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 0] = _zz_171_; + end + 12'b001101000000 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[31 : 0] = CsrPlugin_mscratch; + end + 12'b001100000100 : begin + execute_CsrPlugin_illegalAccess = 1'b0; + execute_CsrPlugin_readData[11 : 11] = CsrPlugin_mie_MEIE; + execute_CsrPlugin_readData[7 : 7] = CsrPlugin_mie_MTIE; + execute_CsrPlugin_readData[3 : 3] = CsrPlugin_mie_MSIE; + end + 12'b001101000010 : begin + if(execute_CSR_READ_OPCODE)begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + execute_CsrPlugin_readData[31 : 31] = CsrPlugin_mcause_interrupt; + execute_CsrPlugin_readData[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + default : begin + end + endcase + if((CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]))begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(((! execute_arbitration_isValid) || (! execute_IS_CSR)))begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @ (*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_XRET)))begin + if((execute_INSTRUCTION[29 : 28] != CsrPlugin_privilege))begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @ (*) begin + _zz_93_ = 1'b0; + _zz_94_ = (4'bxxxx); + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_ECALL)))begin + _zz_93_ = 1'b1; + _zz_94_ = (4'b1011); + end + if((execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_defaultEncoding_EBREAK)))begin + _zz_93_ = 1'b1; + _zz_94_ = (4'b0011); + end + end + + assign execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + assign execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + assign execute_CsrPlugin_writeEnable = ((execute_CsrPlugin_writeInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + assign execute_CsrPlugin_readEnable = ((execute_CsrPlugin_readInstruction && (! execute_CsrPlugin_blockedBySideEffects)) && (! execute_arbitration_isStuckByOthers)); + always @ (*) begin + case(_zz_194_) + 1'b0 : begin + execute_CsrPlugin_writeData = execute_SRC1; + end + default : begin + execute_CsrPlugin_writeData = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readData & (~ execute_SRC1)) : (execute_CsrPlugin_readData | execute_SRC1)); + end + endcase + end + + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + always @ (*) begin + _zz_165_ = 1'b0; + _zz_166_ = 1'b0; + if(_zz_168_)begin + if((_zz_169_ == execute_INSTRUCTION[19 : 15]))begin + _zz_165_ = 1'b1; + end + if((_zz_169_ == execute_INSTRUCTION[24 : 20]))begin + _zz_166_ = 1'b1; + end + end + if((writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID))begin + if((1'b1 || (! 1'b1)))begin + if((writeBack_INSTRUCTION[11 : 7] == execute_INSTRUCTION[19 : 15]))begin + _zz_165_ = 1'b1; + end + if((writeBack_INSTRUCTION[11 : 7] == execute_INSTRUCTION[24 : 20]))begin + _zz_166_ = 1'b1; + end + end + end + if((memory_arbitration_isValid && memory_REGFILE_WRITE_VALID))begin + if((1'b1 || (! memory_BYPASSABLE_MEMORY_STAGE)))begin + if((memory_INSTRUCTION[11 : 7] == execute_INSTRUCTION[19 : 15]))begin + _zz_165_ = 1'b1; + end + if((memory_INSTRUCTION[11 : 7] == execute_INSTRUCTION[24 : 20]))begin + _zz_166_ = 1'b1; + end + end + end + if((! execute_RS1_USE))begin + _zz_165_ = 1'b0; + end + if((! execute_RS2_USE))begin + _zz_166_ = 1'b0; + end + end + + assign _zz_167_ = (_zz_51_ && writeBack_arbitration_isFiring); + assign _zz_171_ = (_zz_170_ & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_171_ != (32'b00000000000000000000000000000000)); + assign DebugPlugin_isPipBusy = (DebugPlugin_isPipActive || DebugPlugin_isPipActive_regNext); + always @ (*) begin + debug_bus_cmd_ready = 1'b1; + _zz_97_ = 1'b0; + if(debug_bus_cmd_valid)begin + case(_zz_190_) + 6'b000000 : begin + end + 6'b000001 : begin + if(debug_bus_cmd_payload_wr)begin + _zz_97_ = 1'b1; + debug_bus_cmd_ready = _zz_98_; + end + end + 6'b010000 : begin + end + 6'b010001 : begin + end + 6'b010010 : begin + end + 6'b010011 : begin + end + default : begin + end + endcase + end + end + + always @ (*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if((! _zz_172_))begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign _zz_25_ = ((! DebugPlugin_haltIt) && (decode_IS_EBREAK || ((((1'b0 || (DebugPlugin_hardwareBreakpoints_0_valid && (DebugPlugin_hardwareBreakpoints_0_pc == _zz_253_))) || (DebugPlugin_hardwareBreakpoints_1_valid && (DebugPlugin_hardwareBreakpoints_1_pc == _zz_254_))) || (DebugPlugin_hardwareBreakpoints_2_valid && (DebugPlugin_hardwareBreakpoints_2_pc == _zz_255_))) || (DebugPlugin_hardwareBreakpoints_3_valid && (DebugPlugin_hardwareBreakpoints_3_pc == _zz_256_))))); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign _zz_24_ = decode_BRANCH_CTRL; + assign _zz_76_ = _zz_64_; + assign _zz_34_ = decode_to_execute_BRANCH_CTRL; + assign _zz_22_ = decode_ALU_CTRL; + assign _zz_20_ = _zz_56_; + assign _zz_47_ = decode_to_execute_ALU_CTRL; + assign _zz_19_ = decode_SRC1_CTRL; + assign _zz_17_ = _zz_71_; + assign _zz_45_ = decode_to_execute_SRC1_CTRL; + assign _zz_16_ = decode_ENV_CTRL; + assign _zz_13_ = execute_ENV_CTRL; + assign _zz_11_ = memory_ENV_CTRL; + assign _zz_14_ = _zz_70_; + assign _zz_27_ = decode_to_execute_ENV_CTRL; + assign _zz_26_ = execute_to_memory_ENV_CTRL; + assign _zz_30_ = memory_to_writeBack_ENV_CTRL; + assign _zz_9_ = decode_ALU_BITWISE_CTRL; + assign _zz_7_ = _zz_66_; + assign _zz_49_ = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_6_ = decode_SRC2_CTRL; + assign _zz_4_ = _zz_63_; + assign _zz_43_ = decode_to_execute_SRC2_CTRL; + assign _zz_3_ = decode_SHIFT_CTRL; + assign _zz_1_ = _zz_62_; + assign _zz_38_ = decode_to_execute_SHIFT_CTRL; + assign decode_arbitration_isFlushed = ({writeBack_arbitration_flushAll,{memory_arbitration_flushAll,{execute_arbitration_flushAll,decode_arbitration_flushAll}}} != (4'b0000)); + assign execute_arbitration_isFlushed = ({writeBack_arbitration_flushAll,{memory_arbitration_flushAll,execute_arbitration_flushAll}} != (3'b000)); + assign memory_arbitration_isFlushed = ({writeBack_arbitration_flushAll,memory_arbitration_flushAll} != (2'b00)); + assign writeBack_arbitration_isFlushed = (writeBack_arbitration_flushAll != (1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign iBus_cmd_ready = ((1'b1 && (! iBus_cmd_m2sPipe_valid)) || iBus_cmd_m2sPipe_ready); + assign iBus_cmd_m2sPipe_valid = _zz_175_; + assign iBus_cmd_m2sPipe_payload_pc = _zz_176_; + assign iBusWishbone_ADR = (iBus_cmd_m2sPipe_payload_pc >>> 2); + assign iBusWishbone_CTI = (3'b000); + assign iBusWishbone_BTE = (2'b00); + assign iBusWishbone_SEL = (4'b1111); + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = (32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx); + assign iBusWishbone_CYC = iBus_cmd_m2sPipe_valid; + assign iBusWishbone_STB = iBus_cmd_m2sPipe_valid; + assign iBus_cmd_m2sPipe_ready = (iBus_cmd_m2sPipe_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = (iBusWishbone_CYC && iBusWishbone_ACK); + assign iBus_rsp_payload_inst = iBusWishbone_DAT_MISO; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_valid = dBus_cmd_halfPipe_regs_valid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_halfPipe_regs_payload_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_halfPipe_regs_payload_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_halfPipe_regs_payload_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_halfPipe_regs_payload_size; + assign dBus_cmd_ready = dBus_cmd_halfPipe_regs_ready; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = (3'b000); + assign dBusWishbone_BTE = (2'b00); + always @ (*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_177_ = (4'b0001); + end + 2'b01 : begin + _zz_177_ = (4'b0011); + end + default : begin + _zz_177_ = (4'b1111); + end + endcase + end + + always @ (*) begin + dBusWishbone_SEL = _zz_263_[3:0]; + if((! dBus_cmd_halfPipe_payload_wr))begin + dBusWishbone_SEL = (4'b1111); + end + end + + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @ (posedge clk) begin + if(reset) begin + CsrPlugin_privilege <= (2'b11); + IBusSimplePlugin_fetchPc_pcReg <= externalResetVector; + IBusSimplePlugin_fetchPc_inc <= 1'b0; + _zz_104_ <= 1'b0; + _zz_109_ <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusSimplePlugin_injector_decodeRemoved <= 1'b0; + IBusSimplePlugin_pendingCmd <= (2'b00); + IBusSimplePlugin_rspJoin_discardCounter <= (2'b00); + execute_LightShifterPlugin_isActive <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= (2'b11); + CsrPlugin_mip_MEIP <= 1'b0; + CsrPlugin_mip_MTIP <= 1'b0; + CsrPlugin_mip_MSIP <= 1'b0; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_hadException <= 1'b0; + _zz_168_ <= 1'b0; + _zz_170_ <= (32'b00000000000000000000000000000000); + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + _zz_173_ <= (3'b000); + _zz_175_ <= 1'b0; + dBus_cmd_halfPipe_regs_valid <= 1'b0; + dBus_cmd_halfPipe_regs_ready <= 1'b1; + end else begin + if(IBusSimplePlugin_fetchPc_propagatePc)begin + IBusSimplePlugin_fetchPc_inc <= 1'b0; + end + if(IBusSimplePlugin_jump_pcLoad_valid)begin + IBusSimplePlugin_fetchPc_inc <= 1'b0; + end + if(_zz_189_)begin + IBusSimplePlugin_fetchPc_inc <= 1'b1; + end + if(IBusSimplePlugin_fetchPc_samplePcNext)begin + IBusSimplePlugin_fetchPc_pcReg <= IBusSimplePlugin_fetchPc_pc; + end + _zz_104_ <= 1'b1; + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + _zz_109_ <= 1'b0; + end + if(_zz_107_)begin + _zz_109_ <= IBusSimplePlugin_iBusRsp_stages_0_output_valid; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if((! (! IBusSimplePlugin_iBusRsp_stages_1_input_ready)))begin + IBusSimplePlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((! execute_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= IBusSimplePlugin_injector_nextPcCalc_valids_0; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if((! memory_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= IBusSimplePlugin_injector_nextPcCalc_valids_1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if((! writeBack_arbitration_isStuck))begin + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= IBusSimplePlugin_injector_nextPcCalc_valids_2; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(decode_arbitration_removeIt)begin + IBusSimplePlugin_injector_decodeRemoved <= 1'b1; + end + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_injector_decodeRemoved <= 1'b0; + end + IBusSimplePlugin_pendingCmd <= IBusSimplePlugin_pendingCmdNext; + IBusSimplePlugin_rspJoin_discardCounter <= (IBusSimplePlugin_rspJoin_discardCounter - _zz_208_); + if((IBusSimplePlugin_jump_pcLoad_valid || _zz_83_))begin + IBusSimplePlugin_rspJoin_discardCounter <= (IBusSimplePlugin_pendingCmd - _zz_210_); + end + if(_zz_182_)begin + if(_zz_183_)begin + execute_LightShifterPlugin_isActive <= 1'b1; + if(execute_LightShifterPlugin_done)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + end + end + if(execute_arbitration_removeIt)begin + execute_LightShifterPlugin_isActive <= 1'b0; + end + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + if((! execute_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if((! memory_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if((! writeBack_arbitration_isStuck))begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(_zz_187_)begin + CsrPlugin_privilege <= CsrPlugin_targetPrivilege; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(_zz_188_)begin + case(_zz_193_) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPP <= (2'b00); + CsrPlugin_mstatus_MPIE <= 1'b1; + CsrPlugin_privilege <= CsrPlugin_mstatus_MPP; + end + default : begin + end + endcase + end + _zz_168_ <= _zz_167_; + if(((! execute_arbitration_isStuck) || execute_arbitration_removeIt))begin + execute_arbitration_isValid <= 1'b0; + end + if(((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)))begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(((! memory_arbitration_isStuck) || memory_arbitration_removeIt))begin + memory_arbitration_isValid <= 1'b0; + end + if(((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)))begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt))begin + writeBack_arbitration_isValid <= 1'b0; + end + if(((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)))begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + case(_zz_173_) + 3'b000 : begin + if(_zz_97_)begin + _zz_173_ <= (3'b001); + end + end + 3'b001 : begin + _zz_173_ <= (3'b010); + end + 3'b010 : begin + _zz_173_ <= (3'b011); + end + 3'b011 : begin + if((! decode_arbitration_isStuck))begin + _zz_173_ <= (3'b100); + end + end + 3'b100 : begin + _zz_173_ <= (3'b000); + end + default : begin + end + endcase + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + if(execute_CsrPlugin_writeEnable)begin + _zz_170_ <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mstatus_MPP <= execute_CsrPlugin_writeData[12 : 11]; + CsrPlugin_mstatus_MPIE <= _zz_257_[0]; + CsrPlugin_mstatus_MIE <= _zz_258_[0]; + end + end + 12'b001101000001 : begin + end + 12'b001100000101 : begin + end + 12'b001101000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mip_MSIP <= _zz_259_[0]; + end + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + end + 12'b001100000100 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mie_MEIE <= _zz_260_[0]; + CsrPlugin_mie_MTIE <= _zz_261_[0]; + CsrPlugin_mie_MSIE <= _zz_262_[0]; + end + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(iBus_cmd_ready)begin + _zz_175_ <= iBus_cmd_valid; + end + if(_zz_191_)begin + dBus_cmd_halfPipe_regs_valid <= dBus_cmd_valid; + dBus_cmd_halfPipe_regs_ready <= (! dBus_cmd_valid); + end else begin + dBus_cmd_halfPipe_regs_valid <= (! dBus_cmd_halfPipe_ready); + dBus_cmd_halfPipe_regs_ready <= dBus_cmd_halfPipe_ready; + end + end + end + + always @ (posedge clk) begin + if(!(! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))) begin + $display("ERROR DBusSimplePlugin doesn't allow memory stage stall when read happend"); + end + if(!(! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_INSTRUCTION[5])) && writeBack_arbitration_isStuck))) begin + $display("ERROR DBusSimplePlugin doesn't allow writeback stage stall when read happend"); + end + if(_zz_182_)begin + if(_zz_183_)begin + execute_LightShifterPlugin_amplitudeReg <= (execute_LightShifterPlugin_amplitude - (5'b00001)); + end + end + CsrPlugin_mcycle <= (CsrPlugin_mcycle + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + if(writeBack_arbitration_isFiring)begin + CsrPlugin_minstret <= (CsrPlugin_minstret + (64'b0000000000000000000000000000000000000000000000000000000000000001)); + end + if(execute_exception_agregat_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= execute_exception_agregat_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= execute_exception_agregat_payload_badAddr; + end + if(memory_exception_agregat_valid)begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= memory_exception_agregat_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= memory_exception_agregat_payload_badAddr; + end + if((CsrPlugin_exception || CsrPlugin_interruptJump))begin + case(CsrPlugin_privilege) + 2'b11 : begin + CsrPlugin_mepc <= writeBack_PC; + end + default : begin + end + endcase + end + if(_zz_187_)begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + default : begin + end + endcase + end + if(_zz_167_)begin + _zz_169_ <= _zz_50_[11 : 7]; + end + externalInterruptArray_regNext <= externalInterruptArray; + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_FENCEI <= decode_IS_FENCEI; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_78_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_77_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_READ_DATA <= memory_MEMORY_READ_DATA; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_37_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_REGFILE_WRITE_DATA <= memory_REGFILE_WRITE_DATA; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BRANCH_CTRL <= _zz_23_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_CTRL <= _zz_21_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC1_CTRL <= _zz_18_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_ADDRESS_LOW <= execute_MEMORY_ADDRESS_LOW; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_ADDRESS_LOW <= memory_MEMORY_ADDRESS_LOW; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_RS1_USE <= decode_RS1_USE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_INSTRUCTION <= _zz_31_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_RS2_USE <= decode_RS2_USE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ENV_CTRL <= _zz_15_; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_ENV_CTRL <= _zz_12_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_ENV_CTRL <= _zz_10_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_8_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_PC <= decode_PC; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_PC <= _zz_42_; + end + if((! writeBack_arbitration_isStuck))begin + memory_to_writeBack_PC <= memory_PC; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC2_CTRL <= _zz_5_; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if((! memory_arbitration_isStuck))begin + execute_to_memory_ALIGNEMENT_FAULT <= execute_ALIGNEMENT_FAULT; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if((! execute_arbitration_isStuck))begin + decode_to_execute_SHIFT_CTRL <= _zz_2_; + end + case(execute_CsrPlugin_csrAddress) + 12'b101111000000 : begin + end + 12'b001100000000 : begin + end + 12'b001101000001 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mepc <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000101 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mtvec_base <= execute_CsrPlugin_writeData[31 : 2]; + CsrPlugin_mtvec_mode <= execute_CsrPlugin_writeData[1 : 0]; + end + end + 12'b001101000100 : begin + end + 12'b001101000011 : begin + end + 12'b111111000000 : begin + end + 12'b001101000000 : begin + if(execute_CsrPlugin_writeEnable)begin + CsrPlugin_mscratch <= execute_CsrPlugin_writeData[31 : 0]; + end + end + 12'b001100000100 : begin + end + 12'b001101000010 : begin + end + default : begin + end + endcase + if(iBus_cmd_ready)begin + _zz_176_ <= iBus_cmd_payload_pc; + end + if(_zz_191_)begin + dBus_cmd_halfPipe_regs_payload_wr <= dBus_cmd_payload_wr; + dBus_cmd_halfPipe_regs_payload_address <= dBus_cmd_payload_address; + dBus_cmd_halfPipe_regs_payload_data <= dBus_cmd_payload_data; + dBus_cmd_halfPipe_regs_payload_size <= dBus_cmd_payload_size; + end + end + + always @ (posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready)begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipActive <= ({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != (4'b0000)); + DebugPlugin_isPipActive_regNext <= DebugPlugin_isPipActive; + if(writeBack_arbitration_isValid)begin + DebugPlugin_busReadDataReg <= _zz_72_; + end + _zz_172_ <= debug_bus_cmd_payload_address[2]; + if(debug_bus_cmd_valid)begin + case(_zz_190_) + 6'b000000 : begin + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_pc <= debug_bus_cmd_payload_data[31 : 1]; + end + end + default : begin + end + endcase + end + if(_zz_184_)begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @ (posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_hardwareBreakpoints_0_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_1_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_2_valid <= 1'b0; + DebugPlugin_hardwareBreakpoints_3_valid <= 1'b0; + end else begin + if(debug_bus_cmd_valid)begin + case(_zz_190_) + 6'b000000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(debug_bus_cmd_payload_data[16])begin + DebugPlugin_resetIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[24])begin + DebugPlugin_resetIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[17])begin + DebugPlugin_haltIt <= 1'b1; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltIt <= 1'b0; + end + if(debug_bus_cmd_payload_data[25])begin + DebugPlugin_haltedByBreak <= 1'b0; + end + end + end + 6'b000001 : begin + end + 6'b010000 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_0_valid <= _zz_249_[0]; + end + end + 6'b010001 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_1_valid <= _zz_250_[0]; + end + end + 6'b010010 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_2_valid <= _zz_251_[0]; + end + end + 6'b010011 : begin + if(debug_bus_cmd_payload_wr)begin + DebugPlugin_hardwareBreakpoints_3_valid <= _zz_252_[0]; + end + end + default : begin + end + endcase + end + if(_zz_184_)begin + if(_zz_185_)begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(_zz_186_)begin + if(decode_arbitration_isValid)begin + DebugPlugin_haltIt <= 1'b1; + end + end + if((DebugPlugin_stepIt && ({writeBack_arbitration_redoIt,{memory_arbitration_redoIt,{execute_arbitration_redoIt,decode_arbitration_redoIt}}} != (4'b0000))))begin + DebugPlugin_haltIt <= 1'b0; + end + end + end + + always @ (posedge clk) begin + _zz_174_ <= debug_bus_cmd_payload_data; + end + +endmodule + diff --git a/hw/rtl/5-stage-pipelined-no-cache-debug.yaml b/hw/rtl/5-stage-pipelined-no-cache-debug.yaml new file mode 100644 index 0000000..6ab729f --- /dev/null +++ b/hw/rtl/5-stage-pipelined-no-cache-debug.yaml @@ -0,0 +1 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4} diff --git a/hw/rtl/spimemio.v b/hw/rtl/spimemio.v new file mode 100644 index 0000000..0bbf532 --- /dev/null +++ b/hw/rtl/spimemio.v @@ -0,0 +1,579 @@ +/* + * PicoSoC - A simple example SoC using PicoRV32 + * + * Copyright (C) 2017 Clifford Wolf + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +module spimemio ( + input clk, resetn, + + input valid, + output ready, + input [23:0] addr, + output reg [31:0] rdata, + + output flash_csb, + output flash_clk, + + output flash_io0_oe, + output flash_io1_oe, + output flash_io2_oe, + output flash_io3_oe, + + output flash_io0_do, + output flash_io1_do, + output flash_io2_do, + output flash_io3_do, + + input flash_io0_di, + input flash_io1_di, + input flash_io2_di, + input flash_io3_di, + + input [3:0] cfgreg_we, + input [31:0] cfgreg_di, + output [31:0] cfgreg_do +); + reg xfer_resetn; + reg din_valid; + wire din_ready; + reg [7:0] din_data; + reg [3:0] din_tag; + reg din_cont; + reg din_qspi; + reg din_ddr; + reg din_rd; + + wire dout_valid; + wire [7:0] dout_data; + wire [3:0] dout_tag; + + reg [23:0] buffer; + + reg [23:0] rd_addr; + reg rd_valid; + reg rd_wait; + reg rd_inc; + + assign ready = valid && (addr == rd_addr) && rd_valid; + wire jump = valid && !ready && (addr != rd_addr+4) && rd_valid; + + reg softreset; + + reg config_en; // cfgreg[31] + reg config_ddr; // cfgreg[22] + reg config_qspi; // cfgreg[21] + reg config_cont; // cfgreg[20] + reg [3:0] config_dummy; // cfgreg[19:16] + reg [3:0] config_oe; // cfgreg[11:8] + reg config_csb; // cfgreg[5] + reg config_clk; // cfgref[4] + reg [3:0] config_do; // cfgreg[3:0] + + assign cfgreg_do[31] = config_en; + assign cfgreg_do[30:23] = 0; + assign cfgreg_do[22] = config_ddr; + assign cfgreg_do[21] = config_qspi; + assign cfgreg_do[20] = config_cont; + assign cfgreg_do[19:16] = config_dummy; + assign cfgreg_do[15:12] = 0; + assign cfgreg_do[11:8] = {flash_io3_oe, flash_io2_oe, flash_io1_oe, flash_io0_oe}; + assign cfgreg_do[7:6] = 0; + assign cfgreg_do[5] = flash_csb; + assign cfgreg_do[4] = flash_clk; + assign cfgreg_do[3:0] = {flash_io3_di, flash_io2_di, flash_io1_di, flash_io0_di}; + + always @(posedge clk) begin + softreset <= !config_en || cfgreg_we; + if (!resetn) begin + softreset <= 1; + config_en <= 1; + config_csb <= 0; + config_clk <= 0; + config_oe <= 0; + config_do <= 0; + config_ddr <= 0; + config_qspi <= 0; + config_cont <= 0; + config_dummy <= 8; + end else begin + if (cfgreg_we[0]) begin + config_csb <= cfgreg_di[5]; + config_clk <= cfgreg_di[4]; + config_do <= cfgreg_di[3:0]; + end + if (cfgreg_we[1]) begin + config_oe <= cfgreg_di[11:8]; + end + if (cfgreg_we[2]) begin + config_ddr <= cfgreg_di[22]; + config_qspi <= cfgreg_di[21]; + config_cont <= cfgreg_di[20]; + config_dummy <= cfgreg_di[19:16]; + end + if (cfgreg_we[3]) begin + config_en <= cfgreg_di[31]; + end + end + end + + wire xfer_csb; + wire xfer_clk; + + wire xfer_io0_oe; + wire xfer_io1_oe; + wire xfer_io2_oe; + wire xfer_io3_oe; + + wire xfer_io0_do; + wire xfer_io1_do; + wire xfer_io2_do; + wire xfer_io3_do; + + reg xfer_io0_90; + reg xfer_io1_90; + reg xfer_io2_90; + reg xfer_io3_90; + + always @(negedge clk) begin + xfer_io0_90 <= xfer_io0_do; + xfer_io1_90 <= xfer_io1_do; + xfer_io2_90 <= xfer_io2_do; + xfer_io3_90 <= xfer_io3_do; + end + + assign flash_csb = config_en ? xfer_csb : config_csb; + assign flash_clk = config_en ? xfer_clk : config_clk; + + assign flash_io0_oe = config_en ? xfer_io0_oe : config_oe[0]; + assign flash_io1_oe = config_en ? xfer_io1_oe : config_oe[1]; + assign flash_io2_oe = config_en ? xfer_io2_oe : config_oe[2]; + assign flash_io3_oe = config_en ? xfer_io3_oe : config_oe[3]; + + assign flash_io0_do = config_en ? (config_ddr ? xfer_io0_90 : xfer_io0_do) : config_do[0]; + assign flash_io1_do = config_en ? (config_ddr ? xfer_io1_90 : xfer_io1_do) : config_do[1]; + assign flash_io2_do = config_en ? (config_ddr ? xfer_io2_90 : xfer_io2_do) : config_do[2]; + assign flash_io3_do = config_en ? (config_ddr ? xfer_io3_90 : xfer_io3_do) : config_do[3]; + + wire xfer_dspi = din_ddr && !din_qspi; + wire xfer_ddr = din_ddr && din_qspi; + + spimemio_xfer xfer ( + .clk (clk ), + .resetn (xfer_resetn ), + .din_valid (din_valid ), + .din_ready (din_ready ), + .din_data (din_data ), + .din_tag (din_tag ), + .din_cont (din_cont ), + .din_dspi (xfer_dspi ), + .din_qspi (din_qspi ), + .din_ddr (xfer_ddr ), + .din_rd (din_rd ), + .dout_valid (dout_valid ), + .dout_data (dout_data ), + .dout_tag (dout_tag ), + .flash_csb (xfer_csb ), + .flash_clk (xfer_clk ), + .flash_io0_oe (xfer_io0_oe ), + .flash_io1_oe (xfer_io1_oe ), + .flash_io2_oe (xfer_io2_oe ), + .flash_io3_oe (xfer_io3_oe ), + .flash_io0_do (xfer_io0_do ), + .flash_io1_do (xfer_io1_do ), + .flash_io2_do (xfer_io2_do ), + .flash_io3_do (xfer_io3_do ), + .flash_io0_di (flash_io0_di), + .flash_io1_di (flash_io1_di), + .flash_io2_di (flash_io2_di), + .flash_io3_di (flash_io3_di) + ); + + reg [3:0] state; + + always @(posedge clk) begin + xfer_resetn <= 1; + din_valid <= 0; + + if (!resetn || softreset) begin + state <= 0; + xfer_resetn <= 0; + rd_valid <= 0; + din_tag <= 0; + din_cont <= 0; + din_qspi <= 0; + din_ddr <= 0; + din_rd <= 0; + end else begin + if (dout_valid && dout_tag == 1) buffer[ 7: 0] <= dout_data; + if (dout_valid && dout_tag == 2) buffer[15: 8] <= dout_data; + if (dout_valid && dout_tag == 3) buffer[23:16] <= dout_data; + if (dout_valid && dout_tag == 4) begin + rdata <= {dout_data, buffer}; + rd_addr <= rd_inc ? rd_addr + 4 : addr; + rd_valid <= 1; + rd_wait <= rd_inc; + rd_inc <= 1; + end + + if (valid) + rd_wait <= 0; + + case (state) + 0: begin + din_valid <= 1; + din_data <= 8'h ff; + din_tag <= 0; + if (din_ready) begin + din_valid <= 0; + state <= 1; + end + end + 1: begin + if (dout_valid) begin + xfer_resetn <= 0; + state <= 2; + end + end + 2: begin + din_valid <= 1; + din_data <= 8'h ab; + din_tag <= 0; + if (din_ready) begin + din_valid <= 0; + state <= 3; + end + end + 3: begin + if (dout_valid) begin + xfer_resetn <= 0; + state <= 4; + end + end + 4: begin + rd_inc <= 0; + din_valid <= 1; + din_tag <= 0; + case ({config_ddr, config_qspi}) + 2'b11: din_data <= 8'h ED; + 2'b01: din_data <= 8'h EB; + 2'b10: din_data <= 8'h BB; + 2'b00: din_data <= 8'h 03; + endcase + if (din_ready) begin + din_valid <= 0; + state <= 5; + end + end + 5: begin + if (valid && !ready) begin + din_valid <= 1; + din_tag <= 0; + din_data <= addr[23:16]; + din_qspi <= config_qspi; + din_ddr <= config_ddr; + if (din_ready) begin + din_valid <= 0; + state <= 6; + end + end + end + 6: begin + din_valid <= 1; + din_tag <= 0; + din_data <= addr[15:8]; + if (din_ready) begin + din_valid <= 0; + state <= 7; + end + end + 7: begin + din_valid <= 1; + din_tag <= 0; + din_data <= addr[7:0]; + if (din_ready) begin + din_valid <= 0; + din_data <= 0; + state <= config_qspi || config_ddr ? 8 : 9; + end + end + 8: begin + din_valid <= 1; + din_tag <= 0; + din_data <= config_cont ? 8'h A5 : 8'h FF; + if (din_ready) begin + din_rd <= 1; + din_data <= config_dummy; + din_valid <= 0; + state <= 9; + end + end + 9: begin + din_valid <= 1; + din_tag <= 1; + if (din_ready) begin + din_valid <= 0; + state <= 10; + end + end + 10: begin + din_valid <= 1; + din_data <= 8'h 00; + din_tag <= 2; + if (din_ready) begin + din_valid <= 0; + state <= 11; + end + end + 11: begin + din_valid <= 1; + din_tag <= 3; + if (din_ready) begin + din_valid <= 0; + state <= 12; + end + end + 12: begin + if (!rd_wait || valid) begin + din_valid <= 1; + din_tag <= 4; + if (din_ready) begin + din_valid <= 0; + state <= 9; + end + end + end + endcase + + if (jump) begin + rd_inc <= 0; + rd_valid <= 0; + xfer_resetn <= 0; + if (config_cont) begin + state <= 5; + end else begin + state <= 4; + din_qspi <= 0; + din_ddr <= 0; + end + din_rd <= 0; + end + end + end +endmodule + +module spimemio_xfer ( + input clk, resetn, + + input din_valid, + output din_ready, + input [7:0] din_data, + input [3:0] din_tag, + input din_cont, + input din_dspi, + input din_qspi, + input din_ddr, + input din_rd, + + output dout_valid, + output [7:0] dout_data, + output [3:0] dout_tag, + + output reg flash_csb, + output reg flash_clk, + + output reg flash_io0_oe, + output reg flash_io1_oe, + output reg flash_io2_oe, + output reg flash_io3_oe, + + output reg flash_io0_do, + output reg flash_io1_do, + output reg flash_io2_do, + output reg flash_io3_do, + + input flash_io0_di, + input flash_io1_di, + input flash_io2_di, + input flash_io3_di +); + reg [7:0] obuffer; + reg [7:0] ibuffer; + + reg [3:0] count; + reg [3:0] dummy_count; + + reg xfer_cont; + reg xfer_dspi; + reg xfer_qspi; + reg xfer_ddr; + reg xfer_ddr_q; + reg xfer_rd; + reg [3:0] xfer_tag; + reg [3:0] xfer_tag_q; + + reg [7:0] next_obuffer; + reg [7:0] next_ibuffer; + reg [3:0] next_count; + + reg fetch; + reg next_fetch; + reg last_fetch; + + always @(posedge clk) begin + xfer_ddr_q <= xfer_ddr; + xfer_tag_q <= xfer_tag; + end + + assign din_ready = din_valid && resetn && next_fetch; + + assign dout_valid = (xfer_ddr_q ? fetch && !last_fetch : next_fetch && !fetch) && resetn; + assign dout_data = ibuffer; + assign dout_tag = xfer_tag_q; + + always @* begin + flash_io0_oe = 0; + flash_io1_oe = 0; + flash_io2_oe = 0; + flash_io3_oe = 0; + + flash_io0_do = 0; + flash_io1_do = 0; + flash_io2_do = 0; + flash_io3_do = 0; + + next_obuffer = obuffer; + next_ibuffer = ibuffer; + next_count = count; + next_fetch = 0; + + if (dummy_count == 0) begin + casez ({xfer_ddr, xfer_qspi, xfer_dspi}) + 3'b 000: begin + flash_io0_oe = 1; + flash_io0_do = obuffer[7]; + + if (flash_clk) begin + next_obuffer = {obuffer[6:0], 1'b 0}; + next_count = count - |count; + end else begin + next_ibuffer = {ibuffer[6:0], flash_io1_di}; + end + + next_fetch = (next_count == 0); + end + 3'b 01?: begin + flash_io0_oe = !xfer_rd; + flash_io1_oe = !xfer_rd; + flash_io2_oe = !xfer_rd; + flash_io3_oe = !xfer_rd; + + flash_io0_do = obuffer[4]; + flash_io1_do = obuffer[5]; + flash_io2_do = obuffer[6]; + flash_io3_do = obuffer[7]; + + if (flash_clk) begin + next_obuffer = {obuffer[3:0], 4'b 0000}; + next_count = count - {|count, 2'b00}; + end else begin + next_ibuffer = {ibuffer[3:0], flash_io3_di, flash_io2_di, flash_io1_di, flash_io0_di}; + end + + next_fetch = (next_count == 0); + end + 3'b 11?: begin + flash_io0_oe = !xfer_rd; + flash_io1_oe = !xfer_rd; + flash_io2_oe = !xfer_rd; + flash_io3_oe = !xfer_rd; + + flash_io0_do = obuffer[4]; + flash_io1_do = obuffer[5]; + flash_io2_do = obuffer[6]; + flash_io3_do = obuffer[7]; + + next_obuffer = {obuffer[3:0], 4'b 0000}; + next_ibuffer = {ibuffer[3:0], flash_io3_di, flash_io2_di, flash_io1_di, flash_io0_di}; + next_count = count - {|count, 2'b00}; + + next_fetch = (next_count == 0); + end + 3'b ??1: begin + flash_io0_oe = !xfer_rd; + flash_io1_oe = !xfer_rd; + + flash_io0_do = obuffer[6]; + flash_io1_do = obuffer[7]; + + if (flash_clk) begin + next_obuffer = {obuffer[5:0], 2'b 00}; + next_count = count - {|count, 1'b0}; + end else begin + next_ibuffer = {ibuffer[5:0], flash_io1_di, flash_io0_di}; + end + + next_fetch = (next_count == 0); + end + endcase + end + end + + always @(posedge clk) begin + if (!resetn) begin + fetch <= 1; + last_fetch <= 1; + flash_csb <= 1; + flash_clk <= 0; + count <= 0; + dummy_count <= 0; + xfer_tag <= 0; + xfer_cont <= 0; + xfer_dspi <= 0; + xfer_qspi <= 0; + xfer_ddr <= 0; + xfer_rd <= 0; + end else begin + fetch <= next_fetch; + last_fetch <= xfer_ddr ? fetch : 1; + if (dummy_count) begin + flash_clk <= !flash_clk && !flash_csb; + dummy_count <= dummy_count - flash_clk; + end else + if (count) begin + flash_clk <= !flash_clk && !flash_csb; + obuffer <= next_obuffer; + ibuffer <= next_ibuffer; + count <= next_count; + end + if (din_valid && din_ready) begin + flash_csb <= 0; + flash_clk <= 0; + + count <= 8; + dummy_count <= din_rd ? din_data : 0; + obuffer <= din_data; + + xfer_tag <= din_tag; + xfer_cont <= din_cont; + xfer_dspi <= din_dspi; + xfer_qspi <= din_qspi; + xfer_ddr <= din_ddr; + xfer_rd <= din_rd; + end + end + end +endmodule diff --git a/sw/Makefile b/sw/Makefile new file mode 100644 index 0000000..84d2891 --- /dev/null +++ b/sw/Makefile @@ -0,0 +1,131 @@ +GIT_VERSION := $(shell git describe --tags) + +# There is no 64-bit gcc on Raspberry Pi, so use the 32-bit version +ifneq (,$(wildcard /etc/rpi-issue)) +TRGT ?= riscv32-unknown-elf- +else +TRGT ?= riscv64-unknown-elf- +endif + +CC := $(TRGT)gcc +CXX := $(TRGT)g++ +OBJCOPY := $(TRGT)objcopy + +RM := rm -rf +COPY := cp -a +PATH_SEP := / + +ifeq ($(OS),Windows_NT) +COPY := copy +RM := del +PATH_SEP := \\ +endif + +ifeq ($(LITEX),1) +BASE_DIR := ../../../../sw +LDSCRIPT := $(BASE_DIR)/ld/linker.ld +LD_DIR := ../include/generated +ADD_CFLAGS := -I../include -I$(BASE_DIR)/include +ADD_LFLAGS := +PACKAGE := bios +else +BASE_DIR := . +LD_DIR := $(BASE_DIR)/ld +LDSCRIPT := $(BASE_DIR)/ld/linker.ld +ADD_CFLAGS := -I$(BASE_DIR)/include +ADD_LFLAGS := +PACKAGE := factory-test +endif + +LDSCRIPTS := $(LDSCRIPT) $(LD_DIR)/output_format.ld $(LD_DIR)/regions.ld +SRC_DIR := $(BASE_DIR)/src +THIRD_PARTY := $(BASE_DIR)/third_party +DBG_CFLAGS := -ggdb -g -DDEBUG -Wall +DBG_LFLAGS := -ggdb -g -Wall +CFLAGS := $(ADD_CFLAGS) \ + -D__vexriscv__ -march=rv32i -mabi=ilp32 \ + -Wall -Wextra \ + -flto \ + -ffunction-sections -fdata-sections -fno-common \ + -fomit-frame-pointer -Os \ + -march=rv32i \ + -DGIT_VERSION=u\"$(GIT_VERSION)\" -std=gnu11 +CXXFLAGS := $(CFLAGS) -std=c++11 -fno-rtti -fno-exceptions +LFLAGS := $(CFLAGS) $(ADD_LFLAGS) -L$(LD_DIR) \ + -nostartfiles \ + -nostdlib \ + -Wl,--gc-sections \ + -Wl,--no-warn-mismatch \ + -Wl,--script=$(LDSCRIPT) \ + -Wl,--build-id=none + +OBJ_DIR := .obj + +CSOURCES := $(wildcard $(SRC_DIR)/*.c) +CPPSOURCES := $(wildcard $(SRC_DIR)/*.cpp) +ASOURCES := $(wildcard $(SRC_DIR)/*.S) +COBJS := $(addprefix $(OBJ_DIR)/, $(notdir $(CSOURCES:.c=.o))) +CXXOBJS := $(addprefix $(OBJ_DIR)/, $(notdir $(CPPSOURCES:.cpp=.o))) +AOBJS := $(addprefix $(OBJ_DIR)/, $(notdir $(ASOURCES:.S=.o))) +OBJECTS := $(COBJS) $(CXXOBJS) $(AOBJS) +VPATH := $(SRC_DIR) + +QUIET := @ + +ALL := all +TARGET := $(PACKAGE).elf +CLEAN := clean + +$(ALL): $(TARGET) $(PACKAGE).bin $(PACKAGE).ihex + +$(OBJECTS): | $(OBJ_DIR) + +$(TARGET): $(OBJECTS) $(LDSCRIPTS) + $(QUIET) echo " LD $@" + $(QUIET) $(CC) $(OBJECTS) $(LFLAGS) -o $@ + +$(PACKAGE).bin: $(TARGET) + $(QUIET) echo " OBJCOPY $@" + $(QUIET) $(OBJCOPY) -O binary $(TARGET) $@ + +$(PACKAGE).dfu: $(TARGET) + $(QUIET) echo " DFU $@" + $(QUIET) $(COPY) $(PACKAGE).bin $@ + $(QUIET) dfu-suffix -v 1209 -p 70b1 -a $@ + +$(PACKAGE).ihex: $(TARGET) + $(QUIET) echo " IHEX $(PACKAGE).ihex" + $(QUIET) $(OBJCOPY) -O ihex $(TARGET) $@ + +$(DEBUG): CFLAGS += $(DBG_CFLAGS) +$(DEBUG): LFLAGS += $(DBG_LFLAGS) +CFLAGS += $(DBG_CFLAGS) +LFLAGS += $(DBG_LFLAGS) +$(DEBUG): $(TARGET) + +$(OBJ_DIR): + $(QUIET) mkdir $(OBJ_DIR) + +$(COBJS) : $(OBJ_DIR)/%.o : %.c $(BASE_DIR)/Makefile + $(QUIET) echo " CC $< $(notdir $@)" + $(QUIET) $(CC) -c $< $(CFLAGS) -o $@ -MMD + +$(OBJ_DIR)/%.o: %.cpp + $(QUIET) echo " CXX $< $(notdir $@)" + $(QUIET) $(CXX) -c $< $(CXXFLAGS) -o $@ -MMD + +$(OBJ_DIR)/%.o: %.S + $(QUIET) echo " AS $< $(notdir $@)" + $(QUIET) $(CC) -x assembler-with-cpp -c $< $(CFLAGS) -o $@ -MMD + +.PHONY: clean + +clean: + $(QUIET) echo " RM $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.d))" + -$(QUIET) $(RM) $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.d)) + $(QUIET) echo " RM $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.d))" + -$(QUIET) $(RM) $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.o)) + $(QUIET) echo " RM $(TARGET) $(PACKAGE).bin $(PACKAGE).symbol $(PACKAGE).ihex $(PACKAGE).dfu" + -$(QUIET) $(RM) $(TARGET) $(PACKAGE).bin $(PACKAGE).symbol $(PACKAGE).ihex $(PACKAGE).dfu + +include $(wildcard $(OBJ_DIR)/*.d) diff --git a/sw/include/fomu/csr.h b/sw/include/fomu/csr.h new file mode 100644 index 0000000..d6be9e4 --- /dev/null +++ b/sw/include/fomu/csr.h @@ -0,0 +1,903 @@ +#ifndef __GENERATED_CSR_H +#define __GENERATED_CSR_H +#include +#ifdef CSR_ACCESSORS_DEFINED +extern void csr_writeb(uint8_t value, uint32_t addr); +extern uint8_t csr_readb(uint32_t addr); +extern void csr_writew(uint16_t value, uint32_t addr); +extern uint16_t csr_readw(uint32_t addr); +extern void csr_writel(uint32_t value, uint32_t addr); +extern uint32_t csr_readl(uint32_t addr); +#else /* ! CSR_ACCESSORS_DEFINED */ +static inline void csr_writeb(uint8_t value, uint32_t addr) +{ + *((volatile uint8_t *)addr) = value; +} + +static inline uint8_t csr_readb(uint32_t addr) +{ + return *(volatile uint8_t *)addr; +} + +static inline void csr_writew(uint16_t value, uint32_t addr) +{ + *((volatile uint16_t *)addr) = value; +} + +static inline uint16_t csr_readw(uint32_t addr) +{ + return *(volatile uint16_t *)addr; +} + +static inline void csr_writel(uint32_t value, uint32_t addr) +{ + *((volatile uint32_t *)addr) = value; +} + +static inline uint32_t csr_readl(uint32_t addr) +{ + return *(volatile uint32_t *)addr; +} +#endif /* ! CSR_ACCESSORS_DEFINED */ + +/* ctrl */ +#define CSR_CTRL_BASE 0xe0000000 +#define CSR_CTRL_RESET_ADDR 0xe0000000 +#define CSR_CTRL_RESET_SIZE 1 + static inline unsigned char + ctrl_reset_read(void) +{ + unsigned char r = csr_readl(0xe0000000); + return r; +} +static inline void ctrl_reset_write(unsigned char value) +{ + csr_writel(value, 0xe0000000); +} +#define CSR_CTRL_SCRATCH_ADDR 0xe0000004 +#define CSR_CTRL_SCRATCH_SIZE 4 +static inline unsigned int ctrl_scratch_read(void) +{ + unsigned int r = csr_readl(0xe0000004); + r <<= 8; + r |= csr_readl(0xe0000008); + r <<= 8; + r |= csr_readl(0xe000000c); + r <<= 8; + r |= csr_readl(0xe0000010); + return r; +} +static inline void ctrl_scratch_write(unsigned int value) +{ + csr_writel(value >> 24, 0xe0000004); + csr_writel(value >> 16, 0xe0000008); + csr_writel(value >> 8, 0xe000000c); + csr_writel(value, 0xe0000010); +} +#define CSR_CTRL_BUS_ERRORS_ADDR 0xe0000014 +#define CSR_CTRL_BUS_ERRORS_SIZE 4 +static inline unsigned int ctrl_bus_errors_read(void) +{ + unsigned int r = csr_readl(0xe0000014); + r <<= 8; + r |= csr_readl(0xe0000018); + r <<= 8; + r |= csr_readl(0xe000001c); + r <<= 8; + r |= csr_readl(0xe0000020); + return r; +} + +/* picorvspi */ +#define CSR_PICORVSPI_BASE 0xe0005000 +#define CSR_PICORVSPI_CFG1_ADDR 0xe0005000 +#define CSR_PICORVSPI_CFG1_SIZE 1 +static inline unsigned char picorvspi_cfg1_read(void) +{ + unsigned char r = csr_readl(0xe0005000); + return r; +} +static inline void picorvspi_cfg1_write(unsigned char value) +{ + csr_writel(value, 0xe0005000); +} +#define CSR_PICORVSPI_CFG2_ADDR 0xe0005004 +#define CSR_PICORVSPI_CFG2_SIZE 1 +static inline unsigned char picorvspi_cfg2_read(void) +{ + unsigned char r = csr_readl(0xe0005004); + return r; +} +static inline void picorvspi_cfg2_write(unsigned char value) +{ + csr_writel(value, 0xe0005004); +} +#define CSR_PICORVSPI_CFG3_ADDR 0xe0005008 +#define CSR_PICORVSPI_CFG3_SIZE 1 +static inline unsigned char picorvspi_cfg3_read(void) +{ + unsigned char r = csr_readl(0xe0005008); + return r; +} +static inline void picorvspi_cfg3_write(unsigned char value) +{ + csr_writel(value, 0xe0005008); +} +#define CSR_PICORVSPI_CFG4_ADDR 0xe000500c +#define CSR_PICORVSPI_CFG4_SIZE 1 +static inline unsigned char picorvspi_cfg4_read(void) +{ + unsigned char r = csr_readl(0xe000500c); + return r; +} +static inline void picorvspi_cfg4_write(unsigned char value) +{ + csr_writel(value, 0xe000500c); +} +#define CSR_PICORVSPI_STAT1_ADDR 0xe0005010 +#define CSR_PICORVSPI_STAT1_SIZE 1 +static inline unsigned char picorvspi_stat1_read(void) +{ + unsigned char r = csr_readl(0xe0005010); + return r; +} +#define CSR_PICORVSPI_STAT2_ADDR 0xe0005014 +#define CSR_PICORVSPI_STAT2_SIZE 1 +static inline unsigned char picorvspi_stat2_read(void) +{ + unsigned char r = csr_readl(0xe0005014); + return r; +} +#define CSR_PICORVSPI_STAT3_ADDR 0xe0005018 +#define CSR_PICORVSPI_STAT3_SIZE 1 +static inline unsigned char picorvspi_stat3_read(void) +{ + unsigned char r = csr_readl(0xe0005018); + return r; +} +#define CSR_PICORVSPI_STAT4_ADDR 0xe000501c +#define CSR_PICORVSPI_STAT4_SIZE 1 +static inline unsigned char picorvspi_stat4_read(void) +{ + unsigned char r = csr_readl(0xe000501c); + return r; +} + +/* reboot */ +#define CSR_REBOOT_BASE 0xe0006000 +#define CSR_REBOOT_CTRL_ADDR 0xe0006000 +#define CSR_REBOOT_CTRL_SIZE 1 +static inline unsigned char reboot_ctrl_read(void) +{ + unsigned char r = csr_readl(0xe0006000); + return r; +} +static inline void reboot_ctrl_write(unsigned char value) +{ + csr_writel(value, 0xe0006000); +} +#define CSR_REBOOT_ADDR_ADDR 0xe0006004 +#define CSR_REBOOT_ADDR_SIZE 4 +static inline unsigned int reboot_addr_read(void) +{ + unsigned int r = csr_readl(0xe0006004); + r <<= 8; + r |= csr_readl(0xe0006008); + r <<= 8; + r |= csr_readl(0xe000600c); + r <<= 8; + r |= csr_readl(0xe0006010); + return r; +} +static inline void reboot_addr_write(unsigned int value) +{ + csr_writel(value >> 24, 0xe0006004); + csr_writel(value >> 16, 0xe0006008); + csr_writel(value >> 8, 0xe000600c); + csr_writel(value, 0xe0006010); +} + +/* rgb */ +#define CSR_RGB_BASE 0xe0006800 +#define CSR_RGB_DAT_ADDR 0xe0006800 +#define CSR_RGB_DAT_SIZE 1 +static inline unsigned char rgb_dat_read(void) +{ + unsigned char r = csr_readl(0xe0006800); + return r; +} +static inline void rgb_dat_write(unsigned char value) +{ + csr_writel(value, 0xe0006800); +} +#define CSR_RGB_ADDR_ADDR 0xe0006804 +#define CSR_RGB_ADDR_SIZE 1 +static inline unsigned char rgb_addr_read(void) +{ + unsigned char r = csr_readl(0xe0006804); + return r; +} +static inline void rgb_addr_write(unsigned char value) +{ + csr_writel(value, 0xe0006804); +} +#define CSR_RGB_CTRL_ADDR 0xe0006808 +#define CSR_RGB_CTRL_SIZE 1 +static inline unsigned char rgb_ctrl_read(void) +{ + unsigned char r = csr_readl(0xe0006808); + return r; +} +static inline void rgb_ctrl_write(unsigned char value) +{ + csr_writel(value, 0xe0006808); +} + +/* timer0 */ +#define CSR_TIMER0_BASE 0xe0002800 +#define CSR_TIMER0_LOAD_ADDR 0xe0002800 +#define CSR_TIMER0_LOAD_SIZE 4 +static inline unsigned int timer0_load_read(void) +{ + unsigned int r = csr_readl(0xe0002800); + r <<= 8; + r |= csr_readl(0xe0002804); + r <<= 8; + r |= csr_readl(0xe0002808); + r <<= 8; + r |= csr_readl(0xe000280c); + return r; +} +static inline void timer0_load_write(unsigned int value) +{ + csr_writel(value >> 24, 0xe0002800); + csr_writel(value >> 16, 0xe0002804); + csr_writel(value >> 8, 0xe0002808); + csr_writel(value, 0xe000280c); +} +#define CSR_TIMER0_RELOAD_ADDR 0xe0002810 +#define CSR_TIMER0_RELOAD_SIZE 4 +static inline unsigned int timer0_reload_read(void) +{ + unsigned int r = csr_readl(0xe0002810); + r <<= 8; + r |= csr_readl(0xe0002814); + r <<= 8; + r |= csr_readl(0xe0002818); + r <<= 8; + r |= csr_readl(0xe000281c); + return r; +} +static inline void timer0_reload_write(unsigned int value) +{ + csr_writel(value >> 24, 0xe0002810); + csr_writel(value >> 16, 0xe0002814); + csr_writel(value >> 8, 0xe0002818); + csr_writel(value, 0xe000281c); +} +#define CSR_TIMER0_EN_ADDR 0xe0002820 +#define CSR_TIMER0_EN_SIZE 1 +static inline unsigned char timer0_en_read(void) +{ + unsigned char r = csr_readl(0xe0002820); + return r; +} +static inline void timer0_en_write(unsigned char value) +{ + csr_writel(value, 0xe0002820); +} +#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824 +#define CSR_TIMER0_UPDATE_VALUE_SIZE 1 +static inline unsigned char timer0_update_value_read(void) +{ + unsigned char r = csr_readl(0xe0002824); + return r; +} +static inline void timer0_update_value_write(unsigned char value) +{ + csr_writel(value, 0xe0002824); +} +#define CSR_TIMER0_VALUE_ADDR 0xe0002828 +#define CSR_TIMER0_VALUE_SIZE 4 +static inline unsigned int timer0_value_read(void) +{ + unsigned int r = csr_readl(0xe0002828); + r <<= 8; + r |= csr_readl(0xe000282c); + r <<= 8; + r |= csr_readl(0xe0002830); + r <<= 8; + r |= csr_readl(0xe0002834); + return r; +} +#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838 +#define CSR_TIMER0_EV_STATUS_SIZE 1 +static inline unsigned char timer0_ev_status_read(void) +{ + unsigned char r = csr_readl(0xe0002838); + return r; +} +static inline void timer0_ev_status_write(unsigned char value) +{ + csr_writel(value, 0xe0002838); +} +#define CSR_TIMER0_EV_PENDING_ADDR 0xe000283c +#define CSR_TIMER0_EV_PENDING_SIZE 1 +static inline unsigned char timer0_ev_pending_read(void) +{ + unsigned char r = csr_readl(0xe000283c); + return r; +} +static inline void timer0_ev_pending_write(unsigned char value) +{ + csr_writel(value, 0xe000283c); +} +#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840 +#define CSR_TIMER0_EV_ENABLE_SIZE 1 +static inline unsigned char timer0_ev_enable_read(void) +{ + unsigned char r = csr_readl(0xe0002840); + return r; +} +static inline void timer0_ev_enable_write(unsigned char value) +{ + csr_writel(value, 0xe0002840); +} + +/* touch */ +#define CSR_TOUCH_BASE 0xe0005800 +#define CSR_TOUCH_O_ADDR 0xe0005800 +#define CSR_TOUCH_O_SIZE 1 +static inline unsigned char touch_o_read(void) +{ + unsigned char r = csr_readl(0xe0005800); + return r; +} +static inline void touch_o_write(unsigned char value) +{ + csr_writel(value, 0xe0005800); +} +#define CSR_TOUCH_OE_ADDR 0xe0005804 +#define CSR_TOUCH_OE_SIZE 1 +static inline unsigned char touch_oe_read(void) +{ + unsigned char r = csr_readl(0xe0005804); + return r; +} +static inline void touch_oe_write(unsigned char value) +{ + csr_writel(value, 0xe0005804); +} +#define CSR_TOUCH_I_ADDR 0xe0005808 +#define CSR_TOUCH_I_SIZE 1 +static inline unsigned char touch_i_read(void) +{ + unsigned char r = csr_readl(0xe0005808); + return r; +} + +/* usb */ +#define CSR_USB_BASE 0xe0004800 +#define CSR_USB_PULLUP_OUT_ADDR 0xe0004800 +#define CSR_USB_PULLUP_OUT_SIZE 1 +static inline unsigned char usb_pullup_out_read(void) +{ + unsigned char r = csr_readl(0xe0004800); + return r; +} +static inline void usb_pullup_out_write(unsigned char value) +{ + csr_writel(value, 0xe0004800); +} +#define CSR_USB_EP_0_OUT_EV_STATUS_ADDR 0xe0004804 +#define CSR_USB_EP_0_OUT_EV_STATUS_SIZE 1 +static inline unsigned char usb_ep_0_out_ev_status_read(void) +{ + unsigned char r = csr_readl(0xe0004804); + return r; +} +static inline void usb_ep_0_out_ev_status_write(unsigned char value) +{ + csr_writel(value, 0xe0004804); +} +#define CSR_USB_EP_0_OUT_EV_PENDING_ADDR 0xe0004808 +#define CSR_USB_EP_0_OUT_EV_PENDING_SIZE 1 +static inline unsigned char usb_ep_0_out_ev_pending_read(void) +{ + unsigned char r = csr_readl(0xe0004808); + return r; +} +static inline void usb_ep_0_out_ev_pending_write(unsigned char value) +{ + csr_writel(value, 0xe0004808); +} +#define CSR_USB_EP_0_OUT_EV_ENABLE_ADDR 0xe000480c +#define CSR_USB_EP_0_OUT_EV_ENABLE_SIZE 1 +static inline unsigned char usb_ep_0_out_ev_enable_read(void) +{ + unsigned char r = csr_readl(0xe000480c); + return r; +} +static inline void usb_ep_0_out_ev_enable_write(unsigned char value) +{ + csr_writel(value, 0xe000480c); +} +#define CSR_USB_EP_0_OUT_LAST_TOK_ADDR 0xe0004810 +#define CSR_USB_EP_0_OUT_LAST_TOK_SIZE 1 +static inline unsigned char usb_ep_0_out_last_tok_read(void) +{ + unsigned char r = csr_readl(0xe0004810); + return r; +} +#define CSR_USB_EP_0_OUT_RESPOND_ADDR 0xe0004814 +#define CSR_USB_EP_0_OUT_RESPOND_SIZE 1 +static inline unsigned char usb_ep_0_out_respond_read(void) +{ + unsigned char r = csr_readl(0xe0004814); + return r; +} +static inline void usb_ep_0_out_respond_write(unsigned char value) +{ + csr_writel(value, 0xe0004814); +} +#define CSR_USB_EP_0_OUT_DTB_ADDR 0xe0004818 +#define CSR_USB_EP_0_OUT_DTB_SIZE 1 +static inline unsigned char usb_ep_0_out_dtb_read(void) +{ + unsigned char r = csr_readl(0xe0004818); + return r; +} +static inline void usb_ep_0_out_dtb_write(unsigned char value) +{ + csr_writel(value, 0xe0004818); +} +#define CSR_USB_EP_0_OUT_OBUF_HEAD_ADDR 0xe000481c +#define CSR_USB_EP_0_OUT_OBUF_HEAD_SIZE 1 +static inline unsigned char usb_ep_0_out_obuf_head_read(void) +{ + unsigned char r = csr_readl(0xe000481c); + return r; +} +static inline void usb_ep_0_out_obuf_head_write(unsigned char value) +{ + csr_writel(value, 0xe000481c); +} +#define CSR_USB_EP_0_OUT_OBUF_EMPTY_ADDR 0xe0004820 +#define CSR_USB_EP_0_OUT_OBUF_EMPTY_SIZE 1 +static inline unsigned char usb_ep_0_out_obuf_empty_read(void) +{ + unsigned char r = csr_readl(0xe0004820); + return r; +} +#define CSR_USB_EP_0_IN_EV_STATUS_ADDR 0xe0004824 +#define CSR_USB_EP_0_IN_EV_STATUS_SIZE 1 +static inline unsigned char usb_ep_0_in_ev_status_read(void) +{ + unsigned char r = csr_readl(0xe0004824); + return r; +} +static inline void usb_ep_0_in_ev_status_write(unsigned char value) +{ + csr_writel(value, 0xe0004824); +} +#define CSR_USB_EP_0_IN_EV_PENDING_ADDR 0xe0004828 +#define CSR_USB_EP_0_IN_EV_PENDING_SIZE 1 +static inline unsigned char usb_ep_0_in_ev_pending_read(void) +{ + unsigned char r = csr_readl(0xe0004828); + return r; +} +static inline void usb_ep_0_in_ev_pending_write(unsigned char value) +{ + csr_writel(value, 0xe0004828); +} +#define CSR_USB_EP_0_IN_EV_ENABLE_ADDR 0xe000482c +#define CSR_USB_EP_0_IN_EV_ENABLE_SIZE 1 +static inline unsigned char usb_ep_0_in_ev_enable_read(void) +{ + unsigned char r = csr_readl(0xe000482c); + return r; +} +static inline void usb_ep_0_in_ev_enable_write(unsigned char value) +{ + csr_writel(value, 0xe000482c); +} +#define CSR_USB_EP_0_IN_LAST_TOK_ADDR 0xe0004830 +#define CSR_USB_EP_0_IN_LAST_TOK_SIZE 1 +static inline unsigned char usb_ep_0_in_last_tok_read(void) +{ + unsigned char r = csr_readl(0xe0004830); + return r; +} +#define CSR_USB_EP_0_IN_RESPOND_ADDR 0xe0004834 +#define CSR_USB_EP_0_IN_RESPOND_SIZE 1 +static inline unsigned char usb_ep_0_in_respond_read(void) +{ + unsigned char r = csr_readl(0xe0004834); + return r; +} +static inline void usb_ep_0_in_respond_write(unsigned char value) +{ + csr_writel(value, 0xe0004834); +} +#define CSR_USB_EP_0_IN_DTB_ADDR 0xe0004838 +#define CSR_USB_EP_0_IN_DTB_SIZE 1 +static inline unsigned char usb_ep_0_in_dtb_read(void) +{ + unsigned char r = csr_readl(0xe0004838); + return r; +} +static inline void usb_ep_0_in_dtb_write(unsigned char value) +{ + csr_writel(value, 0xe0004838); +} +#define CSR_USB_EP_0_IN_IBUF_HEAD_ADDR 0xe000483c +#define CSR_USB_EP_0_IN_IBUF_HEAD_SIZE 1 +static inline unsigned char usb_ep_0_in_ibuf_head_read(void) +{ + unsigned char r = csr_readl(0xe000483c); + return r; +} +static inline void usb_ep_0_in_ibuf_head_write(unsigned char value) +{ + csr_writel(value, 0xe000483c); +} +#define CSR_USB_EP_0_IN_IBUF_EMPTY_ADDR 0xe0004840 +#define CSR_USB_EP_0_IN_IBUF_EMPTY_SIZE 1 +static inline unsigned char usb_ep_0_in_ibuf_empty_read(void) +{ + unsigned char r = csr_readl(0xe0004840); + return r; +} +#define CSR_USB_EP_1_IN_EV_STATUS_ADDR 0xe0004844 +#define CSR_USB_EP_1_IN_EV_STATUS_SIZE 1 +static inline unsigned char usb_ep_1_in_ev_status_read(void) +{ + unsigned char r = csr_readl(0xe0004844); + return r; +} +static inline void usb_ep_1_in_ev_status_write(unsigned char value) +{ + csr_writel(value, 0xe0004844); +} +#define CSR_USB_EP_1_IN_EV_PENDING_ADDR 0xe0004848 +#define CSR_USB_EP_1_IN_EV_PENDING_SIZE 1 +static inline unsigned char usb_ep_1_in_ev_pending_read(void) +{ + unsigned char r = csr_readl(0xe0004848); + return r; +} +static inline void usb_ep_1_in_ev_pending_write(unsigned char value) +{ + csr_writel(value, 0xe0004848); +} +#define CSR_USB_EP_1_IN_EV_ENABLE_ADDR 0xe000484c +#define CSR_USB_EP_1_IN_EV_ENABLE_SIZE 1 +static inline unsigned char usb_ep_1_in_ev_enable_read(void) +{ + unsigned char r = csr_readl(0xe000484c); + return r; +} +static inline void usb_ep_1_in_ev_enable_write(unsigned char value) +{ + csr_writel(value, 0xe000484c); +} +#define CSR_USB_EP_1_IN_LAST_TOK_ADDR 0xe0004850 +#define CSR_USB_EP_1_IN_LAST_TOK_SIZE 1 +static inline unsigned char usb_ep_1_in_last_tok_read(void) +{ + unsigned char r = csr_readl(0xe0004850); + return r; +} +#define CSR_USB_EP_1_IN_RESPOND_ADDR 0xe0004854 +#define CSR_USB_EP_1_IN_RESPOND_SIZE 1 +static inline unsigned char usb_ep_1_in_respond_read(void) +{ + unsigned char r = csr_readl(0xe0004854); + return r; +} +static inline void usb_ep_1_in_respond_write(unsigned char value) +{ + csr_writel(value, 0xe0004854); +} +#define CSR_USB_EP_1_IN_DTB_ADDR 0xe0004858 +#define CSR_USB_EP_1_IN_DTB_SIZE 1 +static inline unsigned char usb_ep_1_in_dtb_read(void) +{ + unsigned char r = csr_readl(0xe0004858); + return r; +} +static inline void usb_ep_1_in_dtb_write(unsigned char value) +{ + csr_writel(value, 0xe0004858); +} +#define CSR_USB_EP_1_IN_IBUF_HEAD_ADDR 0xe000485c +#define CSR_USB_EP_1_IN_IBUF_HEAD_SIZE 1 +static inline unsigned char usb_ep_1_in_ibuf_head_read(void) +{ + unsigned char r = csr_readl(0xe000485c); + return r; +} +static inline void usb_ep_1_in_ibuf_head_write(unsigned char value) +{ + csr_writel(value, 0xe000485c); +} +#define CSR_USB_EP_1_IN_IBUF_EMPTY_ADDR 0xe0004860 +#define CSR_USB_EP_1_IN_IBUF_EMPTY_SIZE 1 +static inline unsigned char usb_ep_1_in_ibuf_empty_read(void) +{ + unsigned char r = csr_readl(0xe0004860); + return r; +} +#define CSR_USB_EP_2_OUT_EV_STATUS_ADDR 0xe0004864 +#define CSR_USB_EP_2_OUT_EV_STATUS_SIZE 1 +static inline unsigned char usb_ep_2_out_ev_status_read(void) +{ + unsigned char r = csr_readl(0xe0004864); + return r; +} +static inline void usb_ep_2_out_ev_status_write(unsigned char value) +{ + csr_writel(value, 0xe0004864); +} +#define CSR_USB_EP_2_OUT_EV_PENDING_ADDR 0xe0004868 +#define CSR_USB_EP_2_OUT_EV_PENDING_SIZE 1 +static inline unsigned char usb_ep_2_out_ev_pending_read(void) +{ + unsigned char r = csr_readl(0xe0004868); + return r; +} +static inline void usb_ep_2_out_ev_pending_write(unsigned char value) +{ + csr_writel(value, 0xe0004868); +} +#define CSR_USB_EP_2_OUT_EV_ENABLE_ADDR 0xe000486c +#define CSR_USB_EP_2_OUT_EV_ENABLE_SIZE 1 +static inline unsigned char usb_ep_2_out_ev_enable_read(void) +{ + unsigned char r = csr_readl(0xe000486c); + return r; +} +static inline void usb_ep_2_out_ev_enable_write(unsigned char value) +{ + csr_writel(value, 0xe000486c); +} +#define CSR_USB_EP_2_OUT_LAST_TOK_ADDR 0xe0004870 +#define CSR_USB_EP_2_OUT_LAST_TOK_SIZE 1 +static inline unsigned char usb_ep_2_out_last_tok_read(void) +{ + unsigned char r = csr_readl(0xe0004870); + return r; +} +#define CSR_USB_EP_2_OUT_RESPOND_ADDR 0xe0004874 +#define CSR_USB_EP_2_OUT_RESPOND_SIZE 1 +static inline unsigned char usb_ep_2_out_respond_read(void) +{ + unsigned char r = csr_readl(0xe0004874); + return r; +} +static inline void usb_ep_2_out_respond_write(unsigned char value) +{ + csr_writel(value, 0xe0004874); +} +#define CSR_USB_EP_2_OUT_DTB_ADDR 0xe0004878 +#define CSR_USB_EP_2_OUT_DTB_SIZE 1 +static inline unsigned char usb_ep_2_out_dtb_read(void) +{ + unsigned char r = csr_readl(0xe0004878); + return r; +} +static inline void usb_ep_2_out_dtb_write(unsigned char value) +{ + csr_writel(value, 0xe0004878); +} +#define CSR_USB_EP_2_OUT_OBUF_HEAD_ADDR 0xe000487c +#define CSR_USB_EP_2_OUT_OBUF_HEAD_SIZE 1 +static inline unsigned char usb_ep_2_out_obuf_head_read(void) +{ + unsigned char r = csr_readl(0xe000487c); + return r; +} +static inline void usb_ep_2_out_obuf_head_write(unsigned char value) +{ + csr_writel(value, 0xe000487c); +} +#define CSR_USB_EP_2_OUT_OBUF_EMPTY_ADDR 0xe0004880 +#define CSR_USB_EP_2_OUT_OBUF_EMPTY_SIZE 1 +static inline unsigned char usb_ep_2_out_obuf_empty_read(void) +{ + unsigned char r = csr_readl(0xe0004880); + return r; +} +#define CSR_USB_EP_2_IN_EV_STATUS_ADDR 0xe0004884 +#define CSR_USB_EP_2_IN_EV_STATUS_SIZE 1 +static inline unsigned char usb_ep_2_in_ev_status_read(void) +{ + unsigned char r = csr_readl(0xe0004884); + return r; +} +static inline void usb_ep_2_in_ev_status_write(unsigned char value) +{ + csr_writel(value, 0xe0004884); +} +#define CSR_USB_EP_2_IN_EV_PENDING_ADDR 0xe0004888 +#define CSR_USB_EP_2_IN_EV_PENDING_SIZE 1 +static inline unsigned char usb_ep_2_in_ev_pending_read(void) +{ + unsigned char r = csr_readl(0xe0004888); + return r; +} +static inline void usb_ep_2_in_ev_pending_write(unsigned char value) +{ + csr_writel(value, 0xe0004888); +} +#define CSR_USB_EP_2_IN_EV_ENABLE_ADDR 0xe000488c +#define CSR_USB_EP_2_IN_EV_ENABLE_SIZE 1 +static inline unsigned char usb_ep_2_in_ev_enable_read(void) +{ + unsigned char r = csr_readl(0xe000488c); + return r; +} +static inline void usb_ep_2_in_ev_enable_write(unsigned char value) +{ + csr_writel(value, 0xe000488c); +} +#define CSR_USB_EP_2_IN_LAST_TOK_ADDR 0xe0004890 +#define CSR_USB_EP_2_IN_LAST_TOK_SIZE 1 +static inline unsigned char usb_ep_2_in_last_tok_read(void) +{ + unsigned char r = csr_readl(0xe0004890); + return r; +} +#define CSR_USB_EP_2_IN_RESPOND_ADDR 0xe0004894 +#define CSR_USB_EP_2_IN_RESPOND_SIZE 1 +static inline unsigned char usb_ep_2_in_respond_read(void) +{ + unsigned char r = csr_readl(0xe0004894); + return r; +} +static inline void usb_ep_2_in_respond_write(unsigned char value) +{ + csr_writel(value, 0xe0004894); +} +#define CSR_USB_EP_2_IN_DTB_ADDR 0xe0004898 +#define CSR_USB_EP_2_IN_DTB_SIZE 1 +static inline unsigned char usb_ep_2_in_dtb_read(void) +{ + unsigned char r = csr_readl(0xe0004898); + return r; +} +static inline void usb_ep_2_in_dtb_write(unsigned char value) +{ + csr_writel(value, 0xe0004898); +} +#define CSR_USB_EP_2_IN_IBUF_HEAD_ADDR 0xe000489c +#define CSR_USB_EP_2_IN_IBUF_HEAD_SIZE 1 +static inline unsigned char usb_ep_2_in_ibuf_head_read(void) +{ + unsigned char r = csr_readl(0xe000489c); + return r; +} +static inline void usb_ep_2_in_ibuf_head_write(unsigned char value) +{ + csr_writel(value, 0xe000489c); +} +#define CSR_USB_EP_2_IN_IBUF_EMPTY_ADDR 0xe00048a0 +#define CSR_USB_EP_2_IN_IBUF_EMPTY_SIZE 1 +static inline unsigned char usb_ep_2_in_ibuf_empty_read(void) +{ + unsigned char r = csr_readl(0xe00048a0); + return r; +} + +/* version */ +#define CSR_VERSION_BASE 0xe0007000 +#define CSR_VERSION_MAJOR_ADDR 0xe0007000 +#define CSR_VERSION_MAJOR_SIZE 1 +static inline unsigned char version_major_read(void) +{ + unsigned char r = csr_readl(0xe0007000); + return r; +} +#define CSR_VERSION_MINOR_ADDR 0xe0007004 +#define CSR_VERSION_MINOR_SIZE 1 +static inline unsigned char version_minor_read(void) +{ + unsigned char r = csr_readl(0xe0007004); + return r; +} +#define CSR_VERSION_REVISION_ADDR 0xe0007008 +#define CSR_VERSION_REVISION_SIZE 1 +static inline unsigned char version_revision_read(void) +{ + unsigned char r = csr_readl(0xe0007008); + return r; +} +#define CSR_VERSION_GITREV_ADDR 0xe000700c +#define CSR_VERSION_GITREV_SIZE 4 +static inline unsigned int version_gitrev_read(void) +{ + unsigned int r = csr_readl(0xe000700c); + r <<= 8; + r |= csr_readl(0xe0007010); + r <<= 8; + r |= csr_readl(0xe0007014); + r <<= 8; + r |= csr_readl(0xe0007018); + return r; +} +#define CSR_VERSION_GITEXTRA_ADDR 0xe000701c +#define CSR_VERSION_GITEXTRA_SIZE 2 +static inline unsigned short int version_gitextra_read(void) +{ + unsigned short int r = csr_readl(0xe000701c); + r <<= 8; + r |= csr_readl(0xe0007020); + return r; +} +#define CSR_VERSION_DIRTY_ADDR 0xe0007024 +#define CSR_VERSION_DIRTY_SIZE 1 +static inline unsigned char version_dirty_read(void) +{ + unsigned char r = csr_readl(0xe0007024); + return r; +} + +/* constants */ +#define NMI_INTERRUPT 0 +static inline int nmi_interrupt_read(void) +{ + return 0; +} +#define TIMER0_INTERRUPT 1 +static inline int timer0_interrupt_read(void) +{ + return 1; +} +#define UART_INTERRUPT 2 +static inline int uart_interrupt_read(void) +{ + return 2; +} +#define USB_INTERRUPT 3 +static inline int usb_interrupt_read(void) +{ + return 3; +} +#define CSR_DATA_WIDTH 8 +static inline int csr_data_width_read(void) +{ + return 8; +} +#define SYSTEM_CLOCK_FREQUENCY 12000000 +static inline int system_clock_frequency_read(void) +{ + return 12000000; +} +#define CONFIG_CLOCK_FREQUENCY 12000000 +static inline int config_clock_frequency_read(void) +{ + return 12000000; +} +#define CONFIG_CPU_RESET_ADDR 0 +static inline int config_cpu_reset_addr_read(void) +{ + return 0; +} +#define CONFIG_CPU_TYPE "VEXRISCV" +static inline const char *config_cpu_type_read(void) +{ + return "VEXRISCV"; +} +#define CONFIG_CPU_VARIANT "VEXRISCV" +static inline const char *config_cpu_variant_read(void) +{ + return "VEXRISCV"; +} +#define CONFIG_CSR_DATA_WIDTH 8 +static inline int config_csr_data_width_read(void) +{ + return 8; +} + +#endif diff --git a/sw/include/fomu/mem.h b/sw/include/fomu/mem.h new file mode 100644 index 0000000..6fe108e --- /dev/null +++ b/sw/include/fomu/mem.h @@ -0,0 +1,16 @@ +#ifndef __GENERATED_MEM_H +#define __GENERATED_MEM_H + +#define VEXRISCV_DEBUG_BASE 0xf00f0000 +#define VEXRISCV_DEBUG_SIZE 0x00000010 + +#define SRAM_BASE 0x10000000 +#define SRAM_SIZE 0x00020000 + +#define ROM_BASE 0x00000000 +#define ROM_SIZE 0x00002000 + +#define SPIFLASH_BASE 0x20000000 +#define SPIFLASH_SIZE 0x00200000 + +#endif diff --git a/sw/include/irq.h b/sw/include/irq.h new file mode 100644 index 0000000..63b3ae8 --- /dev/null +++ b/sw/include/irq.h @@ -0,0 +1,145 @@ +#ifndef __IRQ_H +#define __IRQ_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +#ifdef __picorv32__ +// PicoRV32 has a very limited interrupt support, implemented via custom +// instructions. It also doesn't have a global interrupt enable/disable, so +// we have to emulate it via saving and restoring a mask and using 0/~1 as a +// hardware mask. +// Due to all this somewhat low-level mess, all of the glue is implemented in +// the RiscV crt0, and this header is kept as a thin wrapper. Since interrupts +// managed by this layer, do not call interrupt instructions directly, as the +// state will go out of sync with the hardware. + +// Read only. +extern unsigned int _irq_pending; +// Read only. +extern unsigned int _irq_mask; +// Read only. +extern unsigned int _irq_enabled; +extern void _irq_enable(void); +extern void _irq_disable(void); +extern void _irq_setmask(unsigned int); +#endif + +static inline unsigned int irq_getie(void) +{ +#if defined (__lm32__) + unsigned int ie; + __asm__ __volatile__("rcsr %0, IE" : "=r" (ie)); + return ie; +#elif defined (__or1k__) + return !!(mfspr(SPR_SR) & SPR_SR_IEE); +#elif defined (__picorv32__) + return _irq_enabled != 0; +#elif defined (__vexriscv__) + return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0; +#elif defined (__minerva__) + return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0; +#else +#error Unsupported architecture +#endif +} + +static inline void irq_setie(unsigned int ie) +{ +#if defined (__lm32__) + __asm__ __volatile__("wcsr IE, %0" : : "r" (ie)); +#elif defined (__or1k__) + if (ie & 0x1) + mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE); + else + mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_IEE); +#elif defined (__picorv32__) + if (ie & 0x1) + _irq_enable(); + else + _irq_disable(); +#elif defined (__vexriscv__) + if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE); +#elif defined (__minerva__) + if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE); +#else +#error Unsupported architecture +#endif +} + +static inline unsigned int irq_getmask(void) +{ +#if defined (__lm32__) + unsigned int mask; + __asm__ __volatile__("rcsr %0, IM" : "=r" (mask)); + return mask; +#elif defined (__or1k__) + return mfspr(SPR_PICMR); +#elif defined (__picorv32__) + // PicoRV32 interrupt mask bits are high-disabled. This is the inverse of how + // LiteX sees things. + return ~_irq_mask; +#elif defined (__vexriscv__) + unsigned int mask; + asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK)); + return mask; +#elif defined (__minerva__) + unsigned int mask; + asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK)); + return mask; +#else +#error Unsupported architecture +#endif +} + +static inline void irq_setmask(unsigned int mask) +{ +#if defined (__lm32__) + __asm__ __volatile__("wcsr IM, %0" : : "r" (mask)); +#elif defined (__or1k__) + mtspr(SPR_PICMR, mask); +#elif defined (__picorv32__) + // PicoRV32 interrupt mask bits are high-disabled. This is the inverse of how + // LiteX sees things. + _irq_setmask(~mask); +#elif defined (__vexriscv__) + asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask)); +#elif defined (__minerva__) + asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask)); +#else +#error Unsupported architecture +#endif +} + +static inline unsigned int irq_pending(void) +{ +#if defined (__lm32__) + unsigned int pending; + __asm__ __volatile__("rcsr %0, IP" : "=r" (pending)); + return pending; +#elif defined (__or1k__) + return mfspr(SPR_PICSR); +#elif defined (__picorv32__) + return _irq_pending; +#elif defined (__vexriscv__) + unsigned int pending; + asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING)); + return pending; +#elif defined (__minerva__) + unsigned int pending; + asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING)); + return pending; +#else +#error Unsupported architecture +#endif +} + +#ifdef __cplusplus +} +#endif + +#endif /* __IRQ_H */ diff --git a/sw/include/rgb.h b/sw/include/rgb.h new file mode 100644 index 0000000..6a68122 --- /dev/null +++ b/sw/include/rgb.h @@ -0,0 +1,10 @@ +#ifndef _RGB_H_ +#define _RGB_H_ + +void rgb_init(void); +void rgb_mode_idle(void); +void rgb_mode_done(void); +void rgb_mode_writing(void); +void rgb_mode_error(void); + +#endif /* _RGB_H_ */ \ No newline at end of file diff --git a/sw/include/riscv.h b/sw/include/riscv.h new file mode 100644 index 0000000..6e8f622 --- /dev/null +++ b/sw/include/riscv.h @@ -0,0 +1,54 @@ +#ifndef RISCV_DEFS_H__ +#define RISCV_DEFS_H__ + +#include + +#define CSR_MSTATUS_MIE 0x8 + +#define CSR_IRQ_MASK 0xBC0 +#define CSR_IRQ_PENDING 0xFC0 + +#define CSR_DCACHE_INFO 0xCC0 + +#ifdef __cplusplus +extern "C" { +#endif + +void flush_cpu_icache(void); +void flush_cpu_dcache(void); +void flush_l2_cache(void); + +#define csrr(reg) ({ unsigned long __tmp; \ + asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ + __tmp; }) + +#define csrw(reg, val) ({ \ + if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ + asm volatile ("csrw " #reg ", %0" :: "i"(val)); \ + else \ + asm volatile ("csrw " #reg ", %0" :: "r"(val)); }) + +#define csrs(reg, bit) ({ \ + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ + asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); \ + else \ + asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); }) + +#define csrc(reg, bit) ({ \ + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ + asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); \ + else \ + asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); }) + +#ifdef __cplusplus +} +#endif + +__attribute__((noreturn)) void reboot(void); + +__attribute__((noreturn)) static inline void warmboot_to_image(uint8_t image_index) { + reboot_ctrl_write(0xac | (image_index & 3) << 0); + while (1); +} + +#endif /* RISCV_DEFS_H__ */ diff --git a/sw/include/spi.h b/sw/include/spi.h new file mode 100644 index 0000000..b537f2d --- /dev/null +++ b/sw/include/spi.h @@ -0,0 +1,94 @@ +#ifndef BB_SPI_H_ +#define BB_SPI_H_ + +#include + +enum spi_state { + SS_UNCONFIGURED = 0, + SS_SINGLE, + SS_DUAL_RX, + SS_DUAL_TX, + SS_QUAD_RX, + SS_QUAD_TX, + SS_HARDWARE, +}; + +enum spi_type { + ST_UNCONFIGURED, + ST_SINGLE, + ST_DUAL, + ST_QUAD, + ST_QPI, +}; + +enum spi_pin { + SP_MOSI, + SP_MISO, + SP_HOLD, + SP_WP, + SP_CS, + SP_CLK, + SP_D0, + SP_D1, + SP_D2, + SP_D3, +}; + +struct spi_id { + uint8_t manufacturer_id; // Result from 0x90 + uint8_t device_id; // Result from 0x90 + uint8_t _manufacturer_id; // Result from 0x9f + uint8_t memory_type; // Result from 0x9f + uint8_t memory_size; // Result from 0x9f + uint8_t signature; // Result from 0xab + uint8_t serial[4]; // Result from 0x4b + int bytes; // -1 if unknown + const char *manufacturer; + const char *model; + const char *capacity; +}; + +struct ff_spi; + +void spiPause(struct ff_spi *spi); +void spiBegin(struct ff_spi *spi); +void spiEnd(struct ff_spi *spi); + +//void spiSingleTx(struct ff_spi *spi, uint8_t out); +//uint8_t spiSingleRx(struct ff_spi *spi); +//void spiDualTx(struct ff_spi *spi, uint8_t out); +//void spiQuadTx(struct ff_spi *spi, uint8_t out); +void spiCommand(struct ff_spi *spi, uint8_t cmd); +//uint8_t spiDualRx(struct ff_spi *spi); +//uint8_t spiQuadRx(struct ff_spi *spi); +int spiTx(struct ff_spi *spi, uint8_t word); +uint8_t spiRx(struct ff_spi *spi); +uint8_t spiReadStatus(struct ff_spi *spi, uint8_t sr); +void spiWriteStatus(struct ff_spi *spi, uint8_t sr, uint8_t val); +void spiReadSecurity(struct ff_spi *spi, uint8_t sr, uint8_t security[256]); +void spiWriteSecurity(struct ff_spi *spi, uint8_t sr, uint8_t security[256]); +int spiSetType(struct ff_spi *spi, enum spi_type type); +int spiRead(struct ff_spi *spi, uint32_t addr, uint8_t *data, unsigned int count); +int spiIsBusy(struct ff_spi *spi); +int spiBeginErase32(struct ff_spi *spi, uint32_t erase_addr); +int spiBeginErase64(struct ff_spi *spi, uint32_t erase_addr); +int spiBeginWrite(struct ff_spi *spi, uint32_t addr, const void *data, unsigned int count); +void spiEnableQuad(void); + +struct spi_id spiId(struct ff_spi *spi); +void spiOverrideSize(struct ff_spi *spi, uint32_t new_size); + +//int spi_wait_for_not_busy(struct ff_spi *spi); +int spiWrite(struct ff_spi *spi, uint32_t addr, const uint8_t *data, unsigned int count); +uint8_t spiReset(struct ff_spi *spi); +int spiInit(struct ff_spi *spi); + +void spiHold(struct ff_spi *spi); +void spiUnhold(struct ff_spi *spi); +void spiSwapTxRx(struct ff_spi *spi); + +struct ff_spi *spiAlloc(void); +void spiSetPin(struct ff_spi *spi, enum spi_pin pin, int val); +void spiFree(void); + +#endif /* BB_SPI_H_ */ diff --git a/sw/include/time.h b/sw/include/time.h new file mode 100644 index 0000000..cbbc688 --- /dev/null +++ b/sw/include/time.h @@ -0,0 +1,16 @@ +#ifndef __TIME_H +#define __TIME_H + +#ifdef __cplusplus +extern "C" { +#endif + +void time_init(void); +int elapsed(int *last_event, int period); +void msleep(int ms); + +#ifdef __cplusplus +} +#endif + +#endif /* __TIME_H */ diff --git a/sw/include/usb-cdc.h b/sw/include/usb-cdc.h new file mode 100644 index 0000000..20b7836 --- /dev/null +++ b/sw/include/usb-cdc.h @@ -0,0 +1,162 @@ +/** @defgroup usb_cdc_defines USB CDC Type Definitions + +@brief Defined Constants and Types for the USB CDC Type Definitions + +@ingroup USB_defines + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2010 +Gareth McMullin + +@date 10 March 2013 + +LGPL License Terms @ref lgpl_license +*/ + +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Gareth McMullin + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/**@{*/ + +#ifndef __CDC_H +#define __CDC_H + +/* Definitions of Communications Device Class from + * "Universal Serial Bus Class Definitions for Communications Devices + * Revision 1.2" + */ + +/* Table 2: Communications Device Class Code */ +#define USB_CLASS_CDC 0x02 + +/* Table 4: Class Subclass Code */ +#define USB_CDC_SUBCLASS_DLCM 0x01 +#define USB_CDC_SUBCLASS_ACM 0x02 +/* ... */ + +/* Table 5 Communications Interface Class Control Protocol Codes */ +#define USB_CDC_PROTOCOL_NONE 0x00 +#define USB_CDC_PROTOCOL_AT 0x01 +/* ... */ + +/* Table 6: Data Interface Class Code */ +#define USB_CLASS_DATA 0x0A + +/* Table 12: Type Values for the bDescriptorType Field */ +#define CS_INTERFACE 0x24 +#define CS_ENDPOINT 0x25 + +/* Table 13: bDescriptor SubType in Communications Class Functional + * Descriptors */ +#define USB_CDC_TYPE_HEADER 0x00 +#define USB_CDC_TYPE_CALL_MANAGEMENT 0x01 +#define USB_CDC_TYPE_ACM 0x02 +/* ... */ +#define USB_CDC_TYPE_UNION 0x06 +/* ... */ + +/* Table 15: Class-Specific Descriptor Header Format */ +struct usb_cdc_header_descriptor { + uint8_t bFunctionLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubtype; + uint16_t bcdCDC; +} __attribute__((packed)); + +/* Table 16: Union Interface Functional Descriptor */ +struct usb_cdc_union_descriptor { + uint8_t bFunctionLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubtype; + uint8_t bControlInterface; + uint8_t bSubordinateInterface0; + /* ... */ +} __attribute__((packed)); + + +/* Definitions for Abstract Control Model devices from: + * "Universal Serial Bus Communications Class Subclass Specification for + * PSTN Devices" + */ + +/* Table 3: Call Management Functional Descriptor */ +struct usb_cdc_call_management_descriptor { + uint8_t bFunctionLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubtype; + uint8_t bmCapabilities; + uint8_t bDataInterface; +} __attribute__((packed)); + +/* Table 4: Abstract Control Management Functional Descriptor */ +struct usb_cdc_acm_descriptor { + uint8_t bFunctionLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubtype; + uint8_t bmCapabilities; +} __attribute__((packed)); + +/* Table 13: Class-Specific Request Codes for PSTN subclasses */ +/* ... */ +#define USB_CDC_REQ_SET_LINE_CODING 0x20 +/* ... */ +#define USB_CDC_REQ_SET_CONTROL_LINE_STATE 0x22 +/* ... */ + +/* Table 17: Line Coding Structure */ +struct usb_cdc_line_coding { + uint32_t dwDTERate; + uint8_t bCharFormat; + uint8_t bParityType; + uint8_t bDataBits; +} __attribute__((packed)); + +enum usb_cdc_line_coding_bCharFormat { + USB_CDC_1_STOP_BITS = 0, + USB_CDC_1_5_STOP_BITS = 1, + USB_CDC_2_STOP_BITS = 2, +}; + +enum usb_cdc_line_coding_bParityType { + USB_CDC_NO_PARITY = 0, + USB_CDC_ODD_PARITY = 1, + USB_CDC_EVEN_PARITY = 2, + USB_CDC_MARK_PARITY = 3, + USB_CDC_SPACE_PARITY = 4, +}; + +/* Table 30: Class-Specific Notification Codes for PSTN subclasses */ +/* ... */ +#define USB_CDC_NOTIFY_SERIAL_STATE 0x20 +/* ... */ + +/* Notification Structure */ +struct usb_cdc_notification { + uint8_t bmRequestType; + uint8_t bNotification; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} __attribute__((packed)); + +#endif + +/**@}*/ + diff --git a/sw/include/usb-desc.h b/sw/include/usb-desc.h new file mode 100644 index 0000000..ba132ed --- /dev/null +++ b/sw/include/usb-desc.h @@ -0,0 +1,101 @@ +/* Teensyduino Core Library + * http://www.pjrc.com/teensy/ + * Copyright (c) 2013 PJRC.COM, LLC. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * 1. The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * 2. If the Software is incorporated into a build system that allows + * selection among a list of target devices, then similar target + * devices manufactured by PJRC.COM must be included in the list of + * target devices and selectable in the same manner. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef _usb_desc_h_ +#define _usb_desc_h_ + +#include +#include + +struct usb_setup_request { + union { + struct { + uint8_t bmRequestType; + uint8_t bRequest; + }; + uint16_t wRequestAndType; + }; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +}; + +struct usb_string_descriptor_struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t wString[]; +}; + +#define NUM_USB_BUFFERS 8 +#define VENDOR_ID 0x1209 // pid.codes +#define PRODUCT_ID 0x5bf0 // Assigned to Fomu project +#define DEVICE_VER 0x0101 // Bootloader version +#define MANUFACTURER_NAME u"Foosn" +#define MANUFACTURER_NAME_LEN sizeof(MANUFACTURER_NAME) +#define PRODUCT_NAME u"Fomu Factory Test " GIT_VERSION +#define PRODUCT_NAME_LEN sizeof(PRODUCT_NAME) +#define EP0_SIZE 64 +#define NUM_INTERFACE 1 +#define CONFIG_DESC_SIZE 67 +#define USB_DT_INTERFACE_SIZE 9 + +/* USB Descriptor Types - Table 9-5 */ +#define USB_DT_DEVICE 1 +#define USB_DT_CONFIGURATION 2 +#define USB_DT_STRING 3 +#define USB_DT_INTERFACE 4 +#define USB_DT_ENDPOINT 5 +#define USB_DT_DEVICE_QUALIFIER 6 +#define USB_DT_OTHER_SPEED_CONFIGURATION 7 +#define USB_DT_INTERFACE_POWER 8 +/* From ECNs */ +#define USB_DT_OTG 9 +#define USB_DT_DEBUG 10 +#define USB_DT_INTERFACE_ASSOCIATION 11 + +#define USB_DT_ENDPOINT_SIZE 7 + +/* USB Endpoint Descriptor bmAttributes bit definitions - Table 9-13 */ +/* bits 1..0 : transfer type */ +#define USB_ENDPOINT_ATTR_CONTROL 0x00 +#define USB_ENDPOINT_ATTR_ISOCHRONOUS 0x01 +#define USB_ENDPOINT_ATTR_BULK 0x02 +#define USB_ENDPOINT_ATTR_INTERRUPT 0x03 +#define USB_ENDPOINT_ATTR_TYPE 0x03 + +typedef struct { + uint16_t wValue; + uint16_t length; + const uint8_t *addr; +} usb_descriptor_list_t; + +extern const usb_descriptor_list_t usb_descriptor_list[]; + +#endif diff --git a/sw/include/usb.h b/sw/include/usb.h new file mode 100644 index 0000000..953345e --- /dev/null +++ b/sw/include/usb.h @@ -0,0 +1,30 @@ +#ifndef __USB_H +#define __USB_H + +#ifdef __cplusplus +extern "C" { +#endif + +struct usb_setup_request; + +void usb_isr(void); +void usb_init(void); +void usb_connect(void); +void usb_idle(void); +void usb_disconnect(void); + +int usb_irq_happened(void); +void usb_setup(const struct usb_setup_request *setup); +void usb_send(const void *data, int total_count); +void usb_ack_in(void); +void usb_ack_out(void); +void usb_err(void); +int usb_recv(void *buffer, unsigned int buffer_len); +void usb_poll(void); +void usb_wait_for_send_done(void); + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/sw/ld/linker.ld b/sw/ld/linker.ld new file mode 100644 index 0000000..5796f16 --- /dev/null +++ b/sw/ld/linker.ld @@ -0,0 +1,55 @@ +INCLUDE output_format.ld +ENTRY(_start) + +__DYNAMIC = 0; + +INCLUDE regions.ld + +SECTIONS +{ + .text : + { + _ftext = .; + *(.text.start) + *(.text .stub .text.* .gnu.linkonce.t.*) + _etext = .; + } > rom + + .rodata : + { + . = ALIGN(4); + _frodata = .; + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.rodata1) + *(.srodata) + _erodata = .; + } > rom + + .data : AT (ADDR(.rodata) + SIZEOF (.rodata)) + { + . = ALIGN(4); + _fdata = .; + *(.data .data.* .gnu.linkonce.d.*) + *(.data1) + _gp = ALIGN(16); + *(.sdata .sdata.* .gnu.linkonce.s.* .sdata2 .sdata2.*) + _edata = ALIGN(16); /* Make sure _edata is >= _gp. */ + } > sram + + .bss : + { + . = ALIGN(4); + _fbss = .; + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + _end = .; + } > sram +} + +PROVIDE(_fstack = ORIGIN(sram) + LENGTH(sram) - 4); diff --git a/sw/ld/output_format.ld b/sw/ld/output_format.ld new file mode 100644 index 0000000..5e76f5f --- /dev/null +++ b/sw/ld/output_format.ld @@ -0,0 +1 @@ +OUTPUT_FORMAT("elf32-littleriscv") diff --git a/sw/ld/regions.ld b/sw/ld/regions.ld new file mode 100644 index 0000000..ce6c087 --- /dev/null +++ b/sw/ld/regions.ld @@ -0,0 +1,4 @@ +MEMORY { + sram : ORIGIN = 0x10000000, LENGTH = 4096 + rom : ORIGIN = 0x00000000, LENGTH = 0x00002000 +} diff --git a/sw/src/crt0-vexriscv.S b/sw/src/crt0-vexriscv.S new file mode 100644 index 0000000..931d50a --- /dev/null +++ b/sw/src/crt0-vexriscv.S @@ -0,0 +1,91 @@ +.global main +.global isr + +.section .text.start +.global _start + +_start: + j crt_init + nop + nop + nop + nop + nop + nop + nop + +.section .text +.global trap_entry +trap_entry: + sw x1, - 1*4(sp) + sw x5, - 2*4(sp) + sw x6, - 3*4(sp) + sw x7, - 4*4(sp) + sw x10, - 5*4(sp) + sw x11, - 6*4(sp) + sw x12, - 7*4(sp) + sw x13, - 8*4(sp) + sw x14, - 9*4(sp) + sw x15, -10*4(sp) + sw x16, -11*4(sp) + sw x17, -12*4(sp) + sw x28, -13*4(sp) + sw x29, -14*4(sp) + sw x30, -15*4(sp) + sw x31, -16*4(sp) + addi sp,sp,-16*4 + call isr + lw x1 , 15*4(sp) + lw x5, 14*4(sp) + lw x6, 13*4(sp) + lw x7, 12*4(sp) + lw x10, 11*4(sp) + lw x11, 10*4(sp) + lw x12, 9*4(sp) + lw x13, 8*4(sp) + lw x14, 7*4(sp) + lw x15, 6*4(sp) + lw x16, 5*4(sp) + lw x17, 4*4(sp) + lw x28, 3*4(sp) + lw x29, 2*4(sp) + lw x30, 1*4(sp) + lw x31, 0*4(sp) + addi sp,sp,16*4 + mret + .text + + +crt_init: + la sp, _fstack + 4 + la a0, trap_entry + csrw mtvec, a0 + +bss_init: + la a0, _fbss + la a1, _ebss +bss_loop: + beq a0,a1,bss_done + sw zero,0(a0) + add a0,a0,4 + j bss_loop +bss_done: + + /* Load DATA */ + la t0, _erodata + la t1, _fdata + la t2, _edata +3: + lw t3, 0(t0) + sw t3, 0(t1) + /* _edata is aligned to 16 bytes. Use word-xfers. */ + addi t0, t0, 4 + addi t1, t1, 4 + bltu t1, t2, 3b + + li a0, 0x880 //880 enable timer + external interrupt sources (until mstatus.MIE is set, they will never trigger an interrupt) + csrw mie,a0 + + call main +infinit_loop: + j infinit_loop diff --git a/sw/src/main.c b/sw/src/main.c new file mode 100644 index 0000000..c191409 --- /dev/null +++ b/sw/src/main.c @@ -0,0 +1,46 @@ +#include +#include +#include +#include +#include +#include +#include + +struct ff_spi *spi; + +void isr(void) +{ + unsigned int irqs; + + irqs = irq_pending() & irq_getmask(); + + if (irqs & (1 << USB_INTERRUPT)) + usb_isr(); +} + +static void init(void) +{ + rgb_init(); + spi = spiAlloc(); + spiInit(spi); + irq_setmask(0); + irq_setie(1); + usb_init(); + time_init(); + +} + +int main(int argc, char **argv) +{ + (void)argc; + (void)argv; + + init(); + + usb_connect(); + while (1) + { + usb_poll(); + } + return 0; +} diff --git a/sw/src/rgb.c b/sw/src/rgb.c new file mode 100644 index 0000000..3596989 --- /dev/null +++ b/sw/src/rgb.c @@ -0,0 +1,89 @@ +#include +#include + +enum led_registers { + LEDDCR0 = 8, + LEDDBR = 9, + LEDDONR = 10, + LEDDOFR = 11, + LEDDBCRR = 5, + LEDDBCFR = 6, + LEDDPWRR = 1, + LEDDPWRG = 2, + LEDDPWRB = 3, +}; + +#define BREATHE_ENABLE (1 << 7) +#define BREATHE_EDGE_ON (0 << 6) +#define BREATHE_EDGE_BOTH (1 << 6) +#define BREATHE_MODE_MODULATE (1 << 5) +#define BREATHE_RATE(x) ((x & 7) << 0) + +#define RGB_SWITCH_MODE(x) do { \ + if (rgb_mode == x) \ + return; \ + rgb_mode = x; \ + /* Toggle LEDD_EXE to force the mode to switch */ \ + rgb_ctrl_write( (1 << 1) | (1 << 2)); \ + rgb_ctrl_write((1 << 0) | (1 << 1) | (1 << 2)); \ +} while(0) + +static enum { + INVALID = 0, + IDLE, + WRITING, + ERROR, + DONE, +} rgb_mode; + +static void rgb_write(uint8_t value, uint8_t addr) { + rgb_addr_write(addr); + rgb_dat_write(value); +} + +void rgb_init(void) { + // Turn on the RGB block and current enable, as well as enabling led control + rgb_ctrl_write((1 << 0) | (1 << 1) | (1 << 2)); + + // Enable the LED driver, and set 250 Hz mode. + // Also set quick stop, which we'll use to switch patterns quickly. + rgb_write((1 << 7) | (1 << 6) | (1 << 3), LEDDCR0); + + // Set clock register to 12 MHz / 64 kHz - 1 + rgb_write((12000000/64000)-1, LEDDBR); + + rgb_mode_idle(); +} + +static void rgb_switch_mode(uint8_t mode, + uint8_t onr, uint8_t ofr, + uint8_t onrate, uint8_t offrate, + uint8_t r, uint8_t g, uint8_t b) { + RGB_SWITCH_MODE(mode); + rgb_write(onr, LEDDONR); + rgb_write(ofr, LEDDOFR); + + rgb_write(BREATHE_ENABLE | BREATHE_EDGE_BOTH + | BREATHE_MODE_MODULATE | BREATHE_RATE(onrate), LEDDBCRR); + rgb_write(BREATHE_ENABLE | BREATHE_MODE_MODULATE | BREATHE_RATE(offrate), LEDDBCFR); + + rgb_write(r, LEDDPWRG); // Red + rgb_write(g, LEDDPWRB); // Green + rgb_write(b, LEDDPWRR); // Blue +} + +void rgb_mode_idle(void) { + rgb_switch_mode(IDLE, 12, 14, 2, 3, 0x00/4, 0x4a/4, 0xe1/4); +} + +void rgb_mode_writing(void) { + rgb_switch_mode(WRITING, 1, 2, 1, 3, 0x00/4, 0x7a/4, 0x51/4); +} + +void rgb_mode_error(void) { + rgb_switch_mode(ERROR, 3, 3, 2, 3, 0xf0/4, 0x0a/4, 0x01/4); +} + +void rgb_mode_done(void) { + rgb_switch_mode(DONE, 8, 8, 2, 3, 0x14/4, 0xff/4, 0x44/4); +} \ No newline at end of file diff --git a/sw/src/spi.c b/sw/src/spi.c new file mode 100644 index 0000000..56e7a31 --- /dev/null +++ b/sw/src/spi.c @@ -0,0 +1,824 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "spi.h" + +#define fprintf(...) do {} while(0) + +static uint8_t do_mirror; +static uint8_t oe_mirror; + +#define PI_OUTPUT 1 +#define PI_INPUT 0 +#define PI_ALT0 PI_INPUT +static void gpioSetMode(int pin, int mode) { + if (mode) + oe_mirror |= 1 << pin; + else + oe_mirror &= ~(1 << pin); + picorvspi_cfg2_write(oe_mirror); +} + +static void gpioWrite(int pin, int val) { + if (val) + do_mirror |= 1 << pin; + else + do_mirror &= ~(1 << pin); + picorvspi_cfg1_write(do_mirror); +} + +static int gpioRead(int pin) { + return !!(picorvspi_stat1_read() & (1 << pin)); +} + +static void gpioSync(void) { + // bbspi_do_write(do_mirror); +} + +#define SPI_ONLY_SINGLE + +enum ff_spi_quirks { + // There is no separate "Write SR 2" command. Instead, + // you must write SR2 after writing SR1 + SQ_SR2_FROM_SR1 = (1 << 0), + + // Don't issue a "Write Enable" command prior to writing + // a status register + SQ_SKIP_SR_WEL = (1 << 1), + + // Security registers are shifted up by 4 bits + SQ_SECURITY_NYBBLE_SHIFT = (1 << 2), +}; + +struct ff_spi { + enum spi_state state; + enum spi_type type; + enum spi_type desired_type; + struct spi_id id; + enum ff_spi_quirks quirks; + int size_override; + + struct { + int clk; + int d0; + int d1; + int d2; + int d3; + int wp; + int hold; + int cs; + int miso; + int mosi; + } pins; +}; + +static void spi_get_id(struct ff_spi *spi); + +static void spi_set_state(struct ff_spi *spi, enum spi_state state) { + return; + if (spi->state == state) + return; +#ifndef SPI_ONLY_SINGLE + switch (state) { + case SS_SINGLE: +#endif + gpioSetMode(spi->pins.clk, PI_OUTPUT); // CLK + gpioSetMode(spi->pins.cs, PI_OUTPUT); // CE0# + gpioSetMode(spi->pins.mosi, PI_OUTPUT); // MOSI + gpioSetMode(spi->pins.miso, PI_INPUT); // MISO + gpioSetMode(spi->pins.hold, PI_OUTPUT); + gpioSetMode(spi->pins.wp, PI_OUTPUT); +#ifndef SPI_ONLY_SINGLE + break; + + case SS_DUAL_RX: + gpioSetMode(spi->pins.clk, PI_OUTPUT); // CLK + gpioSetMode(spi->pins.cs, PI_OUTPUT); // CE0# + gpioSetMode(spi->pins.mosi, PI_INPUT); // MOSI + gpioSetMode(spi->pins.miso, PI_INPUT); // MISO + gpioSetMode(spi->pins.hold, PI_OUTPUT); + gpioSetMode(spi->pins.wp, PI_OUTPUT); + break; + + case SS_DUAL_TX: + gpioSetMode(spi->pins.clk, PI_OUTPUT); // CLK + gpioSetMode(spi->pins.cs, PI_OUTPUT); // CE0# + gpioSetMode(spi->pins.mosi, PI_OUTPUT); // MOSI + gpioSetMode(spi->pins.miso, PI_OUTPUT); // MISO + gpioSetMode(spi->pins.hold, PI_OUTPUT); + gpioSetMode(spi->pins.wp, PI_OUTPUT); + break; + + case SS_QUAD_RX: + gpioSetMode(spi->pins.clk, PI_OUTPUT); // CLK + gpioSetMode(spi->pins.cs, PI_OUTPUT); // CE0# + gpioSetMode(spi->pins.mosi, PI_INPUT); // MOSI + gpioSetMode(spi->pins.miso, PI_INPUT); // MISO + gpioSetMode(spi->pins.hold, PI_INPUT); + gpioSetMode(spi->pins.wp, PI_INPUT); + break; + + case SS_QUAD_TX: + gpioSetMode(spi->pins.clk, PI_OUTPUT); // CLK + gpioSetMode(spi->pins.cs, PI_OUTPUT); // CE0# + gpioSetMode(spi->pins.mosi, PI_OUTPUT); // MOSI + gpioSetMode(spi->pins.miso, PI_OUTPUT); // MISO + gpioSetMode(spi->pins.hold, PI_OUTPUT); + gpioSetMode(spi->pins.wp, PI_OUTPUT); + break; + + case SS_HARDWARE: + gpioSetMode(spi->pins.clk, PI_ALT0); // CLK + gpioSetMode(spi->pins.cs, PI_ALT0); // CE0# + gpioSetMode(spi->pins.mosi, PI_ALT0); // MOSI + gpioSetMode(spi->pins.miso, PI_ALT0); // MISO + gpioSetMode(spi->pins.hold, PI_OUTPUT); + gpioSetMode(spi->pins.wp, PI_OUTPUT); + break; + + default: + fprintf(stderr, "Unrecognized spi state\n"); + return; + } +#endif + spi->state = state; +} + +void spiPause(struct ff_spi *spi) { + (void)spi; + gpioSync(); +// usleep(1); + return; +} + +void spiBegin(struct ff_spi *spi) { + spi_set_state(spi, SS_SINGLE); + if ((spi->type == ST_SINGLE) || (spi->type == ST_DUAL)) { + gpioWrite(spi->pins.wp, 1); + gpioWrite(spi->pins.hold, 1); + } + gpioWrite(spi->pins.cs, 0); +} + +void spiEnd(struct ff_spi *spi) { + (void)spi; + gpioWrite(spi->pins.cs, 1); +} + +static uint8_t spiXfer(struct ff_spi *spi, uint8_t out) { + int bit; + uint8_t in = 0; + + for (bit = 7; bit >= 0; bit--) { + if (out & (1 << bit)) { + gpioWrite(spi->pins.mosi, 1); + } + else { + gpioWrite(spi->pins.mosi, 0); + } + gpioWrite(spi->pins.clk, 1); + spiPause(spi); + in |= ((!!gpioRead(spi->pins.miso)) << bit); + gpioWrite(spi->pins.clk, 0); + spiPause(spi); + } + + return in; +} + +static void spiSingleTx(struct ff_spi *spi, uint8_t out) { + spi_set_state(spi, SS_SINGLE); + spiXfer(spi, out); +} + +static uint8_t spiSingleRx(struct ff_spi *spi) { + spi_set_state(spi, SS_SINGLE); + return spiXfer(spi, 0xff); +} + +static void spiDualTx(struct ff_spi *spi, uint8_t out) { + + int bit; + spi_set_state(spi, SS_DUAL_TX); + for (bit = 7; bit >= 0; bit -= 2) { + if (out & (1 << (bit - 1))) { + gpioWrite(spi->pins.d0, 1); + } + else { + gpioWrite(spi->pins.d0, 0); + } + + if (out & (1 << (bit - 0))) { + gpioWrite(spi->pins.d1, 1); + } + else { + gpioWrite(spi->pins.d1, 0); + } + gpioWrite(spi->pins.clk, 1); + spiPause(spi); + gpioWrite(spi->pins.clk, 0); + spiPause(spi); + } +} + +static void spiQuadTx(struct ff_spi *spi, uint8_t out) { + int bit; + spi_set_state(spi, SS_QUAD_TX); + for (bit = 7; bit >= 0; bit -= 4) { + if (out & (1 << (bit - 3))) { + gpioWrite(spi->pins.d0, 1); + } + else { + gpioWrite(spi->pins.d0, 0); + } + + if (out & (1 << (bit - 2))) { + gpioWrite(spi->pins.d1, 1); + } + else { + gpioWrite(spi->pins.d1, 0); + } + + if (out & (1 << (bit - 1))) { + gpioWrite(spi->pins.d2, 1); + } + else { + gpioWrite(spi->pins.d2, 0); + } + + if (out & (1 << (bit - 0))) { + gpioWrite(spi->pins.d3, 1); + } + else { + gpioWrite(spi->pins.d3, 0); + } + gpioWrite(spi->pins.clk, 1); + spiPause(spi); + gpioWrite(spi->pins.clk, 0); + spiPause(spi); + } +} + +static uint8_t spiDualRx(struct ff_spi *spi) { + int bit; + uint8_t in = 0; + + spi_set_state(spi, SS_QUAD_RX); + for (bit = 7; bit >= 0; bit -= 2) { + gpioWrite(spi->pins.clk, 1); + spiPause(spi); + in |= ((!!gpioRead(spi->pins.d0)) << (bit - 1)); + in |= ((!!gpioRead(spi->pins.d1)) << (bit - 0)); + gpioWrite(spi->pins.clk, 0); + spiPause(spi); + } + return in; +} + +static uint8_t spiQuadRx(struct ff_spi *spi) { + int bit; + uint8_t in = 0; + + spi_set_state(spi, SS_QUAD_RX); + for (bit = 7; bit >= 0; bit -= 4) { + gpioWrite(spi->pins.clk, 1); + spiPause(spi); + in |= ((!!gpioRead(spi->pins.d0)) << (bit - 3)); + in |= ((!!gpioRead(spi->pins.d1)) << (bit - 2)); + in |= ((!!gpioRead(spi->pins.d2)) << (bit - 1)); + in |= ((!!gpioRead(spi->pins.d3)) << (bit - 0)); + gpioWrite(spi->pins.clk, 0); + spiPause(spi); + } + return in; +} + +int spiTx(struct ff_spi *spi, uint8_t word) { + switch (spi->type) { + case ST_SINGLE: + spiSingleTx(spi, word); + break; + case ST_DUAL: + spiDualTx(spi, word); + break; + case ST_QUAD: + case ST_QPI: + spiQuadTx(spi, word); + break; + default: + return -1; + } + return 0; +} + +uint8_t spiRx(struct ff_spi *spi) { + switch (spi->type) { + case ST_SINGLE: + return spiSingleRx(spi); + case ST_DUAL: + return spiDualRx(spi); + case ST_QUAD: + case ST_QPI: + return spiQuadRx(spi); + default: + return 0xff; + } +} + +void spiCommand(struct ff_spi *spi, uint8_t cmd) { + if (spi->type == ST_QPI) + spiQuadTx(spi, cmd); + else + spiSingleTx(spi, cmd); +} + +uint8_t spiCommandRx(struct ff_spi *spi) { + if (spi->type == ST_QPI) + return spiQuadRx(spi); + else + return spiSingleRx(spi); +} + +uint8_t spiReadStatus(struct ff_spi *spi, uint8_t sr) { + uint8_t val = 0xff; + (void)sr; + +#if 0 + switch (sr) { + case 1: +#endif + spiBegin(spi); + spiCommand(spi, 0x05); + val = spiCommandRx(spi); + spiEnd(spi); +#if 0 + break; + + case 2: + spiBegin(spi); + spiCommand(spi, 0x35); + val = spiCommandRx(spi); + spiEnd(spi); + break; + + case 3: + spiBegin(spi); + spiCommand(spi, 0x15); + val = spiCommandRx(spi); + spiEnd(spi); + break; + + default: + fprintf(stderr, "unrecognized status register: %d\n", sr); + break; + } +#endif + return val; +} + +void spiWriteSecurity(struct ff_spi *spi, uint8_t sr, uint8_t security[256]) { + + if (spi->quirks & SQ_SECURITY_NYBBLE_SHIFT) + sr <<= 4; + + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + + // erase the register + spiBegin(spi); + spiCommand(spi, 0x44); + spiCommand(spi, 0x00); // A23-16 + spiCommand(spi, sr); // A15-8 + spiCommand(spi, 0x00); // A0-7 + spiEnd(spi); + + spi_get_id(spi); + sleep(1); + + // write enable + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0x42); + spiCommand(spi, 0x00); // A23-16 + spiCommand(spi, sr); // A15-8 + spiCommand(spi, 0x00); // A0-7 + int i; + for (i = 0; i < 256; i++) + spiCommand(spi, security[i]); + spiEnd(spi); + + spi_get_id(spi); +} + +void spiReadSecurity(struct ff_spi *spi, uint8_t sr, uint8_t security[256]) { + if (spi->quirks & SQ_SECURITY_NYBBLE_SHIFT) + sr <<= 4; + + spiBegin(spi); + spiCommand(spi, 0x48); // Read security registers + spiCommand(spi, 0x00); // A23-16 + spiCommand(spi, sr); // A15-8 + spiCommand(spi, 0x00); // A0-7 + int i; + for (i = 0; i < 256; i++) + security[i] = spiCommandRx(spi); + spiEnd(spi); +} + +void spiWriteStatus(struct ff_spi *spi, uint8_t sr, uint8_t val) { + + switch (sr) { + case 1: + if (!(spi->quirks & SQ_SKIP_SR_WEL)) { + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + } + + spiBegin(spi); + spiCommand(spi, 0x50); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0x01); + spiCommand(spi, val); + spiEnd(spi); + break; + + case 2: { + uint8_t sr1 = 0x00; + if (spi->quirks & SQ_SR2_FROM_SR1) + sr1 = spiReadStatus(spi, 1); + + if (!(spi->quirks & SQ_SKIP_SR_WEL)) { + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + } + + + spiBegin(spi); + spiCommand(spi, 0x50); + spiEnd(spi); + + spiBegin(spi); + if (spi->quirks & SQ_SR2_FROM_SR1) { + spiCommand(spi, 0x01); + spiCommand(spi, sr1); + spiCommand(spi, val); + } + else { + spiCommand(spi, 0x31); + spiCommand(spi, val); + } + spiEnd(spi); + break; + } + + case 3: + if (!(spi->quirks & SQ_SKIP_SR_WEL)) { + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + } + + + spiBegin(spi); + spiCommand(spi, 0x50); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0x11); + spiCommand(spi, val); + spiEnd(spi); + break; + + default: + fprintf(stderr, "unrecognized status register: %d\n", sr); + break; + } +} + +#if 0 +struct spi_id spiId(struct ff_spi *spi) { + return spi->id; +} + +static void spi_decode_id(struct ff_spi *spi) { + spi->id.bytes = -1; // unknown + + if (spi->id.manufacturer_id == 0xef) { + // spi->id.manufacturer = "Winbond"; + if ((spi->id.memory_type == 0x70) + && (spi->id.memory_size == 0x18)) { + // spi->id.model = "W25Q128JV"; + // spi->id.capacity = "128 Mbit"; + spi->id.bytes = 16 * 1024 * 1024; + } + } + + if (spi->id.manufacturer_id == 0x1f) { + // spi->id.manufacturer = "Adesto"; + if ((spi->id.memory_type == 0x86) + && (spi->id.memory_size == 0x01)) { + // spi->id.model = "AT25SF161"; + // spi->id.capacity = "16 Mbit"; + spi->id.bytes = 1 * 1024 * 1024; + } + } + return; +} +#endif +static void spi_get_id(struct ff_spi *spi) { + spiBegin(spi); + spiCommand(spi, 0x90); // Read manufacturer ID + spiCommand(spi, 0x00); // Dummy byte 1 + spiCommand(spi, 0x00); // Dummy byte 2 + spiCommand(spi, 0x00); // Dummy byte 3 + spi->id.manufacturer_id = spiCommandRx(spi); + spi->id.device_id = spiCommandRx(spi); + spiEnd(spi); + return; +#if 0 + spiBegin(spi); + spiCommand(spi, 0x9f); // Read device id + spi->id._manufacturer_id = spiCommandRx(spi); + spi->id.memory_type = spiCommandRx(spi); + spi->id.memory_size = spiCommandRx(spi); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0xab); // Read electronic signature + spiCommand(spi, 0x00); // Dummy byte 1 + spiCommand(spi, 0x00); // Dummy byte 2 + spiCommand(spi, 0x00); // Dummy byte 3 + spi->id.signature = spiCommandRx(spi); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0x4b); // Read unique ID + spiCommand(spi, 0x00); // Dummy byte 1 + spiCommand(spi, 0x00); // Dummy byte 2 + spiCommand(spi, 0x00); // Dummy byte 3 + spiCommand(spi, 0x00); // Dummy byte 4 + spi->id.serial[0] = spiCommandRx(spi); + spi->id.serial[1] = spiCommandRx(spi); + spi->id.serial[2] = spiCommandRx(spi); + spi->id.serial[3] = spiCommandRx(spi); + spiEnd(spi); + + spi_decode_id(spi); + return; +#endif +} + +#if 0 +void spiOverrideSize(struct ff_spi *spi, uint32_t size) { + spi->size_override = size; + + // If size is 0, re-read the capacity + if (!size) + spi_decode_id(spi); + else + spi->id.bytes = size; +} +#endif + +int spiSetType(struct ff_spi *spi, enum spi_type type) { + + if (spi->type == type) + return 0; + +#ifndef SPI_ONLY_SINGLE + switch (type) { + + case ST_SINGLE: +#endif + if (spi->type == ST_QPI) { + spiBegin(spi); + spiCommand(spi, 0xff); // Exit QPI Mode + spiEnd(spi); + } + spi->type = type; + spi_set_state(spi, SS_SINGLE); +#ifndef SPI_ONLY_SINGLE + break; + + case ST_DUAL: + if (spi->type == ST_QPI) { + spiBegin(spi); + spiCommand(spi, 0xff); // Exit QPI Mode + spiEnd(spi); + } + spi->type = type; + spi_set_state(spi, SS_DUAL_TX); + break; + + case ST_QUAD: + if (spi->type == ST_QPI) { + spiBegin(spi); + spiCommand(spi, 0xff); // Exit QPI Mode + spiEnd(spi); + } + + // Enable QE bit + spiWriteStatus(spi, 2, spiReadStatus(spi, 2) | (1 << 1)); + + spi->type = type; + spi_set_state(spi, SS_QUAD_TX); + break; + + case ST_QPI: + // Enable QE bit + spiWriteStatus(spi, 2, spiReadStatus(spi, 2) | (1 << 1)); + + spiBegin(spi); + spiCommand(spi, 0x38); // Enter QPI Mode + spiEnd(spi); + spi->type = type; + spi_set_state(spi, SS_QUAD_TX); + break; + + default: + fprintf(stderr, "Unrecognized SPI type: %d\n", type); + return 1; + } +#endif + return 0; +} + +int spiIsBusy(struct ff_spi *spi) { + return spiReadStatus(spi, 1) & (1 << 0); +} + +int spiBeginErase32(struct ff_spi *spi, uint32_t erase_addr) { + // Enable Write-Enable Latch (WEL) + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0x52); + spiCommand(spi, erase_addr >> 16); + spiCommand(spi, erase_addr >> 8); + spiCommand(spi, erase_addr >> 0); + spiEnd(spi); + return 0; +} + +int spiBeginErase64(struct ff_spi *spi, uint32_t erase_addr) { + // Enable Write-Enable Latch (WEL) + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0xD8); + spiCommand(spi, erase_addr >> 16); + spiCommand(spi, erase_addr >> 8); + spiCommand(spi, erase_addr >> 0); + spiEnd(spi); + return 0; +} + +int spiBeginWrite(struct ff_spi *spi, uint32_t addr, const void *v_data, unsigned int count) { + const uint8_t write_cmd = 0x02; + const uint8_t *data = v_data; + unsigned int i; + + // Enable Write-Enable Latch (WEL) + spiBegin(spi); + spiCommand(spi, 0x06); + spiEnd(spi); + + // uint8_t sr1 = spiReadStatus(spi, 1); + // if (!(sr1 & (1 << 1))) + // fprintf(stderr, "error: write-enable latch (WEL) not set, write will probably fail\n"); + + spiBegin(spi); + spiCommand(spi, write_cmd); + spiCommand(spi, addr >> 16); + spiCommand(spi, addr >> 8); + spiCommand(spi, addr >> 0); + for (i = 0; (i < count) && (i < 256); i++) + spiTx(spi, *data++); + spiEnd(spi); + + return 0; +} + +uint8_t spiReset(struct ff_spi *spi) { + // XXX You should check the "Ready" bit before doing this! + + // Shift to QPI mode, then back to Single mode, to ensure + // we're actually in Single mode. + spiSetType(spi, ST_QPI); + spiSetType(spi, ST_SINGLE); + + spiBegin(spi); + spiCommand(spi, 0x66); // "Enable Reset" command + spiEnd(spi); + + spiBegin(spi); + spiCommand(spi, 0x99); // "Reset Device" command + spiEnd(spi); + + // msleep(30); + + spiBegin(spi); + spiCommand(spi, 0xab); // "Resume from Deep Power-Down" command + spiEnd(spi); + + return 0; +} + +int spiInit(struct ff_spi *spi) { + spi->state = SS_UNCONFIGURED; + spi->type = ST_UNCONFIGURED; + + // Disable memory-mapped mode and enable bit-bang mode + picorvspi_cfg4_write(0); + + // Reset the SPI flash, which will return it to SPI mode even + // if it's in QPI mode. + spiReset(spi); + + spiSetType(spi, ST_SINGLE); + + // Have the SPI flash pay attention to us + gpioWrite(spi->pins.hold, 1); + + // Disable WP + gpioWrite(spi->pins.wp, 1); + + gpioSetMode(spi->pins.clk, PI_OUTPUT); // CLK + gpioSetMode(spi->pins.cs, PI_OUTPUT); // CE0# + gpioSetMode(spi->pins.mosi, PI_OUTPUT); // MOSI + gpioSetMode(spi->pins.miso, PI_INPUT); // MISO + gpioSetMode(spi->pins.hold, PI_OUTPUT); + gpioSetMode(spi->pins.wp, PI_OUTPUT); + + spi_get_id(spi); + + spi->quirks |= SQ_SR2_FROM_SR1; + if (spi->id.manufacturer_id == 0xef) + spi->quirks |= SQ_SKIP_SR_WEL | SQ_SECURITY_NYBBLE_SHIFT; + + return 0; +} + +void spiEnableQuad(void) { + struct ff_spi *spi = spiAlloc(); + spiInit(spi); + spiWriteStatus(spi, 2, spiReadStatus(spi, 2) | (1 << 1)); + spiFree(); +} + +struct ff_spi *spiAlloc(void) { + static struct ff_spi spi; + return &spi; +} + +void spiSetPin(struct ff_spi *spi, enum spi_pin pin, int val) { + switch (pin) { + case SP_MOSI: spi->pins.mosi = val; break; + case SP_MISO: spi->pins.miso = val; break; + case SP_HOLD: spi->pins.hold = val; break; + case SP_WP: spi->pins.wp = val; break; + case SP_CS: spi->pins.cs = val; break; + case SP_CLK: spi->pins.clk = val; break; + case SP_D0: spi->pins.d0 = val; break; + case SP_D1: spi->pins.d1 = val; break; + case SP_D2: spi->pins.d2 = val; break; + case SP_D3: spi->pins.d3 = val; break; + default: fprintf(stderr, "unrecognized pin: %d\n", pin); break; + } +} + +void spiHold(struct ff_spi *spi) { + spiBegin(spi); + spiCommand(spi, 0xb9); + spiEnd(spi); +} +void spiUnhold(struct ff_spi *spi) { + spiBegin(spi); + spiCommand(spi, 0xab); + spiEnd(spi); +} + +void spiFree(void) { + // Re-enable memory-mapped mode + picorvspi_cfg4_write(0x80); +} diff --git a/sw/src/time.c b/sw/src/time.c new file mode 100644 index 0000000..2b8f83e --- /dev/null +++ b/sw/src/time.c @@ -0,0 +1,43 @@ +#include +#include + +void time_init(void) +{ + int t; + + timer0_en_write(0); + t = 2*SYSTEM_CLOCK_FREQUENCY; + timer0_reload_write(t); + timer0_load_write(t); + timer0_en_write(1); +} + +int elapsed(int *last_event, int period) +{ + int t, dt; + + timer0_update_value_write(1); + t = timer0_reload_read() - timer0_value_read(); + if(period < 0) { + *last_event = t; + return 1; + } + dt = t - *last_event; + if(dt < 0) + dt += timer0_reload_read(); + if((dt > period) || (dt < 0)) { + *last_event = t; + return 1; + } else + return 0; +} + +void msleep(int ms) +{ + timer0_en_write(0); + timer0_reload_write(0); + timer0_load_write(SYSTEM_CLOCK_FREQUENCY/1000*ms); + timer0_en_write(1); + timer0_update_value_write(1); + while(timer0_value_read()) timer0_update_value_write(1); +} \ No newline at end of file diff --git a/sw/src/usb-desc.c b/sw/src/usb-desc.c new file mode 100644 index 0000000..bebde8a --- /dev/null +++ b/sw/src/usb-desc.c @@ -0,0 +1,220 @@ +/* Teensyduino Core Library + * http://www.pjrc.com/teensy/ + * Copyright (c) 2013 PJRC.COM, LLC. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * 1. The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * 2. If the Software is incorporated into a build system that allows + * selection among a list of target devices, then similar target + * devices manufactured by PJRC.COM must be included in the list of + * target devices and selectable in the same manner. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include + +// USB Descriptors are binary data which the USB host reads to +// automatically detect a USB device's capabilities. The format +// and meaning of every field is documented in numerous USB +// standards. When working with USB descriptors, despite the +// complexity of the standards and poor writing quality in many +// of those documents, remember descriptors are nothing more +// than constant binary data that tells the USB host what the +// device can do. Computers will load drivers based on this data. +// Those drivers then communicate on the endpoints specified by +// the descriptors. + +// To configure a new combination of interfaces or make minor +// changes to existing configuration (eg, change the name or ID +// numbers), usually you would edit "usb_desc.h". This file +// is meant to be configured by the header, so generally it is +// only edited to add completely new USB interfaces or features. + +// ************************************************************** +// USB Device +// ************************************************************** + +#define LSB(n) ((n) & 255) +#define MSB(n) (((n) >> 8) & 255) + +// USB Device Descriptor. The USB host reads this first, to learn +// what type of device is connected. +static const uint8_t device_descriptor[] = { + 18, // bLength + 1, // bDescriptorType + 0x01, 0x02, // bcdUSB + USB_CLASS_CDC, // bDeviceClass + 0x00, // bDeviceSubClass + 0x00, // bDeviceProtocol + EP0_SIZE, // bMaxPacketSize0 + LSB(VENDOR_ID), MSB(VENDOR_ID), // idVendor + LSB(PRODUCT_ID), MSB(PRODUCT_ID), // idProduct + LSB(DEVICE_VER), MSB(DEVICE_VER), // bcdDevice + 1, // iManufacturer + 2, // iProduct + 0, // iSerialNumber + 1 // bNumConfigurations +}; + +// These descriptors must NOT be "const", because the USB DMA +// has trouble accessing flash memory with enough bandwidth +// while the processor is executing from flash. + + +// ************************************************************** +// USB Configuration +// ************************************************************** + +// USB Configuration Descriptor. This huge descriptor tells all +// of the devices capbilities. +static const uint8_t config_descriptor[CONFIG_DESC_SIZE] = { + // configuration descriptor, USB spec 9.6.3, page 264-266, Table 9-10 + 9, // bLength; + 2, // bDescriptorType; + LSB(CONFIG_DESC_SIZE), // wTotalLength + MSB(CONFIG_DESC_SIZE), + NUM_INTERFACE, // bNumInterfaces + 1, // bConfigurationValue + 1, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + + // interface descriptor, CDC + USB_DT_INTERFACE_SIZE, // bLength + USB_DT_INTERFACE, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 1, // bNumEndpoints + USB_CLASS_CDC, // bInterfaceClass + USB_CDC_SUBCLASS_ACM, // bInterfaceSubClass + USB_CDC_PROTOCOL_AT, // bInterfaceProtocol + 0, // iInterface + + // Header Functional Descriptor + 0x05, // bLength: Endpoint Descriptor size + CS_INTERFACE, // bDescriptorType: CS_INTERFACE + USB_CDC_TYPE_HEADER, // bDescriptorSubtype: Header Func Desc + 0x10, // bcdCDC: spec release number + 0x01, + + // Call Managment Functional Descriptor + 0x05, // bFunctionLength + CS_INTERFACE, // bDescriptorType: CS_INTERFACE + USB_CDC_TYPE_CALL_MANAGEMENT, // bDescriptorSubtype: Call Management Func Desc + 0, // bmCapabilities: D0+D1 + 1, // bDataInterface: 1 + + // ACM Functional Descriptor + 0x04, // bFunctionLength + CS_INTERFACE, // bDescriptorType: CS_INTERFACE + USB_CDC_TYPE_ACM, // bDescriptorSubtype: Abstract Control Management desc + 6, // bmCapabilities + + // Union Functional Descriptor + 0x05, // bFunctionLength + CS_INTERFACE, // bDescriptorType: CS_INTERFACE + USB_CDC_TYPE_UNION, // bDescriptorSubtype: Union func desc + 0, // bMasterInterface: Communication class interface + 1, // bSlaveInterface0: Data Class Interface + + // Endpoint descriptor + USB_DT_ENDPOINT_SIZE, // bLength + USB_DT_ENDPOINT, // bDescriptorType + 0x81, // bEndpointAddress + USB_ENDPOINT_ATTR_INTERRUPT, // bmAttributes + LSB(16), // wMaxPacketSize + MSB(16), // wMaxPacketSize + 255, // bInterval + + // interface descriptor, CDC + USB_DT_INTERFACE_SIZE, // bLength + USB_DT_INTERFACE, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + USB_CLASS_DATA, // bInterfaceClass + 0, // bInterfaceSubClass + 0, // bInterfaceProtocol + 0, // iInterface + + // Endpoint descriptor + USB_DT_ENDPOINT_SIZE, // bLength + USB_DT_ENDPOINT, // bDescriptorType + 0x82, // bEndpointAddress + USB_ENDPOINT_ATTR_BULK, // bmAttributes + LSB(64), // wMaxPacketSize + MSB(64), // wMaxPacketSize + 1, // bInterval + + // Endpoint descriptor + USB_DT_ENDPOINT_SIZE, // bLength + USB_DT_ENDPOINT, // bDescriptorType + 0x02, // bEndpointAddress + USB_ENDPOINT_ATTR_BULK, // bmAttributes + LSB(64), // wMaxPacketSize + MSB(64), // wMaxPacketSize + 1, // bInterval +}; + + +// ************************************************************** +// String Descriptors +// ************************************************************** + +// The descriptors above can provide human readable strings, +// referenced by index numbers. These descriptors are the +// actual string data + +static const struct usb_string_descriptor_struct string0 = { + 4, + 3, + {0x0409} +}; + +__attribute__((aligned(4))) +static const struct usb_string_descriptor_struct usb_string_manufacturer_name = { + 2 + MANUFACTURER_NAME_LEN, + 3, + MANUFACTURER_NAME +}; + +__attribute__((aligned(4))) +static const struct usb_string_descriptor_struct usb_string_product_name = { + 2 + PRODUCT_NAME_LEN, + 3, + PRODUCT_NAME +}; + +// ************************************************************** +// Descriptors List +// ************************************************************** + +// This table provides access to all the descriptor data above. + +const usb_descriptor_list_t usb_descriptor_list[] = { + {0x0100, sizeof(device_descriptor), device_descriptor}, + {0x0200, sizeof(config_descriptor), config_descriptor}, + {0x0300, 0, (const uint8_t *)&string0}, + {0x0301, 0, (const uint8_t *)&usb_string_manufacturer_name}, + {0x0302, 0, (const uint8_t *)&usb_string_product_name}, + {0, 0, NULL} +}; diff --git a/sw/src/usb-epfifo.c b/sw/src/usb-epfifo.c new file mode 100644 index 0000000..35f5056 --- /dev/null +++ b/sw/src/usb-epfifo.c @@ -0,0 +1,254 @@ +#include +#include +#include +#include + +#ifdef CSR_USB_EP_0_OUT_EV_PENDING_ADDR + +#define EP0OUT_BUFFERS 4 +__attribute__((aligned(4))) +static uint8_t volatile usb_ep0out_buffer_len[EP0OUT_BUFFERS]; +static uint8_t volatile usb_ep0out_buffer[EP0OUT_BUFFERS][256]; +static uint8_t volatile usb_ep0out_last_tok[EP0OUT_BUFFERS]; +static volatile uint8_t usb_ep0out_wr_ptr; +static volatile uint8_t usb_ep0out_rd_ptr; +static const int max_byte_length = 64; + +static const uint8_t * volatile current_data; +static volatile int current_length; +static volatile int data_offset; +static volatile int data_to_send; +static int next_packet_is_empty; + +// Note that our PIDs are only bits 2 and 3 of the token, +// since all other bits are effectively redundant at this point. +enum USB_PID { + USB_PID_OUT = 0, + USB_PID_SOF = 1, + USB_PID_IN = 2, + USB_PID_SETUP = 3, +}; + +enum epfifo_response { + EPF_ACK = 0, + EPF_NAK = 1, + EPF_NONE = 2, + EPF_STALL = 3, +}; + +#define USB_EV_ERROR 1 +#define USB_EV_PACKET 2 + +void usb_idle(void) { + usb_ep_0_out_ev_enable_write(0); + usb_ep_0_in_ev_enable_write(0); + + // Reject all incoming data, since there is no handler anymore + usb_ep_0_out_respond_write(EPF_NAK); + + // Reject outgoing data, since we don't have any to give. + usb_ep_0_in_respond_write(EPF_NAK); + + irq_setmask(irq_getmask() & ~(1 << USB_INTERRUPT)); +} + +void usb_disconnect(void) { + usb_ep_0_out_ev_enable_write(0); + usb_ep_0_in_ev_enable_write(0); + irq_setmask(irq_getmask() & ~(1 << USB_INTERRUPT)); + usb_pullup_out_write(0); +} + +void usb_connect(void) { + + usb_ep_0_out_ev_pending_write(usb_ep_0_out_ev_enable_read()); + usb_ep_0_in_ev_pending_write(usb_ep_0_in_ev_pending_read()); + usb_ep_0_out_ev_enable_write(USB_EV_PACKET | USB_EV_ERROR); + usb_ep_0_in_ev_enable_write(USB_EV_PACKET | USB_EV_ERROR); + + // Accept incoming data by default. + usb_ep_0_out_respond_write(EPF_ACK); + + // Reject outgoing data, since we have none to give yet. + usb_ep_0_in_respond_write(EPF_NAK); + + usb_pullup_out_write(1); + + irq_setmask(irq_getmask() | (1 << USB_INTERRUPT)); +} + +void usb_init(void) { + usb_ep0out_wr_ptr = 0; + usb_ep0out_rd_ptr = 0; + usb_pullup_out_write(0); + return; +} + +static void process_tx(void) { + + // Don't allow requeueing -- only queue more data if we're + // currently set up to respond NAK. + if (usb_ep_0_in_respond_read() != EPF_NAK) { + return; + } + + // Prevent us from double-filling the buffer. + if (!usb_ep_0_in_ibuf_empty_read()) { + return; + } + + if (!current_data || !current_length) { + return; + } + + data_offset += data_to_send; + + data_to_send = current_length - data_offset; + + // Clamp the data to the maximum packet length + if (data_to_send > max_byte_length) { + data_to_send = max_byte_length; + next_packet_is_empty = 0; + } + else if (data_to_send == max_byte_length) { + next_packet_is_empty = 1; + } + else if (next_packet_is_empty) { + next_packet_is_empty = 0; + data_to_send = 0; + } + else if (current_data == NULL || data_to_send <= 0) { + next_packet_is_empty = 0; + current_data = NULL; + current_length = 0; + data_offset = 0; + data_to_send = 0; + return; + } + + int this_offset; + for (this_offset = data_offset; this_offset < (data_offset + data_to_send); this_offset++) { + usb_ep_0_in_ibuf_head_write(current_data[this_offset]); + } + usb_ep_0_in_respond_write(EPF_ACK); + return; +} + +void usb_send(const void *data, int total_count) { + + while ((current_length || current_data))// && usb_ep_0_in_respond_read() != EPF_NAK) + ; + current_data = (uint8_t *)data; + current_length = total_count; + data_offset = 0; + data_to_send = 0; + process_tx(); +} + +void usb_wait_for_send_done(void) { + while (current_data && current_length) + usb_poll(); + while ((usb_ep_0_in_dtb_read() & 1) == 1) + usb_poll(); +} + +void usb_isr(void) { + uint8_t ep0o_pending = usb_ep_0_out_ev_pending_read(); + uint8_t ep0i_pending = usb_ep_0_in_ev_pending_read(); + + // We got an OUT or a SETUP packet. Copy it to usb_ep0out_buffer + // and clear the "pending" bit. + if (ep0o_pending) { + uint8_t last_tok = usb_ep_0_out_last_tok_read(); + + int byte_count = 0; + usb_ep0out_last_tok[usb_ep0out_wr_ptr] = last_tok; + volatile uint8_t * obuf = usb_ep0out_buffer[usb_ep0out_wr_ptr]; + if (!usb_ep_0_out_obuf_empty_read()) { + while (!usb_ep_0_out_obuf_empty_read()) { + obuf[byte_count++] = usb_ep_0_out_obuf_head_read(); + usb_ep_0_out_obuf_head_write(0); + } + } + + if (byte_count >= 2) + usb_ep0out_buffer_len[usb_ep0out_wr_ptr] = byte_count - 2 /* Strip off CRC16 */; + usb_ep0out_wr_ptr = (usb_ep0out_wr_ptr + 1) & (EP0OUT_BUFFERS-1); + + if (last_tok == USB_PID_SETUP) { + usb_ep_0_in_dtb_write(1); + data_offset = 0; + current_length = 0; + current_data = NULL; + } + + usb_ep_0_out_ev_pending_write(ep0o_pending); + usb_ep_0_out_respond_write(EPF_ACK); + } + + // We just got an "IN" token. Send data if we have it. + if (ep0i_pending) { + usb_ep_0_in_respond_write(EPF_NAK); + usb_ep_0_in_ev_pending_write(ep0i_pending); + } + + return; +} + +void usb_ack_in(void) { + while (usb_ep_0_in_respond_read() == EPF_ACK) + ; + usb_ep_0_in_respond_write(EPF_ACK); +} + +void usb_ack_out(void) { + while (usb_ep_0_out_respond_read() == EPF_ACK) + ; + usb_ep_0_out_respond_write(EPF_ACK); +} + +void usb_err(void) { + usb_ep_0_out_respond_write(EPF_STALL); + usb_ep_0_in_respond_write(EPF_STALL); +} + +int usb_recv(void *buffer, unsigned int buffer_len) { + + // Set the OUT response to ACK, since we are in a position to receive data now. + usb_ep_0_out_respond_write(EPF_ACK); + while (1) { + if (usb_ep0out_rd_ptr != usb_ep0out_wr_ptr) { + if (usb_ep0out_last_tok[usb_ep0out_rd_ptr] == USB_PID_OUT) { + unsigned int ep0_buffer_len = usb_ep0out_buffer_len[usb_ep0out_rd_ptr]; + if (ep0_buffer_len < buffer_len) + buffer_len = ep0_buffer_len; + // usb_ep0out_buffer_len[usb_ep0out_rd_ptr] = 0; + memcpy(buffer, (void *)&usb_ep0out_buffer[usb_ep0out_rd_ptr], buffer_len); + usb_ep0out_rd_ptr = (usb_ep0out_rd_ptr + 1) & (EP0OUT_BUFFERS-1); + return buffer_len; + } + usb_ep0out_rd_ptr = (usb_ep0out_rd_ptr + 1) & (EP0OUT_BUFFERS-1); + } + } + return 0; +} + +void usb_poll(void) { + // If some data was received, then process it. + while (usb_ep0out_rd_ptr != usb_ep0out_wr_ptr) { + const struct usb_setup_request *request = (const struct usb_setup_request *)(usb_ep0out_buffer[usb_ep0out_rd_ptr]); + // uint8_t len = usb_ep0out_buffer_len[usb_ep0out_rd_ptr]; + uint8_t last_tok = usb_ep0out_last_tok[usb_ep0out_rd_ptr]; + + // usb_ep0out_buffer_len[usb_ep0out_rd_ptr] = 0; + usb_ep0out_rd_ptr = (usb_ep0out_rd_ptr + 1) & (EP0OUT_BUFFERS-1); + + if (last_tok == USB_PID_SETUP) { + usb_setup(request); + } + } + + process_tx(); +} + +#endif /* CSR_USB_EP_0_OUT_EV_PENDING_ADDR */ \ No newline at end of file diff --git a/sw/src/usb-setup.c b/sw/src/usb-setup.c new file mode 100644 index 0000000..5ca3160 --- /dev/null +++ b/sw/src/usb-setup.c @@ -0,0 +1,114 @@ +#include +#include +#include + +#include + +static uint8_t reply_buffer[8]; +static uint8_t usb_configuration = 0; + +void usb_setup(const struct usb_setup_request *setup) +{ + const uint8_t *data = NULL; + uint32_t datalen = 0; + const usb_descriptor_list_t *list; + + switch (setup->wRequestAndType) + { + case 0x0500: // SET_ADDRESS + case 0x0b01: // SET_INTERFACE + break; + + case 0x0900: // SET_CONFIGURATION + usb_configuration = setup->wValue; + break; + + case 0x0880: // GET_CONFIGURATION + reply_buffer[0] = usb_configuration; + datalen = 1; + data = reply_buffer; + break; + + case 0x0080: // GET_STATUS (device) + reply_buffer[0] = 0; + reply_buffer[1] = 0; + datalen = 2; + data = reply_buffer; + break; + + case 0x0082: // GET_STATUS (endpoint) + if (setup->wIndex > 0) + { + usb_err(); + return; + } + reply_buffer[0] = 0; + reply_buffer[1] = 0; + + // XXX handle endpoint stall here + data = reply_buffer; + datalen = 2; + break; + + case 0x0102: // CLEAR_FEATURE (endpoint) + if (setup->wIndex > 0 || setup->wValue != 0) + { + // TODO: do we need to handle IN vs OUT here? + usb_err(); + return; + } + break; + + case 0x0302: // SET_FEATURE (endpoint) + if (setup->wIndex > 0 || setup->wValue != 0) + { + // TODO: do we need to handle IN vs OUT here? + usb_err(); + return; + } + // XXX: Should we set the stall bit? + // USB->DIEP0CTL |= USB_DIEP_CTL_STALL; + // TODO: do we need to clear the data toggle here? + break; + + case 0x0680: // GET_DESCRIPTOR + case 0x0681: + for (list = usb_descriptor_list; 1; list++) + { + if (list->addr == NULL) + break; + if (setup->wValue == list->wValue) + { + data = list->addr; + if ((setup->wValue >> 8) == 3) + { + // for string descriptors, use the descriptor's + // length field, allowing runtime configured + // length. + datalen = *(list->addr); + } + else + { + datalen = list->length; + } + goto send; + } + } + usb_err(); + return; + + default: + usb_err(); + return; + } + +send: + if (data && datalen) { + if (datalen > setup->wLength) + datalen = setup->wLength; + usb_send(data, datalen); + } + else + usb_ack_in(); + return; +}