Sean Cross
a3c05bd19e
Add the key `0xac` to the reset command, to prevent accidental resets. Signed-off-by: Sean Cross <sean@xobs.io>
71 lines
1.6 KiB
C
71 lines
1.6 KiB
C
#ifndef __SYSTEM_H
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#define __SYSTEM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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void flush_cpu_icache(void);
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void flush_cpu_dcache(void);
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void flush_l2_cache(void);
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#ifdef __or1k__
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#include <spr-defs.h>
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static inline unsigned long mfspr(unsigned long add)
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{
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unsigned long ret;
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__asm__ __volatile__ ("l.mfspr %0,%1,0" : "=r" (ret) : "r" (add));
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return ret;
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}
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static inline void mtspr(unsigned long add, unsigned long val)
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{
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__asm__ __volatile__ ("l.mtspr %0,%1,0" : : "r" (add), "r" (val));
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}
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#endif
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#if defined(__vexriscv__) || defined(__minerva__)
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#include <csr-defs.h>
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#define csrr(reg) ({ unsigned long __tmp; \
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asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
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__tmp; })
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#define csrw(reg, val) ({ \
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if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
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asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
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else \
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asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
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#define csrs(reg, bit) ({ \
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if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
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asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); \
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else \
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asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); })
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#define csrc(reg, bit) ({ \
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if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
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asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); \
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else \
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asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); })
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#endif
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#ifdef __cplusplus
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}
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#endif
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#include <generated/csr.h>
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__attribute__((noreturn)) static inline void reboot(void) {
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reboot_ctrl_write(0xac);
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while (1);
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}
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__attribute__((noreturn)) static inline void reboot_to_image(uint8_t image_index) {
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reboot_ctrl_write(0xac | (image_index & 3) << 0);
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while (1);
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}
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#endif /* __SYSTEM_H */
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