commit da7a0e95eb0e311fc9f83c8e1b3b5e957fd7ed27 Author: Sean Cross Date: Tue Jan 1 10:23:52 2019 +0800 initial commit Signed-off-by: Sean Cross diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..c222503 --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +.obj/ +.swp +.swo +*~ \ No newline at end of file diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000..e69de29 diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..686e9ca --- /dev/null +++ b/Makefile @@ -0,0 +1,110 @@ +PACKAGE = $(notdir $(realpath .)) +FOMU_SDK ?= . +ADD_CFLAGS = -I$(FOMU_SDK)/include -D__vexriscv__ -march=rv32im -mabi=ilp32 +ADD_LFLAGS = -L$(FOMU_SDK)/lib $(FOMU_SDK)/lib/crt0-vexriscv-ctr.o -lbase-nofloat -lcompiler_rt +SRC_DIR = src + +GIT_VERSION= $(shell git describe --tags) +TRGT ?= riscv64-unknown-elf- +CC = $(TRGT)gcc +CXX = $(TRGT)g++ +OBJCOPY = $(TRGT)objcopy + +RM = rm -rf +COPY = cp -a +PATH_SEP = / + +ifeq ($(OS),Windows_NT) +COPY = copy +RM = del +PATH_SEP = \\ +endif + +LDSCRIPT = $(FOMU_SDK)/ld/linker.ld +LDSCRIPTS = $(LDSCRIPT) $(FOMU_SDK)/ld/output_format.ld $(FOMU_SDK)/ld/regions.ld +DBG_CFLAGS = -ggdb -g -DDEBUG -Wall +DBG_LFLAGS = -ggdb -g -Wall +CFLAGS = $(ADD_CFLAGS) \ + -Wall -Wextra \ + -ffunction-sections -fdata-sections -fno-common \ + -fomit-frame-pointer -Os \ + -flto -ffreestanding -fuse-linker-plugin \ + -DGIT_VERSION=u\"$(GIT_VERSION)\" -std=gnu11 +CXXFLAGS = $(CFLAGS) -std=c++11 -fno-rtti -fno-exceptions +LFLAGS = $(CFLAGS) $(ADD_LFLAGS) \ + -nostartfiles \ + -Wl,--gc-sections \ + -Wl,--no-warn-mismatch \ + -Wl,--script=$(LDSCRIPT) \ + -Wl,--build-id=none + +OBJ_DIR = .obj + +CSOURCES = $(wildcard $(SRC_DIR)/*.c) +CPPSOURCES = $(wildcard $(SRC_DIR)/*.cpp) +ASOURCES = $(wildcard $(SRC_DIR)/*.S) +COBJS = $(addprefix $(OBJ_DIR)/, $(notdir $(CSOURCES:.c=.o))) +CXXOBJS = $(addprefix $(OBJ_DIR)/, $(notdir $(CPPSOURCES:.cpp=.o))) +AOBJS = $(addprefix $(OBJ_DIR)/, $(notdir $(ASOURCES:.S=.o))) +OBJECTS = $(COBJS) $(CXXOBJS) $(AOBJS) +VPATH = $(SRC_DIR) + +QUIET = @ + +ALL = all +TARGET = $(PACKAGE).elf +CLEAN = clean + +$(ALL): $(TARGET) $(PACKAGE).bin $(PACKAGE).ihex $(PACKAGE).dfu + +$(OBJECTS): | $(OBJ_DIR) + +$(TARGET): $(OBJECTS) $(LDSCRIPTS) + $(QUIET) echo " LD $@" + $(QUIET) $(CXX) $(OBJECTS) $(LFLAGS) -o $@ + +$(PACKAGE).bin: $(TARGET) + $(QUIET) echo " OBJCOPY $@" + $(QUIET) $(OBJCOPY) -O binary $(TARGET) $@ + +$(PACKAGE).dfu: $(TARGET) + $(QUIET) echo " DFU $@" + $(QUIET) $(COPY) $(PACKAGE).bin $@ + $(QUIET) dfu-suffix -v 1209 -p 70b1 -a $@ + +$(PACKAGE).ihex: $(TARGET) + $(QUIET) echo " IHEX $(PACKAGE).ihex" + $(QUIET) $(OBJCOPY) -O ihex $(TARGET) $@ + +$(DEBUG): CFLAGS += $(DBG_CFLAGS) +$(DEBUG): LFLAGS += $(DBG_LFLAGS) +CFLAGS += $(DBG_CFLAGS) +LFLAGS += $(DBG_LFLAGS) +$(DEBUG): $(TARGET) + +$(OBJ_DIR): + $(QUIET) mkdir $(OBJ_DIR) + +$(COBJS) : $(OBJ_DIR)/%.o : %.c Makefile + $(QUIET) echo " CC $< $(notdir $@)" + $(QUIET) $(CC) -c $< $(CFLAGS) -o $@ -MMD + +$(OBJ_DIR)/%.o: %.cpp + $(QUIET) echo " CXX $< $(notdir $@)" + $(QUIET) $(CXX) -c $< $(CXXFLAGS) -o $@ -MMD + +$(OBJ_DIR)/%.o: %.S + $(QUIET) echo " AS $< $(notdir $@)" + $(QUIET) $(CC) -x assembler-with-cpp -c $< $(CFLAGS) -o $@ -MMD + +.PHONY: clean + +clean: + $(QUIET) echo " RM $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.d))" + -$(QUIET) $(RM) $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.d)) + $(QUIET) echo " RM $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.d))" + -$(QUIET) $(RM) $(subst /,$(PATH_SEP),$(wildcard $(OBJ_DIR)/*.o)) + $(QUIET) echo " RM $(TARGET) $(PACKAGE).bin $(PACKAGE).symbol $(PACKAGE).ihex $(PACKAGE).dfu" + -$(QUIET) $(RM) $(TARGET) $(PACKAGE).bin $(PACKAGE).symbol $(PACKAGE).ihex $(PACKAGE).dfu + +include $(wildcard $(OBJ_DIR)/*.d) diff --git a/README.md b/README.md new file mode 100644 index 0000000..e69de29 diff --git a/include/csr.h b/include/csr.h new file mode 100644 index 0000000..c4a691c --- /dev/null +++ b/include/csr.h @@ -0,0 +1,347 @@ +#ifndef __GENERATED_CSR_H +#define __GENERATED_CSR_H +#include +#ifdef CSR_ACCESSORS_DEFINED +extern void csr_writeb(uint8_t value, uint32_t addr); +extern uint8_t csr_readb(uint32_t addr); +extern void csr_writew(uint16_t value, uint32_t addr); +extern uint16_t csr_readw(uint32_t addr); +extern void csr_writel(uint32_t value, uint32_t addr); +extern uint32_t csr_readl(uint32_t addr); +#else /* ! CSR_ACCESSORS_DEFINED */ +#include +#endif /* ! CSR_ACCESSORS_DEFINED */ + +/* spiflash */ +#define CSR_SPIFLASH_BASE 0xe0004800 +#define CSR_SPIFLASH_BITBANG_ADDR 0xe0004800 +#define CSR_SPIFLASH_BITBANG_SIZE 1 +static inline unsigned char spiflash_bitbang_read(void) { + unsigned char r = csr_readl(0xe0004800); + return r; +} +static inline void spiflash_bitbang_write(unsigned char value) { + csr_writel(value, 0xe0004800); +} +#define CSR_SPIFLASH_MISO_ADDR 0xe0004804 +#define CSR_SPIFLASH_MISO_SIZE 1 +static inline unsigned char spiflash_miso_read(void) { + unsigned char r = csr_readl(0xe0004804); + return r; +} +#define CSR_SPIFLASH_BITBANG_EN_ADDR 0xe0004808 +#define CSR_SPIFLASH_BITBANG_EN_SIZE 1 +static inline unsigned char spiflash_bitbang_en_read(void) { + unsigned char r = csr_readl(0xe0004808); + return r; +} +static inline void spiflash_bitbang_en_write(unsigned char value) { + csr_writel(value, 0xe0004808); +} + +/* timer0 */ +#define CSR_TIMER0_BASE 0xe0002800 +#define CSR_TIMER0_LOAD_ADDR 0xe0002800 +#define CSR_TIMER0_LOAD_SIZE 4 +static inline unsigned int timer0_load_read(void) { + unsigned int r = csr_readl(0xe0002800); + r <<= 8; + r |= csr_readl(0xe0002804); + r <<= 8; + r |= csr_readl(0xe0002808); + r <<= 8; + r |= csr_readl(0xe000280c); + return r; +} +static inline void timer0_load_write(unsigned int value) { + csr_writel(value >> 24, 0xe0002800); + csr_writel(value >> 16, 0xe0002804); + csr_writel(value >> 8, 0xe0002808); + csr_writel(value, 0xe000280c); +} +#define CSR_TIMER0_RELOAD_ADDR 0xe0002810 +#define CSR_TIMER0_RELOAD_SIZE 4 +static inline unsigned int timer0_reload_read(void) { + unsigned int r = csr_readl(0xe0002810); + r <<= 8; + r |= csr_readl(0xe0002814); + r <<= 8; + r |= csr_readl(0xe0002818); + r <<= 8; + r |= csr_readl(0xe000281c); + return r; +} +static inline void timer0_reload_write(unsigned int value) { + csr_writel(value >> 24, 0xe0002810); + csr_writel(value >> 16, 0xe0002814); + csr_writel(value >> 8, 0xe0002818); + csr_writel(value, 0xe000281c); +} +#define CSR_TIMER0_EN_ADDR 0xe0002820 +#define CSR_TIMER0_EN_SIZE 1 +static inline unsigned char timer0_en_read(void) { + unsigned char r = csr_readl(0xe0002820); + return r; +} +static inline void timer0_en_write(unsigned char value) { + csr_writel(value, 0xe0002820); +} +#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824 +#define CSR_TIMER0_UPDATE_VALUE_SIZE 1 +static inline unsigned char timer0_update_value_read(void) { + unsigned char r = csr_readl(0xe0002824); + return r; +} +static inline void timer0_update_value_write(unsigned char value) { + csr_writel(value, 0xe0002824); +} +#define CSR_TIMER0_VALUE_ADDR 0xe0002828 +#define CSR_TIMER0_VALUE_SIZE 4 +static inline unsigned int timer0_value_read(void) { + unsigned int r = csr_readl(0xe0002828); + r <<= 8; + r |= csr_readl(0xe000282c); + r <<= 8; + r |= csr_readl(0xe0002830); + r <<= 8; + r |= csr_readl(0xe0002834); + return r; +} +#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838 +#define CSR_TIMER0_EV_STATUS_SIZE 1 +static inline unsigned char timer0_ev_status_read(void) { + unsigned char r = csr_readl(0xe0002838); + return r; +} +static inline void timer0_ev_status_write(unsigned char value) { + csr_writel(value, 0xe0002838); +} +#define CSR_TIMER0_EV_PENDING_ADDR 0xe000283c +#define CSR_TIMER0_EV_PENDING_SIZE 1 +static inline unsigned char timer0_ev_pending_read(void) { + unsigned char r = csr_readl(0xe000283c); + return r; +} +static inline void timer0_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe000283c); +} +#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840 +#define CSR_TIMER0_EV_ENABLE_SIZE 1 +static inline unsigned char timer0_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0002840); + return r; +} +static inline void timer0_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0002840); +} + +/* uart */ +#define CSR_UART_BASE 0xe0001800 +#define CSR_UART_RXTX_ADDR 0xe0001800 +#define CSR_UART_RXTX_SIZE 1 +static inline unsigned char uart_rxtx_read(void) { + unsigned char r = csr_readl(0xe0001800); + return r; +} +static inline void uart_rxtx_write(unsigned char value) { + csr_writel(value, 0xe0001800); +} +#define CSR_UART_TXFULL_ADDR 0xe0001804 +#define CSR_UART_TXFULL_SIZE 1 +static inline unsigned char uart_txfull_read(void) { + unsigned char r = csr_readl(0xe0001804); + return r; +} +#define CSR_UART_RXEMPTY_ADDR 0xe0001808 +#define CSR_UART_RXEMPTY_SIZE 1 +static inline unsigned char uart_rxempty_read(void) { + unsigned char r = csr_readl(0xe0001808); + return r; +} +#define CSR_UART_EV_STATUS_ADDR 0xe000180c +#define CSR_UART_EV_STATUS_SIZE 1 +static inline unsigned char uart_ev_status_read(void) { + unsigned char r = csr_readl(0xe000180c); + return r; +} +static inline void uart_ev_status_write(unsigned char value) { + csr_writel(value, 0xe000180c); +} +#define CSR_UART_EV_PENDING_ADDR 0xe0001810 +#define CSR_UART_EV_PENDING_SIZE 1 +static inline unsigned char uart_ev_pending_read(void) { + unsigned char r = csr_readl(0xe0001810); + return r; +} +static inline void uart_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe0001810); +} +#define CSR_UART_EV_ENABLE_ADDR 0xe0001814 +#define CSR_UART_EV_ENABLE_SIZE 1 +static inline unsigned char uart_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0001814); + return r; +} +static inline void uart_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0001814); +} + +/* uart_phy */ +#define CSR_UART_PHY_BASE 0xe0001000 +#define CSR_UART_PHY_TUNING_WORD_ADDR 0xe0001000 +#define CSR_UART_PHY_TUNING_WORD_SIZE 4 +static inline unsigned int uart_phy_tuning_word_read(void) { + unsigned int r = csr_readl(0xe0001000); + r <<= 8; + r |= csr_readl(0xe0001004); + r <<= 8; + r |= csr_readl(0xe0001008); + r <<= 8; + r |= csr_readl(0xe000100c); + return r; +} +static inline void uart_phy_tuning_word_write(unsigned int value) { + csr_writel(value >> 24, 0xe0001000); + csr_writel(value >> 16, 0xe0001004); + csr_writel(value >> 8, 0xe0001008); + csr_writel(value, 0xe000100c); +} + +/* usb */ +#define CSR_USB_BASE 0xe0005000 +#define CSR_USB_OBUF_HEAD_ADDR 0xe0005000 +#define CSR_USB_OBUF_HEAD_SIZE 1 +static inline unsigned char usb_obuf_head_read(void) { + unsigned char r = csr_readl(0xe0005000); + return r; +} +static inline void usb_obuf_head_write(unsigned char value) { + csr_writel(value, 0xe0005000); +} +#define CSR_USB_OBUF_EMPTY_ADDR 0xe0005004 +#define CSR_USB_OBUF_EMPTY_SIZE 1 +static inline unsigned char usb_obuf_empty_read(void) { + unsigned char r = csr_readl(0xe0005004); + return r; +} +#define CSR_USB_ARM_ADDR 0xe0005008 +#define CSR_USB_ARM_SIZE 1 +static inline unsigned char usb_arm_read(void) { + unsigned char r = csr_readl(0xe0005008); + return r; +} +static inline void usb_arm_write(unsigned char value) { + csr_writel(value, 0xe0005008); +} +#define CSR_USB_IBUF_HEAD_ADDR 0xe000500c +#define CSR_USB_IBUF_HEAD_SIZE 1 +static inline unsigned char usb_ibuf_head_read(void) { + unsigned char r = csr_readl(0xe000500c); + return r; +} +static inline void usb_ibuf_head_write(unsigned char value) { + csr_writel(value, 0xe000500c); +} +#define CSR_USB_IBUF_EMPTY_ADDR 0xe0005010 +#define CSR_USB_IBUF_EMPTY_SIZE 1 +static inline unsigned char usb_ibuf_empty_read(void) { + unsigned char r = csr_readl(0xe0005010); + return r; +} +#define CSR_USB_PULLUP_OUT_ADDR 0xe0005014 +#define CSR_USB_PULLUP_OUT_SIZE 1 +static inline unsigned char usb_pullup_out_read(void) { + unsigned char r = csr_readl(0xe0005014); + return r; +} +static inline void usb_pullup_out_write(unsigned char value) { + csr_writel(value, 0xe0005014); +} +#define CSR_USB_EV_STATUS_ADDR 0xe0005018 +#define CSR_USB_EV_STATUS_SIZE 1 +static inline unsigned char usb_ev_status_read(void) { + unsigned char r = csr_readl(0xe0005018); + return r; +} +static inline void usb_ev_status_write(unsigned char value) { + csr_writel(value, 0xe0005018); +} +#define CSR_USB_EV_PENDING_ADDR 0xe000501c +#define CSR_USB_EV_PENDING_SIZE 1 +static inline unsigned char usb_ev_pending_read(void) { + unsigned char r = csr_readl(0xe000501c); + return r; +} +static inline void usb_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe000501c); +} +#define CSR_USB_EV_ENABLE_ADDR 0xe0005020 +#define CSR_USB_EV_ENABLE_SIZE 1 +static inline unsigned char usb_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0005020); + return r; +} +static inline void usb_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0005020); +} +#define CSR_IDENTIFIER_MEM_BASE 0xe0002000 + +/* constants */ +#define NMI_INTERRUPT 0 +static inline int nmi_interrupt_read(void) { + return 0; +} +#define TIMER0_INTERRUPT 1 +static inline int timer0_interrupt_read(void) { + return 1; +} +#define UART_INTERRUPT 2 +static inline int uart_interrupt_read(void) { + return 2; +} +#define USB_INTERRUPT 3 +static inline int usb_interrupt_read(void) { + return 3; +} +#define CSR_DATA_WIDTH 8 +static inline int csr_data_width_read(void) { + return 8; +} +#define SYSTEM_CLOCK_FREQUENCY 12000000 +static inline int system_clock_frequency_read(void) { + return 12000000; +} +#define SPIFLASH_PAGE_SIZE 256 +static inline int spiflash_page_size_read(void) { + return 256; +} +#define SPIFLASH_SECTOR_SIZE 65536 +static inline int spiflash_sector_size_read(void) { + return 65536; +} +#define ROM_DISABLE 1 +static inline int rom_disable_read(void) { + return 1; +} +#define CONFIG_CLOCK_FREQUENCY 12000000 +static inline int config_clock_frequency_read(void) { + return 12000000; +} +#define CONFIG_CPU_RESET_ADDR 0 +static inline int config_cpu_reset_addr_read(void) { + return 0; +} +#define CONFIG_CPU_TYPE "VEXRISCV" +static inline const char * config_cpu_type_read(void) { + return "VEXRISCV"; +} +#define CONFIG_CPU_VARIANT "VEXRISCV" +static inline const char * config_cpu_variant_read(void) { + return "VEXRISCV"; +} +#define CONFIG_CSR_DATA_WIDTH 8 +static inline int config_csr_data_width_read(void) { + return 8; +} + +#endif diff --git a/include/mem.h b/include/mem.h new file mode 100644 index 0000000..9c59bc0 --- /dev/null +++ b/include/mem.h @@ -0,0 +1,13 @@ +#ifndef __GENERATED_MEM_H +#define __GENERATED_MEM_H + +#define SPIFLASH_BASE 0x20000000 +#define SPIFLASH_SIZE 0x00200000 + +#define SRAM_BASE 0x10000000 +#define SRAM_SIZE 0x00020000 + +#define ROM_BASE 0x00000000 +#define ROM_SIZE 0x00002000 + +#endif diff --git a/ld/linker.ld b/ld/linker.ld new file mode 100644 index 0000000..0c27de6 --- /dev/null +++ b/ld/linker.ld @@ -0,0 +1,53 @@ +INCLUDE ld/output_format.ld +ENTRY(_start) + +__DYNAMIC = 0; + +INCLUDE ld/regions.ld + +SECTIONS +{ + .text : + { + _ftext = .; + *(.text .stub .text.* .gnu.linkonce.t.*) + _etext = .; + } > rom + + .rodata : + { + . = ALIGN(4); + _frodata = .; + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.rodata1) + _erodata = .; + } > rom + + .data : AT (ADDR(.rodata) + SIZEOF (.rodata)) + { + . = ALIGN(4); + _fdata = .; + *(.data .data.* .gnu.linkonce.d.*) + *(.data1) + _gp = ALIGN(16); + *(.sdata .sdata.* .gnu.linkonce.s.*) + _edata = ALIGN(16); /* Make sure _edata is >= _gp. */ + } > sram + + .bss : + { + . = ALIGN(4); + _fbss = .; + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + _end = .; + } > sram +} + +PROVIDE(_fstack = ORIGIN(sram) + LENGTH(sram) - 4); diff --git a/ld/output_format.ld b/ld/output_format.ld new file mode 100644 index 0000000..5e76f5f --- /dev/null +++ b/ld/output_format.ld @@ -0,0 +1 @@ +OUTPUT_FORMAT("elf32-littleriscv") diff --git a/ld/regions.ld b/ld/regions.ld new file mode 100644 index 0000000..eb17fc5 --- /dev/null +++ b/ld/regions.ld @@ -0,0 +1,5 @@ +MEMORY { + spiflash : ORIGIN = 0x20000000, LENGTH = 0x00200000 + sram : ORIGIN = 0x10000000, LENGTH = 0x00020000 + rom : ORIGIN = 0x00000000, LENGTH = 0x00002000 +} diff --git a/lib/crt0-vexriscv-ctr.o b/lib/crt0-vexriscv-ctr.o new file mode 100644 index 0000000..39f0df2 Binary files /dev/null and b/lib/crt0-vexriscv-ctr.o differ diff --git a/lib/crt0-vexriscv-xip.o b/lib/crt0-vexriscv-xip.o new file mode 100644 index 0000000..39f0df2 Binary files /dev/null and b/lib/crt0-vexriscv-xip.o differ diff --git a/lib/libbase-nofloat.a b/lib/libbase-nofloat.a new file mode 100644 index 0000000..eac11d2 Binary files /dev/null and b/lib/libbase-nofloat.a differ diff --git a/lib/libbase.a b/lib/libbase.a new file mode 100644 index 0000000..ddcc2e1 Binary files /dev/null and b/lib/libbase.a differ diff --git a/lib/libcompiler_rt.a b/lib/libcompiler_rt.a new file mode 100644 index 0000000..39fd789 Binary files /dev/null and b/lib/libcompiler_rt.a differ diff --git a/lib/libnet.a b/lib/libnet.a new file mode 100644 index 0000000..64398d5 Binary files /dev/null and b/lib/libnet.a differ diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..fd58451 --- /dev/null +++ b/src/main.c @@ -0,0 +1,9 @@ +#include + +void main(int argc, char **argv) { + printf("Hello, world!\n"); + while (1) { + printf("10 PRINT HELLO, WORLD\n"); + printf("20 GOTO 10\n"); + } +} \ No newline at end of file