foboot-bitstream: generate multiboot and print helpful message
Generate a multiboot version of the bitstream image. While we're at it, print a helpful message indicating what each output image is. Signed-off-by: Sean Cross <sean@xobs.io>
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parent
4b6ad47705
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7ee97214e6
@ -547,8 +547,9 @@ class BaseSoC(SoCCore):
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elif boot_source == "bios":
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elif boot_source == "bios":
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kwargs['cpu_reset_address']=0
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kwargs['cpu_reset_address']=0
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if bios_file is None:
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if bios_file is None:
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bios_size = 0x2000
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self.integrated_rom_size = bios_size = 0x2000
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self.add_memory_region("rom", kwargs['cpu_reset_address'], bios_size)
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self.submodules.rom = wishbone.SRAM(bios_size, read_only=True, init=[])
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self.register_rom(self.rom.bus, bios_size)
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else:
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else:
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bios_size = 0x2000
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bios_size = 0x2000
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self.submodules.firmware_rom = FirmwareROM(bios_size, bios_file)
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self.submodules.firmware_rom = FirmwareROM(bios_size, bios_file)
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@ -649,11 +650,10 @@ def make_multiboot_header(filename, boot_offsets=[160]):
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output.write(bytes([0]))
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output.write(bytes([0]))
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def main():
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def main():
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make_multiboot_header("build/gateware/multiboot.bin", [160, 262144])
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parser = argparse.ArgumentParser(
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parser = argparse.ArgumentParser(
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description="Build Fomu Main Gateware")
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description="Build Fomu Main Gateware")
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parser.add_argument(
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parser.add_argument(
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"--boot-source", choices=["spi", "rand", "bios"], default="rand",
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"--boot-source", choices=["spi", "rand", "bios"], default="bios",
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help="where to have the CPU obtain its executable code from"
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help="where to have the CPU obtain its executable code from"
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)
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)
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parser.add_argument(
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parser.add_argument(
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@ -674,6 +674,10 @@ def main():
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)
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)
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args = parser.parse_args()
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args = parser.parse_args()
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output_dir = 'build'
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make_multiboot_header(os.path.join(output_dir, "gateware", "multiboot-header.bin"), [160, 262144])
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if args.export_random_rom_file is not None:
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if args.export_random_rom_file is not None:
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size = 0x2000
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size = 0x2000
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def xorshift32(x):
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def xorshift32(x):
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@ -711,7 +715,7 @@ def main():
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soc = BaseSoC(platform, cpu_type="vexriscv", cpu_variant=cpu_variant,
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soc = BaseSoC(platform, cpu_type="vexriscv", cpu_variant=cpu_variant,
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debug=debug, boot_source=args.boot_source,
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debug=debug, boot_source=args.boot_source,
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bios_file=args.bios, use_pll=args.no_pll)
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bios_file=args.bios, use_pll=args.no_pll)
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builder = Builder(soc, output_dir="build", csr_csv="test/csr.csv", compile_software=compile_software)
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builder = Builder(soc, output_dir=output_dir, csr_csv="test/csr.csv", compile_software=compile_software)
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if compile_software:
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if compile_software:
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builder.software_packages = [
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builder.software_packages = [
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("bios", os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "sw")))
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("bios", os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "sw")))
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@ -719,5 +723,22 @@ def main():
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vns = builder.build()
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vns = builder.build()
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soc.do_exit(vns)
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soc.do_exit(vns)
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with open(os.path.join(output_dir, 'gateware', 'multiboot-header.bin'), 'rb') as multiboot_header_file:
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multiboot_header = multiboot_header_file.read()
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with open(os.path.join(output_dir, 'gateware', 'top.bin'), 'rb') as top_file:
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top = top_file.read()
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with open(os.path.join(output_dir, 'gateware', 'top-multiboot.bin'), 'wb') as top_multiboot_file:
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top_multiboot_file.write(multiboot_header)
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top_multiboot_file.write(top)
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print(
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"""Foboot build complete. Output files:
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{}/gateware/top.bin Bitstream file. Load this onto the FPGA for testing.
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{}/gateware/top-multiboot.bin Multiboot-enabled bitstream file. Flash this onto FPGA ROM.
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{}/gateware/top.v Source Verilog file. Useful for debugging issues.
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{}/software/include/generated Header files for API access.
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{}/software/bios/bios.elf ELF file for debugging bios.
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""".format(output_dir, output_dir, output_dir, output_dir, output_dir))
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if __name__ == "__main__":
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if __name__ == "__main__":
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main()
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main()
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