diff --git a/hw/foboot-bitstream.py b/hw/foboot-bitstream.py
index 12d8778..8994233 100755
--- a/hw/foboot-bitstream.py
+++ b/hw/foboot-bitstream.py
@@ -285,9 +285,6 @@ class BaseSoC(SoCCore):
         else:
             raise ValueError("unrecognized boot_source: {}".format(boot_source))
 
-        # pmoda = platform.request("pmoda")
-        # pmodb = platform.request("pmodb")
-
         spi_pads = platform.request("spiflash")
         self.submodules.spi = SPIMaster(spi_pads)
 
@@ -298,14 +295,6 @@ class BaseSoC(SoCCore):
         # self.submodules.usb = epmem.MemInterface(usb_iobuf)
         # self.submodules.usb = unififo.UsbUniFifo(usb_iobuf)
 
-        # self.comb += [
-        #     pmoda.p1.eq(self.crg.cd_usb_48.clk),
-        #     pmodb.p1.eq(self.crg.cd_usb_12.clk),
-        #     pmodb.p2.eq(self.usb.tx.i_bit_strobe),
-        #     pmoda.p2.eq(self.usb.tx.fit_dat),
-        #     pmodb.p3.eq(self.usb.tx.fit_oe),
-        # ]
-
         # Disable final deep-sleep power down so firmware words are loaded
         # onto softcore's address bus.
         platform.toolchain.build_template[3] = "icepack -s {build_name}.txt {build_name}.bin"