it builds! what more do you want?
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
6
include/assert.h
Normal file
6
include/assert.h
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@@ -0,0 +1,6 @@
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#ifndef __ASSERT_H
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#define __ASSERT_H
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#define assert(x)
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#endif /* __ASSERT_H */
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24
include/console.h
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24
include/console.h
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@@ -0,0 +1,24 @@
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#ifndef __CONSOLE_H
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#define __CONSOLE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef void (*console_write_hook)(char);
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typedef char (*console_read_hook)(void);
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typedef int (*console_read_nonblock_hook)(void);
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void console_set_write_hook(console_write_hook h);
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void console_set_read_hook(console_read_hook r, console_read_nonblock_hook rn);
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char readchar(void);
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int readchar_nonblock(void);
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void putsnonl(const char *s);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CONSOLE_H */
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15
include/crc.h
Normal file
15
include/crc.h
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@@ -0,0 +1,15 @@
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#ifndef __CRC_H
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#define __CRC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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unsigned short crc16(const unsigned char *buffer, int len);
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unsigned int crc32(const unsigned char *buffer, unsigned int len);
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#ifdef __cplusplus
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}
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#endif
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#endif
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11
include/csr-defs.h
Normal file
11
include/csr-defs.h
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@@ -0,0 +1,11 @@
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#ifndef CSR_DEFS__H
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#define CSR_DEFS__H
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#define CSR_MSTATUS_MIE 0x8
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#define CSR_IRQ_MASK 0xBC0
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#define CSR_IRQ_PENDING 0xFC0
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#define CSR_DCACHE_INFO 0xCC0
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#endif /* CSR_DEFS__H */
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63
include/ctype.h
Normal file
63
include/ctype.h
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@@ -0,0 +1,63 @@
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#ifndef __CTYPE_H
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#define __CTYPE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* NOTE! This ctype does not handle EOF like the standard C
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* library is required to.
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*/
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#define _U 0x01 /* upper */
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#define _L 0x02 /* lower */
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#define _D 0x04 /* digit */
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#define _C 0x08 /* cntrl */
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#define _P 0x10 /* punct */
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#define _S 0x20 /* white space (space/lf/tab) */
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#define _X 0x40 /* hex digit */
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#define _SP 0x80 /* hard space (0x20) */
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extern const unsigned char _ctype[];
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#define __ismask(x) (_ctype[(int)(unsigned char)(x)])
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#define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0)
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#define isalpha(c) ((__ismask(c)&(_U|_L)) != 0)
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#define iscntrl(c) ((__ismask(c)&(_C)) != 0)
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#define isdigit(c) ((__ismask(c)&(_D)) != 0)
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#define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0)
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#define islower(c) ((__ismask(c)&(_L)) != 0)
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#define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0)
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#define ispunct(c) ((__ismask(c)&(_P)) != 0)
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/* Note: isspace() must return false for %NUL-terminator */
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#define isspace(c) ((__ismask(c)&(_S)) != 0)
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#define isupper(c) ((__ismask(c)&(_U)) != 0)
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#define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0)
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#define isascii(c) (((unsigned char)(c))<=0x7f)
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#define toascii(c) (((unsigned char)(c))&0x7f)
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static inline unsigned char __tolower(unsigned char c)
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{
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if (isupper(c))
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c -= 'A'-'a';
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return c;
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}
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static inline unsigned char __toupper(unsigned char c)
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{
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if (islower(c))
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c -= 'a'-'A';
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return c;
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}
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#define tolower(c) __tolower(c)
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#define toupper(c) __toupper(c)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CTYPE_H */
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30
include/endian.h
Normal file
30
include/endian.h
Normal file
@@ -0,0 +1,30 @@
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#ifndef __ENDIAN_H
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#define __ENDIAN_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define __LITTLE_ENDIAN 0
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#define __BIG_ENDIAN 1
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#define __BYTE_ORDER __BIG_ENDIAN
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static inline unsigned int le32toh(unsigned int val)
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{
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return (val & 0xff) << 24 |
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(val & 0xff00) << 8 |
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(val & 0xff0000) >> 8 |
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(val & 0xff000000) >> 24;
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}
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static inline unsigned short le16toh(unsigned short val)
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{
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return (val & 0xff) << 8 |
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(val & 0xff00) >> 8;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ENDIAN_H */
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261
include/errno.h
Normal file
261
include/errno.h
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@@ -0,0 +1,261 @@
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#ifndef __ERRNO_H
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#define __ERRNO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern int errno;
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#define EPERM 1
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#define EPERM_STR "Operation not permitted"
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#define ENOENT 2
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#define ENOENT_STR "No such file or directory"
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#define ESRCH 3
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#define ESRCH_STR "No such process"
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#define EINTR 4
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#define EINTR_STR "Interrupted system call"
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#define EIO 5
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#define EIO_STR "I/O error"
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#define ENXIO 6
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#define ENXIO_STR "No such device or address"
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#define E2BIG 7
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#define E2BIG_STR "Arg list too long"
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#define ENOEXEC 8
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#define ENOEXEC_STR "Exec format error"
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#define EBADF 9
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#define EBADF_STR "Bad file number"
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#define ECHILD 10
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#define ECHILD_STR "No child processes"
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#define EAGAIN 11
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#define EWOULDBLOCK EAGAIN
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#define EAGAIN_STR "Try again"
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#define ENOMEM 12
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#define ENOMEM_STR "Out of memory"
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#define EACCES 13
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#define EACCES_STR "Permission denied"
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#define EFAULT 14
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#define EFAULT_STR "Bad address"
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#define ENOTBLK 15
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#define ENOTBLK_STR "Block device required"
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#define EBUSY 16
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#define EBUSY_STR "Device or resource busy"
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#define EEXIST 17
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#define EEXIST_STR "File exists"
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#define EXDEV 18
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#define EXDEV_STR "Cross-device link"
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#define ENODEV 19
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#define ENODEV_STR "No such device"
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#define ENOTDIR 20
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#define ENOTDIR_STR "Not a directory"
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#define EISDIR 21
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#define EISDIR_STR "Is a directory"
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#define EINVAL 22
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#define EINVAL_STR "Invalid argument"
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#define ENFILE 23
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#define ENFILE_STR "File table overflow"
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#define EMFILE 24
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#define EMFILE_STR "Too many open files"
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#define ENOTTY 25
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#define ENOTTY_STR "Not a typewriter"
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#define ETXTBSY 26
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#define ETXTBSY_STR "Text file busy"
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#define EFBIG 27
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#define EFBIG_STR "File too large"
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#define ENOSPC 28
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#define ENOSPC_STR "No space left on device"
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#define ESPIPE 29
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#define ESPIPE_STR "Illegal seek"
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#define EROFS 30
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#define EROFS_STR "Read-only file system"
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#define EMLINK 31
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#define EMLINK_STR "Too many links"
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#define EPIPE 32
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#define EPIPE_STR "Broken pipe"
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#define EDOM 33
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#define EDOM_STR "Math argument out of domain of func"
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#define ERANGE 34
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#define ERANGE_STR "Math result not representable"
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#define EDEADLK 35
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#define EDEADLOCK EDEADLK
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#define EDEADLK_STR "Resource deadlock would occur"
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#define ENAMETOOLONG 36
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#define ENAMETOOLONG_STR "File name too long"
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#define ENOLCK 37
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#define ENOLCK_STR "No record locks available"
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#define ENOSYS 38
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#define ENOSYS_STR "Function not implemented"
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#define ENOTEMPTY 39
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#define ENOTEMPTY_STR "Directory not empty"
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#define ELOOP 40
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#define ELOOP_STR "Too many symbolic links encountered"
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#define ENOMSG 42
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#define ENOMSG_STR "No message of desired type"
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#define EIDRM 43
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#define EIDRM_STR "Identifier removed"
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#define ECHRNG 44
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#define ECHRNG_STR "Channel number out of range"
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#define EL2NSYNC 45
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#define EL2NSYNC_STR "Level 2 not synchronized"
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#define EL3HLT 46
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#define EL3HLT_STR "Level 3 halted"
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#define EL3RST 47
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#define EL3RST_STR "Level 3 reset"
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#define ELNRNG 48
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#define ELNRNG_STR "Link number out of range"
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#define EUNATCH 49
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#define EUNATCH_STR "Protocol driver not attached"
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#define ENOCSI 50
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#define ENOCSI_STR "No CSI structure available"
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#define EL2HLT 51
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#define EL2HLT_STR "Level 2 halted"
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#define EBADE 52
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#define EBADE_STR "Invalid exchange"
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#define EBADR 53
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#define EBADR_STR "Invalid request descriptor"
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#define EXFULL 54
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#define EXFULL_STR "Exchange full"
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#define ENOANO 55
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#define ENOANO_STR "No anode"
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#define EBADRQC 56
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#define EBADRQC_STR "Invalid request code"
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#define EBADSLT 57
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#define EBADSLT_STR "Invalid slot"
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#define EBFONT 59
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#define EBFONT_STR "Bad font file format"
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#define ENOSTR 60
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#define ENOSTR_STR "Device not a stream"
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#define ENODATA 61
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#define ENODATA_STR "No data available"
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#define ETIME 62
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#define ETIME_STR "Timer expired"
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#define ENOSR 63
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#define ENOSR_STR "Out of streams resources"
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#define ENONET 64
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#define ENONET_STR "Machine is not on the network"
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#define ENOPKG 65
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#define ENOPKG_STR "Package not installed"
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#define EREMOTE 66
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#define EREMOTE_STR "Object is remote"
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||||
#define ENOLINK 67
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#define ENOLINK_STR "Link has been severed"
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#define EADV 68
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||||
#define EADV_STR "Advertise error"
|
||||
#define ESRMNT 69
|
||||
#define ESRMNT_STR "Srmount error"
|
||||
#define ECOMM 70
|
||||
#define ECOMM_STR "Communication error on send"
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||||
#define EPROTO 71
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||||
#define EPROTO_STR "Protocol error"
|
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#define EMULTIHOP 72
|
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#define EMULTIHOP_STR "Multihop attempted"
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#define EDOTDOT 73
|
||||
#define EDOTDOT_STR "RFS specific error"
|
||||
#define EBADMSG 74
|
||||
#define EBADMSG_STR "Not a data message"
|
||||
#define EOVERFLOW 75
|
||||
#define EOVERFLOW_STR "Value too large for defined data type"
|
||||
#define ENOTUNIQ 76
|
||||
#define ENOTUNIQ_STR "Name not unique on network"
|
||||
#define EBADFD 77
|
||||
#define EBADFD_STR "File descriptor in bad state"
|
||||
#define EREMCHG 78
|
||||
#define EREMCHG_STR "Remote address changed"
|
||||
#define ELIBACC 79
|
||||
#define ELIBACC_STR "Can not access a needed shared library"
|
||||
#define ELIBBAD 80
|
||||
#define ELIBBAD_STR "Accessing a corrupted shared library"
|
||||
#define ELIBSCN 81
|
||||
#define ELIBSCN_STR ".lib section in a.out corrupted"
|
||||
#define ELIBMAX 82
|
||||
#define ELIBMAX_STR "Attempting to link in too many shared libraries"
|
||||
#define ELIBEXEC 83
|
||||
#define ELIBEXEC_STR "Cannot exec a shared library directly"
|
||||
#define EILSEQ 84
|
||||
#define EILSEQ_STR "Illegal byte sequence"
|
||||
#define ERESTART 85
|
||||
#define ERESTART_STR "Interrupted system call should be restarted"
|
||||
#define ESTRPIPE 86
|
||||
#define ESTRPIPE_STR "Streams pipe error"
|
||||
#define EUSERS 87
|
||||
#define EUSERS_STR "Too many users"
|
||||
#define ENOTSOCK 88
|
||||
#define ENOTSOCK_STR "Socket operation on non-socket"
|
||||
#define EDESTADDRREQ 89
|
||||
#define EDESTADDRREQ_STR "Destination address required"
|
||||
#define EMSGSIZE 90
|
||||
#define EMSGSIZE_STR "Message too long"
|
||||
#define EPROTOTYPE 91
|
||||
#define EPROTOTYPE_STR "Protocol wrong type for socket"
|
||||
#define ENOPROTOOPT 92
|
||||
#define ENOPROTOOPT_STR "Protocol not available"
|
||||
#define EPROTONOSUPPORT 93
|
||||
#define EPROTONOSUPPORT_STR "Protocol not supported"
|
||||
#define ESOCKTNOSUPPORT 94
|
||||
#define ESOCKTNOSUPPORT_STR "Socket type not supported"
|
||||
#define EOPNOTSUPP 95
|
||||
#define EOPNOTSUPP_STR "Operation not supported on transport endpoint"
|
||||
#define EPFNOSUPPORT 96
|
||||
#define EPFNOSUPPORT_STR "Protocol family not supported"
|
||||
#define EAFNOSUPPORT 97
|
||||
#define EAFNOSUPPORT_STR "Address family not supported by protocol"
|
||||
#define EADDRINUSE 98
|
||||
#define EADDRINUSE_STR "Address already in use"
|
||||
#define EADDRNOTAVAIL 99
|
||||
#define EADDRNOTAVAIL_STR "Cannot assign requested address"
|
||||
#define ENETDOWN 100
|
||||
#define ENETDOWN_STR "Network is down"
|
||||
#define ENETUNREACH 101
|
||||
#define ENETUNREACH_STR "Network is unreachable"
|
||||
#define ENETRESET 102
|
||||
#define ENETRESET_STR "Network dropped connection because of reset"
|
||||
#define ECONNABORTED 103
|
||||
#define ECONNABORTED_STR "Software caused connection abort"
|
||||
#define ECONNRESET 104
|
||||
#define ECONNRESET_STR "Connection reset by peer"
|
||||
#define ENOBUFS 105
|
||||
#define ENOBUFS_STR "No buffer space available"
|
||||
#define EISCONN 106
|
||||
#define EISCONN_STR "Transport endpoint is already connected"
|
||||
#define ENOTCONN 107
|
||||
#define ENOTCONN_STR "Transport endpoint is not connected"
|
||||
#define ESHUTDOWN 108
|
||||
#define ESHUTDOWN_STR "Cannot send after transport endpoint shutdown"
|
||||
#define ETOOMANYREFS 109
|
||||
#define ETOOMANYREFS_STR "Too many references: cannot splice"
|
||||
#define ETIMEDOUT 110
|
||||
#define ETIMEDOUT_STR "Connection timed out"
|
||||
#define ECONNREFUSED 111
|
||||
#define ECONNREFUSED_STR "Connection refused"
|
||||
#define EHOSTDOWN 112
|
||||
#define EHOSTDOWN_STR "Host is down"
|
||||
#define EHOSTUNREACH 113
|
||||
#define EHOSTUNREACH_STR "No route to host"
|
||||
#define EALREADY 114
|
||||
#define EALREADY_STR "Operation already in progress"
|
||||
#define EINPROGRESS 115
|
||||
#define EINPROGRESS_STR "Operation now in progress"
|
||||
#define ESTALE 116
|
||||
#define ESTALE_STR "Stale NFS file handle"
|
||||
#define EUCLEAN 117
|
||||
#define EUCLEAN_STR "Structure needs cleaning"
|
||||
#define ENOTNAM 118
|
||||
#define ENOTNAM_STR "Not a XENIX named type file"
|
||||
#define ENAVAIL 119
|
||||
#define ENAVAIL_STR "No XENIX semaphores available"
|
||||
#define EISNAM 120
|
||||
#define EISNAM_STR "Is a named type file"
|
||||
#define EREMOTEIO 121
|
||||
#define EREMOTEIO_STR "Remote I/O error"
|
||||
#define EDQUOT 122
|
||||
#define EDQUOT_STR "Quota exceeded"
|
||||
#define ENOMEDIUM 123
|
||||
#define ENOMEDIUM_STR "No medium found"
|
||||
#define EMEDIUMTYPE 124
|
||||
#define EMEDIUMTYPE_STR "Wrong medium type"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ERRNO_H */
|
||||
216
include/fdlibm/fdlibm.h
Normal file
216
include/fdlibm/fdlibm.h
Normal file
@@ -0,0 +1,216 @@
|
||||
|
||||
/* @(#)fdlibm.h 1.5 04/04/22 */
|
||||
/*
|
||||
* ====================================================
|
||||
* Copyright (C) 2004 by Sun Microsystems, Inc. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this
|
||||
* software is freely granted, provided that this notice
|
||||
* is preserved.
|
||||
* ====================================================
|
||||
*/
|
||||
|
||||
/* Sometimes it's necessary to define __LITTLE_ENDIAN explicitly
|
||||
but these catch some common cases. */
|
||||
|
||||
#if defined(i386) || defined(i486) || \
|
||||
defined(intel) || defined(x86) || defined(i86pc) || \
|
||||
defined(__alpha) || defined(__osf__)
|
||||
#define __LITTLE_ENDIAN
|
||||
#endif
|
||||
|
||||
#ifdef __LITTLE_ENDIAN
|
||||
#define __HI(x) *(1+(int*)&x)
|
||||
#define __LO(x) *(int*)&x
|
||||
#define __HIp(x) *(1+(int*)x)
|
||||
#define __LOp(x) *(int*)x
|
||||
#else
|
||||
#define __HI(x) *(int*)&x
|
||||
#define __LO(x) *(1+(int*)&x)
|
||||
#define __HIp(x) *(int*)x
|
||||
#define __LOp(x) *(1+(int*)x)
|
||||
#endif
|
||||
|
||||
#ifdef __STDC__
|
||||
#define __P(p) p
|
||||
#else
|
||||
#define __P(p) ()
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ANSI/POSIX
|
||||
*/
|
||||
|
||||
extern int signgam;
|
||||
|
||||
#define MAXFLOAT ((float)3.40282346638528860e+38)
|
||||
|
||||
enum fdversion {fdlibm_ieee = -1, fdlibm_svid, fdlibm_xopen, fdlibm_posix};
|
||||
|
||||
#define _LIB_VERSION_TYPE enum fdversion
|
||||
#define _LIB_VERSION _fdlib_version
|
||||
|
||||
/* if global variable _LIB_VERSION is not desirable, one may
|
||||
* change the following to be a constant by:
|
||||
* #define _LIB_VERSION_TYPE const enum version
|
||||
* In that case, after one initializes the value _LIB_VERSION (see
|
||||
* s_lib_version.c) during compile time, it cannot be modified
|
||||
* in the middle of a program
|
||||
*/
|
||||
extern _LIB_VERSION_TYPE _LIB_VERSION;
|
||||
|
||||
#define _IEEE_ fdlibm_ieee
|
||||
#define _SVID_ fdlibm_svid
|
||||
#define _XOPEN_ fdlibm_xopen
|
||||
#define _POSIX_ fdlibm_posix
|
||||
|
||||
struct exception {
|
||||
int type;
|
||||
char *name;
|
||||
double arg1;
|
||||
double arg2;
|
||||
double retval;
|
||||
};
|
||||
|
||||
#define HUGE MAXFLOAT
|
||||
|
||||
/*
|
||||
* set X_TLOSS = pi*2**52, which is possibly defined in <values.h>
|
||||
* (one may replace the following line by "#include <values.h>")
|
||||
*/
|
||||
|
||||
#define X_TLOSS 1.41484755040568800000e+16
|
||||
|
||||
#define DOMAIN 1
|
||||
#define SING 2
|
||||
#define OVERFLOW 3
|
||||
#define UNDERFLOW 4
|
||||
#define TLOSS 5
|
||||
#define PLOSS 6
|
||||
|
||||
/*
|
||||
* ANSI/POSIX
|
||||
*/
|
||||
extern double acos __P((double));
|
||||
extern double asin __P((double));
|
||||
extern double atan __P((double));
|
||||
extern double atan2 __P((double, double));
|
||||
extern double cos __P((double));
|
||||
extern double sin __P((double));
|
||||
extern double tan __P((double));
|
||||
|
||||
extern double cosh __P((double));
|
||||
extern double sinh __P((double));
|
||||
extern double tanh __P((double));
|
||||
|
||||
extern double exp __P((double));
|
||||
extern double frexp __P((double, int *));
|
||||
extern double ldexp __P((double, int));
|
||||
extern double log __P((double));
|
||||
extern double log10 __P((double));
|
||||
extern double modf __P((double, double *));
|
||||
|
||||
extern double pow __P((double, double));
|
||||
extern double sqrt __P((double));
|
||||
|
||||
extern double ceil __P((double));
|
||||
extern double fabs __P((double));
|
||||
extern double floor __P((double));
|
||||
extern double fmod __P((double, double));
|
||||
|
||||
extern double erf __P((double));
|
||||
extern double erfc __P((double));
|
||||
extern double gamma __P((double));
|
||||
extern double hypot __P((double, double));
|
||||
extern int isnan __P((double));
|
||||
extern int finite __P((double));
|
||||
extern double j0 __P((double));
|
||||
extern double j1 __P((double));
|
||||
extern double jn __P((int, double));
|
||||
extern double lgamma __P((double));
|
||||
extern double y0 __P((double));
|
||||
extern double y1 __P((double));
|
||||
extern double yn __P((int, double));
|
||||
|
||||
extern double acosh __P((double));
|
||||
extern double asinh __P((double));
|
||||
extern double atanh __P((double));
|
||||
extern double cbrt __P((double));
|
||||
extern double logb __P((double));
|
||||
extern double nextafter __P((double, double));
|
||||
extern double remainder __P((double, double));
|
||||
#ifdef _SCALB_INT
|
||||
extern double scalb __P((double, int));
|
||||
#else
|
||||
extern double scalb __P((double, double));
|
||||
#endif
|
||||
|
||||
extern int matherr __P((struct exception *));
|
||||
|
||||
/*
|
||||
* IEEE Test Vector
|
||||
*/
|
||||
extern double significand __P((double));
|
||||
|
||||
/*
|
||||
* Functions callable from C, intended to support IEEE arithmetic.
|
||||
*/
|
||||
extern double copysign __P((double, double));
|
||||
extern int ilogb __P((double));
|
||||
extern double rint __P((double));
|
||||
extern double scalbn __P((double, int));
|
||||
|
||||
/*
|
||||
* BSD math library entry points
|
||||
*/
|
||||
extern double expm1 __P((double));
|
||||
extern double log1p __P((double));
|
||||
|
||||
/*
|
||||
* Reentrant version of gamma & lgamma; passes signgam back by reference
|
||||
* as the second argument; user must allocate space for signgam.
|
||||
*/
|
||||
#ifdef _REENTRANT
|
||||
extern double gamma_r __P((double, int *));
|
||||
extern double lgamma_r __P((double, int *));
|
||||
#endif /* _REENTRANT */
|
||||
|
||||
/* ieee style elementary functions */
|
||||
extern double __ieee754_sqrt __P((double));
|
||||
extern double __ieee754_acos __P((double));
|
||||
extern double __ieee754_acosh __P((double));
|
||||
extern double __ieee754_log __P((double));
|
||||
extern double __ieee754_atanh __P((double));
|
||||
extern double __ieee754_asin __P((double));
|
||||
extern double __ieee754_atan2 __P((double,double));
|
||||
extern double __ieee754_exp __P((double));
|
||||
extern double __ieee754_cosh __P((double));
|
||||
extern double __ieee754_fmod __P((double,double));
|
||||
extern double __ieee754_pow __P((double,double));
|
||||
extern double __ieee754_lgamma_r __P((double,int *));
|
||||
extern double __ieee754_gamma_r __P((double,int *));
|
||||
extern double __ieee754_lgamma __P((double));
|
||||
extern double __ieee754_gamma __P((double));
|
||||
extern double __ieee754_log10 __P((double));
|
||||
extern double __ieee754_sinh __P((double));
|
||||
extern double __ieee754_hypot __P((double,double));
|
||||
extern double __ieee754_j0 __P((double));
|
||||
extern double __ieee754_j1 __P((double));
|
||||
extern double __ieee754_y0 __P((double));
|
||||
extern double __ieee754_y1 __P((double));
|
||||
extern double __ieee754_jn __P((int,double));
|
||||
extern double __ieee754_yn __P((int,double));
|
||||
extern double __ieee754_remainder __P((double,double));
|
||||
extern int __ieee754_rem_pio2 __P((double,double*));
|
||||
#ifdef _SCALB_INT
|
||||
extern double __ieee754_scalb __P((double,int));
|
||||
#else
|
||||
extern double __ieee754_scalb __P((double,double));
|
||||
#endif
|
||||
|
||||
/* fdlibm kernel function */
|
||||
extern double __kernel_standard __P((double,double,int));
|
||||
extern double __kernel_sin __P((double,double,int));
|
||||
extern double __kernel_cos __P((double,double));
|
||||
extern double __kernel_tan __P((double,double,int));
|
||||
extern int __kernel_rem_pio2 __P((double*,double*,int,int,int,const int*));
|
||||
58
include/float.h
Normal file
58
include/float.h
Normal file
@@ -0,0 +1,58 @@
|
||||
#ifndef __FLOAT_H
|
||||
#define __FLOAT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
|
||||
#define FLT_ROUNDS (__builtin_flt_rounds())
|
||||
#define FLT_RADIX __FLT_RADIX__
|
||||
|
||||
#define FLT_MANT_DIG __FLT_MANT_DIG__
|
||||
#define DBL_MANT_DIG __DBL_MANT_DIG__
|
||||
#define LDBL_MANT_DIG __LDBL_MANT_DIG__
|
||||
|
||||
#define DECIMAL_DIG __DECIMAL_DIG__
|
||||
|
||||
#define FLT_DIG __FLT_DIG__
|
||||
#define DBL_DIG __DBL_DIG__
|
||||
#define LDBL_DIG __LDBL_DIG__
|
||||
|
||||
#define FLT_MIN_EXP __FLT_MIN_EXP__
|
||||
#define DBL_MIN_EXP __DBL_MIN_EXP__
|
||||
#define LDBL_MIN_EXP __LDBL_MIN_EXP__
|
||||
|
||||
#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__
|
||||
#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__
|
||||
#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__
|
||||
|
||||
#define FLT_MAX_EXP __FLT_MAX_EXP__
|
||||
#define DBL_MAX_EXP __DBL_MAX_EXP__
|
||||
#define LDBL_MAX_EXP __LDBL_MAX_EXP__
|
||||
|
||||
#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__
|
||||
#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__
|
||||
#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__
|
||||
|
||||
#define FLT_MAX __FLT_MAX__
|
||||
#define DBL_MAX __DBL_MAX__
|
||||
#define LDBL_MAX __LDBL_MAX__
|
||||
|
||||
#define FLT_EPSILON __FLT_EPSILON__
|
||||
#define DBL_EPSILON __DBL_EPSILON__
|
||||
#define LDBL_EPSILON __LDBL_EPSILON__
|
||||
|
||||
#define FLT_MIN __FLT_MIN__
|
||||
#define DBL_MIN __DBL_MIN__
|
||||
#define LDBL_MIN __LDBL_MIN__
|
||||
|
||||
#define FLT_TRUE_MIN __FLT_DENORM_MIN__
|
||||
#define DBL_TRUE_MIN __DBL_DENORM_MIN__
|
||||
#define LDBL_TRUE_MIN __LDBL_DENORM_MIN__
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FLOAT_H */
|
||||
52
include/hw/common.h
Normal file
52
include/hw/common.h
Normal file
@@ -0,0 +1,52 @@
|
||||
#ifndef __HW_COMMON_H
|
||||
#define __HW_COMMON_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* To overwrite CSR accessors, define extern, non-inlined versions
|
||||
* of csr_read[bwl]() and csr_write[bwl](), and define
|
||||
* CSR_ACCESSORS_DEFINED.
|
||||
*/
|
||||
|
||||
#ifndef CSR_ACCESSORS_DEFINED
|
||||
#define CSR_ACCESSORS_DEFINED
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#define MMPTR(x) x
|
||||
#else /* ! __ASSEMBLER__ */
|
||||
#define MMPTR(x) (*((volatile unsigned int *)(x)))
|
||||
|
||||
static inline void csr_writeb(uint8_t value, uint32_t addr)
|
||||
{
|
||||
*((volatile uint8_t *)addr) = value;
|
||||
}
|
||||
|
||||
static inline uint8_t csr_readb(uint32_t addr)
|
||||
{
|
||||
return *(volatile uint8_t *)addr;
|
||||
}
|
||||
|
||||
static inline void csr_writew(uint16_t value, uint32_t addr)
|
||||
{
|
||||
*((volatile uint16_t *)addr) = value;
|
||||
}
|
||||
|
||||
static inline uint16_t csr_readw(uint32_t addr)
|
||||
{
|
||||
return *(volatile uint16_t *)addr;
|
||||
}
|
||||
|
||||
static inline void csr_writel(uint32_t value, uint32_t addr)
|
||||
{
|
||||
*((volatile uint32_t *)addr) = value;
|
||||
}
|
||||
|
||||
static inline uint32_t csr_readl(uint32_t addr)
|
||||
{
|
||||
return *(volatile uint32_t *)addr;
|
||||
}
|
||||
#endif /* ! __ASSEMBLER__ */
|
||||
|
||||
#endif /* ! CSR_ACCESSORS_DEFINED */
|
||||
|
||||
#endif /* __HW_COMMON_H */
|
||||
11
include/hw/ethmac_mem.h
Normal file
11
include/hw/ethmac_mem.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef __HW_ETHMAC_MEM_H
|
||||
#define __HW_ETHMAC_MEM_H
|
||||
|
||||
#include <generated/mem.h>
|
||||
|
||||
#define ETHMAC_RX0_BASE ETHMAC_BASE
|
||||
#define ETHMAC_RX1_BASE (ETHMAC_BASE+0x0800)
|
||||
#define ETHMAC_TX0_BASE (ETHMAC_BASE+0x1000)
|
||||
#define ETHMAC_TX1_BASE (ETHMAC_BASE+0x1800)
|
||||
|
||||
#endif
|
||||
40
include/hw/flags.h
Normal file
40
include/hw/flags.h
Normal file
@@ -0,0 +1,40 @@
|
||||
#ifndef __HW_FLAGS_H
|
||||
#define __HW_FLAGS_H
|
||||
|
||||
#define UART_EV_TX 0x1
|
||||
#define UART_EV_RX 0x2
|
||||
|
||||
#define DFII_CONTROL_SEL 0x01
|
||||
#define DFII_CONTROL_CKE 0x02
|
||||
#define DFII_CONTROL_ODT 0x04
|
||||
#define DFII_CONTROL_RESET_N 0x08
|
||||
|
||||
#define DFII_COMMAND_CS 0x01
|
||||
#define DFII_COMMAND_WE 0x02
|
||||
#define DFII_COMMAND_CAS 0x04
|
||||
#define DFII_COMMAND_RAS 0x08
|
||||
#define DFII_COMMAND_WRDATA 0x10
|
||||
#define DFII_COMMAND_RDDATA 0x20
|
||||
|
||||
#define ETHMAC_EV_SRAM_WRITER 0x1
|
||||
#define ETHMAC_EV_SRAM_READER 0x1
|
||||
|
||||
#define CLKGEN_STATUS_BUSY 0x1
|
||||
#define CLKGEN_STATUS_PROGDONE 0x2
|
||||
#define CLKGEN_STATUS_LOCKED 0x4
|
||||
|
||||
#define DVISAMPLER_TOO_LATE 0x1
|
||||
#define DVISAMPLER_TOO_EARLY 0x2
|
||||
|
||||
#define DVISAMPLER_DELAY_MASTER_CAL 0x01
|
||||
#define DVISAMPLER_DELAY_MASTER_RST 0x02
|
||||
#define DVISAMPLER_DELAY_SLAVE_CAL 0x04
|
||||
#define DVISAMPLER_DELAY_SLAVE_RST 0x08
|
||||
#define DVISAMPLER_DELAY_INC 0x10
|
||||
#define DVISAMPLER_DELAY_DEC 0x20
|
||||
|
||||
#define DVISAMPLER_SLOT_EMPTY 0
|
||||
#define DVISAMPLER_SLOT_LOADED 1
|
||||
#define DVISAMPLER_SLOT_PENDING 2
|
||||
|
||||
#endif /* __HW_FLAGS_H */
|
||||
15
include/id.h
Normal file
15
include/id.h
Normal file
@@ -0,0 +1,15 @@
|
||||
#ifndef __ID_H
|
||||
#define __ID_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IDENT_SIZE 256
|
||||
void get_ident(char *ident);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ID_H */
|
||||
52
include/inet.h
Normal file
52
include/inet.h
Normal file
@@ -0,0 +1,52 @@
|
||||
/* Copyright © 2005-2014 Rich Felker, et al.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining
|
||||
* a copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __INET_H
|
||||
#define __INET_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
static __inline uint16_t __bswap_16(uint16_t __x)
|
||||
{
|
||||
return (__x<<8) | (__x>>8);
|
||||
}
|
||||
|
||||
static __inline uint32_t __bswap_32(uint32_t __x)
|
||||
{
|
||||
return (__x>>24) | ((__x>>8)&0xff00) | ((__x<<8)&0xff0000) | (__x<<24);
|
||||
}
|
||||
|
||||
static __inline uint64_t __bswap_64(uint64_t __x)
|
||||
{
|
||||
return (__bswap_32(__x)+(0ULL<<32)) | __bswap_32(__x>>32);
|
||||
}
|
||||
|
||||
#define bswap_16(x) __bswap_16(x)
|
||||
#define bswap_32(x) __bswap_32(x)
|
||||
#define bswap_64(x) __bswap_64(x)
|
||||
|
||||
uint16_t htons(uint16_t n);
|
||||
uint32_t htonl(uint32_t n);
|
||||
uint16_t ntohs(uint16_t n);
|
||||
uint32_t ntohl(uint32_t n);
|
||||
|
||||
#endif /* __INET_H */
|
||||
231
include/inttypes.h
Normal file
231
include/inttypes.h
Normal file
@@ -0,0 +1,231 @@
|
||||
/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
/*
|
||||
* ISO C99: 7.8 Format conversion of integer types <inttypes.h>
|
||||
*/
|
||||
|
||||
#ifndef __INTTYPES_H
|
||||
#define __INTTYPES_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
# if __WORDSIZE == 64
|
||||
# define __PRI64_PREFIX "l"
|
||||
# define __PRIPTR_PREFIX "l"
|
||||
# else
|
||||
# define __PRI64_PREFIX "ll"
|
||||
# define __PRIPTR_PREFIX
|
||||
# endif
|
||||
|
||||
/* Macros for printing format specifiers. */
|
||||
|
||||
/* Decimal notation. */
|
||||
# define PRId8 "d"
|
||||
# define PRId16 "d"
|
||||
# define PRId32 "d"
|
||||
# define PRId64 __PRI64_PREFIX "d"
|
||||
|
||||
# define PRIdLEAST8 "d"
|
||||
# define PRIdLEAST16 "d"
|
||||
# define PRIdLEAST32 "d"
|
||||
# define PRIdLEAST64 __PRI64_PREFIX "d"
|
||||
|
||||
# define PRIdFAST8 "d"
|
||||
# define PRIdFAST16 __PRIPTR_PREFIX "d"
|
||||
# define PRIdFAST32 __PRIPTR_PREFIX "d"
|
||||
# define PRIdFAST64 __PRI64_PREFIX "d"
|
||||
|
||||
|
||||
# define PRIi8 "i"
|
||||
# define PRIi16 "i"
|
||||
# define PRIi32 "i"
|
||||
# define PRIi64 __PRI64_PREFIX "i"
|
||||
|
||||
# define PRIiLEAST8 "i"
|
||||
# define PRIiLEAST16 "i"
|
||||
# define PRIiLEAST32 "i"
|
||||
# define PRIiLEAST64 __PRI64_PREFIX "i"
|
||||
|
||||
# define PRIiFAST8 "i"
|
||||
# define PRIiFAST16 __PRIPTR_PREFIX "i"
|
||||
# define PRIiFAST32 __PRIPTR_PREFIX "i"
|
||||
# define PRIiFAST64 __PRI64_PREFIX "i"
|
||||
|
||||
/* Octal notation. */
|
||||
# define PRIo8 "o"
|
||||
# define PRIo16 "o"
|
||||
# define PRIo32 "o"
|
||||
# define PRIo64 __PRI64_PREFIX "o"
|
||||
|
||||
# define PRIoLEAST8 "o"
|
||||
# define PRIoLEAST16 "o"
|
||||
# define PRIoLEAST32 "o"
|
||||
# define PRIoLEAST64 __PRI64_PREFIX "o"
|
||||
|
||||
# define PRIoFAST8 "o"
|
||||
# define PRIoFAST16 __PRIPTR_PREFIX "o"
|
||||
# define PRIoFAST32 __PRIPTR_PREFIX "o"
|
||||
# define PRIoFAST64 __PRI64_PREFIX "o"
|
||||
|
||||
/* Unsigned integers. */
|
||||
# define PRIu8 "u"
|
||||
# define PRIu16 "u"
|
||||
# define PRIu32 "u"
|
||||
# define PRIu64 __PRI64_PREFIX "u"
|
||||
|
||||
# define PRIuLEAST8 "u"
|
||||
# define PRIuLEAST16 "u"
|
||||
# define PRIuLEAST32 "u"
|
||||
# define PRIuLEAST64 __PRI64_PREFIX "u"
|
||||
|
||||
# define PRIuFAST8 "u"
|
||||
# define PRIuFAST16 __PRIPTR_PREFIX "u"
|
||||
# define PRIuFAST32 __PRIPTR_PREFIX "u"
|
||||
# define PRIuFAST64 __PRI64_PREFIX "u"
|
||||
|
||||
/* lowercase hexadecimal notation. */
|
||||
# define PRIx8 "x"
|
||||
# define PRIx16 "x"
|
||||
# define PRIx32 "x"
|
||||
# define PRIx64 __PRI64_PREFIX "x"
|
||||
|
||||
# define PRIxLEAST8 "x"
|
||||
# define PRIxLEAST16 "x"
|
||||
# define PRIxLEAST32 "x"
|
||||
# define PRIxLEAST64 __PRI64_PREFIX "x"
|
||||
|
||||
# define PRIxFAST8 "x"
|
||||
# define PRIxFAST16 __PRIPTR_PREFIX "x"
|
||||
# define PRIxFAST32 __PRIPTR_PREFIX "x"
|
||||
# define PRIxFAST64 __PRI64_PREFIX "x"
|
||||
|
||||
/* UPPERCASE hexadecimal notation. */
|
||||
# define PRIX8 "X"
|
||||
# define PRIX16 "X"
|
||||
# define PRIX32 "X"
|
||||
# define PRIX64 __PRI64_PREFIX "X"
|
||||
|
||||
# define PRIXLEAST8 "X"
|
||||
# define PRIXLEAST16 "X"
|
||||
# define PRIXLEAST32 "X"
|
||||
# define PRIXLEAST64 __PRI64_PREFIX "X"
|
||||
|
||||
# define PRIXFAST8 "X"
|
||||
# define PRIXFAST16 __PRIPTR_PREFIX "X"
|
||||
# define PRIXFAST32 __PRIPTR_PREFIX "X"
|
||||
# define PRIXFAST64 __PRI64_PREFIX "X"
|
||||
|
||||
/* Macros for printing `intmax_t' and `uintmax_t'. */
|
||||
# define PRIdMAX __PRI64_PREFIX "d"
|
||||
# define PRIiMAX __PRI64_PREFIX "i"
|
||||
# define PRIoMAX __PRI64_PREFIX "o"
|
||||
# define PRIuMAX __PRI64_PREFIX "u"
|
||||
# define PRIxMAX __PRI64_PREFIX "x"
|
||||
# define PRIXMAX __PRI64_PREFIX "X"
|
||||
|
||||
|
||||
/* Macros for printing `intptr_t' and `uintptr_t'. */
|
||||
# define PRIdPTR __PRIPTR_PREFIX "d"
|
||||
# define PRIiPTR __PRIPTR_PREFIX "i"
|
||||
# define PRIoPTR __PRIPTR_PREFIX "o"
|
||||
# define PRIuPTR __PRIPTR_PREFIX "u"
|
||||
# define PRIxPTR __PRIPTR_PREFIX "x"
|
||||
# define PRIXPTR __PRIPTR_PREFIX "X"
|
||||
|
||||
/* Macros for scanning format specifiers. */
|
||||
|
||||
/* Signed decimal notation. */
|
||||
# define SCNd8 "hhd"
|
||||
# define SCNd16 "hd"
|
||||
# define SCNd32 "d"
|
||||
# define SCNd64 __PRI64_PREFIX "d"
|
||||
|
||||
# define SCNdLEAST8 "hhd"
|
||||
# define SCNdLEAST16 "hd"
|
||||
# define SCNdLEAST32 "d"
|
||||
# define SCNdLEAST64 __PRI64_PREFIX "d"
|
||||
|
||||
# define SCNdFAST8 "hhd"
|
||||
# define SCNdFAST16 __PRIPTR_PREFIX "d"
|
||||
# define SCNdFAST32 __PRIPTR_PREFIX "d"
|
||||
# define SCNdFAST64 __PRI64_PREFIX "d"
|
||||
|
||||
/* Unsigned decimal notation. */
|
||||
# define SCNu8 "hhu"
|
||||
# define SCNu16 "hu"
|
||||
# define SCNu32 "u"
|
||||
# define SCNu64 __PRI64_PREFIX "u"
|
||||
|
||||
# define SCNuLEAST8 "hhu"
|
||||
# define SCNuLEAST16 "hu"
|
||||
# define SCNuLEAST32 "u"
|
||||
# define SCNuLEAST64 __PRI64_PREFIX "u"
|
||||
|
||||
# define SCNuFAST8 "hhu"
|
||||
# define SCNuFAST16 __PRIPTR_PREFIX "u"
|
||||
# define SCNuFAST32 __PRIPTR_PREFIX "u"
|
||||
# define SCNuFAST64 __PRI64_PREFIX "u"
|
||||
|
||||
/* Octal notation. */
|
||||
# define SCNo8 "hho"
|
||||
# define SCNo16 "ho"
|
||||
# define SCNo32 "o"
|
||||
# define SCNo64 __PRI64_PREFIX "o"
|
||||
|
||||
# define SCNoLEAST8 "hho"
|
||||
# define SCNoLEAST16 "ho"
|
||||
# define SCNoLEAST32 "o"
|
||||
# define SCNoLEAST64 __PRI64_PREFIX "o"
|
||||
|
||||
# define SCNoFAST8 "hho"
|
||||
# define SCNoFAST16 __PRIPTR_PREFIX "o"
|
||||
# define SCNoFAST32 __PRIPTR_PREFIX "o"
|
||||
# define SCNoFAST64 __PRI64_PREFIX "o"
|
||||
|
||||
/* Hexadecimal notation. */
|
||||
# define SCNx8 "hhx"
|
||||
# define SCNx16 "hx"
|
||||
# define SCNx32 "x"
|
||||
# define SCNx64 __PRI64_PREFIX "x"
|
||||
|
||||
# define SCNxLEAST8 "hhx"
|
||||
# define SCNxLEAST16 "hx"
|
||||
# define SCNxLEAST32 "x"
|
||||
# define SCNxLEAST64 __PRI64_PREFIX "x"
|
||||
|
||||
# define SCNxFAST8 "hhx"
|
||||
# define SCNxFAST16 __PRIPTR_PREFIX "x"
|
||||
# define SCNxFAST32 __PRIPTR_PREFIX "x"
|
||||
# define SCNxFAST64 __PRI64_PREFIX "x"
|
||||
|
||||
|
||||
/* Macros for scanning `intmax_t' and `uintmax_t'. */
|
||||
# define SCNdMAX __PRI64_PREFIX "d"
|
||||
# define SCNiMAX __PRI64_PREFIX "i"
|
||||
# define SCNoMAX __PRI64_PREFIX "o"
|
||||
# define SCNuMAX __PRI64_PREFIX "u"
|
||||
# define SCNxMAX __PRI64_PREFIX "x"
|
||||
|
||||
/* Macros for scaning `intptr_t' and `uintptr_t'. */
|
||||
# define SCNdPTR __PRIPTR_PREFIX "d"
|
||||
# define SCNiPTR __PRIPTR_PREFIX "i"
|
||||
# define SCNoPTR __PRIPTR_PREFIX "o"
|
||||
# define SCNuPTR __PRIPTR_PREFIX "u"
|
||||
# define SCNxPTR __PRIPTR_PREFIX "x"
|
||||
|
||||
#endif /* __INTTYPES_H */
|
||||
144
include/irq.h
Normal file
144
include/irq.h
Normal file
@@ -0,0 +1,144 @@
|
||||
#ifndef __IRQ_H
|
||||
#define __IRQ_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <system.h>
|
||||
|
||||
#ifdef __picorv32__
|
||||
// PicoRV32 has a very limited interrupt support, implemented via custom
|
||||
// instructions. It also doesn't have a global interrupt enable/disable, so
|
||||
// we have to emulate it via saving and restoring a mask and using 0/~1 as a
|
||||
// hardware mask.
|
||||
// Due to all this somewhat low-level mess, all of the glue is implemented in
|
||||
// the RiscV crt0, and this header is kept as a thin wrapper. Since interrupts
|
||||
// managed by this layer, do not call interrupt instructions directly, as the
|
||||
// state will go out of sync with the hardware.
|
||||
|
||||
// Read only.
|
||||
extern unsigned int _irq_pending;
|
||||
// Read only.
|
||||
extern unsigned int _irq_mask;
|
||||
// Read only.
|
||||
extern unsigned int _irq_enabled;
|
||||
extern void _irq_enable(void);
|
||||
extern void _irq_disable(void);
|
||||
extern void _irq_setmask(unsigned int);
|
||||
#endif
|
||||
|
||||
static inline unsigned int irq_getie(void)
|
||||
{
|
||||
#if defined (__lm32__)
|
||||
unsigned int ie;
|
||||
__asm__ __volatile__("rcsr %0, IE" : "=r" (ie));
|
||||
return ie;
|
||||
#elif defined (__or1k__)
|
||||
return !!(mfspr(SPR_SR) & SPR_SR_IEE);
|
||||
#elif defined (__picorv32__)
|
||||
return _irq_enabled != 0;
|
||||
#elif defined (__vexriscv__)
|
||||
return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0;
|
||||
#elif defined (__minerva__)
|
||||
return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0;
|
||||
#else
|
||||
#error Unsupported architecture
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void irq_setie(unsigned int ie)
|
||||
{
|
||||
#if defined (__lm32__)
|
||||
__asm__ __volatile__("wcsr IE, %0" : : "r" (ie));
|
||||
#elif defined (__or1k__)
|
||||
if (ie & 0x1)
|
||||
mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
|
||||
else
|
||||
mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_IEE);
|
||||
#elif defined (__picorv32__)
|
||||
if (ie & 0x1)
|
||||
_irq_enable();
|
||||
else
|
||||
_irq_disable();
|
||||
#elif defined (__vexriscv__)
|
||||
if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE);
|
||||
#elif defined (__minerva__)
|
||||
if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE);
|
||||
#else
|
||||
#error Unsupported architecture
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline unsigned int irq_getmask(void)
|
||||
{
|
||||
#if defined (__lm32__)
|
||||
unsigned int mask;
|
||||
__asm__ __volatile__("rcsr %0, IM" : "=r" (mask));
|
||||
return mask;
|
||||
#elif defined (__or1k__)
|
||||
return mfspr(SPR_PICMR);
|
||||
#elif defined (__picorv32__)
|
||||
// PicoRV32 interrupt mask bits are high-disabled. This is the inverse of how
|
||||
// LiteX sees things.
|
||||
return ~_irq_mask;
|
||||
#elif defined (__vexriscv__)
|
||||
unsigned int mask;
|
||||
asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK));
|
||||
return mask;
|
||||
#elif defined (__minerva__)
|
||||
unsigned int mask;
|
||||
asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK));
|
||||
return mask;
|
||||
#else
|
||||
#error Unsupported architecture
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void irq_setmask(unsigned int mask)
|
||||
{
|
||||
#if defined (__lm32__)
|
||||
__asm__ __volatile__("wcsr IM, %0" : : "r" (mask));
|
||||
#elif defined (__or1k__)
|
||||
mtspr(SPR_PICMR, mask);
|
||||
#elif defined (__picorv32__)
|
||||
// PicoRV32 interrupt mask bits are high-disabled. This is the inverse of how
|
||||
// LiteX sees things.
|
||||
_irq_setmask(~mask);
|
||||
#elif defined (__vexriscv__)
|
||||
asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask));
|
||||
#elif defined (__minerva__)
|
||||
asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask));
|
||||
#else
|
||||
#error Unsupported architecture
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline unsigned int irq_pending(void)
|
||||
{
|
||||
#if defined (__lm32__)
|
||||
unsigned int pending;
|
||||
__asm__ __volatile__("rcsr %0, IP" : "=r" (pending));
|
||||
return pending;
|
||||
#elif defined (__or1k__)
|
||||
return mfspr(SPR_PICSR);
|
||||
#elif defined (__picorv32__)
|
||||
return _irq_pending;
|
||||
#elif defined (__vexriscv__)
|
||||
unsigned int pending;
|
||||
asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING));
|
||||
return pending;
|
||||
#elif defined (__minerva__)
|
||||
unsigned int pending;
|
||||
asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING));
|
||||
return pending;
|
||||
#else
|
||||
#error Unsupported architecture
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __IRQ_H */
|
||||
26
include/limits.h
Normal file
26
include/limits.h
Normal file
@@ -0,0 +1,26 @@
|
||||
#ifndef __LIMITS_H
|
||||
#define __LIMITS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define ULONG_MAX 0xffffffff
|
||||
|
||||
#define UINT_MAX 0xffffffff
|
||||
#define INT_MIN 0x80000000
|
||||
#define INT_MAX 0x7fffffff
|
||||
|
||||
#define USHRT_MAX 0xffff
|
||||
#define SHRT_MIN 0x8000
|
||||
#define SHRT_MAX 0x7fff
|
||||
|
||||
#define UCHAR_MAX 0xff
|
||||
|
||||
#define CHAR_BIT 8
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __LIMITS_H */
|
||||
14
include/math.h
Normal file
14
include/math.h
Normal file
@@ -0,0 +1,14 @@
|
||||
#ifndef __MATH_H
|
||||
#define __MATH_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <fdlibm/fdlibm.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MATH_H */
|
||||
27
include/pthread.h
Normal file
27
include/pthread.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef __PTHREAD_H
|
||||
#define __PTHREAD_H
|
||||
|
||||
typedef int pthread_rwlock_t;
|
||||
|
||||
#define PTHREAD_RWLOCK_INITIALIZER 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
inline int pthread_rwlock_rdlock(pthread_rwlock_t *rwlock)
|
||||
{ return 0; }
|
||||
inline int pthread_rwlock_tryrdlock(pthread_rwlock_t *rwlock)
|
||||
{ return 0; }
|
||||
inline int pthread_rwlock_wrlock(pthread_rwlock_t *rwlock)
|
||||
{ return 0; }
|
||||
inline int pthread_rwlock_trywrlock(pthread_rwlock_t *rwlock)
|
||||
{ return 0; }
|
||||
int pthread_rwlock_unlock(pthread_rwlock_t *rwlock)
|
||||
{ return 0; }
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PTHREAD_H */
|
||||
8
include/spiflash.h
Normal file
8
include/spiflash.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef __SPIFLASH_H
|
||||
#define __SPIFLASH_H
|
||||
|
||||
void write_to_flash_page(unsigned int addr, const unsigned char *c, unsigned int len);
|
||||
void erase_flash_sector(unsigned int addr);
|
||||
void write_to_flash(unsigned int addr, const unsigned char *c, unsigned int len);
|
||||
|
||||
#endif /* __SPIFLASH_H */
|
||||
696
include/spr-defs.h
Normal file
696
include/spr-defs.h
Normal file
@@ -0,0 +1,696 @@
|
||||
/* spr-defs.h - Special purpose registers definitions file
|
||||
|
||||
Copyright (C) 2000 Damjan Lampret
|
||||
Copyright (C) 2008, 2010 Embecosm Limited
|
||||
|
||||
Contributor Damjan Lampret <lampret@opencores.org>
|
||||
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify it
|
||||
under the terms of the GNU General Public License as published by the Free
|
||||
Software Foundation; either version 3 of the License, or (at your option)
|
||||
any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License along
|
||||
with this program. If not, see <http: www.gnu.org/licenses/>. */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
This code is commented throughout for use with Doxygen.
|
||||
--------------------------------------------------------------------------*/
|
||||
#ifndef SPR_DEFS__H
|
||||
#define SPR_DEFS__H
|
||||
|
||||
/* Definition of special-purpose registers (SPRs). */
|
||||
|
||||
#define MAX_GRPS (32)
|
||||
#define MAX_SPRS_PER_GRP_BITS (11)
|
||||
#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS)
|
||||
#define MAX_SPRS (0x10000)
|
||||
|
||||
/* Base addresses for the groups */
|
||||
#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS)
|
||||
#define SPRGROUP_FP (11<< MAX_SPRS_PER_GRP_BITS)
|
||||
|
||||
/* System control and status group */
|
||||
#define SPR_VR (SPRGROUP_SYS + 0)
|
||||
#define SPR_UPR (SPRGROUP_SYS + 1)
|
||||
#define SPR_CPUCFGR (SPRGROUP_SYS + 2)
|
||||
#define SPR_DMMUCFGR (SPRGROUP_SYS + 3)
|
||||
#define SPR_IMMUCFGR (SPRGROUP_SYS + 4)
|
||||
#define SPR_DCCFGR (SPRGROUP_SYS + 5)
|
||||
#define SPR_ICCFGR (SPRGROUP_SYS + 6)
|
||||
#define SPR_DCFGR (SPRGROUP_SYS + 7)
|
||||
#define SPR_PCCFGR (SPRGROUP_SYS + 8)
|
||||
#define SPR_VR2 (SPRGROUP_SYS + 9)
|
||||
#define SPR_AVR (SPRGROUP_SYS + 10)
|
||||
#define SPR_EVBAR (SPRGROUP_SYS + 11)
|
||||
#define SPR_AECR (SPRGROUP_SYS + 12)
|
||||
#define SPR_AESR (SPRGROUP_SYS + 13)
|
||||
#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */
|
||||
#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */
|
||||
#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */
|
||||
#define SPR_FPCSR (SPRGROUP_SYS + 20) /* CZ 21/06/01 */
|
||||
#define SPR_ISR_BASE (SPRGROUP_SYS + 21)
|
||||
#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */
|
||||
#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */
|
||||
#define SPR_EEAR_BASE (SPRGROUP_SYS + 48)
|
||||
#define SPR_EEAR_LAST (SPRGROUP_SYS + 63)
|
||||
#define SPR_ESR_BASE (SPRGROUP_SYS + 64)
|
||||
#define SPR_ESR_LAST (SPRGROUP_SYS + 79)
|
||||
#define SPR_GPR_BASE (SPRGROUP_SYS + 1024)
|
||||
|
||||
/* Data MMU group */
|
||||
#define SPR_DMMUCR (SPRGROUP_DMMU + 0)
|
||||
#define SPR_DTLBEIR (SPRGROUP_DMMU + 2)
|
||||
#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100)
|
||||
#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100)
|
||||
#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100)
|
||||
#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100)
|
||||
|
||||
/* Instruction MMU group */
|
||||
#define SPR_IMMUCR (SPRGROUP_IMMU + 0)
|
||||
#define SPR_ITLBEIR (SPRGROUP_IMMU + 2)
|
||||
#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100)
|
||||
#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100)
|
||||
#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100)
|
||||
#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100)
|
||||
|
||||
/* Data cache group */
|
||||
#define SPR_DCCR (SPRGROUP_DC + 0)
|
||||
#define SPR_DCBPR (SPRGROUP_DC + 1)
|
||||
#define SPR_DCBFR (SPRGROUP_DC + 2)
|
||||
#define SPR_DCBIR (SPRGROUP_DC + 3)
|
||||
#define SPR_DCBWR (SPRGROUP_DC + 4)
|
||||
#define SPR_DCBLR (SPRGROUP_DC + 5)
|
||||
#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200)
|
||||
#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200)
|
||||
|
||||
/* Instruction cache group */
|
||||
#define SPR_ICCR (SPRGROUP_IC + 0)
|
||||
#define SPR_ICBPR (SPRGROUP_IC + 1)
|
||||
#define SPR_ICBIR (SPRGROUP_IC + 2)
|
||||
#define SPR_ICBLR (SPRGROUP_IC + 3)
|
||||
#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200)
|
||||
#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200)
|
||||
|
||||
/* MAC group */
|
||||
#define SPR_MACLO (SPRGROUP_MAC + 1)
|
||||
#define SPR_MACHI (SPRGROUP_MAC + 2)
|
||||
|
||||
/* Debug group */
|
||||
#define SPR_DVR(N) (SPRGROUP_D + (N))
|
||||
#define SPR_DCR(N) (SPRGROUP_D + 8 + (N))
|
||||
#define SPR_DMR1 (SPRGROUP_D + 16)
|
||||
#define SPR_DMR2 (SPRGROUP_D + 17)
|
||||
#define SPR_DWCR0 (SPRGROUP_D + 18)
|
||||
#define SPR_DWCR1 (SPRGROUP_D + 19)
|
||||
#define SPR_DSR (SPRGROUP_D + 20)
|
||||
#define SPR_DRR (SPRGROUP_D + 21)
|
||||
|
||||
/* Performance counters group */
|
||||
#define SPR_PCCR(N) (SPRGROUP_PC + (N))
|
||||
#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N))
|
||||
|
||||
/* Power management group */
|
||||
#define SPR_PMR (SPRGROUP_PM + 0)
|
||||
|
||||
/* PIC group */
|
||||
#define SPR_PICMR (SPRGROUP_PIC + 0)
|
||||
#define SPR_PICPR (SPRGROUP_PIC + 1)
|
||||
#define SPR_PICSR (SPRGROUP_PIC + 2)
|
||||
|
||||
/* Tick Timer group */
|
||||
#define SPR_TTMR (SPRGROUP_TT + 0)
|
||||
#define SPR_TTCR (SPRGROUP_TT + 1)
|
||||
|
||||
/*
|
||||
* Bit definitions for the Version Register
|
||||
*
|
||||
*/
|
||||
#define SPR_VR_VER 0xff000000 /* Processor version */
|
||||
#define SPR_VR_CFG 0x00ff0000 /* Processor configuration */
|
||||
#define SPR_VR_RES 0x0000ff80 /* Reserved */
|
||||
#define SPR_VR_UVRP 0x00000040 /* Updated version register present */
|
||||
#define SPR_VR_REV 0x0000003f /* Processor revision */
|
||||
|
||||
#define SPR_VR_VER_OFF 24
|
||||
#define SPR_VR_CFG_OFF 16
|
||||
#define SPR_VR_UVRP_OFF 6
|
||||
#define SPR_VR_REV_OFF 0
|
||||
|
||||
/*
|
||||
* Bit definitions for the Unit Present Register
|
||||
*
|
||||
*/
|
||||
#define SPR_UPR_UP 0x00000001 /* UPR present */
|
||||
#define SPR_UPR_DCP 0x00000002 /* Data cache present */
|
||||
#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */
|
||||
#define SPR_UPR_DMP 0x00000008 /* Data MMU present */
|
||||
#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */
|
||||
#define SPR_UPR_MP 0x00000020 /* MAC present */
|
||||
#define SPR_UPR_DUP 0x00000040 /* Debug unit present */
|
||||
#define SPR_UPR_PCUP 0x00000080 /* Performance counters unit present */
|
||||
#define SPR_UPR_PMP 0x00000100 /* Power management present */
|
||||
#define SPR_UPR_PICP 0x00000200 /* PIC present */
|
||||
#define SPR_UPR_TTP 0x00000400 /* Tick timer present */
|
||||
#define SPR_UPR_RES 0x00fe0000 /* Reserved */
|
||||
#define SPR_UPR_CUP 0xff000000 /* Context units present */
|
||||
|
||||
/*
|
||||
* JPB: Bit definitions for the CPU configuration register
|
||||
*
|
||||
*/
|
||||
#define SPR_CPUCFGR_NSGF 0x0000000f /* Number of shadow GPR files */
|
||||
#define SPR_CPUCFGR_CGF 0x00000010 /* Custom GPR file */
|
||||
#define SPR_CPUCFGR_OB32S 0x00000020 /* ORBIS32 supported */
|
||||
#define SPR_CPUCFGR_OB64S 0x00000040 /* ORBIS64 supported */
|
||||
#define SPR_CPUCFGR_OF32S 0x00000080 /* ORFPX32 supported */
|
||||
#define SPR_CPUCFGR_OF64S 0x00000100 /* ORFPX64 supported */
|
||||
#define SPR_CPUCFGR_OV64S 0x00000200 /* ORVDX64 supported */
|
||||
#define SPR_CPUCFGR_ND 0x00000400 /* No delay-slot */
|
||||
#define SPR_CPUCFGR_AVRP 0x00000800 /* Architecture version register present */
|
||||
#define SPR_CPUCFGR_EVBARP 0x00001000 /* Exception vector base address register
|
||||
present */
|
||||
#define SPR_CPUCFGR_ISRP 0x00002000 /* Implementation-specific registers present */
|
||||
#define SPR_CPUCFGR_AECSRP 0x00004000 /* Arithmetic exception control/status
|
||||
registers present */
|
||||
#define SPR_CPUCFGR_RES 0xffff8000 /* Reserved */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Version Register 2
|
||||
*
|
||||
*/
|
||||
#define SPR_VR2_CPUID 0xff000000 /* Unique CPU identifier */
|
||||
#define SPR_VR2_VER 0x00ffffff /* Version */
|
||||
|
||||
#define SPR_VR2_CPUID_OFF 24
|
||||
#define SPR_VR2_VER_OFF 0
|
||||
|
||||
#define SPR_VR2_CPUID_OR1KSIM 0x00
|
||||
#define SPR_VR2_CPUID_MOR1KX 0x01
|
||||
#define SPR_VR2_CPUID_OR1200 0x12
|
||||
#define SPR_VR2_CPUID_ALTOR32 0x32
|
||||
#define SPR_VR2_CPUID_OR10 0x10
|
||||
|
||||
|
||||
/*
|
||||
* Bit definitions for the Architecture Version register
|
||||
*
|
||||
*/
|
||||
#define SPR_AVR_MAJ 0xff000000 /* Major architecture version number */
|
||||
#define SPR_AVR_MIN 0x00ff0000 /* Minor architecture version number */
|
||||
#define SPR_AVR_REV 0x0000ff00 /* Architecture revision number */
|
||||
#define SPR_AVR_RES 0x000000ff /* Reserved */
|
||||
|
||||
#define SPR_AVR_MAJ_OFF 24
|
||||
#define SPR_AVR_MIN_OFF 16
|
||||
#define SPR_AVR_REV_OFF 8
|
||||
|
||||
/*
|
||||
* Bit definitions for the Exception Base Address register
|
||||
*
|
||||
*/
|
||||
#define SPR_EVBAR_EVBA 0xffffe000 /* Exception vector base address */
|
||||
#define SPR_EVBAR_RES 0x00001fff /* Reserved */
|
||||
|
||||
#define SPR_EVBAR_EVBA_OFF 13
|
||||
|
||||
/*
|
||||
* Bit definitions for the Arithmetic Exception Control register
|
||||
*
|
||||
*/
|
||||
#define SPR_AECR_CYADDE 0x00000001 /* Carry on add/subtract exception */
|
||||
#define SPR_AECR_OVADDE 0x00000002 /* Overflow on add/subtract exception */
|
||||
#define SPR_AECR_CYMULE 0x00000004 /* Carry on multiply exception */
|
||||
#define SPR_AECR_OVMULE 0x00000008 /* Overflow on multiply exception */
|
||||
#define SPR_AECR_DBZE 0x00000010 /* Divide by zero exception */
|
||||
#define SPR_AECR_CYMACADDE 0x00000020 /* Carry on MAC add/subtract exception */
|
||||
#define SPR_AECR_OVMACADDE 0x00000040 /* Overflow on MAC add/subtract exception */
|
||||
|
||||
#define SPR_AECR_CYADDE_OFF 0
|
||||
#define SPR_AECR_OVADDE_OFF 1
|
||||
#define SPR_AECR_CYMULE_OFF 2
|
||||
#define SPR_AECR_OVMULE_OFF 3
|
||||
#define SPR_AECR_DBZE_OFF 4
|
||||
#define SPR_AECR_CYMACADDE_OFF 5
|
||||
#define SPR_AECR_OVMACADDE_OFF 6
|
||||
|
||||
|
||||
/*
|
||||
* Bit definitions for the Arithmetic Exception Status register
|
||||
*
|
||||
*/
|
||||
#define SPR_AESR_CYADDE 0x00000001 /* Carry on add/subtract exception */
|
||||
#define SPR_AESR_OVADDE 0x00000002 /* Overflow on add/subtract exception */
|
||||
#define SPR_AESR_CYMULE 0x00000004 /* Carry on multiply exception */
|
||||
#define SPR_AESR_OVMULE 0x00000008 /* Overflow on multiply exception */
|
||||
#define SPR_AESR_DBZE 0x00000010 /* Divide by zero exception */
|
||||
#define SPR_AESR_CYMACADDE 0x00000020 /* Carry on MAC add/subtract exception */
|
||||
#define SPR_AESR_OVMACADDE 0x00000040 /* Overflow on MAC add/subtract exception */
|
||||
|
||||
#define SPR_AESR_CYADDE_OFF 0
|
||||
#define SPR_AESR_OVADDE_OFF 1
|
||||
#define SPR_AESR_CYMULE_OFF 2
|
||||
#define SPR_AESR_OVMULE_OFF 3
|
||||
#define SPR_AESR_DBZE_OFF 4
|
||||
#define SPR_AESR_CYMACADDE_OFF 5
|
||||
#define SPR_AESR_OVMACADDE_OFF 6
|
||||
|
||||
/*
|
||||
* JPB: Bit definitions for the Debug configuration register and other
|
||||
* constants.
|
||||
*
|
||||
*/
|
||||
|
||||
#define SPR_DCFGR_NDP 0x00000007 /* Number of matchpoints mask */
|
||||
#define SPR_DCFGR_NDP1 0x00000000 /* One matchpoint supported */
|
||||
#define SPR_DCFGR_NDP2 0x00000001 /* Two matchpoints supported */
|
||||
#define SPR_DCFGR_NDP3 0x00000002 /* Three matchpoints supported */
|
||||
#define SPR_DCFGR_NDP4 0x00000003 /* Four matchpoints supported */
|
||||
#define SPR_DCFGR_NDP5 0x00000004 /* Five matchpoints supported */
|
||||
#define SPR_DCFGR_NDP6 0x00000005 /* Six matchpoints supported */
|
||||
#define SPR_DCFGR_NDP7 0x00000006 /* Seven matchpoints supported */
|
||||
#define SPR_DCFGR_NDP8 0x00000007 /* Eight matchpoints supported */
|
||||
#define SPR_DCFGR_WPCI 0x00000008 /* Watchpoint counters implemented */
|
||||
|
||||
#define MATCHPOINTS_TO_NDP(n) (1 == n ? SPR_DCFGR_NDP1 : \
|
||||
2 == n ? SPR_DCFGR_NDP2 : \
|
||||
3 == n ? SPR_DCFGR_NDP3 : \
|
||||
4 == n ? SPR_DCFGR_NDP4 : \
|
||||
5 == n ? SPR_DCFGR_NDP5 : \
|
||||
6 == n ? SPR_DCFGR_NDP6 : \
|
||||
7 == n ? SPR_DCFGR_NDP7 : SPR_DCFGR_NDP8)
|
||||
#define MAX_MATCHPOINTS 8
|
||||
#define MAX_WATCHPOINTS (MAX_MATCHPOINTS + 2)
|
||||
|
||||
/*
|
||||
* Bit definitions for the Supervision Register
|
||||
*
|
||||
*/
|
||||
#define SPR_SR_SM 0x00000001 /* Supervisor Mode */
|
||||
#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */
|
||||
#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */
|
||||
#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */
|
||||
#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */
|
||||
#define SPR_SR_DME 0x00000020 /* Data MMU Enable */
|
||||
#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */
|
||||
#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */
|
||||
#define SPR_SR_CE 0x00000100 /* CID Enable */
|
||||
#define SPR_SR_F 0x00000200 /* Condition Flag */
|
||||
#define SPR_SR_CY 0x00000400 /* Carry flag */
|
||||
#define SPR_SR_OV 0x00000800 /* Overflow flag */
|
||||
#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */
|
||||
#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */
|
||||
#define SPR_SR_EPH 0x00004000 /* Exception Prefix High */
|
||||
#define SPR_SR_FO 0x00008000 /* Fixed one */
|
||||
#define SPR_SR_SUMRA 0x00010000 /* Supervisor SPR read access */
|
||||
#define SPR_SR_RES 0x0ffe0000 /* Reserved */
|
||||
#define SPR_SR_CID 0xf0000000 /* Context ID */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Data MMU Control Register
|
||||
*
|
||||
*/
|
||||
#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */
|
||||
#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */
|
||||
#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */
|
||||
#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Instruction MMU Control Register
|
||||
*
|
||||
*/
|
||||
#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */
|
||||
#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */
|
||||
#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */
|
||||
#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Data TLB Match Register
|
||||
*
|
||||
*/
|
||||
#define SPR_DTLBMR_V 0x00000001 /* Valid */
|
||||
#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */
|
||||
#define SPR_DTLBMR_CID 0x0000003c /* Context ID */
|
||||
#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */
|
||||
#define SPR_DTLBMR_VPN 0xffffe000 /* Virtual Page Number */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Data TLB Translate Register
|
||||
*
|
||||
*/
|
||||
#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */
|
||||
#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */
|
||||
#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */
|
||||
#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */
|
||||
#define SPR_DTLBTR_A 0x00000010 /* Accessed */
|
||||
#define SPR_DTLBTR_D 0x00000020 /* Dirty */
|
||||
#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */
|
||||
#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */
|
||||
#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */
|
||||
#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */
|
||||
#define SPR_DTLBTR_PPN 0xffffe000 /* Physical Page Number */
|
||||
|
||||
#define DTLB_PR_NOLIMIT ( SPR_DTLBTR_URE | \
|
||||
SPR_DTLBTR_UWE | \
|
||||
SPR_DTLBTR_SRE | \
|
||||
SPR_DTLBTR_SWE )
|
||||
|
||||
/*
|
||||
* Bit definitions for the Instruction TLB Match Register
|
||||
*
|
||||
*/
|
||||
#define SPR_ITLBMR_V 0x00000001 /* Valid */
|
||||
#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */
|
||||
#define SPR_ITLBMR_CID 0x0000003c /* Context ID */
|
||||
#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */
|
||||
#define SPR_ITLBMR_VPN 0xffffe000 /* Virtual Page Number */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Instruction TLB Translate Register
|
||||
*
|
||||
*/
|
||||
#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */
|
||||
#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */
|
||||
#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */
|
||||
#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */
|
||||
#define SPR_ITLBTR_A 0x00000010 /* Accessed */
|
||||
#define SPR_ITLBTR_D 0x00000020 /* Dirty */
|
||||
#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */
|
||||
#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */
|
||||
#define SPR_ITLBTR_PPN 0xffffe000 /* Physical Page Number */
|
||||
|
||||
#define ITLB_PR_NOLIMIT ( SPR_ITLBTR_SXE | \
|
||||
SPR_ITLBTR_UXE )
|
||||
|
||||
|
||||
/*
|
||||
* Bit definitions for Data Cache Control register
|
||||
*
|
||||
*/
|
||||
#define SPR_DCCR_EW 0x000000ff /* Enable ways */
|
||||
|
||||
/*
|
||||
* Bit definitions for Insn Cache Control register
|
||||
*
|
||||
*/
|
||||
#define SPR_ICCR_EW 0x000000ff /* Enable ways */
|
||||
|
||||
/*
|
||||
* Bit definitions for Data Cache Configuration Register
|
||||
*
|
||||
*/
|
||||
|
||||
#define SPR_DCCFGR_NCW 0x00000007
|
||||
#define SPR_DCCFGR_NCS 0x00000078
|
||||
#define SPR_DCCFGR_CBS 0x00000080
|
||||
#define SPR_DCCFGR_CWS 0x00000100
|
||||
#define SPR_DCCFGR_CCRI 0x00000200
|
||||
#define SPR_DCCFGR_CBIRI 0x00000400
|
||||
#define SPR_DCCFGR_CBPRI 0x00000800
|
||||
#define SPR_DCCFGR_CBLRI 0x00001000
|
||||
#define SPR_DCCFGR_CBFRI 0x00002000
|
||||
#define SPR_DCCFGR_CBWBRI 0x00004000
|
||||
|
||||
#define SPR_DCCFGR_NCW_OFF 0
|
||||
#define SPR_DCCFGR_NCS_OFF 3
|
||||
#define SPR_DCCFGR_CBS_OFF 7
|
||||
|
||||
/*
|
||||
* Bit definitions for Instruction Cache Configuration Register
|
||||
*
|
||||
*/
|
||||
#define SPR_ICCFGR_NCW 0x00000007
|
||||
#define SPR_ICCFGR_NCS 0x00000078
|
||||
#define SPR_ICCFGR_CBS 0x00000080
|
||||
#define SPR_ICCFGR_CCRI 0x00000200
|
||||
#define SPR_ICCFGR_CBIRI 0x00000400
|
||||
#define SPR_ICCFGR_CBPRI 0x00000800
|
||||
#define SPR_ICCFGR_CBLRI 0x00001000
|
||||
|
||||
#define SPR_ICCFGR_NCW_OFF 0
|
||||
#define SPR_ICCFGR_NCS_OFF 3
|
||||
#define SPR_ICCFGR_CBS_OFF 7
|
||||
|
||||
/*
|
||||
* Bit definitions for Data MMU Configuration Register
|
||||
*
|
||||
*/
|
||||
|
||||
#define SPR_DMMUCFGR_NTW 0x00000003
|
||||
#define SPR_DMMUCFGR_NTS 0x0000001C
|
||||
#define SPR_DMMUCFGR_NAE 0x000000E0
|
||||
#define SPR_DMMUCFGR_CRI 0x00000100
|
||||
#define SPR_DMMUCFGR_PRI 0x00000200
|
||||
#define SPR_DMMUCFGR_TEIRI 0x00000400
|
||||
#define SPR_DMMUCFGR_HTR 0x00000800
|
||||
|
||||
#define SPR_DMMUCFGR_NTW_OFF 0
|
||||
#define SPR_DMMUCFGR_NTS_OFF 2
|
||||
|
||||
/*
|
||||
* Bit definitions for Instruction MMU Configuration Register
|
||||
*
|
||||
*/
|
||||
|
||||
#define SPR_IMMUCFGR_NTW 0x00000003
|
||||
#define SPR_IMMUCFGR_NTS 0x0000001C
|
||||
#define SPR_IMMUCFGR_NAE 0x000000E0
|
||||
#define SPR_IMMUCFGR_CRI 0x00000100
|
||||
#define SPR_IMMUCFGR_PRI 0x00000200
|
||||
#define SPR_IMMUCFGR_TEIRI 0x00000400
|
||||
#define SPR_IMMUCFGR_HTR 0x00000800
|
||||
|
||||
#define SPR_IMMUCFGR_NTW_OFF 0
|
||||
#define SPR_IMMUCFGR_NTS_OFF 2
|
||||
|
||||
/*
|
||||
* Bit definitions for Debug Control registers
|
||||
*
|
||||
*/
|
||||
#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */
|
||||
#define SPR_DCR_CC 0x0000000e /* Compare condition */
|
||||
#define SPR_DCR_SC 0x00000010 /* Signed compare */
|
||||
#define SPR_DCR_CT 0x000000e0 /* Compare to */
|
||||
|
||||
/* Bit results with SPR_DCR_CC mask */
|
||||
#define SPR_DCR_CC_MASKED 0x00000000
|
||||
#define SPR_DCR_CC_EQUAL 0x00000002
|
||||
#define SPR_DCR_CC_LESS 0x00000004
|
||||
#define SPR_DCR_CC_LESSE 0x00000006
|
||||
#define SPR_DCR_CC_GREAT 0x00000008
|
||||
#define SPR_DCR_CC_GREATE 0x0000000a
|
||||
#define SPR_DCR_CC_NEQUAL 0x0000000c
|
||||
|
||||
/* Bit results with SPR_DCR_CT mask */
|
||||
#define SPR_DCR_CT_DISABLED 0x00000000
|
||||
#define SPR_DCR_CT_IFEA 0x00000020
|
||||
#define SPR_DCR_CT_LEA 0x00000040
|
||||
#define SPR_DCR_CT_SEA 0x00000060
|
||||
#define SPR_DCR_CT_LD 0x00000080
|
||||
#define SPR_DCR_CT_SD 0x000000a0
|
||||
#define SPR_DCR_CT_LSEA 0x000000c0
|
||||
#define SPR_DCR_CT_LSD 0x000000e0
|
||||
/* SPR_DCR_CT_LSD doesn't seem to be implemented anywhere in or1ksim. 2004-1-30 HP */
|
||||
|
||||
/*
|
||||
* Bit definitions for Debug Mode 1 register
|
||||
*
|
||||
*/
|
||||
#define SPR_DMR1_CW 0x000fffff /* Chain register pair data */
|
||||
#define SPR_DMR1_CW0_AND 0x00000001
|
||||
#define SPR_DMR1_CW0_OR 0x00000002
|
||||
#define SPR_DMR1_CW0 (SPR_DMR1_CW0_AND | SPR_DMR1_CW0_OR)
|
||||
#define SPR_DMR1_CW1_AND 0x00000004
|
||||
#define SPR_DMR1_CW1_OR 0x00000008
|
||||
#define SPR_DMR1_CW1 (SPR_DMR1_CW1_AND | SPR_DMR1_CW1_OR)
|
||||
#define SPR_DMR1_CW2_AND 0x00000010
|
||||
#define SPR_DMR1_CW2_OR 0x00000020
|
||||
#define SPR_DMR1_CW2 (SPR_DMR1_CW2_AND | SPR_DMR1_CW2_OR)
|
||||
#define SPR_DMR1_CW3_AND 0x00000040
|
||||
#define SPR_DMR1_CW3_OR 0x00000080
|
||||
#define SPR_DMR1_CW3 (SPR_DMR1_CW3_AND | SPR_DMR1_CW3_OR)
|
||||
#define SPR_DMR1_CW4_AND 0x00000100
|
||||
#define SPR_DMR1_CW4_OR 0x00000200
|
||||
#define SPR_DMR1_CW4 (SPR_DMR1_CW4_AND | SPR_DMR1_CW4_OR)
|
||||
#define SPR_DMR1_CW5_AND 0x00000400
|
||||
#define SPR_DMR1_CW5_OR 0x00000800
|
||||
#define SPR_DMR1_CW5 (SPR_DMR1_CW5_AND | SPR_DMR1_CW5_OR)
|
||||
#define SPR_DMR1_CW6_AND 0x00001000
|
||||
#define SPR_DMR1_CW6_OR 0x00002000
|
||||
#define SPR_DMR1_CW6 (SPR_DMR1_CW6_AND | SPR_DMR1_CW6_OR)
|
||||
#define SPR_DMR1_CW7_AND 0x00004000
|
||||
#define SPR_DMR1_CW7_OR 0x00008000
|
||||
#define SPR_DMR1_CW7 (SPR_DMR1_CW7_AND | SPR_DMR1_CW7_OR)
|
||||
#define SPR_DMR1_CW8_AND 0x00010000
|
||||
#define SPR_DMR1_CW8_OR 0x00020000
|
||||
#define SPR_DMR1_CW8 (SPR_DMR1_CW8_AND | SPR_DMR1_CW8_OR)
|
||||
#define SPR_DMR1_CW9_AND 0x00040000
|
||||
#define SPR_DMR1_CW9_OR 0x00080000
|
||||
#define SPR_DMR1_CW9 (SPR_DMR1_CW9_AND | SPR_DMR1_CW9_OR)
|
||||
#define SPR_DMR1_RES1 0x00300000 /* Reserved */
|
||||
#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/
|
||||
#define SPR_DMR1_BT 0x00800000 /* Branch trace */
|
||||
#define SPR_DMR1_RES2 0xff000000 /* Reserved */
|
||||
|
||||
/*
|
||||
* Bit definitions for Debug Mode 2 register. AWTC and WGB corrected by JPB
|
||||
*
|
||||
*/
|
||||
#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */
|
||||
#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */
|
||||
#define SPR_DMR2_AWTC 0x00000ffc /* Assign watchpoints to counters */
|
||||
#define SPR_DMR2_AWTC_OFF 2 /* Bit offset to AWTC field */
|
||||
#define SPR_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */
|
||||
#define SPR_DMR2_WGB_OFF 12 /* Bit offset to WGB field */
|
||||
#define SPR_DMR2_WBS 0xffc00000 /* JPB: Watchpoint status */
|
||||
#define SPR_DMR2_WBS_OFF 22 /* Bit offset to WBS field */
|
||||
|
||||
/*
|
||||
* Bit definitions for Debug watchpoint counter registers
|
||||
*
|
||||
*/
|
||||
#define SPR_DWCR_COUNT 0x0000ffff /* Count */
|
||||
#define SPR_DWCR_MATCH 0xffff0000 /* Match */
|
||||
#define SPR_DWCR_MATCH_OFF 16 /* Match bit offset */
|
||||
|
||||
/*
|
||||
* Bit definitions for Debug stop register
|
||||
*
|
||||
*/
|
||||
#define SPR_DSR_RSTE 0x00000001 /* Reset exception */
|
||||
#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */
|
||||
#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */
|
||||
#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */
|
||||
#define SPR_DSR_TTE 0x00000010 /* Tick Timer exception */
|
||||
#define SPR_DSR_AE 0x00000020 /* Alignment exception */
|
||||
#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */
|
||||
#define SPR_DSR_IE 0x00000080 /* Interrupt exception */
|
||||
#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */
|
||||
#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */
|
||||
#define SPR_DSR_RE 0x00000400 /* Range exception */
|
||||
#define SPR_DSR_SCE 0x00000800 /* System call exception */
|
||||
#define SPR_DSR_FPE 0x00001000 /* Floating Point Exception */
|
||||
#define SPR_DSR_TE 0x00002000 /* Trap exception */
|
||||
|
||||
/*
|
||||
* Bit definitions for Debug reason register
|
||||
*
|
||||
*/
|
||||
#define SPR_DRR_RSTE 0x00000001 /* Reset exception */
|
||||
#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */
|
||||
#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */
|
||||
#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */
|
||||
#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */
|
||||
#define SPR_DRR_AE 0x00000020 /* Alignment exception */
|
||||
#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */
|
||||
#define SPR_DRR_IE 0x00000080 /* Interrupt exception */
|
||||
#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */
|
||||
#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */
|
||||
#define SPR_DRR_RE 0x00000400 /* Range exception */
|
||||
#define SPR_DRR_SCE 0x00000800 /* System call exception */
|
||||
#define SPR_DRR_FPE 0x00001000 /* Floating Point Exception */
|
||||
#define SPR_DRR_TE 0x00002000 /* Trap exception */
|
||||
|
||||
/*
|
||||
* Bit definitions for Performance counters mode registers
|
||||
*
|
||||
*/
|
||||
#define SPR_PCMR_CP 0x00000001 /* Counter present */
|
||||
#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */
|
||||
#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */
|
||||
#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */
|
||||
#define SPR_PCMR_LA 0x00000010 /* Load access event */
|
||||
#define SPR_PCMR_SA 0x00000020 /* Store access event */
|
||||
#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/
|
||||
#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */
|
||||
#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */
|
||||
#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */
|
||||
#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */
|
||||
#define SPR_PCMR_BS 0x00000800 /* Branch stall event */
|
||||
#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */
|
||||
#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */
|
||||
#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */
|
||||
#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */
|
||||
|
||||
/*
|
||||
* Bit definitions for the Power management register
|
||||
*
|
||||
*/
|
||||
#define SPR_PMR_SDF 0x0000000f /* Slow down factor */
|
||||
#define SPR_PMR_DME 0x00000010 /* Doze mode enable */
|
||||
#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */
|
||||
#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */
|
||||
#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */
|
||||
|
||||
/*
|
||||
* Bit definitions for PICMR
|
||||
*
|
||||
*/
|
||||
#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */
|
||||
|
||||
/*
|
||||
* Bit definitions for PICPR
|
||||
*
|
||||
*/
|
||||
#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */
|
||||
|
||||
/*
|
||||
* Bit definitions for PICSR
|
||||
*
|
||||
*/
|
||||
#define SPR_PICSR_IS 0xffffffff /* Interrupt status */
|
||||
|
||||
/*
|
||||
* Bit definitions for Tick Timer Control Register
|
||||
*
|
||||
*/
|
||||
#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */
|
||||
#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD
|
||||
#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */
|
||||
#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */
|
||||
#define SPR_TTMR_RT 0x40000000 /* Restart tick */
|
||||
#define SPR_TTMR_SR 0x80000000 /* Single run */
|
||||
#define SPR_TTMR_CR 0xc0000000 /* Continuous run */
|
||||
#define SPR_TTMR_M 0xc0000000 /* Tick mode */
|
||||
|
||||
/*
|
||||
* Bit definitions for the FP Control Status Register
|
||||
*
|
||||
*/
|
||||
#define SPR_FPCSR_FPEE 0x00000001 /* Floating Point Exception Enable */
|
||||
#define SPR_FPCSR_RM 0x00000006 /* Rounding Mode */
|
||||
#define SPR_FPCSR_OVF 0x00000008 /* Overflow Flag */
|
||||
#define SPR_FPCSR_UNF 0x00000010 /* Underflow Flag */
|
||||
#define SPR_FPCSR_SNF 0x00000020 /* SNAN Flag */
|
||||
#define SPR_FPCSR_QNF 0x00000040 /* QNAN Flag */
|
||||
#define SPR_FPCSR_ZF 0x00000080 /* Zero Flag */
|
||||
#define SPR_FPCSR_IXF 0x00000100 /* Inexact Flag */
|
||||
#define SPR_FPCSR_IVF 0x00000200 /* Invalid Flag */
|
||||
#define SPR_FPCSR_INF 0x00000400 /* Infinity Flag */
|
||||
#define SPR_FPCSR_DZF 0x00000800 /* Divide By Zero Flag */
|
||||
#define SPR_FPCSR_ALLF (SPR_FPCSR_OVF | SPR_FPCSR_UNF | SPR_FPCSR_SNF | \
|
||||
SPR_FPCSR_QNF | SPR_FPCSR_ZF | SPR_FPCSR_IXF | \
|
||||
SPR_FPCSR_IVF | SPR_FPCSR_INF | SPR_FPCSR_DZF)
|
||||
|
||||
#define FPCSR_RM_RN (0<<1)
|
||||
#define FPCSR_RM_RZ (1<<1)
|
||||
#define FPCSR_RM_RIP (2<<1)
|
||||
#define FPCSR_RM_RIN (3<<1)
|
||||
|
||||
#endif /* SPR_DEFS__H */
|
||||
25
include/stdarg.h
Normal file
25
include/stdarg.h
Normal file
@@ -0,0 +1,25 @@
|
||||
#ifndef __STDARG_H
|
||||
#define __STDARG_H
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define va_start(v, l) __builtin_va_start((v), l)
|
||||
#define va_arg(ap, type) __builtin_va_arg((ap), type)
|
||||
#define va_copy(aq, ap) __builtin_va_copy((aq), (ap))
|
||||
#define va_end(ap) __builtin_va_end(ap)
|
||||
#define va_list __builtin_va_list
|
||||
|
||||
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args);
|
||||
int vscnprintf(char *buf, size_t size, const char *fmt, va_list args);
|
||||
int vsprintf(char *buf, const char *fmt, va_list args);
|
||||
int vprintf(const char *format, va_list ap);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STDARG_H */
|
||||
8
include/stdbool.h
Normal file
8
include/stdbool.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef __STDBOOL_H
|
||||
#define __STDBOOL_H
|
||||
|
||||
#define bool _Bool
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#endif /* __STDBOOL_H */
|
||||
23
include/stddef.h
Normal file
23
include/stddef.h
Normal file
@@ -0,0 +1,23 @@
|
||||
#ifndef __STDDEF_H
|
||||
#define __STDDEF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define NULL 0
|
||||
#else
|
||||
#define NULL ((void *)0)
|
||||
#endif
|
||||
|
||||
typedef unsigned long size_t;
|
||||
typedef long ptrdiff_t;
|
||||
|
||||
#define offsetof(type, member) __builtin_offsetof(type, member)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STDDEF_H */
|
||||
34
include/stdint.h
Normal file
34
include/stdint.h
Normal file
@@ -0,0 +1,34 @@
|
||||
#ifndef __STDINT_H
|
||||
#define __STDINT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef int intptr_t;
|
||||
typedef unsigned int uintptr_t;
|
||||
|
||||
typedef unsigned long long uint64_t;
|
||||
typedef unsigned int uint32_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef unsigned char uint8_t;
|
||||
|
||||
typedef long long int64_t;
|
||||
typedef int int32_t;
|
||||
typedef short int16_t;
|
||||
typedef char int8_t;
|
||||
|
||||
#define __int_c_join(a, b) a ## b
|
||||
#define __int_c(v, suffix) __int_c_join(v, suffix)
|
||||
#define __uint_c(v, suffix) __int_c_join(v##U, suffix)
|
||||
|
||||
#define INT64_C(v) __int_c(v, LL)
|
||||
#define UINT64_C(v) __uint_c(v, LL)
|
||||
#define INT32_C(v) v
|
||||
#define UINT32_C(v) v##U
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STDINT_H */
|
||||
77
include/stdio.h
Normal file
77
include/stdio.h
Normal file
@@ -0,0 +1,77 @@
|
||||
#ifndef __STDIO_H
|
||||
#define __STDIO_H
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int putchar(int c);
|
||||
int puts(const char *s);
|
||||
|
||||
int snprintf(char *buf, size_t size, const char *fmt, ...);
|
||||
int scnprintf(char *buf, size_t size, const char *fmt, ...);
|
||||
int sprintf(char *buf, const char *fmt, ...);
|
||||
|
||||
int printf(const char *fmt, ...);
|
||||
|
||||
/* Not sure this belongs here... */
|
||||
typedef long long loff_t;
|
||||
typedef long off_t;
|
||||
typedef int mode_t;
|
||||
typedef int dev_t;
|
||||
|
||||
/*
|
||||
* Note: this library does not provide FILE operations.
|
||||
* User code must implement them.
|
||||
*/
|
||||
|
||||
#ifndef BUFSIZ
|
||||
#define BUFSIZ 1024
|
||||
#endif
|
||||
|
||||
#ifndef EOF
|
||||
#define EOF -1
|
||||
#endif
|
||||
|
||||
#ifndef SEEK_SET
|
||||
#define SEEK_SET 0
|
||||
#endif
|
||||
|
||||
#ifndef SEEK_CUR
|
||||
#define SEEK_CUR 1
|
||||
#endif
|
||||
|
||||
#ifndef SEEK_END
|
||||
#define SEEK_END 2
|
||||
#endif
|
||||
|
||||
typedef int FILE;
|
||||
|
||||
extern FILE *stdin;
|
||||
extern FILE *stdout;
|
||||
extern FILE *stderr;
|
||||
|
||||
int fprintf(FILE *stream, const char *format, ...);
|
||||
int fflush(FILE *stream);
|
||||
|
||||
FILE *fopen(const char *path, const char *mode);
|
||||
FILE *freopen(const char *path, const char *mode, FILE *stream);
|
||||
char *fgets(char *s, int size, FILE *stream);
|
||||
size_t fread(void *ptr, size_t size, size_t nmemb, FILE *stream);
|
||||
size_t fwrite(const void *ptr, size_t size, size_t nmemb, FILE *stream);
|
||||
int getc(FILE *stream);
|
||||
int fputc(int c, FILE *stream);
|
||||
int ferror(FILE *stream);
|
||||
int feof(FILE *stream);
|
||||
int fclose(FILE *fp);
|
||||
|
||||
int fseek(FILE *stream, long offset, int whence);
|
||||
long ftell(FILE *stream);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STDIO_H */
|
||||
85
include/stdlib.h
Normal file
85
include/stdlib.h
Normal file
@@ -0,0 +1,85 @@
|
||||
/*
|
||||
* MiSoC
|
||||
* Copyright (C) 2007, 2008, 2009, 2011 Sebastien Bourdeauducq
|
||||
* Copyright (C) Linux kernel developers
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, version 3 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef __STDLIB_H
|
||||
#define __STDLIB_H
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define PRINTF_ZEROPAD 1 /* pad with zero */
|
||||
#define PRINTF_SIGN 2 /* unsigned/signed long */
|
||||
#define PRINTF_PLUS 4 /* show plus */
|
||||
#define PRINTF_SPACE 8 /* space if plus */
|
||||
#define PRINTF_LEFT 16 /* left justified */
|
||||
#define PRINTF_SPECIAL 32 /* 0x */
|
||||
#define PRINTF_LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
|
||||
|
||||
#define likely(x) x
|
||||
#define unlikely(x) x
|
||||
|
||||
static inline int abs(int x)
|
||||
{
|
||||
return x > 0 ? x : -x;
|
||||
}
|
||||
|
||||
static inline long int labs(long int x)
|
||||
{
|
||||
return x > 0 ? x : -x;
|
||||
}
|
||||
|
||||
unsigned long strtoul(const char *nptr, char **endptr, int base);
|
||||
long strtol(const char *nptr, char **endptr, int base);
|
||||
double strtod(const char *str, char **endptr);
|
||||
|
||||
int skip_atoi(const char **s);
|
||||
static inline int atoi(const char *nptr) {
|
||||
return strtol(nptr, NULL, 10);
|
||||
}
|
||||
static inline long atol(const char *nptr) {
|
||||
return (long)atoi(nptr);
|
||||
}
|
||||
char *number(char *buf, char *end, unsigned long num, int base, int size, int precision, int type);
|
||||
|
||||
#define RAND_MAX 2147483647
|
||||
|
||||
unsigned int rand(void);
|
||||
void srand(unsigned int seed);
|
||||
void abort(void) __attribute__((noreturn));
|
||||
|
||||
void qsort(void *base, size_t nmemb, size_t size, int(*compar)(const void *, const void *));
|
||||
|
||||
/*
|
||||
* The following functions are not provided by this library.
|
||||
*/
|
||||
|
||||
char *getenv(const char *name);
|
||||
|
||||
void *malloc(size_t size);
|
||||
void *calloc(size_t nmemb, size_t size);
|
||||
void free(void *ptr);
|
||||
void *realloc(void *ptr, size_t size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STDLIB_H */
|
||||
55
include/string.h
Normal file
55
include/string.h
Normal file
@@ -0,0 +1,55 @@
|
||||
/*
|
||||
* MiSoC
|
||||
* Copyright (C) 2007, 2008, 2009, 2010 Sebastien Bourdeauducq
|
||||
* Copyright (C) Linus Torvalds and Linux kernel developers
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, version 3 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef __STRING_H
|
||||
#define __STRING_H
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
char *strchr(const char *s, int c);
|
||||
char *strpbrk(const char *,const char *);
|
||||
char *strrchr(const char *s, int c);
|
||||
char *strnchr(const char *s, size_t count, int c);
|
||||
char *strcpy(char *dest, const char *src);
|
||||
char *strncpy(char *dest, const char *src, size_t count);
|
||||
int strcmp(const char *cs, const char *ct);
|
||||
int strncmp(const char *cs, const char *ct, size_t count);
|
||||
int strcasecmp(const char *cs, const char *ct);
|
||||
char *strcat(char *dest, const char *src);
|
||||
char *strncat(char *dest, const char *src, size_t n);
|
||||
size_t strlen(const char *s);
|
||||
size_t strnlen(const char *s, size_t count);
|
||||
size_t strspn(const char *s, const char *accept);
|
||||
int memcmp(const void *cs, const void *ct, size_t count);
|
||||
void *memset(void *s, int c, size_t count);
|
||||
void *memcpy(void *to, const void *from, size_t n);
|
||||
void *memmove(void *dest, const void *src, size_t count);
|
||||
char *strstr(const char *s1, const char *s2);
|
||||
void *memchr(const void *s, int c, size_t n);
|
||||
|
||||
char *strerror(int errnum);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STRING_H */
|
||||
59
include/system.h
Normal file
59
include/system.h
Normal file
@@ -0,0 +1,59 @@
|
||||
#ifndef __SYSTEM_H
|
||||
#define __SYSTEM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void flush_cpu_icache(void);
|
||||
void flush_cpu_dcache(void);
|
||||
void flush_l2_cache(void);
|
||||
|
||||
#ifdef __or1k__
|
||||
#include <spr-defs.h>
|
||||
static inline unsigned long mfspr(unsigned long add)
|
||||
{
|
||||
unsigned long ret;
|
||||
|
||||
__asm__ __volatile__ ("l.mfspr %0,%1,0" : "=r" (ret) : "r" (add));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void mtspr(unsigned long add, unsigned long val)
|
||||
{
|
||||
__asm__ __volatile__ ("l.mtspr %0,%1,0" : : "r" (add), "r" (val));
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(__vexriscv__) || defined(__minerva__)
|
||||
#include <csr-defs.h>
|
||||
#define csrr(reg) ({ unsigned long __tmp; \
|
||||
asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
|
||||
__tmp; })
|
||||
|
||||
#define csrw(reg, val) ({ \
|
||||
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
|
||||
asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
|
||||
else \
|
||||
asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
|
||||
|
||||
#define csrs(reg, bit) ({ \
|
||||
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
|
||||
asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); \
|
||||
else \
|
||||
asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); })
|
||||
|
||||
#define csrc(reg, bit) ({ \
|
||||
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
|
||||
asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); \
|
||||
else \
|
||||
asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); })
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_H */
|
||||
15
include/time.h
Normal file
15
include/time.h
Normal file
@@ -0,0 +1,15 @@
|
||||
#ifndef __TIME_H
|
||||
#define __TIME_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void time_init(void);
|
||||
int elapsed(int *last_event, int period);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __TIME_H */
|
||||
20
include/uart.h
Normal file
20
include/uart.h
Normal file
@@ -0,0 +1,20 @@
|
||||
#ifndef __UART_H
|
||||
#define __UART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void uart_init(void);
|
||||
void uart_isr(void);
|
||||
void uart_sync(void);
|
||||
|
||||
void uart_write(char c);
|
||||
char uart_read(void);
|
||||
int uart_read_nonblock(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user