27 lines
472 B
ArmAsm
27 lines
472 B
ArmAsm
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.text
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.align 2
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#ifdef __riscv64
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#define _RISCV_SZPTR 64
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#define _RISCV_SZINT 64
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#else
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/* Our RV64 64-bit routine is equivalent to our RV32 32-bit routine. */
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# define __muldi3 __mulsi3
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#define _RISCV_SZPTR 32
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#define _RISCV_SZINT 32
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#endif
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.globl __muldi3
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__muldi3:
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mv a2, a0
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li a0, 0
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.L1:
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slli a3, a1, _RISCV_SZPTR-1
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bgez a3, .L2
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add a0, a0, a2
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.L2:
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srli a1, a1, 1
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slli a2, a2, 1
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bnez a1, .L1
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ret
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