p.xobs.io/fa23

The State of Open Silicon

Sean "xobs" Cross, Foosn PTE Ltd

About Me

Outline

  1. What does it mean to be "open"?
  2. What can we do today?
  3. What can't we do today?
  4. Where can we go from here?

What does it mean to be "open"?

Availability of:
  1. Manuals
  2. Source
  3. Tooling
  4. GDSII

Parts of chip design

  1. Nondisclosure Agreements
  2. Process Design Kit (PDK)
  3. IP (libraries)
  4. EDA software (tooling)

Nondisclosure Agreements

NDAs are required for using many packages

Process Design Kit

Example PDK stackup

IP / Libraries

  • Memories
  • IO blocks
  • Standard cells

Digital design (In The Beginning)

Motorola 6502, image © 2016 Pauli Rautakorpi

Digital logic overview (Today)


						module and_four(input A, input B,
													  input C, input D,
													  output X);
							assign X = A & B & C & D;
						endmodule

GD32F103CBT6

Image © 2016 Zeptobars

Tooling

  • Synthesis
  • Power generation
  • Clock tree synthesis
  • Place and route
  • Verification

Industry tools cost $1mm plus per seat

Where are we now (in open source)?

Things are looking pretty good!

Nondisclosure Agreements

Open PDKs

  • Real PDKs
    • SKY130
    • SKY90FD
    • GF180MCU
    • SG13G2
  • "Fake" PDKs
    • FreePDK45
    • ASAP5
    • Many more!

Available IP

  • CPU
  • DAC
  • ADC
  • SPI
  • USB
  • PLL
  • FPGA
  • AES

Standard cells

  • SKY130
  • GF180MCU
  • OSU018
  • LibreSilicon

What about tooling?

Hardware Synthesis

  • Yosys (Verilog)
  • Plugins:
    • GHDL (VHDL)
    • UHDM (SystemVerilog)

High level languages

  • LiteX Python
  • SpinalHDL Scala
  • Chisel Scala
  • Clash Haskell

Placement, Routing, PDN, etc...

Direct Cell Design and Inspection

Simulation

  • GHDL
  • Icarus Verilog
  • Verilator
  • GTKWave
  • Spice

What can't we do today?

PDKs are large nodes

Flicker LED circuit, 3µm, image © 2015 Zeptobars

Memories are still hard

  • Density is constantly improving
  • Expect kilobytes of RAM on a chip
    • Compare to megabytes of cache
  • A ~4x increase is possible
  • Experimental ROM support

Nonvolatile storage is still hard

  • No EEPROM or flash
  • ReRAM is experimental on SKY130

Analogue IP is still difficult

  • Some tapeouts exist, but documentation is scarce
  • Need more integration examples

What about taping out chips?

  • Google OpenMPW
  • ChipIgnite
  • EuroPractice
  • Muse
  • SIMC
Expect to pay $10,000 - $50,000

Where are we going from here?

And how you help

More open projects

Education

tinytapeout.com

More analogue design

app.siliwiz.com

Smaller process nodes?

  • OpenROAD has been tested on smaller nodes
  • No NDA-free PDKs yet

More involvement

  • OpenMPW
  • Tiny Tapeout
  • Siliwiz

Thank you