438 lines
14 KiB
Rust
438 lines
14 KiB
Rust
#![cfg_attr(feature = "macro-debug", feature(trace_macros))]
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#![cfg_attr(feature = "macro-debug", feature(log_syntax))]
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#[cfg(feature = "macro-debug")]
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trace_macros! {true}
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/*
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opcodes
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PSA Wd, Ra
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PSB Wd, Rb
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MSK Wd, Ra, Rb
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XOR Wd, Ra, Rb
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NOT Wd, Ra
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ADD Wd, Ra, Rb
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SUB Wd, Ra, Rb
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MUL Wd, Ra, Rb
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TRD Wd, Ra, Rb
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BRZ offset, Ra
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all Rx can be expressed as #Rx which summons the constant at #Rx
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examples of syntax
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ADD r0, r1, r2 // adds r1 and r2, stores into r0
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ADD r31, #4, #8 // takes constants in table positions 4 and 8, adds them, stores into r31
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PSA r1, #0 // takes constant in table position 0, stores in r1
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BRZ -0x3, r4 // if r4 is 0, mpc = mpc - 0x3
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BRZ 0x2, r1 // if r1 is 0, mpc = mpc + 0x2
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loop:
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BRZ loop, r2 // if r2 is 0, go to label "loop"
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Basic opcode format:
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0b_rrrrrrrrr_ddddd_y_bbbbb_x_aaaaa_oooooo
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Where:
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o: Opcode
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a: Source register a
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x: `1` if A is a constant rather than register
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b: Source register b
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y: `1` if B is a constant rather than a register
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d: Destination register index
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r: Reserved (set to 0)
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*/
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/// A compile-time map from identifiers to arbitrary (heterogeneous) expressions
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#[macro_export]
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#[doc(hidden)]
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macro_rules! ident_map {
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( $name:ident = { $($key:ident => $e:expr),* $(,)* } ) => {
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macro_rules! $name {
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$(
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( $key ) => { $e };
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)*
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// Empty invocation expands to nothing. Needed when the map is empty.
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() => {};
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}
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};
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}
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/// Returns the number of comma-separated expressions passed to it
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#[macro_export]
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#[doc(hidden)]
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macro_rules! codelen {
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() => { 0 };
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( $one:expr ) => { 1 };
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( $first:expr, $($rest:expr),+ ) => { 1 + codelen!($($rest),+) };
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}
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/// Replace elements of "arrays" of expressions with sorted replacements by
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/// seeking along a "positional array" containing n expressions, then replacing
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/// elements in the source array.
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///
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/// Expands to the first array with replacements applied. The length doesn't
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/// change.
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#[macro_export]
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#[doc(hidden)]
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macro_rules! lockstep_replace {
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( [ $($result:expr),* ], [], ) => {
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// `src` is empty, no relocations. We're done!
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[ $($result),* ]
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};
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( [ $($result:expr),* ], [ $($src:expr,)+ ], ) => {
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// Empty list of replacements, but still `src` to go
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[ $($result,)* $($src),+ ]
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};
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( [ $($result:expr),* ], [ $($src:expr,)* ], [], [], $( [ $($pos:expr,)* ], [ $($rep:expr,)* ], )* ) => {
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// All replacements applied. Pop the current replacement and continue.
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lockstep_replace!(
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[ $($result),* ],
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[ $($src,)* ],
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$(
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[ $($pos,)* ],
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[ $($rep,)* ],
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)*
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)
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};
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( [ $($result:expr),* ], [ $src1_replaced:expr, $($src:expr,)* ], [], [ $rep1:expr, $($rep_rest:expr,)* ], $( [ $pos1:expr, $($pos:expr,)* ], [ $($rep:expr,)* ], )* ) => {
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// Position of a replacement reached (or: inside a replacement)
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// Coupled with a seek step
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lockstep_replace!(
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[ $($result,)* $rep1 ],
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[ $($src,)* ],
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[],
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[ $($rep_rest,)* ],
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$(
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[ $($pos,)* ],
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[ $($rep,)* ],
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)*
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)
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};
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( [ $($result:expr),* ], [ $src1:expr, $($src:expr,)* ], $( [ $pos1:expr, $($pos:expr,)* ], [ $($rep:expr,)* ], )+ ) => {
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// Seek to next replacement position (simultaneously for all
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// replacements)
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lockstep_replace!(
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[ $($result,)* $src1 ],
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[ $($src,)* ],
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$(
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[ $($pos,)* ],
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[ $($rep,)* ],
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)+
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)
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};
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}
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/// Performs relocation of machine code based on given labels and relocations.
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/// Looks up label names in an `ident_map`. Expands to the relocated machine
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/// code.
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///
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/// Relocation formats:
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/// { $label as ABS16 @ [$lockstepmcpos] }
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#[macro_export]
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#[doc(hidden)]
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macro_rules! reloc {
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( { $($attr:tt)* } [ $( [ $($pos:expr),* ], [ $($rep:expr),* ] ),* ], $lblmap:ident, [ $($mcode:expr),* ], [/* empty relocation list */] ) => {
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lockstep_replace!([], [ $($mcode,)* ], $( [ $($pos,)* ], [ $($rep,)* ], )*)
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};
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( { start: $start:expr } [ $( [ $($pos:expr),* ], [ $($rep:expr),* ] ),* ], $lblmap:ident, [ $($mcode:expr),* ], [ { $lbl:ident as ABS16 @ [$($lockstepmcpos:expr),*] } $(,$reloc:tt)* ] ) => {
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// Replace 2 Bytes with the absolute address
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// Relocation position is given as "lock-step MC pos", an expression
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// list that's as long as all mcode before the relocation should happen.
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reloc!(
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{ start: $start }
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[ $( [ $($pos),* ], [ $($rep),* ] ,)*
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[ $($lockstepmcpos),* ], [ ($lblmap!($lbl) + $start) as u8, (($lblmap!($lbl) + $start) >> 8) as u8 ] ],
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$lblmap, [ $($mcode),* ], [ $($reloc),* ])
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};
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( { $($attr:tt)* } [ $( [ $($pos:expr),* ], [ $($rep:expr),* ] ),* ], $lblmap:ident, [ $($mcode:expr),* ], [ { $lbl:ident as PCREL @ [$($lockstepmcpos:expr),*] } $(,$reloc:tt)* ] ) => {
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// Replace 1 Byte with the PC relative address
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// PC is the program counter *after* the relocated offset (the length of the
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// `$lockstepmcpos` array + 1), so we need to subtract 1 additional byte.
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reloc!(
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{ $($attr)* }
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[ $( [ $($pos),* ], [ $($rep),* ] ,)*
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[ $($lockstepmcpos),* ], [ ((( $lblmap!($lbl) as i32 - codelen!($($lockstepmcpos),*) as i32 - 1 ) & 0x3FF ) << 23) ] ],
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$lblmap, [ $($mcode),* ], [ $($reloc),* ])
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};
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}
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// $attr is a label
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// $mcode is a list that contains the machine code opcodes
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// $ident is the identifier list
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// $reloc is the relocation list
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#[macro_export]
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#[doc(hidden)]
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macro_rules! asm_ {
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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// EOF
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) => {{
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ident_map!(labelmap = {
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$($lbl => $lblval),*
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});
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reloc!({ $($attr)* } [], labelmap, [ $($mcode),* ], [ $($reloc),* ])
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}};
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// ==================================================================================
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// ==================================================================================
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// ==================================================================================
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// Opcode assembly table.
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// Note that the weird order is required because macros try to match each arm in order, but
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// don't backtrack when a NT is parsed
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// ADD
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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add % $wd:tt, % $ra:tt , % $rb:tt
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$($rest:tt)* ) => {
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asm_!({ $($attr)* } [ $($mcode,)* $wd << 18 | 0 << 11 | $ra << 6 | 0 << 17 | $rb << 12 | 0x5 ], [ $($lbl => $lblval),* ], [ $($reloc),* ], $($rest)*)
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};
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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add % $wd:tt, % $ra:tt , # $rb:tt
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$($rest:tt)* ) => {
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asm_!({ $($attr)* } [ $($mcode,)* $wd << 18 | 0 << 11 | $ra << 6 | 1 << 17 | $rb << 12 | 0x5 ], [ $($lbl => $lblval),* ], [ $($reloc),* ], $($rest)*)
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};
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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add % $wd:tt, # $ra:tt , % $rb:tt
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$($rest:tt)* ) => {
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asm_!({ $($attr)* } [ $($mcode,)* $wd << 18 | 1 << 11 | $ra << 6 | 0 << 17 | $rb << 12 | 0x5 ], [ $($lbl => $lblval),* ], [ $($reloc),* ], $($rest)*)
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};
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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add % $wd:tt, # $ra:tt , # $rb:tt
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$($rest:tt)* ) => {
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asm_!({ $($attr)* } [ $($mcode,)* $wd << 18 | 1 << 11 | $ra << 6 | 1 << 17 | $rb << 12 | 0x5 ], [ $($lbl => $lblval),* ], [ $($reloc),* ], $($rest)*)
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};
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// BRZ
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// ( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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// brz $label:ident , % $ra:tt
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// $($rest:tt)* ) => {
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// asm_!({ $($attr)* } [ $($mcode,)* 0x0 ],
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// [ $($lbl => $lblval),* ], [ $($reloc,)* { $label as PCREL @ [ $($mcode,)* ] } ], $($rest)*)
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// };
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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brz $label:ident , #$ra:tt
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$($rest:tt)* ) => {
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asm_!({ $($attr)* } [ $($mcode,)* 0 << 23 | 1 << 11 | $ra << 6 | 0x9 ],
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[ $($lbl => $lblval),* ], [ $($reloc,)* { $label as PCREL @ [$($mcode,)* 0 << 23 | 1 << 11 | $ra << 6 | 0x9] } ], $($rest)*)
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};
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// ==================================================================================
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// ==================================================================================
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// ==================================================================================
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// Check for labels
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( { $($attr:tt)* } [ $($mcode:expr),* ], [ $($lbl:ident => $lblval:expr),* ], [ $($reloc:tt),* ],
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$label:ident :
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$($rest:tt)* ) => {
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asm_!(
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{ $($attr)* }
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[ $($mcode),* ],
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[ $($lbl => $lblval,)* $label => codelen!($($mcode),*) ],
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[ $($reloc),* ],
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$($rest)*
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)
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};
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}
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#[macro_export]
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macro_rules! assemble_engine25519 {
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( {
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start: $start:expr,
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code: {
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$($tokens:tt)*
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}
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} ) => {
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asm_!({ start: $start } [], [], [], $($tokens)*)
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};
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( $($tokens:tt)* ) => {
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assemble_engine25519!({
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start: 0,
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code: {
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$($tokens)*
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}
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})
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};
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}
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// /// Does anything work
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// #[test]
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// fn basic_syntax() {
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// let mcode = assemble_engine25519!(
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// start:
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// add %0, %1, %2
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// add %2, %3, #4
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// add %5, #6, %7
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// add %8, #9, #10
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// brz start, #11
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// );
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// assert_eq!(
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// mcode,
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// [
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// 0 << 16 | 0 << 11 | 1 << 6 | 0 << 17 | 2 << 12 | 0x5,
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// 2 << 16 | 0 << 11 | 3 << 6 | 1 << 17 | 4 << 12 | 0x5,
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// 5 << 16 | 1 << 11 | 6 << 6 | 0 << 17 | 7 << 12 | 0x5,
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// 8 << 16 | 1 << 11 | 9 << 6 | 1 << 17 | 10 << 12 | 0x5,
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// 0x3FC << 23 | 0 << 11 | 11 << 6 | 0x9,
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// ]
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// );
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// }
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pub enum Operand {
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Register(i32),
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Constant(i32),
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}
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impl Operand {
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pub fn from_i32_r(op: i32) -> Operand {
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if (op >> 5) & 1 == 0 {
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Operand::Register(op & (32 - 1))
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} else {
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Operand::Constant(op & (32 - 1))
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}
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}
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pub fn from_i32_w(op: i32) -> Operand {
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Operand::Register(op & (32 - 1))
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}
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}
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#[cfg(feature = "std")]
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impl std::fmt::Display for Operand {
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fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
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use Operand::*;
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match self {
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Register(r) => write!(f, "%{}", r),
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Constant(c) => write!(f, "#{}", c),
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}
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}
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}
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pub enum Opcode {
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PSA(Operand, Operand),
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PSB(Operand, Operand),
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MSK(Operand, Operand),
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XOR,
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NOT,
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ADD(Operand, Operand, Operand),
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SUB,
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MUL,
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TRD,
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BRZ(Operand, i32),
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UDF,
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}
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impl Opcode {
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pub fn from_i32(op: i32) -> Opcode {
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match op & (32 - 1) {
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0 => Opcode::PSA(Operand::from_i32_r(op >> 6), Operand::from_i32_w(op >> 18)),
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1 => Opcode::PSB(Operand::from_i32_r(op >> 6), Operand::from_i32_w(op >> 18)),
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2 => Opcode::MSK(Operand::from_i32_r(op >> 6), Operand::from_i32_r(op >> 12)),
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3 => Opcode::XOR,
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4 => Opcode::NOT,
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5 => Opcode::ADD(Operand::from_i32_r(op >> 6), Operand::from_i32_r(op >> 12), Operand::from_i32_w(op >> 18)),
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6 => Opcode::SUB,
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7 => Opcode::MUL,
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8 => Opcode::TRD,
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9 => Opcode::BRZ(Operand::from_i32_r(op >> 6), op >> 23),
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_ => Opcode::UDF,
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}
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}
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}
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#[cfg(feature = "std")]
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impl std::fmt::Display for Opcode {
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fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
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use Opcode::*;
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match self {
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PSA(ra, rd) => write!(f, "PSA {}, {}", ra, rd),
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PSB(ra, rd) => write!(f, "PSB {}, {}", ra, rd),
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MSK(ra, rb) => write!(f, "MSK {}, {}", ra, rb),
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XOR => write!(f, "XOR"),
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NOT => write!(f, "NOT"),
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ADD(ra, rb, rd) => write!(f, "ADD {}, {}, {}", rd, ra, rb),
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SUB => write!(f, "SUB"),
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MUL => write!(f, "MUL"),
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TRD => write!(f, "TRD"),
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BRZ(ra, rb) => write!(f, "BRZ {}, {}", rb, ra),
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_ => write!(f, "invalid"),
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}
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}
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}
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#[cfg(test)]
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fn print_opcode(op: i32) {
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println!(
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"{:09b} {:05b} {:01b} {:05b} {:01b} {:05b} {:05b} | {}",
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(op >> 23) & (512 - 1),
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(op >> 18) & (32 - 1),
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(op >> 17) & 1,
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(op >> 12) & (32 - 1),
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(op >> 11) & 1,
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(op >> 6) & (32 - 1),
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op & (32 - 1),
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Opcode::from_i32(op),
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);
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}
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/// Simple jump
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#[test]
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fn simple_jmp() {
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let mcode = assemble_engine25519!(
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start:
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add %8, #9, #11
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mid:
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brz start, #11
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add %8, #9, #12
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add %8, #9, #10
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);
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println!("Assembled output:");
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for op in &mcode {
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print_opcode(*op);
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}
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let target = [
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8 << 18 | 1 << 11 | 9 << 6 | 1 << 17 | 11 << 12 | 0x5,
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0x3FE << 23 | 0 << 11 | 11 << 6 | 0x9,
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8 << 18 | 1 << 11 | 9 << 6 | 1 << 17 | 12 << 12 | 0x5,
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8 << 18 | 1 << 11 | 9 << 6 | 1 << 17 | 10 << 12 | 0x5,
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];
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println!("Target output:");
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for op in &target {
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print_opcode(*op);
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}
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assert_eq!(mcode, target);
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}
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/*
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/// Test simple label relocation
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#[test]
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fn simple_jmp() {
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let mcode = assemble_engine25519!(
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start: brz start, r0
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);
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assert_eq!(mcode, [ 0x4C, 0x00, 0x00 ]);
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}
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/// Has to work without any relocations (label references)
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#[test]
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fn no_reloc() {
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let mcode = assemble6502!(
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start:
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lda #0xfb
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);
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assert_eq!(mcode, [ 0xA9, 0xFB ]);
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}
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/// Has to work without any labels
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#[test]
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fn no_label() {
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let mcode = assemble6502!(
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lda #0xfb
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lda #0xab
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);
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assert_eq!(mcode, [ 0xA9, 0xFB, 0xA9, 0xAB ]);
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}
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*/
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