crypto: add initial Crypto module with AESCipher

This ads initial supprot for the PyCrypto AESCipher module.  This
supports ECB, CBC, and CTR.

The example from the PyCrypto manual needs to be adapted:

```
>>> from Crypto.Cipher import AES
>>> from Crypto import Random
>>>
>>> key = b'Sixteen byte key'
>>> iv = Random.new().read(AES.block_size)
>>> cipher = AES.new(key, AES.MODE_CFB, iv)
>>> msg = iv + cipher.encrypt(b'Attack at dawn')
```

This doesn't work with this implementation, because CFB is not supported.
Additionally, there is no `Random` module in Crypto.  Furthermore, modes
other than CFB all require plaintext to be padded to 16 bytes, as in
the PyCrypto module.

This has been tested with many of the official NIST test vectors,
such as those used in `pycryptodome` at
39626a5b01/lib/Crypto/SelfTest/Cipher/test_vectors/AES

Signed-off-by: Sean Cross <sean@xobs.io>

ports/nrf/Makefile

@@ -182,6 +182,11 @@ SRC_C += \
 	lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c
 endif
 
+ifeq ($(MCU_SUB_VARIANT),nrf52833)
+SRC_C += \
+	lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c
+endif
+
 ifeq ($(CIRCUITPY_NETWORK),1)
 CFLAGS += -DMICROPY_PY_NETWORK=1
 

ports/nrf/boards/common.template.ld

@@ -5,7 +5,7 @@
 /* Specify the memory areas */
 MEMORY
 {
-    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = ${FLASH_SIZE} /* entire flash */
     /* nRF SoftDevice */
     FLASH_MBR (rx)  : ORIGIN = ${MBR_START_ADDR}, LENGTH = ${MBR_SIZE}
     FLASH_SD (rx)   : ORIGIN = ${SD_FLASH_START_ADDR}, LENGTH = ${SD_FLASH_SIZE}
@@ -23,7 +23,7 @@ MEMORY
     /* To measure the minimum required amount of memory for given configuration, set this number
        high enough to work and then check the mutation of the value done by sd_ble_enable. */
     SPIM3_RAM (rw)  : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE}, LENGTH = ${SPIM3_BUFFER_SIZE}
-    RAM (xrw)       : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE} + ${SPIM3_BUFFER_SIZE}, LENGTH = 256K - ${SOFTDEVICE_RAM_SIZE} -${SPIM3_BUFFER_SIZE}
+    RAM (xrw)       : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE} + ${SPIM3_BUFFER_SIZE}, LENGTH = ${RAM_SIZE} - ${SOFTDEVICE_RAM_SIZE} -${SPIM3_BUFFER_SIZE}
 
 }
 

ports/nrf/common-hal/_bleio/Adapter.c

@@ -56,6 +56,26 @@
 #define BLE_SLAVE_LATENCY            0
 #define BLE_CONN_SUP_TIMEOUT         MSEC_TO_UNITS(4000, UNIT_10_MS)
 
+#ifndef BLEIO_VS_UUID_COUNT
+#define BLEIO_VS_UUID_COUNT 75
+#endif
+
+#ifndef BLEIO_HVN_TX_QUEUE_SIZE
+#define BLEIO_HVN_TX_QUEUE_SIZE 9
+#endif
+
+#ifndef BLEIO_CENTRAL_ROLE_COUNT
+#define BLEIO_CENTRAL_ROLE_COUNT 4
+#endif
+
+#ifndef BLEIO_PERIPH_ROLE_COUNT
+#define BLEIO_PERIPH_ROLE_COUNT 4
+#endif
+
+#ifndef BLEIO_ATTR_TAB_SIZE
+#define BLEIO_ATTR_TAB_SIZE (BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 5)
+#endif
+
 const nvm_bytearray_obj_t common_hal_bleio_nvm_obj = {
     .base = {
         .type = &nvm_bytearray_type,
@@ -124,9 +144,9 @@ STATIC uint32_t ble_stack_enable(void) {
     // adv_set_count must be == 1 for S140. Cannot be increased.
     ble_conf.gap_cfg.role_count_cfg.adv_set_count = 1;
     // periph_role_count costs 1232 bytes for 2 to 3, then ~1840 for each further increment.
-    ble_conf.gap_cfg.role_count_cfg.periph_role_count = 4;
+    ble_conf.gap_cfg.role_count_cfg.periph_role_count = BLEIO_PERIPH_ROLE_COUNT;
     // central_role_count costs 648 bytes for 1 to 2, then ~1250 for each further increment.
-    ble_conf.gap_cfg.role_count_cfg.central_role_count = 4;
+    ble_conf.gap_cfg.role_count_cfg.central_role_count = BLEIO_CENTRAL_ROLE_COUNT;
     err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_conf, app_ram_start);
     if (err_code != NRF_SUCCESS) {
         return err_code;
@@ -137,7 +157,7 @@ STATIC uint32_t ble_stack_enable(void) {
     // Each increment to hvn_tx_queue_size costs 2064 bytes.
     // DevZone recommends not setting this directly, but instead changing gap_conn_cfg.event_length.
     // However, we are setting connection extension, so this seems to make sense.
-    ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = 9;
+    ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = BLEIO_HVN_TX_QUEUE_SIZE;
     err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATTS, &ble_conf, app_ram_start);
     if (err_code != NRF_SUCCESS) {
         return err_code;
@@ -156,7 +176,7 @@ STATIC uint32_t ble_stack_enable(void) {
     // and anything the user does.
     memset(&ble_conf, 0, sizeof(ble_conf));
     // Each increment to the BLE_GATTS_ATTR_TAB_SIZE_DEFAULT multiplier costs 1408 bytes.
-    ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 5;
+    ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLEIO_ATTR_TAB_SIZE;
     err_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_conf, app_ram_start);
     if (err_code != NRF_SUCCESS) {
         return err_code;
@@ -166,7 +186,7 @@ STATIC uint32_t ble_stack_enable(void) {
     // service and characteristic.
     memset(&ble_conf, 0, sizeof(ble_conf));
     // Each additional vs_uuid_count costs 16 bytes.
-    ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = 75; // Defaults to 10.
+    ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = BLEIO_VS_UUID_COUNT; // Defaults to 10.
     err_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_conf, app_ram_start);
     if (err_code != NRF_SUCCESS) {
         return err_code;

ports/nrf/common-hal/_bleio/Adapter.h

@@ -35,7 +35,9 @@
 #include "shared-bindings/_bleio/Connection.h"
 #include "shared-bindings/_bleio/ScanResults.h"
 
+#ifndef BLEIO_TOTAL_CONNECTION_COUNT
 #define BLEIO_TOTAL_CONNECTION_COUNT 5
+#endif
 
 extern bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT];
 

ports/nrf/common-hal/microcontroller/__init__.c

@@ -168,5 +168,17 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
   { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) },
   { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) },
 #endif
+#ifdef NRF52833
+  { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) },
+  { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) },
+  { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) },
+  { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) },
+  { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) },
+  { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) },
+  { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) },
+  { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) },
+  { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) },
+  { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) },
+#endif
 };
 MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);

ports/nrf/device/nrf52/startup_nrf52833.c

@@ -0,0 +1,184 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+extern uint32_t _estack;
+extern uint32_t _sidata;
+extern uint32_t _sdata;
+extern uint32_t _edata;
+extern uint32_t _sbss;
+extern uint32_t _ebss;
+
+typedef void (*func)(void);
+
+#define _start   main
+
+extern void  _start(void) __attribute__((noreturn));
+extern void SystemInit(void);
+
+void Default_Handler(void) {
+    while (1);
+}
+
+void Reset_Handler(void) {
+    uint32_t * p_src  = &_sidata;
+    uint32_t * p_dest = &_sdata;
+
+    while (p_dest < &_edata) {
+      *p_dest++ = *p_src++;
+    }
+
+    uint32_t * p_bss     = &_sbss;
+    uint32_t * p_bss_end = &_ebss;
+    while (p_bss < p_bss_end) {
+        *p_bss++ = 0ul;
+    }
+
+    SystemInit();
+    _start();
+}
+
+void NMI_Handler                 (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemoryManagement_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler                 (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler             (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void POWER_CLOCK_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void RADIO_IRQHandler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void UARTE0_UART0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void NFCT_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void GPIOTE_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void SAADC_IRQHandler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER0_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER1_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER2_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC0_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void TEMP_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void RNG_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void ECB_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void CCM_AAR_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void WDT_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC1_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void QDEC_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void COMP_LPCOMP_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI0_EGU0_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI1_EGU1_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI2_EGU2_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI3_EGU3_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI4_EGU4_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI5_EGU5_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER3_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER4_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM0_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void PDM_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void MWU_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM1_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM2_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM2_SPIS2_SPI2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC2_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2S_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void FPU_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBD_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void UARTE1_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM3_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM3_IRQHandler            (void) __attribute__ ((weak, alias("Default_Handler")));
+
+const func __Vectors[] __attribute__ ((used, section(".isr_vector"))) = {
+    (func)&_estack,
+    Reset_Handler,
+    NMI_Handler,
+    HardFault_Handler,
+    MemoryManagement_Handler,
+    BusFault_Handler,
+    UsageFault_Handler,
+    0,
+    0,
+    0,
+    0,
+    SVC_Handler,
+    DebugMon_Handler,
+    0,
+    PendSV_Handler,
+    SysTick_Handler,
+
+    /* External Interrupts */
+    POWER_CLOCK_IRQHandler,
+    RADIO_IRQHandler,
+    UARTE0_UART0_IRQHandler,
+    SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler,
+    SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler,
+    NFCT_IRQHandler,
+    GPIOTE_IRQHandler,
+    SAADC_IRQHandler,
+    TIMER0_IRQHandler,
+    TIMER1_IRQHandler,
+    TIMER2_IRQHandler,
+    RTC0_IRQHandler,
+    TEMP_IRQHandler,
+    RNG_IRQHandler,
+    ECB_IRQHandler,
+    CCM_AAR_IRQHandler,
+    WDT_IRQHandler,
+    RTC1_IRQHandler,
+    QDEC_IRQHandler,
+    COMP_LPCOMP_IRQHandler,
+    SWI0_EGU0_IRQHandler,
+    SWI1_EGU1_IRQHandler,
+    SWI2_EGU2_IRQHandler,
+    SWI3_EGU3_IRQHandler,
+    SWI4_EGU4_IRQHandler,
+    SWI5_EGU5_IRQHandler,
+    TIMER3_IRQHandler,
+    TIMER4_IRQHandler,
+    PWM0_IRQHandler,
+    PDM_IRQHandler,
+    0,
+    0,
+    MWU_IRQHandler,
+    PWM1_IRQHandler,
+    PWM2_IRQHandler,
+    SPIM2_SPIS2_SPI2_IRQHandler,
+    RTC2_IRQHandler,
+    I2S_IRQHandler,
+    FPU_IRQHandler,
+    USBD_IRQHandler,
+    UARTE1_IRQHandler,
+    0,
+    0,
+    0,
+    0,
+    PWM3_IRQHandler,
+    0,
+    SPIM3_IRQHandler,
+};

ports/nrf/ld_defines.c

@@ -9,6 +9,9 @@
 // The next line is a marker to start looking for definitions. Lines above the next line are ignored.
 // START_LD_DEFINES
 
+/*FLASH_SIZE=*/                                     FLASH_SIZE;
+/*RAM_SIZE=*/                                       RAM_SIZE;
+
 /*MBR_START_ADDR=*/                                 MBR_START_ADDR;
 /*MBR_SIZE=*/                                       MBR_SIZE;
 

ports/nrf/mpconfigport.h

@@ -36,16 +36,30 @@
 
 // Max RAM used by SoftDevice. Can be changed when SoftDevice parameters are changed.
 // See common.template.ld.
+#ifndef SOFTDEVICE_RAM_SIZE
 #define SOFTDEVICE_RAM_SIZE         (64*1024)
+#endif
 
 #ifdef NRF52840
 #define MICROPY_PY_SYS_PLATFORM "nRF52840"
 #define FLASH_SIZE                  (0x100000)  // 1MiB
+#define RAM_SIZE                    (0x40000)   // 256 KiB
 // Special RAM area for SPIM3 transmit buffer, to work around hardware bug.
 // See common.template.ld.
 #define SPIM3_BUFFER_SIZE           (8192)
 #endif
 
+#ifdef NRF52833
+#define MICROPY_PY_SYS_PLATFORM "nRF52833"
+#define FLASH_SIZE                  (0x80000)  // 512 KiB
+#define RAM_SIZE                    (0x20000)  // 128 KiB
+// Special RAM area for SPIM3 transmit buffer, to work around hardware bug.
+// See common.template.ld.
+#ifndef SPIM3_BUFFER_SIZE
+#define SPIM3_BUFFER_SIZE           (8192)
+#endif
+#endif
+
 #define MICROPY_PY_COLLECTIONS_ORDEREDDICT       (1)
 #define MICROPY_PY_FUNCTION_ATTRS                (1)
 #define MICROPY_PY_IO                            (1)
@@ -112,25 +126,30 @@
 // Define these regions starting down from the bootloader:
 
 // Bootloader values from https://github.com/adafruit/Adafruit_nRF52_Bootloader/blob/master/src/linker/s140_v6.ld
-#define BOOTLOADER_START_ADDR          (0x000F4000)
+#define BOOTLOADER_START_ADDR          (FLASH_SIZE - BOOTLOADER_SIZE - BOOTLOADER_SETTINGS_SIZE - BOOTLOADER_MBR_SIZE)
+#define BOOTLOADER_MBR_SIZE            (0x1000)     // 4kib
+#ifndef BOOTLOADER_SIZE
 #define BOOTLOADER_SIZE                (0xA000)     // 40kiB
-#define BOOTLOADER_SETTINGS_START_ADDR (0x000FF000)
+#endif
+#define BOOTLOADER_SETTINGS_START_ADDR (FLASH_SIZE - BOOTLOADER_SETTINGS_SIZE)
 #define BOOTLOADER_SETTINGS_SIZE       (0x1000)     // 4kiB
 
 #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (BOOTLOADER_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE)
 
-#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE > 0 && CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR != (BOOTLOADER_START_ADDR - 256*1024)
+#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE > 0 && CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR != (BOOTLOADER_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE)
 #warning Internal flash filesystem location has moved!
 #endif
 
 #define CIRCUITPY_INTERNAL_NVM_START_ADDR (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_INTERNAL_NVM_SIZE)
 
 // 32kiB for bonding, etc.
+#ifndef CIRCUITPY_BLE_CONFIG_SIZE
 #define CIRCUITPY_BLE_CONFIG_SIZE       (32*1024)
+#endif
 #define CIRCUITPY_BLE_CONFIG_START_ADDR (CIRCUITPY_INTERNAL_NVM_START_ADDR - CIRCUITPY_BLE_CONFIG_SIZE)
 
 // The firmware space is the space left over between the fixed lower and upper regions.
-#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR)
+#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR - CIRCUITPY_BLE_CONFIG_SIZE)
 
 #if BOOTLOADER_START_ADDR % FLASH_ERASE_SIZE != 0
 #error BOOTLOADER_START_ADDR must be on a flash erase boundary.

ports/nrf/mpconfigport.mk

@@ -73,4 +73,18 @@ NRF_DEFINES += -DNRF52840_XXAA -DNRF52840
 CFLAGS += -DCONFIG_NFCT_PINS_AS_GPIOS
 
 CIRCUITPY_ULAB = 1
+
+else
+ifeq ($(MCU_CHIP),nrf52833)
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52833
+
+SD ?= s140
+SOFTDEV_VERSION ?= 6.1.0
+
+BOOT_SETTING_ADDR = 0x7F000
+NRF_DEFINES += -DNRF52833_XXAA -DNRF52833
+
+endif
 endif

ports/nrf/nrfx_config.h

@@ -41,7 +41,7 @@
 #define NRFX_SPIM1_ENABLED 1
 #endif
 #define NRFX_SPIM2_ENABLED 1
-#ifdef NRF52840_XXAA
+#if defined(NRF52840_XXAA) || defined(NRF52833_XXAA)
     #define NRFX_SPIM_EXTENDED_ENABLED 1
     #define NRFX_SPIM3_ENABLED 1
 #elif CIRCUITPY_NRF_NUM_I2C == 2
@@ -53,7 +53,9 @@
 #define NRFX_SPIM_MISO_PULL_CFG 1
 
 // QSPI
+#if defined(NRF52840_XXAA)
 #define NRFX_QSPI_ENABLED                          1
+#endif
 
 // TWI aka. I2C; always enable TWIM0 (no conflict with SPIM1 and SPIM2)
 #if CIRCUITPY_NRF_NUM_I2C == 1 || CIRCUITPY_NRF_NUM_I2C == 2

ports/nrf/peripherals/nrf/nrf52833/pins.c

@@ -0,0 +1,72 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Dan Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "nrf/pins.h"
+
+const mcu_pin_obj_t pin_P0_00 = PIN(P0_00, 0, 0, 0);
+const mcu_pin_obj_t pin_P0_01 = PIN(P0_01, 0, 1, 0);
+const mcu_pin_obj_t pin_P0_02 = PIN(P0_02, 0, 2, SAADC_CH_PSELP_PSELP_AnalogInput0);
+const mcu_pin_obj_t pin_P0_03 = PIN(P0_03, 0, 3, SAADC_CH_PSELP_PSELP_AnalogInput1);
+const mcu_pin_obj_t pin_P0_04 = PIN(P0_04, 0, 4, SAADC_CH_PSELP_PSELP_AnalogInput2);
+const mcu_pin_obj_t pin_P0_05 = PIN(P0_05, 0, 5, SAADC_CH_PSELP_PSELP_AnalogInput3);
+const mcu_pin_obj_t pin_P0_06 = PIN(P0_06, 0, 6, 0);
+const mcu_pin_obj_t pin_P0_07 = PIN(P0_07, 0, 7, 0);
+const mcu_pin_obj_t pin_P0_08 = PIN(P0_08, 0, 8, 0);
+const mcu_pin_obj_t pin_P0_09 = PIN(P0_09, 0, 9, 0);
+const mcu_pin_obj_t pin_P0_10 = PIN(P0_10, 0, 10, 0);
+const mcu_pin_obj_t pin_P0_11 = PIN(P0_11, 0, 11, 0);
+const mcu_pin_obj_t pin_P0_12 = PIN(P0_12, 0, 12, 0);
+const mcu_pin_obj_t pin_P0_13 = PIN(P0_13, 0, 13, 0);
+const mcu_pin_obj_t pin_P0_14 = PIN(P0_14, 0, 14, 0);
+const mcu_pin_obj_t pin_P0_15 = PIN(P0_15, 0, 15, 0);
+const mcu_pin_obj_t pin_P0_16 = PIN(P0_16, 0, 16, 0);
+const mcu_pin_obj_t pin_P0_17 = PIN(P0_17, 0, 17, 0);
+const mcu_pin_obj_t pin_P0_18 = PIN(P0_18, 0, 18, 0);
+const mcu_pin_obj_t pin_P0_19 = PIN(P0_19, 0, 19, 0);
+const mcu_pin_obj_t pin_P0_20 = PIN(P0_20, 0, 20, 0);
+const mcu_pin_obj_t pin_P0_21 = PIN(P0_21, 0, 21, 0);
+const mcu_pin_obj_t pin_P0_22 = PIN(P0_22, 0, 22, 0);
+const mcu_pin_obj_t pin_P0_23 = PIN(P0_23, 0, 23, 0);
+const mcu_pin_obj_t pin_P0_24 = PIN(P0_24, 0, 24, 0);
+const mcu_pin_obj_t pin_P0_25 = PIN(P0_25, 0, 25, 0);
+const mcu_pin_obj_t pin_P0_26 = PIN(P0_26, 0, 26, 0);
+const mcu_pin_obj_t pin_P0_27 = PIN(P0_27, 0, 27, 0);
+const mcu_pin_obj_t pin_P0_28 = PIN(P0_28, 0, 28, SAADC_CH_PSELP_PSELP_AnalogInput4);
+const mcu_pin_obj_t pin_P0_29 = PIN(P0_29, 0, 29, SAADC_CH_PSELP_PSELP_AnalogInput5);
+const mcu_pin_obj_t pin_P0_30 = PIN(P0_30, 0, 30, SAADC_CH_PSELP_PSELP_AnalogInput6);
+const mcu_pin_obj_t pin_P0_31 = PIN(P0_31, 0, 31, SAADC_CH_PSELP_PSELP_AnalogInput7);
+const mcu_pin_obj_t pin_P1_00 = PIN(P1_00, 1, 0, 0);
+const mcu_pin_obj_t pin_P1_01 = PIN(P1_01, 1, 1, 0);
+const mcu_pin_obj_t pin_P1_02 = PIN(P1_02, 1, 2, 0);
+const mcu_pin_obj_t pin_P1_03 = PIN(P1_03, 1, 3, 0);
+const mcu_pin_obj_t pin_P1_04 = PIN(P1_04, 1, 4, 0);
+const mcu_pin_obj_t pin_P1_05 = PIN(P1_05, 1, 5, 0);
+const mcu_pin_obj_t pin_P1_06 = PIN(P1_06, 1, 6, 0);
+const mcu_pin_obj_t pin_P1_07 = PIN(P1_07, 1, 7, 0);
+const mcu_pin_obj_t pin_P1_08 = PIN(P1_08, 1, 8, 0);
+const mcu_pin_obj_t pin_P1_09 = PIN(P1_09, 1, 9, 0);

ports/nrf/peripherals/nrf/nrf52833/pins.h

@@ -0,0 +1,73 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 by Dan Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52833_PINS_H
+#define MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52833_PINS_H
+
+extern const mcu_pin_obj_t pin_P0_00;
+extern const mcu_pin_obj_t pin_P0_01;
+extern const mcu_pin_obj_t pin_P0_02;
+extern const mcu_pin_obj_t pin_P0_03;
+extern const mcu_pin_obj_t pin_P0_04;
+extern const mcu_pin_obj_t pin_P0_05;
+extern const mcu_pin_obj_t pin_P0_06;
+extern const mcu_pin_obj_t pin_P0_07;
+extern const mcu_pin_obj_t pin_P0_08;
+extern const mcu_pin_obj_t pin_P0_09;
+extern const mcu_pin_obj_t pin_P0_10;
+extern const mcu_pin_obj_t pin_P0_11;
+extern const mcu_pin_obj_t pin_P0_12;
+extern const mcu_pin_obj_t pin_P0_13;
+extern const mcu_pin_obj_t pin_P0_14;
+extern const mcu_pin_obj_t pin_P0_15;
+extern const mcu_pin_obj_t pin_P0_16;
+extern const mcu_pin_obj_t pin_P0_17;
+extern const mcu_pin_obj_t pin_P0_18;
+extern const mcu_pin_obj_t pin_P0_19;
+extern const mcu_pin_obj_t pin_P0_20;
+extern const mcu_pin_obj_t pin_P0_21;
+extern const mcu_pin_obj_t pin_P0_22;
+extern const mcu_pin_obj_t pin_P0_23;
+extern const mcu_pin_obj_t pin_P0_24;
+extern const mcu_pin_obj_t pin_P0_25;
+extern const mcu_pin_obj_t pin_P0_26;
+extern const mcu_pin_obj_t pin_P0_27;
+extern const mcu_pin_obj_t pin_P0_28;
+extern const mcu_pin_obj_t pin_P0_29;
+extern const mcu_pin_obj_t pin_P0_30;
+extern const mcu_pin_obj_t pin_P0_31;
+extern const mcu_pin_obj_t pin_P1_00;
+extern const mcu_pin_obj_t pin_P1_01;
+extern const mcu_pin_obj_t pin_P1_02;
+extern const mcu_pin_obj_t pin_P1_03;
+extern const mcu_pin_obj_t pin_P1_04;
+extern const mcu_pin_obj_t pin_P1_05;
+extern const mcu_pin_obj_t pin_P1_06;
+extern const mcu_pin_obj_t pin_P1_07;
+extern const mcu_pin_obj_t pin_P1_08;
+extern const mcu_pin_obj_t pin_P1_09;
+
+#endif // MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52833_PINS_H

ports/nrf/peripherals/nrf/nrf52833/power.c

@@ -0,0 +1,50 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Dan Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "nrfx.h"
+#include "hal/nrf_nvmc.h"
+
+void nrf_peripherals_power_init(void) {
+    // Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff
+    // if flash is erased, which sets the default to 1.8V
+    // This matters only when "high voltage mode" is enabled, which is true on the PCA10059,
+    // and might be true on other boards.
+    if (NRF_UICR->REGOUT0 == 0xffffffff && NRF_POWER->MAINREGSTATUS & 1) {
+        // Expand what nrf_nvmc_word_write() did.
+        // It's missing from nrfx V2.0.0, and nrfx_nvmc_word_write() does bounds
+        // checking which prevents writes to UICR.
+        // Reported: https://devzone.nordicsemi.com/f/nordic-q-a/57243/nrfx_nvmc-h-api-cannot-write-to-uicr
+        NRF_NVMC->CONFIG = NRF_NVMC_MODE_WRITE;
+        while (!(NRF_NVMC->READY & NVMC_READY_READY_Msk)) {}
+        NRF_UICR->REGOUT0 = UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos;
+        __DMB();
+        while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
+        NRF_NVMC->CONFIG = NRF_NVMC_MODE_READONLY;
+
+        // Must reset to enable change.
+        NVIC_SystemReset();
+    }
+}

ports/nrf/peripherals/nrf/pins.h

@@ -61,4 +61,9 @@ extern const mp_obj_type_t mcu_pin_type;
 #include "nrf52840/pins.h"
 #endif
 
+// Choose based on chip, but not specifically revision (e.g., not NRF52840_XXAA)
+#ifdef NRF52833
+#include "nrf52833/pins.h"
+#endif
+
 #endif // __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__

py/circuitpy_defns.mk

@@ -136,6 +136,9 @@ endif
 ifeq ($(CIRCUITPY_BUSIO),1)
 SRC_PATTERNS += busio/% bitbangio/OneWire.%
 endif
+ifeq ($(CIRCUITPY_CRYPTO),1)
+SRC_PATTERNS += crypto/%
+endif
 ifeq ($(CIRCUITPY_DIGITALIO),1)
 SRC_PATTERNS += digitalio/%
 endif
@@ -342,6 +345,8 @@ SRC_SHARED_MODULE_ALL = \
 	bitbangio/__init__.c \
 	board/__init__.c \
 	busio/OneWire.c \
+	crypto/__init__.c \
+	crypto/aes.c \
 	displayio/Bitmap.c \
 	displayio/ColorConverter.c \
 	displayio/Display.c \

py/circuitpy_mpconfig.h

@@ -321,6 +321,13 @@ extern const struct _mp_obj_module_t busio_module;
 #define BUSIO_MODULE
 #endif
 
+#if CIRCUITPY_CRYPTO
+extern const struct _mp_obj_module_t crypto_module;
+#define CRYPTO_MODULE       { MP_OBJ_NEW_QSTR(MP_QSTR_Crypto), (mp_obj_t)&crypto_module },
+#else
+#define CRYPTO_MODULE
+#endif
+
 #if CIRCUITPY_DIGITALIO
 extern const struct _mp_obj_module_t digitalio_module;
 #define DIGITALIO_MODULE       { MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module },
@@ -637,6 +644,7 @@ extern const struct _mp_obj_module_t ustack_module;
     BLEIO_MODULE \
     BOARD_MODULE \
     BUSIO_MODULE \
+    CRYPTO_MODULE \
     DIGITALIO_MODULE \
     DISPLAYIO_MODULE \
       FONTIO_MODULE \

py/circuitpy_mpconfig.mk

@@ -139,6 +139,11 @@ CIRCUITPY_BUSIO = $(CIRCUITPY_DEFAULT_BUILD)
 endif
 CFLAGS += -DCIRCUITPY_BUSIO=$(CIRCUITPY_BUSIO)
 
+ifndef CIRCUITPY_CRYPTO
+CIRCUITPY_CRYPTO = $(CIRCUITPY_FULL_BUILD)
+endif
+CFLAGS += -DCIRCUITPY_CRYPTO=$(CIRCUITPY_CRYPTO)
+
 ifndef CIRCUITPY_DIGITALIO
 CIRCUITPY_DIGITALIO = $(CIRCUITPY_DEFAULT_BUILD)
 endif

shared-bindings/crypto/__init__.c

@@ -0,0 +1,71 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "__init__.h"
+
+//| :mod:`aes` --- AES encryption and decryption routines
+//| ========================================================
+//|
+//| .. module:: aes
+//|   :synopsis: Routines for performing AES encryption and decryption
+//|
+//| The `audiocore` module contains core classes for audio IO
+//|
+//| Libraries
+//|
+//| .. toctree::
+//|     :maxdepth: 3
+//|
+//|
+
+STATIC const mp_rom_map_elem_t cipher_module_globals_table[] = {
+    {MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_Cipher)},
+    {MP_OBJ_NEW_QSTR(MP_QSTR_AES), MP_ROM_PTR(&aes_module)},
+};
+
+STATIC MP_DEFINE_CONST_DICT(cipher_module_globals, cipher_module_globals_table);
+
+const mp_obj_module_t cipher_module = {
+    {&mp_type_module},
+    .globals = (mp_obj_dict_t *)&cipher_module_globals,
+};
+
+STATIC const mp_rom_map_elem_t crypto_module_globals_table[] = {
+    {MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_Crypto)},
+    {MP_OBJ_NEW_QSTR(MP_QSTR_Cipher), MP_ROM_PTR(&cipher_module)},
+};
+
+STATIC MP_DEFINE_CONST_DICT(crypto_module_globals, crypto_module_globals_table);
+
+const mp_obj_module_t crypto_module = {
+    .base = {&mp_type_module},
+    .globals = (mp_obj_dict_t *)&crypto_module_globals,
+};

shared-bindings/crypto/__init__.h

@@ -0,0 +1,48 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_CRYPTO_H
+#define MICROPY_INCLUDED_SHARED_BINDINGS_CRYPTO_H
+
+#include "shared-module/crypto/__init__.h"
+
+extern const mp_obj_module_t crypto_module;
+extern const mp_obj_module_t aes_module;
+
+void common_hal_aes_construct(aes_obj_t* self,
+                              const uint8_t* key,
+                              uint32_t key_length,
+                              const uint8_t* iv,
+                              int mode,
+                              int counter);
+void common_hal_aes_encrypt(aes_obj_t* self,
+                            uint8_t* buffer,
+                            size_t len);
+void common_hal_aes_decrypt(aes_obj_t* self,
+                            uint8_t* buffer,
+                            size_t len);
+
+#endif // MICROPY_INCLUDED_SHARED_BINDINGS_CRYPTO_H

shared-bindings/crypto/aes.c

@@ -0,0 +1,207 @@
+#include <stdint.h>
+#include <string.h>
+
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "shared-bindings/crypto/__init__.h"
+
+// Defined at the end of this file
+extern const mp_obj_type_t aescipher_type;
+
+STATIC mp_obj_t aescipher_make_new(size_t n_args, const mp_obj_t *pos_args,
+                                   mp_map_t *kw_args) {
+  enum { ARG_key, ARG_mode, ARG_IV, ARG_counter, ARG_segment_size };
+  static const mp_arg_t allowed_args[] = {
+      {MP_QSTR_key, MP_ARG_OBJ | MP_ARG_REQUIRED},
+      {MP_QSTR_mode, MP_ARG_INT},
+      {MP_QSTR_IV, MP_ARG_OBJ},
+      {MP_QSTR_counter, MP_ARG_OBJ},
+      {MP_QSTR_segment_size, MP_ARG_INT},
+  };
+  mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+  // Set defaults. These will be overridden in mp_arg_parse_all() if an
+  // argument is provided.
+  args[ARG_mode].u_int = AES_MODE_ECB;
+  args[ARG_IV].u_obj = NULL;
+  args[ARG_counter].u_int = 0;
+  args[ARG_segment_size].u_int =
+      8; // Only useful in CFB mode, which we don't support
+  mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args),
+                   allowed_args, args);
+
+  aes_obj_t *self = m_new_obj(aes_obj_t);
+  self->base.type = &aescipher_type;
+
+  mp_buffer_info_t bufinfo;
+
+  const uint8_t *key = NULL;
+  uint32_t key_length = 0;
+  if (mp_get_buffer(args[ARG_key].u_obj, &bufinfo, MP_BUFFER_READ)) {
+    if ((bufinfo.len != 16) && (bufinfo.len != 24) && (bufinfo.len != 32)) {
+      mp_raise_TypeError(translate("key must be 16, 24, or 32 bytes long"));
+    }
+    key = bufinfo.buf;
+    key_length = bufinfo.len;
+  } else {
+    mp_raise_TypeError(translate("no key was specified"));
+  }
+
+  int mode = args[ARG_mode].u_int;
+  switch (args[ARG_mode].u_int) {
+  case AES_MODE_CBC: /* CBC */
+    break;
+  case AES_MODE_ECB: /* ECB */
+    break;
+  case AES_MODE_CTR: /* CTR */
+    break;
+  default:
+    mp_raise_TypeError(translate("requested AES mode is unsupported"));
+  }
+
+  // IV is required for CBC mode and is ignored for other modes.
+  const uint8_t *iv = NULL;
+  if (args[ARG_IV].u_obj != NULL &&
+      mp_get_buffer(args[ARG_IV].u_obj, &bufinfo, MP_BUFFER_READ)) {
+    if (bufinfo.len != AES_BLOCKLEN) {
+      mp_raise_TypeError_varg(translate("iv must be %d bytes long"),
+                              AES_BLOCKLEN);
+    }
+    iv = bufinfo.buf;
+  }
+
+  common_hal_aes_construct(self, key, key_length, iv, mode, args[ARG_counter].u_int);
+  return MP_OBJ_FROM_PTR(self);
+}
+
+// Used when constructing with `new AESCipher`
+STATIC mp_obj_t aescipher_make_new_new(const mp_obj_type_t *type, size_t n_args,
+                                       const mp_obj_t *pos_args,
+                                       mp_map_t *kw_args) {
+  return aescipher_make_new(n_args, pos_args, kw_args);
+}
+
+STATIC byte *duplicate_data(const byte *src_buf, size_t len) {
+  byte *dest_buf = m_new(byte, len);
+  memcpy(dest_buf, src_buf, len);
+  return dest_buf;
+}
+
+STATIC mp_obj_t aescipher_encrypt_in_place(mp_obj_t aes_obj, mp_obj_t buf) {
+  if (!MP_OBJ_IS_TYPE(aes_obj, &aescipher_type)) {
+    mp_raise_TypeError_varg(translate("Expected a %q"), aescipher_type.name);
+  }
+  // Convert parameters into expected types.
+  aes_obj_t *aes = MP_OBJ_TO_PTR(aes_obj);
+  mp_buffer_info_t bufinfo;
+  mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ);
+  if ((bufinfo.len & (AES_BLOCKLEN - 1)) != 0) {
+    mp_raise_ValueError(translate("Buffer must be a multiple of 16 bytes"));
+  }
+
+  common_hal_aes_encrypt(aes, (uint8_t *)bufinfo.buf, bufinfo.len);
+  return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(aescipher_encrypt_in_place_obj,
+                                 aescipher_encrypt_in_place);
+
+STATIC mp_obj_t aescipher_encrypt(mp_obj_t aes_obj, mp_obj_t buf) {
+  if (!MP_OBJ_IS_TYPE(aes_obj, &aescipher_type)) {
+    mp_raise_TypeError_varg(translate("Expected a %q"), aescipher_type.name);
+  }
+  // Convert parameters into expected types.
+  aes_obj_t *aes = MP_OBJ_TO_PTR(aes_obj);
+  mp_buffer_info_t bufinfo;
+  mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ);
+  if ((bufinfo.len & (AES_BLOCKLEN - 1)) != 0) {
+    mp_raise_ValueError(translate("Buffer must be a multiple of 16 bytes"));
+  }
+
+  byte *dest_buf = duplicate_data((const byte *)bufinfo.buf, bufinfo.len);
+  common_hal_aes_encrypt(aes, (uint8_t *)dest_buf, bufinfo.len);
+
+  return mp_obj_new_bytearray_by_ref(bufinfo.len, dest_buf);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(aescipher_encrypt_obj, aescipher_encrypt);
+
+STATIC mp_obj_t aescipher_decrypt_in_place(mp_obj_t aes_obj, mp_obj_t buf) {
+  if (!MP_OBJ_IS_TYPE(aes_obj, &aescipher_type)) {
+    mp_raise_TypeError_varg(translate("Expected a %q"), aescipher_type.name);
+  }
+  // Convert parameters into expected types.
+  aes_obj_t *aes = MP_OBJ_TO_PTR(aes_obj);
+  mp_buffer_info_t bufinfo;
+  mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ);
+  if ((bufinfo.len & (AES_BLOCKLEN - 1)) != 0) {
+    mp_raise_ValueError(translate("Buffer must be a multiple of 16 bytes"));
+  }
+  common_hal_aes_decrypt(aes, (uint8_t *)bufinfo.buf, bufinfo.len);
+  return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(aescipher_decrypt_in_place_obj,
+                                 aescipher_decrypt_in_place);
+
+STATIC mp_obj_t aescipher_decrypt(mp_obj_t aes_obj, mp_obj_t buf) {
+  if (!MP_OBJ_IS_TYPE(aes_obj, &aescipher_type)) {
+    mp_raise_TypeError_varg(translate("Expected a %q"), aescipher_type.name);
+  }
+  // Convert parameters into expected types.
+  aes_obj_t *aes = MP_OBJ_TO_PTR(aes_obj);
+  mp_buffer_info_t bufinfo;
+  mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ);
+  if ((bufinfo.len & (AES_BLOCKLEN - 1)) != 0) {
+    mp_raise_ValueError(translate("Buffer must be a multiple of 16 bytes"));
+  }
+
+  byte *dest_buf = duplicate_data((const byte *)bufinfo.buf, bufinfo.len);
+  common_hal_aes_decrypt(aes, (uint8_t *)dest_buf, bufinfo.len);
+  return mp_obj_new_bytearray_by_ref(bufinfo.len, dest_buf);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(aescipher_decrypt_obj, aescipher_decrypt);
+
+STATIC const mp_obj_tuple_t mp_crypto_aes_key_size_obj = {
+    {&mp_type_tuple},
+    3,
+    {
+        MP_OBJ_NEW_SMALL_INT(16),
+        MP_OBJ_NEW_SMALL_INT(24),
+        MP_OBJ_NEW_SMALL_INT(32),
+    }};
+
+STATIC const mp_rom_map_elem_t aescipher_locals_dict_table[] = {
+    // Methods
+    {MP_ROM_QSTR(MP_QSTR___name__), MP_OBJ_NEW_QSTR(MP_QSTR_AES)},
+    {MP_ROM_QSTR(MP_QSTR_encrypt), (mp_obj_t)&aescipher_encrypt_obj},
+    {MP_ROM_QSTR(MP_QSTR_decrypt), (mp_obj_t)&aescipher_decrypt_obj},
+    {MP_ROM_QSTR(MP_QSTR_encrypt_in_place),
+     (mp_obj_t)&aescipher_encrypt_in_place_obj},
+    {MP_ROM_QSTR(MP_QSTR_decrypt_in_place),
+     (mp_obj_t)&aescipher_decrypt_in_place_obj},
+
+};
+STATIC MP_DEFINE_CONST_DICT(aescipher_locals_dict, aescipher_locals_dict_table);
+
+const mp_obj_type_t aescipher_type = {
+    {&mp_type_type},
+    .name = MP_QSTR_AESCipher,
+    .make_new = aescipher_make_new_new,
+    .locals_dict = (mp_obj_dict_t *)&aescipher_locals_dict,
+};
+
+MP_DEFINE_CONST_FUN_OBJ_KW(aescipher_make_new_obj, 1, aescipher_make_new);
+
+STATIC const mp_rom_map_elem_t aes_module_globals_table[] = {
+    {MP_ROM_QSTR(MP_QSTR_MODE_ECB), MP_ROM_INT(AES_MODE_ECB)},
+    {MP_ROM_QSTR(MP_QSTR_MODE_CBC), MP_ROM_INT(AES_MODE_CBC)},
+    {MP_ROM_QSTR(MP_QSTR_MODE_CTR), MP_ROM_INT(AES_MODE_CTR)},
+    {MP_ROM_QSTR(MP_QSTR_block_size), MP_ROM_INT(AES_BLOCKLEN)},
+    {MP_ROM_QSTR(MP_QSTR_key_size), (mp_obj_t)&mp_crypto_aes_key_size_obj},
+    {MP_ROM_QSTR(MP_QSTR_new), MP_ROM_PTR(&aescipher_make_new_obj)},
+};
+
+STATIC MP_DEFINE_CONST_DICT(aes_module_globals, aes_module_globals_table);
+
+const mp_obj_module_t aes_module = {
+    {&mp_type_module},
+    .globals = (mp_obj_dict_t *)&aes_module_globals,
+};

shared-bindings/displayio/FourWire.c

@@ -84,6 +84,7 @@ STATIC mp_obj_t displayio_fourwire_make_new(const mp_obj_type_t *type, size_t n_
 
     mp_obj_t spi = args[ARG_spi_bus].u_obj;
     displayio_fourwire_obj_t* self = &allocate_display_bus_or_raise()->fourwire_bus;
+    self->base.type = &displayio_fourwire_type;
 
     uint8_t polarity = args[ARG_polarity].u_int;
     if (polarity != 0 && polarity != 1) {

shared-bindings/displayio/I2CDisplay.c

@@ -73,6 +73,7 @@ STATIC mp_obj_t displayio_i2cdisplay_make_new(const mp_obj_type_t *type, size_t
 
     mp_obj_t i2c = args[ARG_i2c_bus].u_obj;
     displayio_i2cdisplay_obj_t* self = &allocate_display_bus_or_raise()->i2cdisplay_bus;
+    self->base.type = &displayio_i2cdisplay_type;
 
     common_hal_displayio_i2cdisplay_construct(self,
         MP_OBJ_TO_PTR(i2c), args[ARG_device_address].u_int, reset);

shared-bindings/displayio/ParallelBus.c

@@ -84,6 +84,7 @@ STATIC mp_obj_t displayio_parallelbus_make_new(const mp_obj_type_t *type, size_t
     mcu_pin_obj_t *reset = validate_obj_is_free_pin(args[ARG_reset].u_obj);
 
     displayio_parallelbus_obj_t* self = &allocate_display_bus_or_raise()->parallel_bus;
+    self->base.type = &displayio_parallelbus_type;
 
     common_hal_displayio_parallelbus_construct(self, data0, command, chip_select, write, read, reset);
     return self;

shared-module/crypto/__init__.c

@@ -0,0 +1,65 @@
+#include <string.h>
+
+#include "py/runtime.h"
+
+#include "shared-module/crypto/__init__.h"
+
+void common_hal_aes_construct(aes_obj_t* self,
+                              const uint8_t* key,
+                              uint32_t key_length,
+                              const uint8_t* iv,
+                              int mode,
+                              int counter) {
+    memset(&self->ctx, 0, sizeof(self->ctx));
+    if (iv != NULL) {
+        AES_init_ctx_iv(&self->ctx, key, key_length, iv);
+    } else {
+        AES_init_ctx(&self->ctx, key, key_length);
+    }
+    self->mode = mode;
+    self->counter = counter;
+}
+
+void common_hal_aes_encrypt(aes_obj_t* self,
+                            uint8_t* buffer,
+                            size_t length) {
+    switch (self->mode) {
+        case AES_MODE_ECB:
+            if (length != 16)
+                mp_raise_msg(&mp_type_ValueError, translate("ecb only operates on 16 bytes at a time"));
+            AES_ECB_encrypt(&self->ctx, buffer);
+            break;
+        case AES_MODE_CBC:
+            if ((length & 15) != 0)
+                mp_raise_msg(&mp_type_ValueError, translate("cbc blocks must be multiples of 16 bytes"));
+            AES_CBC_encrypt_buffer(&self->ctx, buffer, length);
+            break;
+        case AES_MODE_CTR:
+            AES_CTR_xcrypt_buffer(&self->ctx, buffer, length);
+            break;
+        default:
+            mp_raise_msg(&mp_type_ValueError, translate("unknown encryption mode"));
+    }
+}
+
+void common_hal_aes_decrypt(aes_obj_t* self,
+                            uint8_t* buffer,
+                            size_t length) {
+    switch (self->mode) {
+        case AES_MODE_ECB:
+            if (length != 16)
+                mp_raise_msg(&mp_type_ValueError, translate("ecp only operates on 16 bytes at a time"));
+            AES_ECB_decrypt(&self->ctx, buffer);
+            break;
+        case AES_MODE_CBC:
+            if ((length & 15) != 0)
+                mp_raise_msg(&mp_type_ValueError, translate("cbc blocks must be multiples of 16 bytes"));
+            AES_CBC_decrypt_buffer(&self->ctx, buffer, length);
+            break;
+        case AES_MODE_CTR:
+            AES_CTR_xcrypt_buffer(&self->ctx, buffer, length);
+            break;
+        default:
+            mp_raise_msg(&mp_type_ValueError, translate("unknown encryption mode"));
+    }
+}

shared-module/crypto/__init__.h

@@ -0,0 +1,57 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Dan Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_SHARED_MODULE_CRYPTO__INIT__H
+#define MICROPY_INCLUDED_SHARED_MODULE_CRYPTO__INIT__H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "py/obj.h"
+#include "py/proto.h"
+
+#include "shared-module/crypto/aes.h"
+
+enum AES_MODE {
+    AES_MODE_ECB = 1,
+    AES_MODE_CBC = 2,
+    AES_MODE_CTR = 6,
+};
+
+typedef struct {
+    mp_obj_base_t base;
+
+    // The tinyaes context
+    struct AES_ctx ctx;
+
+    // Which AES mode this instance of the object is configured to use
+    enum AES_MODE mode;
+
+    // Counter for running in CTR mode
+    uint32_t counter;
+} aes_obj_t;
+
+#endif // MICROPY_INCLUDED_SHARED_MODULE_CRYPTO__INIT__H

shared-module/crypto/aes.c

@@ -0,0 +1,608 @@
+/*
+
+This is an implementation of the AES algorithm, specifically ECB, CTR and CBC mode.
+Block size can be chosen in aes.h - available choices are AES128, AES192, AES256.
+
+The implementation is verified against the test vectors in:
+  National Institute of Standards and Technology Special Publication 800-38A 2001 ED
+
+ECB-AES128
+----------
+
+  plain-text:
+    6bc1bee22e409f96e93d7e117393172a
+    ae2d8a571e03ac9c9eb76fac45af8e51
+    30c81c46a35ce411e5fbc1191a0a52ef
+    f69f2445df4f9b17ad2b417be66c3710
+
+  key:
+    2b7e151628aed2a6abf7158809cf4f3c
+
+  resulting cipher
+    3ad77bb40d7a3660a89ecaf32466ef97
+    f5d3d58503b9699de785895a96fdbaaf
+    43b1cd7f598ece23881b00e3ed030688
+    7b0c785e27e8ad3f8223207104725dd4
+
+
+NOTE:   String length must be evenly divisible by 16byte (str_len % 16 == 0)
+        You should pad the end of the string with zeros if this is not the case.
+        For AES192/256 the key size is proportionally larger.
+
+*/
+
+/*****************************************************************************/
+/* Includes:                                                                 */
+/*****************************************************************************/
+#include <string.h> // CBC mode, for memset