diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
index b74c0b151..80a57f17b 100644
--- a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
@@ -42,7 +42,11 @@ const flexspi_nor_config_t qspiflash_config = {
         {
             .tag              = FLEXSPI_CFG_BLK_TAG,
             .version          = FLEXSPI_CFG_BLK_VERSION,
-            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally,
+#else
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,            
+#endif
             .csHoldTime       = 1u,
             .csSetupTime      = 2u,
             // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
index e9d735830..2fed6dfc6 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
@@ -113,6 +113,26 @@ const mcu_periph_obj_t mcu_uart_tx_list[9] = {
     PERIPH_PIN(4, 3, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 1, &pin_GPIO_06),
 };
 
+const mcu_periph_obj_t mcu_uart_rts_list[4] = {
+    PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_07),
+   
+    PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_07),
+
+    PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_13),
+
+    PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_13)
+};
+
+const mcu_periph_obj_t mcu_uart_cts_list[4] = {
+    PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_08),
+
+    PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_08),
+
+    PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_14),
+
+    PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_14),
+};
+
 const mcu_pwm_obj_t mcu_pwm_list[20] = {
     PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02),
     PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02),
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h
index c91d5808a..a791aa294 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h
@@ -36,6 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[4];
 
 extern const mcu_periph_obj_t mcu_uart_rx_list[9];
 extern const mcu_periph_obj_t mcu_uart_tx_list[9];
+const mcu_periph_obj_t mcu_uart_rts_list[4];
+const mcu_periph_obj_t mcu_uart_cts_list[4];                                               
 
 extern const mcu_pwm_obj_t mcu_pwm_list[20];
 
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
index 3f0473a88..9a1a4ab65 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
@@ -127,8 +127,8 @@ const mcu_periph_obj_t mcu_uart_rx_list[18] = {
     PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_26),
     PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03),
 
-    PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32),
     PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09),
+    PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32),
 
     PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05),
     PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11),
@@ -163,6 +163,44 @@ const mcu_periph_obj_t mcu_uart_tx_list[18] = {
     PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_38),
 };
 
+const mcu_periph_obj_t mcu_uart_rts_list[9] = {
+    PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_15),
+   
+    PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_01),
+
+    PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_AD_B1_05),
+    PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_EMC_16),
+
+    PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_18),
+
+    PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_27),
+
+    PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_29),
+
+    PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_07),
+
+    PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_03),
+};
+
+const mcu_periph_obj_t mcu_uart_cts_list[9] = {
+    PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_14),
+
+    PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_00),
+
+    PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_15),
+    PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04),    
+
+    PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_17),
+
+    PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_28),
+
+    PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_30),
+
+    PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_06),
+
+    PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_02),
+};
+
 const mcu_pwm_obj_t mcu_pwm_list[67] = {
     PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23),
     PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00),
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h
index b069ca76b..dbda2edb1 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h
@@ -36,6 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[8];
 
 extern const mcu_periph_obj_t mcu_uart_rx_list[18];
 extern const mcu_periph_obj_t mcu_uart_tx_list[18];
+const mcu_periph_obj_t mcu_uart_rts_list[9];
+const mcu_periph_obj_t mcu_uart_cts_list[9];
 
 extern const mcu_pwm_obj_t mcu_pwm_list[67];
 
diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c
index f97a54a89..28d5115ac 100644
--- a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c
+++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c
@@ -324,7 +324,11 @@ void flexspi_nor_flash_init(FLEXSPI_Type *base)
     config.ahbConfig.enableAHBBufferable  = true;
     config.ahbConfig.enableReadAddressOpt = true;
     config.ahbConfig.enableAHBCachable    = true;
-    config.rxSampleClock                  = kFLEXSPI_ReadSampleClkLoopbackInternally; //kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
+#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX
+    config.rxSampleClock                  = kFLEXSPI_ReadSampleClkLoopbackInternally;
+#else
+    config.rxSampleClock                  = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
+#endif
     FLEXSPI_Init(base, &config);
 
     /* Configure flash settings according to serial flash feature. */