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fix UICR check; do not use NULL for no MISO

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crypto-aes
Dan Halbert 3 years ago
parent 8258cb851e
commit be4e681d07
12 changed files with 26 additions and 16 deletions
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2
ports/atmel-samd/boards/hallowing_m4_express/board.c
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@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PA01, &pin_PA00, NULL);
common_hal_busio_spi_construct(spi, &pin_PA01, &pin_PA00, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/monster_m4sk/board.c
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@ -50,7 +50,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, NULL);
common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/openbook_m4/board.c
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@ -55,7 +55,7 @@ uint8_t stop_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL);
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/pewpew_m4/board.c
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@ -97,7 +97,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA15, NULL);
common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/pybadge/board.c
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@ -72,7 +72,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL);
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/pybadge_airlift/board.c
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@ -50,7 +50,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL);
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/pygamer/board.c
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@ -72,7 +72,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL);
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/atmel-samd/boards/pygamer_advance/board.c
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@ -50,7 +50,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB12, NULL);
common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB12, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/nrf/boards/clue_nrf52840_express/board.c
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@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL);
common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

2
ports/nrf/boards/ohs2020_badge/board.c
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@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = {
void board_init(void) {
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL);
common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;

4
ports/nrf/common-hal/busio/SPI.c
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@ -143,7 +143,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *
self->clock_pin_number = clock->number;
claim_pin(clock);
if (mosi != (mcu_pin_obj_t*)&mp_const_none_obj) {
if (mosi != mp_const_none) {
config.mosi_pin = mosi->number;
self->MOSI_pin_number = mosi->number;
claim_pin(mosi);
@ -151,7 +151,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *
self->MOSI_pin_number = NO_PIN;
}
if (miso != (mcu_pin_obj_t*)&mp_const_none_obj) {
if (miso != mp_const_none) {
config.miso_pin = miso->number;
self->MISO_pin_number = mosi->number;
claim_pin(miso);

18
ports/nrf/peripherals/nrf/nrf52840/power.c
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@ -25,16 +25,26 @@
*/
#include "nrfx.h"
#include "nrfx_nvmc.h"
#include "hal/nrf_nvmc.h"
void nrf_peripherals_power_init(void) {
// Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff
// if flash is erased, which sets the default to 1.8V
// This matters only when "high voltage mode" is enabled, which is true on the PCA10059,
// and might be true on other boards.
if (NRF_UICR->REGOUT0 == 0xffffffff) {
nrfx_nvmc_word_write((uint32_t) &NRF_UICR->REGOUT0, UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos);
// Must reset to make enable change.
if (NRF_UICR->REGOUT0 == 0xffffffff && NRF_POWER->MAINREGSTATUS & 1) {
// Expand what nrf_nvmc_word_write() did.
// It's missing from nrfx V2.0.0, and nrfx_nvmc_word_write() does bounds
// checking which prevents writes to UICR.
// Reported: https://devzone.nordicsemi.com/f/nordic-q-a/57243/nrfx_nvmc-h-api-cannot-write-to-uicr
NRF_NVMC->CONFIG = NRF_NVMC_MODE_WRITE;
while (!(NRF_NVMC->READY & NVMC_READY_READY_Msk)) {}
NRF_UICR->REGOUT0 = UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos;
__DMB();
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_NVMC->CONFIG = NRF_NVMC_MODE_READONLY;
// Must reset to enable change.
NVIC_SystemReset();
}
}

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