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@ -69,15 +69,15 @@ STATIC uint32_t timer_get_source_freq(uint32_t tim_id) {
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STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) {
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//duty cycle is duty/0xFFFF fraction x (number of pulses per period)
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return (duty*period)/((1<<16)-1);
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return (duty*period) / ((1 << 16) - 1);
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}
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STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler,
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uint32_t frequency, uint32_t source_freq) {
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//Find the largest possible period supported by this frequency
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for (int i=0; i<(1 << 16);i++) {
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*period = source_freq/(i*frequency);
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if (*period < (1 << 16) && *period>=2) {
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for (int i = 0; i < (1 << 16); i++) {
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*period = source_freq / (i * frequency);
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if (*period < (1 << 16) && *period >= 2) {
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*prescaler = i;
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break;
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}
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@ -89,59 +89,40 @@ STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler,
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void pwmout_reset(void) {
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uint16_t never_reset_mask = 0x00;
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for(int i=0;i<TIM_BANK_ARRAY_LEN;i++) {
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for (int i = 0; i < TIM_BANK_ARRAY_LEN; i++) {
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if (!never_reset_tim[i]) {
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reserved_tim[i] = 0x00;
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tim_frequencies[i] = 0x00;
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} else {
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never_reset_mask |= 1<<i;
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never_reset_mask |= 1 << i;
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}
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}
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tim_clock_disable(ALL_CLOCKS & ~(never_reset_mask));
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}
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void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) {
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for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) {
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if (mcu_tim_banks[i] == self->handle.Instance) {
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never_reset_tim[i] = true;
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never_reset_pin_number(self->tim->pin->port, self->tim->pin->number);
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break;
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}
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}
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}
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void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) {
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for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) {
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if (mcu_tim_banks[i] == self->handle.Instance) {
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never_reset_tim[i] = false;
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break;
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}
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}
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}
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pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
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const mcu_pin_obj_t* pin,
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uint16_t duty,
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uint32_t frequency,
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bool variable_frequency) {
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TIM_TypeDef * TIMx;
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uint8_t tim_num = sizeof(mcu_tim_pin_list)/sizeof(*mcu_tim_pin_list);
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uint8_t tim_num = MP_ARRAY_SIZE(mcu_tim_pin_list);
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bool tim_chan_taken = false;
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bool tim_taken_f_mismatch = false;
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bool var_freq_mismatch = false;
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bool first_time_setup = true;
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for(uint i = 0; i < tim_num; i++) {
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for (uint i = 0; i < tim_num; i++) {
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mcu_tim_pin_obj_t l_tim = mcu_tim_pin_list[i];
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uint8_t l_tim_index = l_tim.tim_index-1;
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uint8_t l_tim_channel = l_tim.channel_index-1;
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uint8_t l_tim_index = l_tim.tim_index - 1;
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uint8_t l_tim_channel = l_tim.channel_index - 1;
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//if pin is same
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if (l_tim.pin == pin) {
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//check if the timer has a channel active
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if (reserved_tim[l_tim_index] != 0) {
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//is it the same channel? (or all channels reserved by a var-freq)
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if (reserved_tim[l_tim_index] & 1<<(l_tim_channel)) {
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if (reserved_tim[l_tim_index] & 1 << (l_tim_channel)) {
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tim_chan_taken = true;
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continue; //keep looking, might be another viable option
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}
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@ -164,21 +145,21 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
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}
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//handle valid/invalid timer instance
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if (self->tim!=NULL) {
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if (self->tim != NULL) {
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//create instance
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TIMx = mcu_tim_banks[self->tim->tim_index-1];
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TIMx = mcu_tim_banks[self->tim->tim_index - 1];
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//reserve timer/channel
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if (variable_frequency) {
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reserved_tim[self->tim->tim_index-1] = 0x0F;
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reserved_tim[self->tim->tim_index - 1] = 0x0F;
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} else {
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reserved_tim[self->tim->tim_index-1] |= 1<<(self->tim->channel_index-1);
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reserved_tim[self->tim->tim_index - 1] |= 1 << (self->tim->channel_index - 1);
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}
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tim_frequencies[self->tim->tim_index-1] = frequency;
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tim_frequencies[self->tim->tim_index - 1] = frequency;
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} else { //no match found
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if (tim_chan_taken) {
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mp_raise_ValueError(translate("No more timers available on this pin."));
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} else if (tim_taken_f_mismatch) {
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mp_raise_ValueError(translate("Frequency must be the same as as the existing PWMOut using this timer"));
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mp_raise_ValueError(translate("Frequency must match existing PWMOut using this timer"));
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} else if (var_freq_mismatch) {
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mp_raise_ValueError(translate("Cannot vary frequency on a timer that is already in use"));
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} else {
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@ -194,14 +175,15 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
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GPIO_InitStruct.Alternate = self->tim->altfn_index;
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HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct);
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tim_clock_enable(1<<(self->tim->tim_index - 1));
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tim_clock_enable(1 << (self->tim->tim_index - 1));
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//translate channel into handle value
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self->channel = 4 * (self->tim->channel_index - 1);
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uint32_t prescaler = 0; //prescaler is 15 bit
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uint32_t period = 0; //period is 16 bit
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timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index));
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timer_get_optimal_divisors(&period, &prescaler, frequency,
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timer_get_source_freq(self->tim->tim_index));
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//Timer init
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self->handle.Instance = TIMx;
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@ -241,6 +223,25 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
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return PWMOUT_OK;
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}
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void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) {
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for (size_t i = 0; i < TIM_BANK_ARRAY_LEN; i++) {
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if (mcu_tim_banks[i] == self->handle.Instance) {
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never_reset_tim[i] = true;
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never_reset_pin_number(self->tim->pin->port, self->tim->pin->number);
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break;
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}
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}
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}
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void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) {
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for(size_t i = 0; i < TIM_BANK_ARRAY_LEN; i++) {
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if (mcu_tim_banks[i] == self->handle.Instance) {
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never_reset_tim[i] = false;
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break;
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}
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}
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}
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bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) {
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return self->tim == mp_const_none;
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}
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@ -251,18 +252,18 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) {
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}
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//var freq shuts down entire timer, others just their channel
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if (self->variable_frequency) {
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reserved_tim[self->tim->tim_index-1] = 0x00;
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reserved_tim[self->tim->tim_index - 1] = 0x00;
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} else {
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reserved_tim[self->tim->tim_index-1] &= ~(1<<self->tim->channel_index);
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reserved_tim[self->tim->tim_index - 1] &= ~(1 << self->tim->channel_index);
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HAL_TIM_PWM_Stop(&self->handle, self->channel);
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}
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reset_pin_number(self->tim->pin->port,self->tim->pin->number);
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self->tim = mp_const_none;
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//if reserved timer has no active channels, we can disable it
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if (!reserved_tim[self->tim->tim_index-1]) {
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tim_frequencies[self->tim->tim_index-1] = 0x00;
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tim_clock_disable(1<<(self->tim->tim_index-1));
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if (!reserved_tim[self->tim->tim_index - 1]) {
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tim_frequencies[self->tim->tim_index - 1] = 0x00;
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tim_clock_disable(1 << (self->tim->tim_index - 1));
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}
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}
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@ -278,11 +279,14 @@ uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) {
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void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) {
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//don't halt setup for the same frequency
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if (frequency == self->frequency) return;
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if (frequency == self->frequency) {
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return;
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}
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uint32_t prescaler = 0;
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uint32_t period = 0;
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timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index));
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timer_get_optimal_divisors(&period, &prescaler, frequency,
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timer_get_source_freq(self->tim->tim_index));
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//shut down
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HAL_TIM_PWM_Stop(&self->handle, self->channel);
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@ -305,7 +309,7 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_
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mp_raise_ValueError(translate("Could not restart PWM"));
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}
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tim_frequencies[self->tim->tim_index-1] = frequency;
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tim_frequencies[self->tim->tim_index - 1] = frequency;
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self->frequency = frequency;
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self->period = period;
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}
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@ -320,80 +324,128 @@ bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self
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STATIC void tim_clock_enable(uint16_t mask) {
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#ifdef TIM1
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if (mask & 1<<0) __HAL_RCC_TIM1_CLK_ENABLE();
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if (mask & (1 << 0)) {
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__HAL_RCC_TIM1_CLK_ENABLE();
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}
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#endif
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#ifdef TIM2
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if (mask & 1<<1) __HAL_RCC_TIM2_CLK_ENABLE();
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if (mask & (1 << 1)) {
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__HAL_RCC_TIM2_CLK_ENABLE();
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}
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#endif
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#ifdef TIM3
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if (mask & 1<<2) __HAL_RCC_TIM3_CLK_ENABLE();
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if (mask & (1 << 2)) {
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__HAL_RCC_TIM3_CLK_ENABLE();
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}
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#endif
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#ifdef TIM4
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if (mask & 1<<3) __HAL_RCC_TIM4_CLK_ENABLE();
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if (mask & (1 << 3)) {
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__HAL_RCC_TIM4_CLK_ENABLE();
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}
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#endif
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#ifdef TIM5
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if (mask & 1<<4) __HAL_RCC_TIM5_CLK_ENABLE();
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if (mask & (1 << 4)) {
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__HAL_RCC_TIM5_CLK_ENABLE();
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}
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#endif
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//6 and 7 are reserved ADC timers
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#ifdef TIM8
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if (mask & 1<<7) __HAL_RCC_TIM8_CLK_ENABLE();
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if (mask & (1 << 7)) {
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__HAL_RCC_TIM8_CLK_ENABLE();
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}
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#endif
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#ifdef TIM9
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if (mask & 1<<8) __HAL_RCC_TIM9_CLK_ENABLE();
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if (mask & (1 << 8)) {
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__HAL_RCC_TIM9_CLK_ENABLE();
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}
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#endif
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#ifdef TIM10
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if (mask & 1<<9) __HAL_RCC_TIM10_CLK_ENABLE();
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if (mask & (1 << 9)) {
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__HAL_RCC_TIM10_CLK_ENABLE();
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}
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#endif
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#ifdef TIM11
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if (mask & 1<<10) __HAL_RCC_TIM11_CLK_ENABLE();
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if (mask & (1 << 10)) {
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__HAL_RCC_TIM11_CLK_ENABLE();
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}
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#endif
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#ifdef TIM12
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if (mask & 1<<11) __HAL_RCC_TIM12_CLK_ENABLE();
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if (mask & (1 << 11)) {
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__HAL_RCC_TIM12_CLK_ENABLE();
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}
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#endif
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#ifdef TIM13
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if (mask & 1<<12) __HAL_RCC_TIM13_CLK_ENABLE();
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if (mask & (1 << 12)) {
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__HAL_RCC_TIM13_CLK_ENABLE();
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}
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#endif
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#ifdef TIM14
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if (mask & 1<<13) __HAL_RCC_TIM14_CLK_ENABLE();
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if (mask & (1 << 13)) {
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__HAL_RCC_TIM14_CLK_ENABLE();
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}
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#endif
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}
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STATIC void tim_clock_disable(uint16_t mask) {
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#ifdef TIM1
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if (mask & 1<<0) __HAL_RCC_TIM1_CLK_DISABLE();
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if (mask & (1 << 0)) {
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__HAL_RCC_TIM1_CLK_DISABLE();
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}
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#endif
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#ifdef TIM2
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if (mask & 1<<1) __HAL_RCC_TIM2_CLK_DISABLE();
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if (mask & (1 << 1)) {
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__HAL_RCC_TIM2_CLK_DISABLE();
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}
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#endif
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#ifdef TIM3
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if (mask & 1<<2) __HAL_RCC_TIM3_CLK_DISABLE();
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if (mask & (1 << 2)) {
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__HAL_RCC_TIM3_CLK_DISABLE();
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}
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#endif
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#ifdef TIM4
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|
|
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if (mask & 1<<3) __HAL_RCC_TIM4_CLK_DISABLE();
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if (mask & (1 << 3)) {
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__HAL_RCC_TIM4_CLK_DISABLE();
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}
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#endif
|
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|
|
#ifdef TIM5
|
|
|
|
|
if (mask & 1<<4) __HAL_RCC_TIM5_CLK_DISABLE();
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|
|
|
|
if (mask & (1 << 4)) {
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|
|
|
__HAL_RCC_TIM5_CLK_DISABLE();
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}
|
|
|
|
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#endif
|
|
|
|
|
//6 and 7 are reserved ADC timers
|
|
|
|
|
#ifdef TIM8
|
|
|
|
|
if (mask & 1<<7) __HAL_RCC_TIM8_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 7)) {
|
|
|
|
|
__HAL_RCC_TIM8_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef TIM9
|
|
|
|
|
if (mask & 1<<8) __HAL_RCC_TIM9_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 8)) {
|
|
|
|
|
__HAL_RCC_TIM9_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef TIM10
|
|
|
|
|
if (mask & 1<<9) __HAL_RCC_TIM10_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 9)) {
|
|
|
|
|
__HAL_RCC_TIM10_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef TIM11
|
|
|
|
|
if (mask & 1<<10) __HAL_RCC_TIM11_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 10)) {
|
|
|
|
|
__HAL_RCC_TIM11_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef TIM12
|
|
|
|
|
if (mask & 1<<11) __HAL_RCC_TIM12_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 11)) {
|
|
|
|
|
__HAL_RCC_TIM12_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef TIM13
|
|
|
|
|
if (mask & 1<<12) __HAL_RCC_TIM13_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 12)) {
|
|
|
|
|
__HAL_RCC_TIM13_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef TIM14
|
|
|
|
|
if (mask & 1<<13) __HAL_RCC_TIM14_CLK_DISABLE();
|
|
|
|
|
if (mask & (1 << 13)) {
|
|
|
|
|
__HAL_RCC_TIM14_CLK_DISABLE();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|