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Merge pull request #2735 from hierophect/stm32x7-setup

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STM32: Add F7 and H7 Support
crypto-aes
hierophect 3 years ago committed by GitHub
parent 669ac3f7f2 9e49fc13f4
commit 1a71c8c515
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GPG Key ID: 4AEE18F83AFDEB23
151 changed files with 6674 additions and 4564 deletions
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2
.github/workflows/build.yml vendored
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@ -200,6 +200,8 @@ jobs:
- "monster_m4sk"
- "ndgarage_ndbit6"
- "nfc_copy_cat"
- "nucleo_f767zi"
- "nucleo_h743zi_2"
- "ohs2020_badge"
- "openbook_m4"
- "particle_argon"

1
conf.py
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@ -138,6 +138,7 @@ exclude_patterns = ["**/build*",
"ports/nrf/peripherals",
"ports/nrf/usb",
"ports/stm/st_driver",
"ports/stm/packages",
"ports/stm/peripherals",
"ports/stm/ref",
"ports/unix",

2
locale/ID.po
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@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"

2
locale/circuitpython.pot
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@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 12:24-0400\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"

2
locale/de_DE.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-07-27 11:55-0700\n"
"Last-Translator: Pascal Deneaux\n"
"Language-Team: Sebastian Plamauer, Pascal Deneaux\n"

2
locale/en_US.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-07-27 11:55-0700\n"
"Last-Translator: \n"
"Language-Team: \n"

2
locale/en_x_pirate.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-07-27 11:55-0700\n"
"Last-Translator: \n"
"Language-Team: @sommersoft, @MrCertainly\n"

2
locale/es.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-08-24 22:56-0500\n"
"Last-Translator: \n"
"Language-Team: \n"

2
locale/fil.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-12-20 22:15-0800\n"
"Last-Translator: Timothy <me@timothygarcia.ca>\n"
"Language-Team: fil\n"

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locale/fr.po
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@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: 0.1\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2019-04-14 20:05+0100\n"
"Last-Translator: Pierrick Couturier <arofarn@arofarn.info>\n"
"Language-Team: fr\n"

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locale/it_IT.po
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@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-10-02 16:27+0200\n"
"Last-Translator: Enrico Paganin <enrico.paganin@mail.com>\n"
"Language-Team: \n"

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locale/ko.po
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@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2019-05-06 14:22-0700\n"
"Last-Translator: \n"
"Language-Team: LANGUAGE <LL@li.org>\n"

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locale/pl.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2019-03-19 18:37-0700\n"
"Last-Translator: Radomir Dopieralski <circuitpython@sheep.art.pl>\n"
"Language-Team: pl\n"

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locale/pt_BR.po
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@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2018-10-02 21:14-0000\n"
"Last-Translator: \n"
"Language-Team: \n"

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locale/zh_Latn_pinyin.po
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@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: circuitpython-cn\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2020-04-14 18:26-0500\n"
"POT-Creation-Date: 2020-04-15 10:24-0400\n"
"PO-Revision-Date: 2019-04-13 10:10-0700\n"
"Last-Translator: hexthat\n"
"Language-Team: Chinese Hanyu Pinyin\n"

2
ports/mimxrt10xx/supervisor/port.c
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@ -154,7 +154,7 @@ __attribute__((used, naked)) void Reset_Handler(void) {
/* Disable MPU */
ARM_MPU_Disable();
// Copy all of the code to run from ITCM. Do this while the MPU is disabled because we write
// Copy all of the itcm code to run from ITCM. Do this while the MPU is disabled because we write
// protect it.
for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) {
(&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i];

194
ports/stm/Makefile
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@ -22,15 +22,14 @@
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
# THE SOFTWARE.
# DEBUG = 1
# Select the board to build for.
ifeq ($(BOARD),)
$(error You must provide a BOARD parameter)
$(error You must provide a BOARD parameter)
else
ifeq ($(wildcard boards/$(BOARD)/.),)
$(error Invalid BOARD specified)
endif
ifeq ($(wildcard boards/$(BOARD)/.),)
$(error Invalid BOARD specified)
endif
endif
# If the build directory is not given, make it reflect the board name.
@ -58,26 +57,27 @@ include $(TOP)/py/circuitpy_defns.mk
CROSS_COMPILE = arm-none-eabi-
#######################################
# CFLAGS
#######################################
MCU_SERIES_LOWER = $(shell echo $(MCU_SERIES) | tr '[:upper:]' '[:lower:]')
MCU_VARIANT_LOWER = $(shell echo $(MCU_VARIANT) | tr '[:upper:]' '[:lower:]')
HAL_DIR=st_driver/STM32$(MCU_SERIES)xx_HAL_Driver
INC += -I.
INC += -I../..
INC += -I$(BUILD)
INC += -I$(BUILD)/genhdr
INC += -I./st_driver/STM32F4xx_HAL_Driver/Inc
INC += -I./st_driver/STM32F4xx_HAL_Driver/Inc/Legacy
INC += -I./st_driver/CMSIS/Device/ST/STM32F4xx/Include
INC += -I./$(HAL_DIR)/Inc
INC += -I./$(HAL_DIR)/Inc/Legacy
INC += -I./st_driver/CMSIS/Device/ST/STM32$(MCU_SERIES)xx/Include
INC += -I./st_driver/CMSIS/Include
INC += -I./boards
INC += -I./boards/$(BOARD)
INC += -I./peripherals
INC += -I./packages
INC += -I../../lib/mp-readline
INC += -I../../lib/tinyusb/src
INC += -I../../supervisor/shared/usb
#Debugging/Optimization
ifeq ($(DEBUG), 1)
CFLAGS += -ggdb
@ -87,32 +87,37 @@ else
CFLAGS += -Os -DNDEBUG
CFLAGS += -ggdb
# TODO: Test with -flto
### CFLAGS += -flto
# CFLAGS += -flto
endif
# MCU Series is defined by the HAL package and doesn't need to be specified here
C_DEFS = -D$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(MCU_VARIANT)
C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
CFLAGS += $(INC) -Werror -Wall -std=gnu11 $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) -nostdlib -nostartfiles
# Undo some warnings.
# STM32 apparently also uses undefined preprocessor variables quite casually,
# so we can't do warning checks for these.
CFLAGS += -Wno-undef
# STM32 might do casts that increase alignment requirements.
CFLAGS += -Wno-cast-align
# STM32 HAL uses undefined preprocessor variables, shadowed variables, casts that change alignment reqs
CFLAGS += -Wno-undef -Wno-shadow -Wno-cast-align
CFLAGS += \
-mthumb \
-mabi=aapcs-linux \
-mfloat-abi=hard \
-mcpu=cortex-m4 \
-mfpu=fpv4-sp-d16
CFLAGS += -mthumb -mabi=aapcs-linux
# Arm core selection
MCU_FLAGS_F4 = -mcpu=cortex-m4
MCU_FLAGS_F7 = -mcpu=cortex-m7
MCU_FLAGS_H7 = -mcpu=cortex-m7
CFLAGS += $(MCU_FLAGS_$(MCU_SERIES))
# Select HAL file for distribution via mpconfigport
CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES_LOWER)xx_hal.h>'
# TODO: check this
CFLAGS += -D__START=main
# Floating point settings
ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx))
CFLAGS += -mfpu=fpv5-d16 -mfloat-abi=hard
else
CFLAGS += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
endif
#need both command and valid file to use uf2 bootloader
# Need both command and valid file to use uf2 bootloader
ifndef LD_FILE
ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),)
LD_FILE = $(LD_BOOT)
@ -128,66 +133,70 @@ ifndef BOOTLOADER_OFFSET
BOOTLOADER_OFFSET := 0x8000000
endif
LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-T,$(LD_COMMON) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
LIBS := -lgcc -lc
LDFLAGS += -mthumb -mcpu=cortex-m4
# Use toolchain libm if we're not using our own.
ifndef INTERNAL_LIBM
LIBS += -lm
endif
# TinyUSB defines
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128
######################################
# source
######################################
SRC_STM32 = \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.c \
st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.c \
system_stm32f4xx.c
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32$(MCU_SERIES) \
-DCFG_TUD_CDC_RX_BUFSIZE=1024 \
-DCFG_TUD_CDC_TX_BUFSIZE=1024 \
-DCFG_TUD_MSC_BUFSIZE=4096 \
-DCFG_TUD_MIDI_RX_BUFSIZE=128 \
-DCFG_TUD_MIDI_TX_BUFSIZE=128
SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\
hal_adc.c \
hal_adc_ex.c \
hal_dac.c \
hal_dac_ex.c \
hal_i2c.c \
hal_i2c_ex.c \
hal_qspi.c \
hal_rng.c \
hal_rtc.c \
hal_rtc_ex.c \
hal_spi.c \
hal_tim.c \
hal_tim_ex.c \
hal_uart.c \
hal_usart.c \
hal_rcc.c \
hal_rcc_ex.c \
hal_flash.c \
hal_flash_ex.c \
hal_gpio.c \
hal_dma_ex.c \
hal_dma.c \
hal_pwr.c \
hal_pwr_ex.c \
hal_cortex.c \
hal.c \
hal_exti.c \
hal_sd.c \
ll_gpio.c \
ll_adc.c \
ll_i2c.c \
ll_dma.c \
ll_sdmmc.c \
ll_usart.c \
ll_rcc.c \
ll_utils.c \
ll_exti.c \
)
# Need this to avoid UART linker problems. TODO: rewrite to use registered callbacks.
# Does not exist for F4 and lower
ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx))
SRC_STM32 += $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_hal_uart_ex.c
endif
SRC_STM32 += boards/system_stm32$(MCU_SERIES_LOWER)xx.c
SRC_C += \
background.c \
@ -196,10 +205,11 @@ SRC_C += \
tick.c \
boards/$(BOARD)/board.c \
boards/$(BOARD)/pins.c \
peripherals/stm32f4/$(MCU_SUB_VARIANT)/pins.c \
peripherals/stm32f4/$(MCU_SUB_VARIANT)/clocks.c \
peripherals/stm32f4/$(MCU_SUB_VARIANT)/gpio.c \
peripherals/stm32f4/$(MCU_SUB_VARIANT)/periph.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/pins.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/clocks.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/gpio.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/periph.c \
packages/$(MCU_PACKAGE).c\
lib/libc/string0.c \
lib/mp-readline/readline.c \
lib/oofatfs/ff.c \
@ -219,7 +229,7 @@ endif
SRC_S = \
supervisor/cpu.s \
boards/startup_$(MCU_SUB_VARIANT).s
st_driver/CMSIS/Device/ST/STM32$(MCU_SERIES)xx/Source/Templates/gcc/startup_$(MCU_VARIANT_LOWER).s
SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
$(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
@ -253,6 +263,12 @@ SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(SRC_COMMON_HAL_EXPANDED) $(S
# Sources that only hold QSTRs after pre-processing.
SRC_QSTR_PREPROCESSOR +=
# Bin section settings specific to the STM32H7
ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32H743xx))
MCU_SECTIONS = -j .isr_vector -j .text -j .data -j .itcm -j .dtcm_data $^ $@
else
MCU_SECTIONS = $^ $@
endif
all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2
@ -263,13 +279,11 @@ $(BUILD)/firmware.elf: $(OBJ)
$(BUILD)/firmware.bin: $(BUILD)/firmware.elf
$(STEPECHO) "Create $@"
$(Q)$(OBJCOPY) -O binary $^ $@
# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@
$(Q)$(OBJCOPY) -O binary $(MCU_SECTIONS)
$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
$(STEPECHO) "Create $@"
$(Q)$(OBJCOPY) -O ihex $^ $@
# $(Q)$(OBJCOPY) -O ihex -j .vectors -j .text -j .data $^ $@
$(Q)$(OBJCOPY) -O ihex $(MCU_SECTIONS)
$(BUILD)/firmware.uf2: $(BUILD)/firmware.hex
$(ECHO) "Create $@"

4
ports/stm/README.md
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@ -1,3 +1,3 @@
# CircuitPython Port To The ST Microelectronics STM32F4 Series
# CircuitPython Port To The ST Microelectronics STM32 Series
This is a port of CircuitPython to the STM32F4 series of chips.
This is a port of CircuitPython to the STM32 series of chips.

6
ports/stm/background.h
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@ -24,12 +24,12 @@
* THE SOFTWARE.
*/
#ifndef MICROPY_INCLUDED_STM32F4_BACKGROUND_H
#define MICROPY_INCLUDED_STM32F4_BACKGROUND_H
#ifndef MICROPY_INCLUDED_STM32_BACKGROUND_H
#define MICROPY_INCLUDED_STM32_BACKGROUND_H
#include <stdbool.h>
void background_tasks_reset(void);
void run_background_tasks(void);
#endif // MICROPY_INCLUDED_STM32F4_BACKGROUND_H
#endif // MICROPY_INCLUDED_STM32_BACKGROUND_H

83
ports/stm/boards/STM32F401xd_fs.ld
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@ -1,5 +1,5 @@
/*
GNU linker script for STM32F401 with bootloader (such as the Meowbit)
GNU linker script for STM32F401 with filesystem
*/
/* Specify the memory areas */
@ -24,84 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F401xe_boot.ld
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@ -1,5 +1,5 @@
/*
GNU linker script for STM32F401 with bootloader (such as the Meowbit)
GNU linker script for STM32F401 with bootloader (such as the Meowbit). No internal fs.
*/
/* Specify the memory areas */
@ -24,83 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

81
ports/stm/boards/STM32F401xe_fs.ld
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@ -24,84 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

80
ports/stm/boards/STM32F405_boot.ld
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@ -1,6 +1,5 @@
/*
GNU linker script for STM32F405 with bootloader
Based on Micropython
*/
/* Specify the memory areas */
@ -26,82 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F405_default.ld
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@ -1,5 +1,5 @@
/*
GNU linker script for STM32F405 via Micropython
GNU linker script for STM32F405, no filesystem
*/
/* Specify the memory areas */
@ -25,83 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F405_fs.ld
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@ -1,5 +1,5 @@
/*
GNU linker script for STM32F405 via Micropython
GNU linker script for STM32F405 with filesystem
*/
/* Specify the memory areas */
@ -26,83 +26,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F407_fs.ld
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@ -1,5 +1,5 @@
/*
GNU linker script for STM32F405 via Micropython
GNU linker script for STM32F407 with filesystem
*/
/* Specify the memory areas */
@ -26,83 +26,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

27
ports/stm/boards/STM32F411_fs.ld
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@ -0,0 +1,27 @@
/*
GNU linker script for STM32F411 with filesystem
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

27
ports/stm/boards/STM32F411_nvm.ld
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@ -0,0 +1,27 @@
/*
GNU linker script for STM32F411 with nvm
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */
FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define the top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

27
ports/stm/boards/STM32F412_fs.ld
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@ -0,0 +1,27 @@
/*
GNU linker script for STM32F412 with filesystem, tcm
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

27
ports/stm/boards/STM32F767_fs.ld
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@ -0,0 +1,27 @@
/*
GNU linker script for STM32F767 with filesystem
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1,2,3 are 32K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 1920K /* sector 4 is 128K, sectors 5,6,7 are 256K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

39
ports/stm/boards/STM32H743_fs.ld
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@ -0,0 +1,39 @@
/*
GNU linker script for STM32H743 with filesystem, tcm
*/
/* Entry Point */
ENTRY(Reset_Handler)
_ld_default_stack_size = 24K;
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* sector 0, 128K */
FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* sector 1, 128K */
FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1792K /* sectors 6*128 + 8*128 */
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM */
SRAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K /* AHB1 SRAM */
SRAM_D3 (xrw) : ORIGIN = 0x30040000, LENGTH = 64K /* AHB2 SRAM */
ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* brainless copy paste for stack code. Results in ambiguous hard crash */
/* _ld_default_stack_size = 20K; */
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(DTCM) + LENGTH(DTCM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

46
ports/stm/boards/STM32F412ZGTx_FLASH.ld → ports/stm/boards/common_default.ld
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@ -1,34 +1,20 @@
/*
GNU linker script for STM32F412
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Memory layout for default case.
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
FLASH_FS // ignored for fs use
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x20020000; /* tunable */
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
ENTRY(Reset_Handler)
_ld_default_stack_size = _minimum_stack_size;
/* define output sections */
SECTIONS
{
@ -51,6 +37,8 @@ SECTIONS
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
@ -89,17 +77,23 @@ SECTIONS
.heap :
{
. = ALIGN(4);
_ld_heap_start = .;
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
_ld_stack_bottom = .;
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
_ld_stack_top = ORIGIN(RAM) + LENGTH(RAM);
.ARM.attributes 0 : { *(.ARM.attributes) }
}

56
ports/stm/boards/STM32F411VETx_FLASH.ld → ports/stm/boards/common_nvm.ld
Unescape Escape View File

@ -1,34 +1,22 @@
/*
GNU linker script for STM32F411 via Micropython
/* Memory layout for case with dedicated nvm sector (inefficient)
TODO: rewrite nvm module, remove this file entirely
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
FLASH_NVM .nvm_data
FLASH_FS // ignored for fs use
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x2001c000; /* tunable */
ENTRY(Reset_Handler)
_ld_default_stack_size = _minimum_stack_size;
/* define output sections */
SECTIONS
{
@ -45,6 +33,14 @@ SECTIONS
. = ALIGN(4);
} >FLASH_ISR
/* Non-volitile memory */
.nvm_data :
{
. = ALIGN(4);
KEEP(*(.nvm_data))
. = ALIGN(4);
} >FLASH_NVM
/* The program code and other data goes into FLASH */
.text :
{
@ -91,19 +87,23 @@ SECTIONS
.heap :
{
. = ALIGN(4);
_ld_heap_start = .;
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
_ld_stack_bottom = .;
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
_ld_stack_top = ORIGIN(RAM) + LENGTH(RAM);
.ARM.attributes 0 : { *(.ARM.attributes) }
}

101
ports/stm/boards/STM32F411VETx_nvm_FLASH.ld → ports/stm/boards/common_tcm.ld
Unescape Escape View File

@ -1,32 +1,19 @@
/*
GNU linker script for STM32F411 via Micropython
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */
FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* Memory layout for cases with itcm and dtcm
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
FLASH_FS // ignored for fs use
/* Define the top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
RAM .data
RAM .bss
RAM .heap
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x2001c000; /* tunable */
ITCM .itcm
DTCM .dtcm_data
DTCM .dtcm_bss
DTCM .stack
*/
ENTRY(Reset_Handler)
@ -46,14 +33,6 @@ SECTIONS
. = ALIGN(4);
} >FLASH_ISR
/* Non-volitile memory */
.nvm_data :
{
. = ALIGN(4);
KEEP(*(.nvm_data))
. = ALIGN(4);
} >FLASH_NVM
/* The program code and other data goes into FLASH */
.text :
{
@ -83,6 +62,9 @@ SECTIONS
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
_ld_d1_ram_data_destination = ADDR(.data);
_ld_d1_ram_data_flash_copy = LOADADDR(.data);
_ld_d1_ram_data_size = SIZEOF(.data);
/* Uninitialized data section */
.bss :
@ -95,6 +77,10 @@ SECTIONS
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
_ld_d1_ram_bss_start = ADDR(.bss);
_ld_d1_ram_bss_size = SIZEOF(.bss);
_ld_heap_start = _ld_d1_ram_bss_start + _ld_d1_ram_bss_size;
_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
@ -104,15 +90,50 @@ SECTIONS
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
/* itcm stuff */
.itcm :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
*(.itcm.*)
. = ALIGN(4);
} >RAM
} > ITCM AT> FLASH_TEXT
_ld_itcm_destination = ADDR(.itcm);
_ld_itcm_flash_copy = LOADADDR(.itcm);
_ld_itcm_size = SIZEOF(.itcm);
.ARM.attributes 0 : { *(.ARM.attributes) }
}
.dtcm_data :
{
. = ALIGN(4);
*(.dtcm_data.*)
. = ALIGN(4);